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OpenCloudOS-Kernel
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13 Commits

Author SHA1 Message Date
John Garry 85b2c3c040 hisi_sas: add v2 code for itct setup and free 
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry c2d8939275 hisi_sas: add v2 code to send smp command 
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 8c36e31d6e hisi_sas: add v2 path to send ssp frame 
Include code to prep ssp frame and deliver to hardware.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 31a9cfa6f7 hisi_sas: add v2 cq interrupt handler 
Also include slot_complete_v2_hw handler

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry d43f9cdb7f hisi_sas: add v2 SATA interrupt handler 
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry d3bf3d84d3 hisi_sas: add v2 channel interrupt handler 
This also includes broadcast handler. Unlike v1 hw, broadcast does not
have its own dedicated interrupt.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 5473c06081 hisi_sas: add v2 phy down handler 
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 7911e66f1f hisi_sas: add v2 int init and phy up handler 
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 29a2042863 hisi_sas: add v2 phy init code 
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 806bb768a2 hisi_sas: add init_id_frame_v2_hw() 
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 94eac9e1ab hisi_sas: add v2 hw init 
Add code to initialise the hardware.

Support is also added to deal with the "am-max-transmissions" (amt)
limitation in hip06 controller #1. This is how many connection requests
we can send on the system bus before waiting for a response.  Due to
chip bus design, controller #1 is limited to 32 amt, while, by design, a
controller supports 64.  The default value for the nibbles in the
relevant registers is 0x40; these need to be programmed with 0x20.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 45c901b848 hisi_sas: add v2 register definitions 
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00
John Garry 3417ba8abd hisi_sas: add bare v2 hw driver 
Just add enough to build and init the module.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
 2016-02-23 21:27:02 -05:00