Commits 2f3724930e ("interconnect: qcom: sc7180: Drop IP0
interconnects") and 2fb251c265 ("interconnect: qcom: sdx55: Drop IP0
interconnects") removed IP0 interconnects (and ipa-virt devices support)
in favour of the RPMH clocks. Follow this example for other platforms
defining IP0 RPMH resource. While we are at it, remove several leftover
from the mentioned patches.
* icc-ip0-migration:
interconnect: qcom: sdx55: drop IP0 remnants
interconnect: qcom: sc7180: drop IP0 remnants
interconnect: move ignore_list out of of_count_icc_providers()
interconnect: qcom: sm8150: Drop IP0 interconnects
interconnect: qcom: sm8250: Drop IP0 interconnects
interconnect: qcom: sc8180x: Drop IP0 interconnects
interconnect: qcom: sc8280xp: Drop IP0 interconnects
dt-bindings: interconnect: qcom: Remove ipa-virt compatibles
dt-bindings: interconnect: qcom: drop IPA_CORE related defines
Link: https://lore.kernel.org/r/20230109002935.244320-1-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
voltage in par with the GPU voltage. This allows for a stable use of the
GPU.
mtk-mutex:
- add support for MT8188 vdosys0 path
- allow it to be build as module
- add support for MT8195 vdosys1 path
mmsys:
- add MT8188 vdosys0 path
- allow to be build as a module
- add MT8195 vdosys1 path
- add support for CMDQ
- allow for up to 64 reset bits
- add supprot for the MT8195 vppsys[0,1] pathes
pm-domains:
- keep power for the MT8186 ADSP on by default
- add support for MT8188
- add support for buck isolation needed in specific pm-domains for
MT8188 and MT8192
mtk-svs:
- enable IRQ later to allow using kexec
- several improvments on the code base
- fix modalias
pmic wrapper:
- convert binding to yaml. As this is thightly coupled to the MT6357
PMIC, I took patches regarding it as well.
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmPaoLsXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH44bw//Wpo6qdxzTOOEGkzdD7JairN5
ozPZyIiSTcg+zVWNJ5sbMMe3xtjIXJVpzI3yfJtx4BTtjns1FNsLeLpVKrS1RVd+
fiSAmhrioYUHk7H599tArs4H+5h1lJkcpf1X+7fX5mc9yCQSsAmAcVeFA5TMbKpS
wdr460r7sUZtSLSVLHza1R7k4V3OLHzMzSztBTtgryE/rV9y/1rQ3hb8aiEgu4h1
5igUDXJfzsmGc45UxCaWZnrziREhSMWe0kc4eGDQSGL6Nc/mjZ9wjhDDnzfcwDTE
mkvTEAgiS6Jh/hoqHmwyzTO3lZRTIxOc/d5eKTzwk3z7fglGt35wN6jJRHC7Utwx
aSt4x8R+3CrlUaAY2FC/1oxt3ONbcLqxPGVUTbvQYxCeXSTagEok1PxyKZZl1bKe
XYbJfm0q9tujxItgbF79j6UD0eWVZ9/UM68gkiaUfZ3AYQdLh9J7nqPScu6UqRR5
5gCeLm41/BOrnObmpv0g6VcGfpIjej8gfJinDLgcjUMW8nv38UpglUojeFJutT7b
BGMmSC/GR57d2NmhGkWSgdYsjrU6iADf936WdKSSfYswkxrOWLgYSd41bym1fluK
JxUYJga4S6Xu3Pjj9vbX60Vi7d9LitEuyAQbi540TP148NjBs0d29puhOGK8USPh
z+Jaoaj+j6XSSg0fotQ=
=8+S0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPdCowACgkQmmx57+YA
GNknYQ//X3Eg6K4AM3EJ2eKuVyVbqChPwTo1SGgyKb2GpTCvkHlb9yNfKe+LluA8
/KLm7bmvpyTA0yegXmjMNo0HmHw5Qu5wsWTdb74JifAWaH9kh+8AGRptFZO+4bzx
/Twj3ZkqqTqzI+NETRcL13sVIEE8y+iGRBVUi8kIxQVS7BYbuBUc0gkgEfbYEfIB
sLa+swF9NT/h8cd0jg4TJqTL3F6pUr28JzGcg5fs5JH0WqSkbxELJcW65x73OCdW
RjU9ioLVKDjFq6m/6KEq7QzWb35ebItG4yLSH6nwT9l7B/KV9pC0TIapiKLlne0N
HlerHU512ynbvtSo+8zyL+gKGiPvQqxyLb/Sd669edSqeCASi8dlKcwxT/boldzu
JZLf7qBJR5X8BLrFp8RhWs2D3Mockq8aXc4WGNPnzuvOvRQrl5sfkH8spl2pjkT+
rd6i77IWd+munKldZzFwwDlAhvmpPFWA1F3ogViFiLsy17UwId2AO37FGPbtZ7BL
xqJIkLAqfXqUri6KM/MFC5njbWimIfDKmsmQ+FA8DMO7+OFnnNEVKewp63XcOv+m
mXkUzoMHnG6GB7tQie5AbwD4RKE14Rr1uiYZRRfdht+zreYYEvqfbowU2dL3OTnr
EVnXNSUChOKfW4OBUrX6nKbvni0ffzRaC+aLyBdE8yqMCr7v1RA=
=fPm5
-----END PGP SIGNATURE-----
Merge tag 'v6.2-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/drivers
Introduce MediaTek regulator coupler driver to ensure that the SRAM
voltage in par with the GPU voltage. This allows for a stable use of the
GPU.
mtk-mutex:
- add support for MT8188 vdosys0 path
- allow it to be build as module
- add support for MT8195 vdosys1 path
mmsys:
- add MT8188 vdosys0 path
- allow to be build as a module
- add MT8195 vdosys1 path
- add support for CMDQ
- allow for up to 64 reset bits
- add supprot for the MT8195 vppsys[0,1] pathes
pm-domains:
- keep power for the MT8186 ADSP on by default
- add support for MT8188
- add support for buck isolation needed in specific pm-domains for
MT8188 and MT8192
mtk-svs:
- enable IRQ later to allow using kexec
- several improvments on the code base
- fix modalias
pmic wrapper:
- convert binding to yaml. As this is thightly coupled to the MT6357
PMIC, I took patches regarding it as well.
* tag 'v6.2-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (41 commits)
soc: mediatek: mtk-svs: add missing MODULE_DEVICE_TABLE
soc: mediatek: mtk-devapc: Switch to devm_clk_get_enabled()
soc: mtk-svs: mt8183: refactor o_slope calculation
soc: mediatek: mtk-svs: delete superfluous platform data entries
soc: mediatek: mtk-svs: move svs_platform_probe into probe
soc: mediatek: mtk-svs: improve readability of platform_probe
soc: mediatek: mtk-svs: clean up platform probing
soc: mediatek: mtk-svs: keep svs alive if CONFIG_DEBUG_FS not supported
soc: mediatek: mtk-svs: Use pm_runtime_resume_and_get() in svs_init01()
soc: mediatek: mtk-svs: reset svs when svs_resume() fail
soc: mediatek: mtk-svs: restore default voltages when svs_init02() fail
soc: mediatek: mmsys: add support for MT8195 VPPSYS
dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
soc: mediatek: Introduce mediatek-regulator-coupler driver
soc: mediatek: mtk-svs: Enable the IRQ later
soc: mediatek: add mtk-mutex support for mt8195 vdosys1
soc: mediatek: add mtk-mutex component - dp_intf1
soc: mediatek: mmsys: add reset control for MT8195 vdosys1
soc: mediatek: mmsys: add mmsys for support 64 reset bits
soc: mediatek: add cmdq support of mtk-mmsys config API for mt8195 vdosys1
...
Link: https://lore.kernel.org/r/396d51fc-81f3-4a2b-d7a7-b966bfe3002a@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add ethernet refclock mux support and set it to internal clock by
default. This configuration will not affect existing boards.
clock tree before this patch:
fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-,
|- pll6_enet
fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´
after this patch:
fec1 <- enet1_ref_sel(mux) <- enet1_ref_125m (gate) <- ...
`--<> enet1_ref_pad |- pll6_enet
fec2 <- enet2_ref_sel(mux) <- enet2_ref_125m (gate) <- ...
`--<> enet2_ref_pad
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230131084642.709385-17-o.rempel@pengutronix.de
According to the "i.MX 6UltraLite Applications Processor Reference Manual,
Rev. 2, 03/2017", BIT(13) is ENET1_125M_EN which is not controlling root
of PLL6. It is controlling ENET1 separately.
So, instead of this picture (implementation before this patch):
fec1 <- enet_ref (divider) <---------------------------,
|- pll6_enet (gate)
fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´
we should have this one (after this patch):
fec1 <- enet1_ref_125m (gate) <- enet1_ref (divider) <-,
|- pll6_enet
fec2 <- enet2_ref_125m (gate) <- enet2_ref (divider) <-´
With this fix, the RMII reference clock will be turned off, after
setting network interface down on each separate interface
(ip l s dev eth0 down). Which was not working before, on system with both
FECs enabled.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230131084642.709385-16-o.rempel@pengutronix.de
Add ethernet refclock mux support and set it to internal clock by
default. This configuration will not affect existing boards since
machine code currently overwrites this default.
The machine code will be fixed in a separate patch.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230131084642.709385-3-o.rempel@pengutronix.de
Add MT7981 clock dt-bindings, include topckgen, apmixedsys,
infracfg, and ethernet subsystem clocks.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/e353d32b5a4481766519a037afe1ed44e31ece1a.1674703830.git.daniel@makrotopia.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
- Merge of immutable bindings branch with Reset & power domain binding
- New boards:
- Odroid-N2L (Smaller version of Odroid-N2+)
- BananaPi M2-Pro (Variant of BPI=M5 with on-board wifi)
- Radxa Zero2 (New version of Radza Zero with A311D SoC)
- Add DT node for the VIPNano-QI on the A311D
- DT bindings fixups covering all SoC families
- MAC address nodes
- ethernet PHY node name
- scpi & child node names
- SD/SDIO node name
- USB supply name
- invalid clock-names
- rng node name
- rtc node name
- ETH phy mux node name
- button & adc keys node name
- leds node names
- RK818 pmic properties
- remove CPU opps below 1GHz for G12A boards, like it was done for G12B/SM1
- Fix WiFi/Bt definition around P212 & Khadas VIM1
- Add audio node to P212
- Fix FAN trip definition to Odroid-HC4
- Fix gpio-fan gpios definition
- Permit Radxa Zero OTG on USB1
- Fix VDDIO_C enable gpio by using OPEN DRAIN flag
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmPXyPgACgkQd9zb2sjI
SdGEThAArSPnao6jiA/XNx/Rdx1BASsLRsDRzK0KyZheekq6JyN9/X8Vp/t1bgxM
jYCvI2MsAeBx3YAsRVMfwK8FrDVe3vg/3C6H0UiUTb7GkhmSIb4aUEK/exTU2bGf
FbGK6S/RhTPg518xtw2ydRKQ74P+uPo1nPATqcJ7y5IcCTIKrdvdDe2bFC+aVgHb
44egFwqsG3HnkaHM0XcQeP3ttWPEc6dF29BG989JeW/LteU4P8ORfjj8xqI78l+m
1/mpl5/pHa+gurvPEsYTr1isDBEj/l5OHABvq/e/pO+7Rcl5Kk/iaV6cxvAmCgUz
MKAQveNcVjv5kh5fl1GEufCcdszqtmZKyjUthh3l4jHsmtgt5vSX/QTT5tgSPCe4
ppsuYnCxIkyaWNlCmvQeOOKIEJkGaTcvZxF+tL9uhLpvhsoB0jJWlERz5mHQTT4A
eo+ePoISW1nCJwHLV/tG+0SzyF44uFDbgnC48RlQ2kBv4bFYFSHsvC7cOk+y6K+g
BE4RVIrQkS1nMH79uS9OR9EdyD6BSdgarLIAv8aXtpfArZ6iOAMy4eeAyB5z2vy8
LaCXpRAJ+TchVytut+GDYG5XI4XBXUtXFBnbMKXC8WO9eVYPndpWNRz4pXGTDpvi
ZSkv0Nn/JTW7z1CONRkGyz2smBADkJHtrsrJXUECVg+MAtag+A0=
=OkGG
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPYP+gACgkQmmx57+YA
GNk7GBAAn6+qkRN6Kto6Drt7gNk/aiBMM9eFD22c1uuVqwBK5mQSQXIvR2uTr5Nn
3e1Dx3VC24Le7RkzNMP3FdH0xRsQApG7ooyYUFBlT8v257t298wBDa/XmkTkuH/m
gC3kaTJUO/heW2On2wF7BWKpkB6XnxjZtlbCKfan6rhcV4ozQDZd8pPF9UsMew7a
A82X8lT9UKTUxRpiJjD8u7hbYot7+9rOLQ79zPSnqKtrk8CzPDvQvcDKWZHTCjr3
TKl6O4dsXpr+TiUyAXCbrQwvru50TLKWKos+QgWBdoXlufZ82SI57vry4WNTI6hC
rxzez/B30c9u8GCZ2lMSNO75vxneGYRCEylyHsDeTWmeyWablb/N1PE+/WBgUTB8
V2RWoFinbKRfOfRGnAaCl2QsVOQocFjEZqltPz6lkp456QJJ2vimQ7B44f0Z8Qv0
SDZNUP6Npf3ksYl8Fis+q4DRyeIPbIxgrXS0A52uR6JL89QkV+sJ3rw29fGp71Fs
kKtHUuTyiWADkBGJ2wxPpG/Zub8suLKjWgz6ePaKgVfsjmLXV3SC/f5HfQ6qlJHp
UvM7lLFo1cTJkgY3lGSyFWGpGAi3a0AVEvHsp2yrhWGj7/2VYXXw9HEhtuKSPlMo
2KZAUB0bCw5/DqWARYk74U5WCxQrEw/MRk5QtYsozDV41E8K0I0=
=871y
-----END PGP SIGNATURE-----
Merge tag 'amlogic-arm64-dt-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt
Amlogic ARM64 DT changes for v6.3:
- Merge of immutable bindings branch with Reset & power domain binding
- New boards:
- Odroid-N2L (Smaller version of Odroid-N2+)
- BananaPi M2-Pro (Variant of BPI=M5 with on-board wifi)
- Radxa Zero2 (New version of Radza Zero with A311D SoC)
- Add DT node for the VIPNano-QI on the A311D
- DT bindings fixups covering all SoC families
- MAC address nodes
- ethernet PHY node name
- scpi & child node names
- SD/SDIO node name
- USB supply name
- invalid clock-names
- rng node name
- rtc node name
- ETH phy mux node name
- button & adc keys node name
- leds node names
- RK818 pmic properties
- remove CPU opps below 1GHz for G12A boards, like it was done for G12B/SM1
- Fix WiFi/Bt definition around P212 & Khadas VIM1
- Add audio node to P212
- Fix FAN trip definition to Odroid-HC4
- Fix gpio-fan gpios definition
- Permit Radxa Zero OTG on USB1
- Fix VDDIO_C enable gpio by using OPEN DRAIN flag
* tag 'amlogic-arm64-dt-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (43 commits)
arm64: dts: meson: add support for Radxa Zero2
dt-bindings: arm: amlogic: add support for Radxa Zero2
arm64: dts: meson: add support for BananaPi M2-Pro
dt-bindings: arm: amlogic: add support for BananaPi M2-Pro
arm64: dts: meson: bananapi-m5: convert dts to dtsi
arm64: dts: meson: bananapi-m5: remove redundant status from sound node
arm64: dts: meson: bananapi-m5: switch VDDIO_C pin to OPEN_DRAIN
arm64: dts: meson: radxa-zero: allow usb otg mode
arm64: dts: meson-gxm-khadas-vim2: use gpio-fan matrix instead of an array
arm64: dts: meson-g12b-odroid: Add initial support for Hardkernel ODROID-N2L
arm64: dts: meson-g12b: move common node into new odroid.dtsi
dt-bindings: arm: amlogic: document Odroid-N2L
arm64: dts: amlogic: meson-sm1-odroid-hc4: fix active fan thermal trip
arm64: dts: meson: add audio playback to S905X-P212 dts
arm64: dts: meson: remove WiFi/BT nodes from Khadas VIM1
arm64: dts: meson: move pwm_ef node in P212 dtsi
arm64: dts: meson: add Broadcom WiFi to P212 dtsi
arm64: dts: amlogic: meson-g12b-odroid-go-ultra: fix rk818 pmic properties
arm64: dts: amlogic: meson-gxbb-kii-pro: fix led node name
arm64: dts: amlogic: meson-gxl-s905d-phicomm-n1: fix led node name
...
Link: https://lore.kernel.org/r/c1641ffd-71c9-9ac9-89d9-c22da4acea10@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Merge of immutable bindings branch with Reset & power domain binding
- Addition of NNA power domain for A311D SoC
- meson_sm.txt conversionto dt-schema
- mark amlogic,meson-gx-pwrc bindings as deprecated
- fix of meson_sm driver by using NULL instead of 0
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmPXxmwACgkQd9zb2sjI
SdFUhg/9FVN0zGzhu/jtUgJ0gi1/c651aF4rojhq3H6xNGMGHAvFuzP2s2cZMUBd
VG3E2hEM8AhYo0HZF4IVABZ7SlzY2YsimHR0ZoOrE6X719KuEFlYCV4HWqs4OyV2
NNR5A4m1N4qCNBH7aSpdgN4JeBqRZUycVnRIAAM2RpqXHQIRyJCja2QLL8LULg8w
fuepmu29Sb/Yi7GA4yIJTUkCKtijAg+q7P0kuiTpE5od6Vm43n9ITzIAHVJXbRlU
4Lg6/19j1UflZA8t8CXnn8+nySa/E/owOA82YrY2m+/SG9ZMm97n9syj17weTuyJ
UPzjKnKnqRYQIcOlfxIBH9NvC46/TJJSGkPQ8lwCid8s8kq29KXiTuIAMXNPrfAB
KTrQRVjb92aMR5+cwiEe810ViyU27L9TIkqy2nvj7dEaa36p9W1D1QULgZiDccPj
vgPFSu1SiGO549PxeXnIMKTXh5T/06mXdBjKzSFamYiBr7Y8gc606YNW9poPY12s
yLwW7UiqG4q3CC9tLvFeX69JSPvIQDxZvVtlppHN0pmzP0U7iMy9KxUu93iK6xtO
eWIL63jsZTF3RR+xbawiJtBQxMMPvfxzELJCWhISdYvwK9OekATDRd5aqovdyWSU
71HQBgaBbCHcyfmaqzkMjdBJm/rOJiDJvJhIl3Pd8BOg8bLgZ+M=
=+uBi
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX6/MACgkQmmx57+YA
GNmH3g/9GBO61b8NJMndoPrYXFKCAL7Zf9tej/d5pjILi97PVV42nFRxXKY3xJaS
UEXgy/XRjR0PWYl65d6rzh9Moq95jd0HLq5gBOkeBhsKqfFXX9nJGXf9BT4IkJfj
OBvcpB2BxbtQouuo3Qj6w8WSV7nXYZSCrQIXrDfqxkn0LkZSGBBp6VPtlpe1An4i
CTOgRQ7iNyofsG/VUG1ySqubhNznUMkpydiy7T6mk9/JIaz+1s4b92ybpiHGyknB
YYCBv8LXi+/z/s/SxOLcvfRJN5mPpLjwfFX705mel7+GY0JTDG97UJSAUiB2if6q
CazVP9fkUEP+fbRn+o9K/HbfpkDchlBYnaij0Ai+mGHGJUWCs746GR8+oTedvzvp
ehRVXfcY4eGyrhYA6IoVx8WxX0m8xeyikwkWsEd6wwA5y661ARKLnddLIdk6byEZ
NvGSk3NHKc/dt6SOXHFG9HhF1dTOFVoTwXjNu5yOvqfgregwZf08j/vk2n5V/14t
rmn1F6FJhuyizFlAfMYlzr4U9QfBZ3fe4drYDPl0NbYBlw6jR0QJ8gofTYi4f5S6
HTgYxbsQ8U54d2LCJlkbLLDw9egxC3GaqMznTj7QcwDv8djHJqGyxaKvTKwZri2p
p0DtKPdqHYkyjj/qF+chk8ZLM4/Ik1l8olwbyptyvosHhBMWwFM=
=1+2i
-----END PGP SIGNATURE-----
Merge tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers
Amlogic Drivers changes for v6.3:
- Merge of immutable bindings branch with Reset & power domain binding
- Addition of NNA power domain for A311D SoC
- meson_sm.txt conversionto dt-schema
- mark amlogic,meson-gx-pwrc bindings as deprecated
- fix of meson_sm driver by using NULL instead of 0
* tag 'amlogic-drivers-for-v6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
firmware: meson_sm: stop using 0 as NULL pointer
dt-bindings: power: amlogic,meson-gx-pwrc: mark bindings as deprecated
dt-bindings: firmware: convert meson_sm.txt to dt-schema
soc: amlogic: meson-pwrc: Add NNA power domain for A311D
dt-bindings: power: Add G12A NNA power domain
dt-bindings: reset: meson-g12a: Add missing NNA reset
Link: https://lore.kernel.org/r/ec9552d8-96df-a677-ab94-9723f5c30f1c@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It's all StarFive stuff this time:
Their new JH7110 SoC uses a SiFive core complex, and therefore a
SiFive cache controller too. That needed a compatible added to both the
binding and driver.
The JH7110 also has power domains, which are supported by a new driver
and a corresponding dt-binding.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY9A3iwAKCRB4tDGHoIJi
0qE4AQDPCcoarT/vLZ28H4wBHPUBxnmU1rut3uNM4f1lIqK0PgD+N6N3xGajmVy0
UzD8/qg2gua94rx/2dmE4PWvun+newk=
=Lqa0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmPX3XUACgkQmmx57+YA
GNmTrw//amIzDDsnOBOblQMV0yJCpOgj/r6azaYdb2M7a++3ysdUVDnqz9E0VlkE
YusfPAg//Fc/6/r6nV6CiCodoprC5g8dkrhFvLUllLnvSQP9Fz/BB99o93aITGUj
gqRubCpEnVbsDkinUKDKw8A/RSkMhxsTN3d+JhuZi9RtISUiiNpAGJavut5AsLZS
r7ADgNQppcHE02ujdLNszYOZdQgOh00ewKtDWw6RsBGcybTRSuiGnANtaEufvl+W
pROapERp/ca8o6odUXaoP7YLFDAHtCbgREdzRtaOtO0HEcP8BKawpJvDHVtTScaQ
h5o//DGHKBRDYOVykzAlPdjLXQqvN2vb8Li2SO1DdHvD9Mdjqg0XFKUUIv/7kVu8
uIpat254aGujDsBX+1y+cePSh7UJvjv6KHQz3gVIpfPCcceKXyR7zTrMobC5d2/b
ALBgDXhzfy00v/CFKYjBSIskLaLTSx9fz5CRan2xbpo0TpB8o7hb/nCcRJkGOGUW
1LojbM+vdaX/isqxNFAfowCDfBwyLaygvL8HCjT0IKuZ1End9GBuiYDMDfssw1M0
cDepFYy5e2VOfKVhexC2ZTL5n7RDpFy3lVSrVD4gFERZg7iH2UtU4QHHbOujNxe9
yBHIaEFtKJy7244XM3ug8wP6eRDhjo3OFJkMrecdCOQVx3knAUU=
=Dfx0
-----END PGP SIGNATURE-----
Merge tag 'riscv-soc-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers
RISC-V SoC drivers for v6.3-mw0
It's all StarFive stuff this time:
Their new JH7110 SoC uses a SiFive core complex, and therefore a
SiFive cache controller too. That needed a compatible added to both the
binding and driver.
The JH7110 also has power domains, which are supported by a new driver
and a corresponding dt-binding.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-soc-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
soc: starfive: Add StarFive JH71XX pmu driver
dt-bindings: power: Add starfive,jh7110-pmu
soc: sifive: ccache: Add StarFive JH7110 support
dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
Link: https://lore.kernel.org/r/Y9LNIm9pkr+Owv/e@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This fixes the following warnings:
include/dt-bindings/clock/imx8ulp-clock.h:204: warning: please, no space
before tabs
include/dt-bindings/clock/imx8ulp-clock.h:215: warning: please, no space
before tabs
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230119085421.102804-3-marcel@ziswiler.com
This fixes the following error:
include/dt-bindings/clock/imx6sll-clock.h:1: warning: Improper SPDX
comment style for 'include/dt-bindings/clock/imx6sll-clock.h', please
use '/*' instead
include/dt-bindings/clock/imx6sll-clock.h:1: warning: Missing or
malformed SPDX-License-Identifier tag in line 1
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230119085421.102804-2-marcel@ziswiler.com
The Allwinner D1 family of SoCs contain a PPU power domain controller
separate from the PRCM. It can power down the video engine and DSP, and
it contains special logic for hardware-assisted CPU idle. Other recent
Allwinner SoCs (e.g. TV303) have a PPU with a different set of domains.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20230126063419.15971-2-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Add vdosys1 reset control bit for MT8195 platform.
Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230113104434.28023-3-nancy.lin@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add bindings for the Power Management Unit on the StarFive JH7110 SoC.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Add a DT binding document for the RPMh interconnects on Qualcomm sa8775p
platforms.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230118140825.242544-2-brgl@bgdev.pl
Signed-off-by: Georgi Djakov <djakov@kernel.org>
There are controllable interconnects on Snapdragon 670. Add the
compatible strings to the documentation and interconnect ID definitions.
The device tree header was generated by
linux-interconnect-driver-generator and the copyright year was changed.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230111005155.50452-2-mailingradian@gmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add power domains dt-bindings for MT8188.
Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221223080553.9397-2-Garmin.Chang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
SM4250 and SM6115 use a shared device tree and the RPMPDs are
identical. There's no need for a separate entry, so remove it.
This reverts commit 45ac44ed10.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113152232.2624545-2-konrad.dybcio@linaro.org
Add device tree bindings for global clock controller on QDU1000 and
QRU1000 SoCs.
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230112204446.30236-2-quic_molvera@quicinc.com
Sync the SoC IDs in qcom,ids.h with relevant entries from Qualcomm's LK
bootloader [1] that is used for almost all older Qualcomm SoCs.
Several of these are already supported, e.g.:
- MSM8960 -> APQ8060, MSM8260, ...
- MSM8976 -> APQ8076
- MSM8956 -> APQ8056
Others are currently being worked on, e.g.:
- MSM8909(W) -> APQ8009(W), MSM8905, MSM8209, ...
- MSM8939 -> MSM8239, ...
And even all remaining ones added are close enough to what is already
supported so that future support is realistic (if someone steps up to
do the work).
Add all of them at once to avoid having to add them one by one in the
future. This will also benefit other projects making use of the same
dt-bindings, e.g. bootloaders where adding support for all these SoCs
is a bit easier than on Linux.
[1]: 9d563e4a1d/platform/msm_shared/smem.h (L286)
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104115348.25046-4-stephan@gerhold.net
QRD (Qualcomm Reference Design) = 0xb = 11 is used on many devices that
were originally derived from some reference design provided by Qualcomm.
Examples of existing devices in Linux would be:
- msm8916-longcheer-l8150/l8910, msm8916-wingtech-wt88047
- msm8953-xiaomi-daisy/tissot/vince
- msm8998-fxtec-pro1
- sm4250-oneplus-billie2
Add it to qcom,ids.h so the qcom,board-id properties can be rewritten
more clearly using the macros in a future patch set, i.e.
qcom,board-id = <QCOM_BOARD_ID(QRD, 1, 0) 0> instead of
qcom,board-id = <0x1000b 0x00>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104115348.25046-3-stephan@gerhold.net
These interconnects are modeled as clks, not interconnects, therefore
remove corresponding defines from the binding as they're unused.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230109002935.244320-10-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Changes gpio.h DT binding header file to be published under GPLv2 or
BSD-2-Clause license terms. This change allows this GPIO generic
bindings header file to be used in software components as bootloaders
and OSes that are not published under GPLv2 terms.
All contributors to gpio.h file in copy.
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Andrew Jeffery <andrew@aj.id.au>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220905145555.674800-1-etienne.carriere@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
The platform was deprecated in commit 6a5e69c7dd ("ARM: s3c: mark
as deprecated and schedule removal") and can be removed. This includes
all files that are exclusively for s3c24xx and not shared with s3c64xx,
as well as the glue logic in Kconfig and the maintainer file entries.
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Christer Weinigel <christer@weinigel.se>
Cc: Guillaume GOURAT <guillaume.gourat@nexvision.tv>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Simtec Linux Team <linux@simtec.co.uk>
Cc: openmoko-kernel@lists.openmoko.org
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add pinctrl macros for J784s4 SoC. These macro definitions are
similar to that of J721s2, but adding new definitions to avoid
any naming confusions in the soc dts files.
checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230112142725.77785-3-a-nandan@ti.com
The SCM VMIDs represent predefined mappings that come from the
irreplaceable and non-omittable firmware that comes with every
Qualcomm SoC (unless you steal engineering samples from the factory)
and help clarify otherwise totally magic numbers which we are
required to pass to the secure world for some parts of the SoC to
work at all (with modem being the prime example).
On top of that, with changes to the rmtfs binding, secure VMIDs will
become useful to have in device trees for readability. Separate them
out and add to include/dt-bindings.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109130523.298971-3-konrad.dybcio@linaro.org
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-8-dmitry.baryshkov@linaro.org
The test clock apparently it's not used by anyone upstream. Remove it.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221228185237.3111988-7-dmitry.baryshkov@linaro.org
Add bindings documentation for clock TCSR driver on SM8550.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104093450.3150578-2-abel.vesa@linaro.org
Add a compatible for sa8775p platforms and relevant defines to the include
file.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109174511.1740856-14-brgl@bgdev.pl
The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221231231429.18357-6-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Add bindings documentation for clock TCSR driver on SM8550.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104093450.3150578-2-abel.vesa@linaro.org
Add separate schema for QDU1000 and QRU1000 interconnect devices
to document the different NoCs on these platforms.
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221216230914.21771-2-quic_molvera@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add define for the NNA power domain for the NPU in the G12A.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20221202115223.39051-3-tomeu.vizoso@collabora.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Doesn't appear in the TRM I have, but it is used by the downstream
galcore driver.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20221202115223.39051-2-tomeu.vizoso@collabora.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
The Qualcomm SM8550 SoC has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221202232054.2666830-2-abel.vesa@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add device tree bindings for camera clock controller for
Qualcomm Technology Inc's SM6350 SoC.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221213152617.296426-1-konrad.dybcio@linaro.org
Add another power saving state used on SM8450. Unfortunately adding it
in proper place causes renumbering of all the opp states in sm8450.dtsi
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221207012803.114959-2-dmitry.baryshkov@linaro.org
Add the power domain index for the A3DUL domain, as described in the
R-Car V4H Series Hardware User's Manual Rev. 0.51 and later.
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
[geert: Manual reference]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/d61cf54b58629a76e007b9505dac7c2beb3b30db.1669740926.git.geert+renesas@glider.be
rproc-virtio device names are now auto generated, to avoid conflicts
between remoteproc instances.
The imx_rproc driver is extended with support for communicating with and
attaching to a running M4 on i.MX8QXP, as well as support for
attaching to the M4 after self-recovering from a crash. Support is
added for i.MX8QM and mailbox channels are reconnected during the
recovery process, in order to avoid data corruption.
The Xilinx Zynqmp firmware interface is extended and support for the
Xilinx R5 RPU is introduced.
Various resources leaks, primarily in error paths, throughout the
Qualcomm drivers are corrected.
Lastly a fix to ensure that pm_relax is invoked even if the remoteproc
instance is stopped between a crash is being reported and the recovery
handler is scheduled.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmOh+HgVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FXYsQAILCBlk/0DFZNGDU1OJaK8P3JF4y
/+w8P2kjD5ZABZ96vEnYQyXUj42/MbOtfvBApMYxkwV3rGyW4jQKXa4HF0+cjAyN
TrcWGJ7fVeOEZm4fi/jhN+4xzOVOGev2bHQVaFlBYD5yLArC2WAe5eyETl7OqSur
0nZb0lLJ7nQAlSdlLYUFYoxYZz8aOTssyVQDdnKbtdc5DRL6R8d2+RTArtyY5gZI
ri+JC1UMKuX6qk81PjjUzWRlDGt2+deeDntMnti1XJr2IX6CJuKsI/T0+KnLW/so
+nlf7RCKvHivOyxw/Q7Qr2a15RKdtLGR+LI2iCiadzzCVoIs5KPUfqM8u5qAmo1w
XM6/Jc0sdxXRBl31cTDNXbUEo5UjqXHZ96fhe4IZnoyUUm0ZiXkTF1GUMT+U/G6q
aK654CQa6AkGocowVg0A5N4VX030hcGf3yb8WQDTHILvjLPZsqZpuk7IR8F9TE2U
CW2cMVo3YXHvIVTrdZkBqzpvubtx28V6wNMKifihzWSKIrV4siYupGnmO0gKvJOe
TX+EGZRUKIXpCzwye19hDYKFnyxpL+w9HU5ssiv47hYygL26MCVVlZ0Jm12fQqsh
2zmARVuNMY5+dGjcDL80LhQFRicaiQx4eOOI196ca8o5tl7ZtmvsCgZd23XcZ0Ws
vsLAlnCKzNjjrF99
=sO5/
-----END PGP SIGNATURE-----
Merge tag 'rproc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux
Pull remoteproc updates from Bjorn Andersson:
"rproc-virtio device names are now auto generated, to avoid conflicts
between remoteproc instances.
The imx_rproc driver is extended with support for communicating with
and attaching to a running M4 on i.MX8QXP, as well as support for
attaching to the M4 after self-recovering from a crash. Support is
added for i.MX8QM and mailbox channels are reconnected during the
recovery process, in order to avoid data corruption.
The Xilinx Zynqmp firmware interface is extended and support for the
Xilinx R5 RPU is introduced.
Various resources leaks, primarily in error paths, throughout the
Qualcomm drivers are corrected.
Lastly a fix to ensure that pm_relax is invoked even if the remoteproc
instance is stopped between a crash is being reported and the recovery
handler is scheduled"
* tag 'rproc-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (25 commits)
remoteproc: core: Do pm_relax when in RPROC_OFFLINE state
remoteproc: qcom: q6v5: Fix missing clk_disable_unprepare() in q6v5_wcss_qcs404_power_on()
remoteproc: qcom_q6v5_pas: Fix missing of_node_put() in adsp_alloc_memory_region()
remoteproc: qcom_q6v5_pas: detach power domains on remove
remoteproc: qcom_q6v5_pas: disable wakeup on probe fail or remove
remoteproc: qcom: q6v5: Fix potential null-ptr-deref in q6v5_wcss_init_mmio()
remoteproc: sysmon: fix memory leak in qcom_add_sysmon_subdev()
remoteproc: sysmon: Make QMI message rules const
drivers: remoteproc: Add Xilinx r5 remoteproc driver
firmware: xilinx: Add RPU configuration APIs
firmware: xilinx: Add shutdown/wakeup APIs
firmware: xilinx: Add ZynqMP firmware ioctl enums for RPU configuration.
arm64: dts: xilinx: zynqmp: Add RPU subsystem device node
dt-bindings: remoteproc: Add Xilinx RPU subsystem bindings
remoteproc: core: Use device_match_of_node()
remoteproc: imx_rproc: Correct i.MX93 DRAM mapping
remoteproc: imx_rproc: Enable attach recovery for i.MX8QM/QXP
remoteproc: imx_rproc: Request mbox channel later
remoteproc: imx_rproc: Support i.MX8QM
remoteproc: imx_rproc: Support kicking Mcore from Linux for i.MX8QXP
...
- ti: default to ARCH_K3 for msg manager
- mediatek: add mt8188 and mt8186 support
request irq only after got ready
- zynq-ipi: fix error handling after device_register
- mpfs: check sys-con status
- rockchip: simplify by using device_get_match_data
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmOh4IcACgkQf9lkf8eY
P5UVgw/+LMCzDu7Dqm9PfcVyW2I1EWV2BpHsJRjn9ivxPCrnPAburZb9x9uPzL5u
q3192eRuy1MSpGX4lBVFYIZc4V7NrXINmMCB61s87k3g/bXxA3KzkgooxxPEo9LJ
KbxzHngoLj+0+Mr6uXqv/rjudohFbl81yn0JfkdEPygj3XmAMaLmOqVEbV7JmbUU
IdyQUfxyEWmozotF5w0ndVhoOhXYnE44XnlimAv0DDU/kxEy1D1JAG/D5oUTjnPw
FZpdMwaCB/YObHJGLARwDRyKCA8h3eRsf/iGzsoaNy7GHyGcSCZJ/efy6q7KXdMM
jabptiuAFjM0NXzqf+L0y6oYvV9ESQr17P5Q9sLUdT66fFPctUUHcGnmLdFGQZEf
3d3ShLCWGYhb0Th9giQkrqcArxwRhiIc9SoBn39CRLiM+cvzcfSDBghTfdJpQb5X
VfzJqaWJSi3AE+uhXchOUFDlNQVp0/5DH/1Y/WyOpQI2wZ/jPVh3JzU9J5Tmakyn
Hl2doj1LNZstUfS7GBSM4P8peDYOx2cv57auD7FOu4enDjVGCyBhuAcD9Z5KonEg
4Y06K8omL1NEFZ3/t3NiG+WANWrEGjHxCtPItU2BFhEqQ6iMLURoj6FcNK7NcQB5
zq+Xs9ISSQlgDwMYTWWIZcqQ4/egFG5VW572187pptiMRxHezjw=
=j33p
-----END PGP SIGNATURE-----
Merge tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar:
- qcom: enable sc8280xp, sm8550 and sm4250 support
- ti: default to ARCH_K3 for msg manager
- mediatek:
- add mt8188 and mt8186 support
- request irq only after got ready
- zynq-ipi: fix error handling after device_register
- mpfs: check sys-con status
- rockchip: simplify by using device_get_match_data
* tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
dt-bindings: mailbox: qcom-ipcc: Add compatible for SM8550
mailbox: mtk-cmdq: Do not request irq until we are ready
mailbox: zynq-ipi: fix error handling while device_register() fails
mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying
mailbox: arm_mhuv2: Fix return value check in mhuv2_probe()
dt-bindings: mailbox: mediatek,gce-mailbox: add mt8188 compatible name
dt-bindings: mailbox: add GCE header file for mt8188
mailbox: mpfs: read the system controller's status
mailbox: mtk-cmdq: add MT8186 support
mailbox: mtk-cmdq: add gce ddr enable support flow
mailbox: mtk-cmdq: add gce software ddr enable private data
mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
mailbox: rockchip: Use device_get_match_data() to simplify the code
dt-bindings: mailbox: qcom-ipcc: Add sc8280xp compatible
mailbox: config: ti-msgmgr: Default set to ARCH_K3 for TI msg manager
mailbox: qcom-apcs-ipc: Add SM4250 APCS IPC support
dt-bindings: mailbox: qcom: Add SM4250 APCS compatible
- New support:
- Allwinner H616 USB PHY and A100 DPHY support
- TI J721s2, J784s4 and J721e support
- Freescale i.MX8MP PCIe PHY support
- New driver for Renesas Ethernet SERDES supporting R-Car S4-8
- Qualcomm SM8450 PCIe1 PHY support in EP mode
- Updates:
- again a big pile of updates on qcom-qmp-* drivers following the
driver split and reorganization merged earlier
- Phy order of API calls documentation update
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmOfIbYACgkQfBQHDyUj
g0fSbw//Rgfk+owGLWyJ3PxRXiDhZaJdBUQNuZEe46TjGKKHvWLJ4+ig6vrXlPgr
8mVte7jEMZubO7YE/1Vifv9xiFmjo+5R4//WlfkIwy/0SFR8+N+DPQiGU7i7ecov
uzkFN26qsi4aQrKmxyadGJQzHipaLViBkr6fqfuFcmyDiFII0FoVa/mV7ZQlFtl3
cDv3leFnp3HQ9mr/mKhOSmbyWCEQHqQvjDwB50R915WfH9PLV2jYddfO4Cbwpr4r
7m7wX2EiFlQ1o2gwcFQdLiDkA8YL9Kw3wOChpbcCu4gOapJ+GWqCk0AqS9m8MMWF
HnyAyHw3NxDagwV6sN19Xxa7XgkPJZPn6/92BfGYeD6H5gxmYwdROeU2/x6Qt1+z
scTl1m6z8X9WWwjnWK1cqVqBPUXoJJ2smym6VBHh3f4AJAVmwZy+yyk1Oar5qa2M
yDWV7nIRJQmXnuQ+XsG5rmXmmMwOuBgng4NsNX9PjhdVy6/1FUOJuMCr8ldPLAkG
Lpg+GN8w6tn2G0bxrHzWeAOytxjK5XuXch99BHmXDl+NgIpp/6DuyddXmvG4nrvk
R6eDv86UOQgGP2h7SujUm9f6RIWb3nJrYN27r+IHK/z5LjSMfylSSu13GvMjZkt4
Et5Q4Wk9MomHFQkhiTGTd9WlSvb497RgzKhBhMg/lJoSyTi9Eew=
=4HRP
-----END PGP SIGNATURE-----
Merge tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul:
"This tme we have again a big pile of qcom-qmp-* changes, one new
driver and bunch of new hardware support.
New hardware support:
- Allwinner H616 USB PHY and A100 DPHY support
- TI J721s2, J784s4 and J721e support
- Freescale i.MX8MP PCIe PHY support
- New driver for Renesas Ethernet SERDES supporting R-Car S4-8
- Qualcomm SM8450 PCIe1 PHY support in EP mode
- Qualcomm SC8280XP PCIe PHY support (including x4 mode)
- Fixed Qualcomm SC8280XP USB4-USB3-DP PHY DT bindings
Updates:
- A big pile of updates on qcom-qmp-* drivers following the driver
split and reorganization merged earlier
- Phy order of API calls documentation update"
* tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (174 commits)
phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module support
dt-bindings: phy-j721e-wiz: add j721s2 compatible string
phy: use devm_platform_get_and_ioremap_resource()
phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant
phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook
phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit last
phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional
dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant
dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts property
phy: qcom-qmp-pcie: drop redundant clock allocation
phy: qcom-qmp-usb: drop redundant clock allocation
phy: qcom-qmp: drop unused type header
phy: qcom-qmp-usb: drop sc8280xp reference-clock source
dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: drop reference-clock source
phy: qcom-qmp-combo: add support for updated sc8280xp binding
phy: qcom-qmp-combo: rename DP_PHY register pointer
phy: qcom-qmp-combo: rename common-register pointers
phy: qcom-qmp-combo: clean up DP clock callbacks
phy: qcom-qmp-combo: separate clock and provider registration
phy: qcom-qmp-combo: add clock registration helper
...
Including:
- Core code:
- map/unmap_pages() cleanup
- SVA and IOPF refactoring
- Clean up and document return codes from device/domain
attachment code
- AMD driver:
- Rework and extend parsing code for ivrs_ioapic, ivrs_hpet
and ivrs_acpihid command line options
- Some smaller cleanups
- Intel driver:
- Blocking domain support
- Cleanups
- S390 driver:
- Fixes and improvements for attach and aperture handling
- PAMU driver:
- Resource leak fix and cleanup
- Rockchip driver:
- Page table permission bit fix
- Mediatek driver:
- Improve safety from invalid dts input
- Smaller fixes and improvements
- Exynos driver:
- Fix driver initialization sequence
- Sun50i driver:
- Remove IOMMU_DOMAIN_IDENTITY as it has not been working
forever
- Various other fixes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmOd1PQACgkQK/BELZcB
GuO7NxAAiwJUO99pTwvqnByzcC783AuE/fqKHDb9DZaN6Cr0VXSbKEwm8Lc2PC00
2CTwK/zGhy8BKBQnPiooJ+YOMPjE4yhFIF9jr5ASH5AVWv8EEFpo8zIFKAcF5rh/
c2Y5RIUwsGXuhR7U3lMTw84r39TZG2eHPwTEU6KvEJ1LCOMyD8IBYrZK2rvpGpem
3swXUfF5bQGAT8LlIFN7p+qsVs6ZtuD40qre3kerjrBtCPUMlxIIV5TJ8oQTecsk
vKpD51mEVW+rjUKvqui8NDYuPfT76F2FPS37dfA1F36p8dmsMGSrtWngNm73r546
AmY8Gui6wKsv4Qn7Mxv49f/WZIXzdRTXOKx/zhYvvGxu7keqQIRIWYcLSxqfaGku
cqJT401Ws1NHmRpx/t90lMH/anY5+kUMRTQG9Iq5ruLhExskd0SJcffa1i7YIGIe
lPCTDf7MOXfDudR0Dtp87pGZQBaSkrSzZvb7qZY3Bj83WGZnLPpl6Z3N8KbkGzEO
zNNvv1CtxZnIPrdOaKvfxQlAKiWKxkPRHuqk1TE8hkoNOe5ZgdOSJP5SeCrZ5tEf
qljPXvDVF9f8CYw7QlfEDnbLnqDMGZpPAGqKPItbaijQLPZx4Jm4dw6+7i9hETIa
wJ+1R9iAf+qiR0rlqueALKRaI4DjE8RU8yYSDpn2kn0BUOhWmb8=
=ZM/m
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel:
"Core code:
- map/unmap_pages() cleanup
- SVA and IOPF refactoring
- Clean up and document return codes from device/domain attachment
AMD driver:
- Rework and extend parsing code for ivrs_ioapic, ivrs_hpet and
ivrs_acpihid command line options
- Some smaller cleanups
Intel driver:
- Blocking domain support
- Cleanups
S390 driver:
- Fixes and improvements for attach and aperture handling
PAMU driver:
- Resource leak fix and cleanup
Rockchip driver:
- Page table permission bit fix
Mediatek driver:
- Improve safety from invalid dts input
- Smaller fixes and improvements
Exynos driver:
- Fix driver initialization sequence
Sun50i driver:
- Remove IOMMU_DOMAIN_IDENTITY as it has not been working forever
- Various other fixes"
* tag 'iommu-updates-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (74 commits)
iommu/mediatek: Fix forever loop in error handling
iommu/mediatek: Fix crash on isr after kexec()
iommu/sun50i: Remove IOMMU_DOMAIN_IDENTITY
iommu/amd: Fix typo in macro parameter name
iommu/mediatek: Remove unused "mapping" member from mtk_iommu_data
iommu/mediatek: Improve safety for mediatek,smi property in larb nodes
iommu/mediatek: Validate number of phandles associated with "mediatek,larbs"
iommu/mediatek: Add error path for loop of mm_dts_parse
iommu/mediatek: Use component_match_add
iommu/mediatek: Add platform_device_put for recovering the device refcnt
iommu/fsl_pamu: Fix resource leak in fsl_pamu_probe()
iommu/vt-d: Use real field for indication of first level
iommu/vt-d: Remove unnecessary domain_context_mapped()
iommu/vt-d: Rename domain_add_dev_info()
iommu/vt-d: Rename iommu_disable_dev_iotlb()
iommu/vt-d: Add blocking domain support
iommu/vt-d: Add device_block_translation() helper
iommu/vt-d: Allocate pasid table in device probe path
iommu/amd: Check return value of mmu_notifier_register()
iommu/amd: Fix pci device refcount leak in ppr_notifier()
...
Add Global Command Engine(GCE) header file to define the GCE thread priority,
GCE subsys id, event and constant for mt8188.
Signed-off-by: Elvis Wang <Elvis.Wang@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno<angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.14 (GNU/Linux)
iEYEABECAAYFAmOcmvEACgkQ+iyteGJfRso1OwCfWAZIdbdWdeEVq33zAT4/TZKE
foYAn0ebKrOX26HEAmGgZy4Ze2pdFxVo
=toMy
-----END PGP SIGNATURE-----
Merge tag 'linux-watchdog-6.2-rc1' of git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck:
- Add Advantech EC watchdog driver
- Add support for MT6795 Helio X10 watchdog and toprgu
- Add support for MT8188 watchdog device
- Remove #ifdef guards for PM related functions
- Other fixes and improvements
* tag 'linux-watchdog-6.2-rc1' of git://www.linux-watchdog.org/linux-watchdog:
watchdog: aspeed: Enable pre-timeout interrupt
watchdog: iTCO_wdt: Set NO_REBOOT if the watchdog is not already running
watchdog: rn5t618: add support for read out bootstatus
watchdog: kempld: Remove #ifdef guards for PM related functions
watchdog: omap: Remove #ifdef guards for PM related functions
watchdog: twl4030: Remove #ifdef guards for PM related functions
watchdog: at91rm9200: Remove #ifdef guards for PM related functions
watchdog: Add Advantech EC watchdog driver
dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT8173
dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT6795
dt-bindings: watchdog: mediatek: Convert mtk-wdt to json-schema
watchdog: mediatek: mt8188: add wdt support
dt-bindings: reset: mt8188: add toprgu reset-controller header file
dt-bindings: watchdog: Add compatible for MediaTek MT8188
watchdog: mtk_wdt: Add support for MT6795 Helio X10 watchdog and toprgu
time around. The core framework is effectively unchanged, with the majority of
the diff going to the Qualcomm clk driver directory because they added two 3k
line files that are almost all clk data (Abel Vesa from Linaro tried to shrink
the number of lines down, but it doesn't seem to be possible without
sacrificing readability). The second big driver this time around is the
Rockchip rk3588 clk and reset unit, at _only_ 2.5k lines.
Ignoring the big clk drivers from the familiar SoC vendors, there's just a
bunch of little clk driver updates and fixes throughout here. It's the usual
set of clk data fixups to describe proper parents, or add frequencies to
frequency tables, or plug memory leaks when function calls fail. Also, some
drivers are converted to use modern clk_hw APIs, which is always nice to see.
And data is deduplicated, leading to a smaller kernel Image. Overall this batch
has a larger collection of cleanups than it typically does. Maybe that means
there are less new SoCs right now that need supporting, and the focus has
shifted to quality and reliability. I can dream.
New Drivers:
- Frequency hopping controller hardware on MediaTek MT8186
- Global clock controller for Qualcomm SM8550
- Display clock controller for Qualcomm SC8280XP
- RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
- CPU PLL on MStar/SigmaStar SoCs
- Support for the clock and reset unit of the Rockchip rk3588
Updates:
- Tracepoints for clk_rate_request structures
- Debugfs support for fractional divider clk
- Make MxL's CGU driver secure compatible
- Ingenic JZ4755 SoC clk support
- Support audio clks on X1000 SoCs
- Remove flags from univ/main/syspll child fixed factor clocks across
MediaTek platforms
- Fix clock dependency for ADC on MediaTek MT7986
- Fix parent for FlexSPI clock for i.MX93
- Add USB suspend clock on i.MX8MP
- Unmap anatop base on error for i.MX93 driver
- Change enet clock parent to wakeup_axi_root for i.MX93
- Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
- Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
- Add 320MHz and 640MHz entries to PLL146x
- Add audio shared gate and SAI clocks for i.MX8MP
- Fix a possible memory leak in the error path of rockchip PLL creation
- Fix header guard for V3S clocks
- Add IR module clock for f1c100s
- Correct the parent clocks for the (High Speed) Serial Communication
Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
Switch clocks on Renesas R-Car S4-8
- Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
R-Car V4H
- Two PLL driver fixups for the Amlogic clk driver
- Round SD clock rate to improve parent clock selection
- Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
S4-8
- Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX) serial
(SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI (RPC-IF) clocks
on Renesas R-Car V4H
- Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
Renesas RZ/G2L
- Fix endless loop on Renesas RZ/N1
- Correct the parent clocks for the High Speed Serial Communication
Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
Note: HSCIF0 is used for the serial console on the White-Hawk
development board
- Various clk DT binding improvements and conversions to YAML
- Qualcomm SM8150/SM8250 display clock controller cleaned up
- Some missing clocks for Qualcomm SM8350 added
- Qualcomm MSM8974 Global and Multimedia clock controllers transitioned
to parent_data and parent_hws
- Use parent_data and add network resets for Qualcomm IPQ8074
- Qualcomm Krait clock controller modernized
- Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
controllers
- Enable retention mode on Qualcomm SM8250 USB GDSCs
- Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
clocks which definition could be shared between platforms
- Various NULL pointer checks added for allocations
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmOXq7wRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSU2sg/+JIguM/vYw92d3hGePFKaz5lmFXSjzRXp
HMbbnuclAzc/C7jKGwypP2GMdVxOPvzxG4cW9Q25cTw4SuELg2nIBn9UvRteCEDA
uGf8h0Xw/sJfyRhZbAlnbLxtn3qntQL8F2VbPJ+umDYnghD0Mq0WBMeHEoeXGXpb
PVdEYsgpHo3EbgCL8rjErw9XDHBTGRgNXPounpKjD3Kwmj+CXWgopsma7Hzf2G/6
VxBbcxDZA6OaEzJAKGVeIHBYLwY0aGPP2ouC2RQDBzSb7n6PjqDkOCdP6w1ab9Nl
XehAup5p5Zgd314YgQlE9BoXwhXanZyVT88D6WbfN+qjksDm9n+W+5O9suN2eLrt
h+YgmFdUAESUAJTbIyF6tiLUEIDKjKrJyU+HZX0peOhGIYbw3fMUACR+JrCbmCCZ
rTTOWh92q7v39to+QIFsKwtVLl9IlRTCaA3tbhv/FH2gplJlOhvPgulAfV+JRtTZ
1YND5adsFNsc69ZK8TTT2NzXUnU0XhocNNL1SegYXZpfHoNmg5CUQiPYMMASCJcI
V1+qznLUeUUonkhexFTMrJHGL4e4ITzESi7IOTVcJ6Wco+gXOrOMHfONbahEsCYn
UQIPC9tw9qwV6D3Sf9C8zFtBP26w7+UuJ8ZFpmhpf+fevF5i2TsG6x7Y31mlxzww
OZ+r5dsauc4=
=6vbl
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk driver updates from Stephen Boyd:
"A pile of clk driver updates with a small tracepoint patch to the clk
core this time around.
The core framework is effectively unchanged, with the majority of the
diff going to the Qualcomm clk driver directory because they added two
3k line files that are almost all clk data (Abel Vesa from Linaro
tried to shrink the number of lines down, but it doesn't seem to be
possible without sacrificing readability).
The second big driver this time around is the Rockchip rk3588 clk and
reset unit, at _only_ 2.5k lines.
Ignoring the big clk drivers from the familiar SoC vendors, there's
just a bunch of little clk driver updates and fixes throughout here.
It's the usual set of clk data fixups to describe proper parents, or
add frequencies to frequency tables, or plug memory leaks when
function calls fail. Also, some drivers are converted to use modern
clk_hw APIs, which is always nice to see. And data is deduplicated,
leading to a smaller kernel Image.
Overall this batch has a larger collection of cleanups than it
typically does. Maybe that means there are less new SoCs right now
that need supporting, and the focus has shifted to quality and
reliability. I can dream.
New Drivers:
- Frequency hopping controller hardware on MediaTek MT8186
- Global clock controller for Qualcomm SM8550
- Display clock controller for Qualcomm SC8280XP
- RPMh clock controller for Qualcomm QDU1000 and QRU1000 SoCs
- CPU PLL on MStar/SigmaStar SoCs
- Support for the clock and reset unit of the Rockchip rk3588
Updates:
- Tracepoints for clk_rate_request structures
- Debugfs support for fractional divider clk
- Make MxL's CGU driver secure compatible
- Ingenic JZ4755 SoC clk support
- Support audio clks on X1000 SoCs
- Remove flags from univ/main/syspll child fixed factor clocks across
MediaTek platforms
- Fix clock dependency for ADC on MediaTek MT7986
- Fix parent for FlexSPI clock for i.MX93
- Add USB suspend clock on i.MX8MP
- Unmap anatop base on error for i.MX93 driver
- Change enet clock parent to wakeup_axi_root for i.MX93
- Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
- Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
- Add 320MHz and 640MHz entries to PLL146x
- Add audio shared gate and SAI clocks for i.MX8MP
- Fix a possible memory leak in the error path of rockchip PLL
creation
- Fix header guard for V3S clocks
- Add IR module clock for f1c100s
- Correct the parent clocks for the (High Speed) Serial Communication
Interfaces with FIFO ((H)SCIF) modules and the mixed-up Ethernet
Switch clocks on Renesas R-Car S4-8
- Add timer (TMU, CMT) and Cortex-A76 CPU core (Z0) clocks on Renesas
R-Car V4H
- Two PLL driver fixups for the Amlogic clk driver
- Round SD clock rate to improve parent clock selection
- Add Ethernet Switch and internal SASYNCPER clocks on Renesas R-Car
S4-8
- Add DMA (SYS-DMAC), SPI (MSIOF), external interrupt (INTC-EX)
serial (SCIF), PWM (PWM and TPU), SDHI, and HyperFLASH/QSPI
(RPC-IF) clocks on Renesas R-Car V4H
- Add Multi-Function Timer Pulse Unit (MTU3a) clock and reset on
Renesas RZ/G2L
- Fix endless loop on Renesas RZ/N1
- Correct the parent clocks for the High Speed Serial Communication
Interfaces with FIFO (HSCIF) modules on the Renesas R-Car V4H SoC
Note: HSCIF0 is used for the serial console on the White-Hawk
development board
- Various clk DT binding improvements and conversions to YAML
- Qualcomm SM8150/SM8250 display clock controller cleaned up
- Some missing clocks for Qualcomm SM8350 added
- Qualcomm MSM8974 Global and Multimedia clock controllers
transitioned to parent_data and parent_hws
- Use parent_data and add network resets for Qualcomm IPQ8074
- Qualcomm Krait clock controller modernized
- Fix pm_runtime usage in Qualcomm SC7180 and SC7280 LPASS clock
controllers
- Enable retention mode on Qualcomm SM8250 USB GDSCs
- Cleanup Qualcomm RPM and RPMh clock drivers to avoid duplicating
clocks which definition could be shared between platforms
- Various NULL pointer checks added for allocations"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (188 commits)
clk: nomadik: correct struct name kernel-doc warning
clk: lmk04832: fix kernel-doc warnings
clk: lmk04832: drop superfluous #include
clk: lmk04832: drop unnecessary semicolons
clk: lmk04832: declare variables as const when possible
clk: socfpga: Fix memory leak in socfpga_gate_init()
clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
clk: st: Fix memory leak in st_of_quadfs_setup()
clk: samsung: Fix memory leak in _samsung_clk_register_pll()
clk: Add trace events for rate requests
clk: Store clk_core for clk_rate_request
clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
clk: qcom: mmcc-msm8974: move clock parent tables down
clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
clk: qcom: gcc-msm8974: move clock parent tables down
clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
...
Core changes:
- Minor but nice and important documentation clean-ups.
New drivers:
- New subdriver for the Qualcomm SDM670 SoC.
- New subdriver for the Intel Moorefield SoC.
- New trivial support for the NXP Freescale i.MXRT1170 SoC.
Other changes and improvements
- A major clean-up of the Qualcomm pin control device tree bindings
by Krzysztof.
- A major header clean-up by Andy.
- Some immutable irqchip clean-up for the Actions Semiconductor
and Nuvoton drivers.
- GPIO helpers for The Cypress cy8c95x0 driver.
- Bias handling in the Mediatek MT7986 driver.
- Remove the unused pins-are-numbered concept that never flew.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmOXJjQACgkQQRCzN7AZ
XXOMaxAAuAv30XWa9sq5cMZKOlY3CLudZmxF5V7PSpFwAXiBPcPZu9ajxlaGJaAf
+KOgJhNKYhTb4mBxsQR3X749qFFlxnbEXo9u7ka2bb5bCEkP6ZooqKSGclzAufrp
azf1pmJYd2PoaZzwhpuosiWAzLNTeZBQPapU/d9KFIkNhvvY8dFG8YWrjV6YSMTr
6sPWj7/FCqxAzplrQRUXapS+k5JyihyY4aHcFgJwijN6qmSRCxc49SA4VQvkZQZ3
AP6NV1sX9JvbfgOm09Uk5doBnX4vyfeEshOq/c+XZVyr+ECzlGQARkgOXpPhPA8S
28bY6aDaiu5HzOBauM4bp0Z4W7m7YWKWo1cDZNPVEAMF/oATOj/h3YFhLAy66RtV
8BqEEXKvVwqGu0/utwlB1I+yLXvS0DN9C+TZ2y2aLfkgRHUonRrS1OKa0SSvvQp3
3eXmwTJgqf01bcK7kkdDr6+1H6lRmol27Gir6We5jdOCu0LqQcSIYhCr0RzSirWm
CHIZQTfo7J4S7pOrz7lhsFciqEQeQfsKXmSorLHrVNcGamIZZEdRhEqVxufqRU4B
0hWoNqxjIDcqyZFFUe211OwNWNOUwMdvw5bCVkmhW5e7AylTrOi1ie1b/SlmDxRl
k7NSVnIXdZmog0fYsSZy6qJM0FfTKXF7smnuZcBvgx61/MoCRDw=
=PhTP
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"The two large chunks is the header clean-up from Andy and the Qualcomm
DT bindings clean-up from Krzysztof. Each which could give rise to
conflicts, but I haven't seen any.
The YAML conversions happening around the device tree is the biggest
item in the series and is the result of Rob Herrings ambition to
autovalidate these trees against strict schemas and it is paying off
in lots of bugs found and ever prettier device trees. Sooner or later
the transition will be complete, Krzysztof is fixing up all of the
Qualcomm stuff, which is pretty voluminous.
Core changes:
- minor but nice and important documentation clean-ups
New drivers:
- subdriver for the Qualcomm SDM670 SoC
- subdriver for the Intel Moorefield SoC
- trivial support for the NXP Freescale i.MXRT1170 SoC
Other changes and improvements
- major clean-up of the Qualcomm pin control device tree bindings by
Krzysztof
- major header clean-up by Andy
- some immutable irqchip clean-up for the Actions Semiconductor and
Nuvoton drivers
- GPIO helpers for The Cypress cy8c95x0 driver
- bias handling in the Mediatek MT7986 driver
- remove the unused pins-are-numbered concept that never flew"
* tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (231 commits)
pinctrl: thunderbay: fix possible memory leak in thunderbay_build_functions()
dt-bindings: pinctrl: st,stm32: Deprecate pins-are-numbered
dt-bindings: pinctrl: mediatek,mt65xx: Deprecate pins-are-numbered
pinctrl: stm32: Remove check for pins-are-numbered
pinctrl: mediatek: common: Remove check for pins-are-numbered
pinctrl: qcom: remove duplicate included header files
pinctrl: sunxi: d1: Add CAN bus pinmuxes
pinctrl: loongson2: Fix some const correctness
pinctrl: pinconf-generic: add missing of_node_put()
pinctrl: intel: Enumerate PWM device when community has a capability
pwm: lpss: Rename pwm_lpss_probe() --> devm_pwm_lpss_probe()
pwm: lpss: Allow other drivers to enable PWM LPSS
pwm: lpss: Include headers we are the direct user of
pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS
pwm: Add a stub for devm_pwmchip_add()
pinctrl: k210: call of_node_put()
pinctrl: starfive: Use existing variable gpio
dt-bindings: pinctrl: semtech,sx150xq: fix match patterns for 16 GPIOs matching
pinconf-generic: fix style issues in pin_config_param doc
pinctrl: pinctrl-loongson2: fix Kconfig dependency
...
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+QmuaPwR3wnBdVwACF8+vY7k4RUFAmOW44IACgkQCF8+vY7k
4RWt2RAAnUPY7bj2DDGo5rJ54KjMXhz6usdOnh9Hzg5eegGzK2xXAOyKVg4AFsNk
rXWkbEc5Rg2LJnMZg8dojsG/utOV+xtCidQCYdhUKLPDREDMjSuUy/vs3utllwkg
MhO8JDY+OQHhqXaMFRz0suGvr1W4kDmRR7+4VciEEPX9k9CX+FMYnuVlNyxLZG03
Hu/PSDC4ltU+P0xnLap3U681PWfUDAoSvhyQmvde39EspSBxzFTVy7Cw1VL7DvwQ
Idrcxo37buGf8eF9Em02PBgzC00TV6yCy5wOPOemcozBgtDSeLSQjlUUaOqHZgKI
uY4k8LI0efnJPWIqt/rGZ4OREK+m7RbyAKvQ/9ckblm3bjsJV/T8WGtnNHxDRBVD
ypoSvFyJ+RU6eFUw2jG61Fx0vPocK8AGnQLK860ns52h5DxyxpPxWtvPyNZLNs59
bjZPetbU7bgvGZ8aBJno84Q+4Bliel8zXWnQKrAV28gjwCt/q/Lbd9G7sUYCZwIE
EMxcOP9r2J1Q8zQK6s9xdZx2lRINWD+9Hgh1toS2KGhkAtT5BWyBmD2MXqt88v04
8MeyneYt6uiv5Lst41BhxT/hvIyFb9g3pW28TAUCPV9r5pjyJVRNvPjJEv6dnR2e
eRmBHcyLG6/Q1Do+HY2DjjgOsAL7yDxQJNahqFM/cFGYMVmYNFU=
=i0X1
-----END PGP SIGNATURE-----
Merge tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab:
- DVB core changes to avoid refcount troubles and UAF
- DVB API/core has gained support for DVB-C2 and DVB-S2X
- New sensor drivers: ov08x40, ov4689.c, st-vgxy61 and tc358746.c
- Removal of an unused sensor driver: s5k4ecgx
- Move microchip_csi2dc to a new directory, named after the
manufacturer
- Add media controller support to Microship drivers
- Old Atmel/Microship drivers that don't use media controler got moved
to staging
- New drivers added for Renesas RZ/G2L CRU and MIPI CSI-2 support
- Allwinner A31 camera sensor driver code was now split into a bridge
and a separate processor driver
- Added a virtual stateless decoder driver in order to test core
support for stateless drivers and test userspace apps using it
- removed platform-based support for ov9650, as this is not used
anymore
- atomisp now uses videobuf2 and supports normal mmap mode
- the imx7-media-csi driver got promoted from staging
- rcar-vin driver has gained support for gen3 UDS (Up Down Scaler)
- most i2c drivers now use I2C .probe_new() kAPI
- lots of drivers fixes, cleanups and improvements
* tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (544 commits)
media: s5c73m3: Switch to GPIO descriptors
media: i2c: s5k5baf: switch to using gpiod API
media: i2c: s5k6a3: switch to using gpiod API
media: imx: remove code for non-existing config IMX_GPT_ICAP
media: si470x: Fix use-after-free in si470x_int_in_callback()
media: staging: stkwebcam: Restore MEDIA_{USB,CAMERA}_SUPPORT dependencies
media: coda: Add check for kmalloc
media: coda: Add check for dcoda_iram_alloc
dt-bindings: media: s5c73m3: Fix reset-gpio descriptor
media: dt-bindings: allwinner: h6-vpu-g2: Add IOMMU reference property
media: s5k4ecgx: Delete driver
media: s5k4ecgx: Switch to GPIO descriptors
media: Switch to use dev_err_probe() helper
headers: Remove some left-over license text in include/uapi/linux/v4l2-*
headers: Remove some left-over license text in include/uapi/linux/dvb/
media: usb: pwc-uncompress: Use flex array destination for memcpy()
media: s5p-mfc: Fix to handle reference queue during finishing
media: s5p-mfc: Clear workbit to handle error condition
media: s5p-mfc: Fix in register read and write for H264
media: imx: Use get_mbus_config instead of parsing upstream DT endpoints
...
- Tracepoints for clk_rate_request structures
* clk-mediatek:
clk: mediatek: fix dependency of MT7986 ADC clocks
clk: mediatek: Change PLL register API for MT8186
clk: mediatek: Add new clock driver to handle FHCTL hardware
dt-bindings: clock: mediatek: Add new bindings of MediaTek frequency hopping
clk: mediatek: Export PLL operations symbols
clk: mediatek: mt8186-topckgen: Add GPU clock mux notifier
clk: mediatek: mt8186-mfg: Propagate rate changes to parent
clk: mediatek: mt8195-topckgen: Drop flags for main/univpll fixed factors
clk: mediatek: mt8192: Drop flags for main/univpll fixed factors
clk: mediatek: mt6795-topckgen: Drop flags for main/sys/univpll fixed factors
clk: mediatek: mt8173: Drop flags for main/sys/univpll fixed factors
clk: mediatek: mt8183: Drop flags for sys/univpll fixed factors
clk: mediatek: mt8183: Compress top_divs array entries
clk: mediatek: mt8186-topckgen: Drop flags for main/univpll fixed factors
clk: mediatek: clk-mtk: Allow specifying flags on mtk_fixed_factor clocks
* clk-trace:
clk: Add trace events for rate requests
clk: Store clk_core for clk_rate_request
* clk-qcom: (69 commits)
clk: qcom: rpmh: add support for SM6350 rpmh IPA clock
clk: qcom: mmcc-msm8974: use parent_hws/_data instead of parent_names
clk: qcom: mmcc-msm8974: move clock parent tables down
clk: qcom: mmcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
clk: qcom: gcc-msm8974: use parent_hws/_data instead of parent_names
clk: qcom: gcc-msm8974: move clock parent tables down
clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents
dt-bindings: clocks: qcom,mmcc: define clocks/clock-names for MSM8974
dt-bindings: clock: split qcom,gcc-msm8974,-msm8226 to the separate file
clk: qcom: gcc-ipq4019: switch to devm_clk_notifier_register
clk: qcom: rpmh: remove usage of platform name
clk: qcom: rpmh: rename VRM clock data
clk: qcom: rpmh: rename ARC clock data
clk: qcom: rpmh: support separate symbol name for the RPMH clocks
clk: qcom: rpmh: remove platform names from BCM clocks
clk: qcom: rpmh: drop all _ao names
clk: qcom: rpmh: reuse common duplicate clocks
clk: qcom: rpmh: group clock definitions together
clk: qcom: rpm: drop the platform from clock definitions
clk: qcom: rpm: drop the _clk suffix completely
...
* clk-microchip:
clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE
clk: microchip: check for null return of devm_kzalloc()
The devicetree changes contain exactly 1000 non-merge changesets,
including a number of new arm64 SoC variants from Qualcomm and Apple,
as well as the Renesas r9a07g043f/u chip in both arm64 and riscv variants
While we have occasionally merged support for non-arm SoCs in the past,
this is now the normal path for riscv devicetree files.
The most notable changes, by SoC platform, are:
- The Apple T6000 (M1 Pro), T6001 (M1 Max) and T6002 (M2 Ultra)
chips now have initial support. This is particularly nice as I am
typing this on a T6002 Mac Studio with only a small number of driver
patches.
- Qualcomm MSM8996 Pro (Snapdragon 821), SM6115 (Snapdragon 662), SM4250
(Snapdragon 460), SM6375 (Snapdragon 695), SDM670 (Snapdragon 670),
MSM8976 (Snapdragon 652) and MSM8956 (Snapdragon 650) are all mobile
phone chips that are closely related to others we already support.
Adding those helps support more phones and we add several models
from Sony (Xperia 10 IV, 5 IV, X, and X compact), OnePlus (One, 3,
3T, and Nord N100), Xiaomi (Poco F1, Mi6), Huawei (Watch) and Google
(Pixel 3a). There are also new variants of the Herobrine and Trogdor
chromebook motherboards. SA8540P is an automotive SoC used in the
Qdrive-3 development platform
- Rockchips gains no new SoC variants, but a lot of new boards:
three mobile gaming systems based on RK3326 Odroid-Go/rg351 family,
two more Anbernic gaming systems based on RK3566 and a number of
other RK356x based single-board computers.
- Renesas RZ/G2UL (r9a07g043) was already supported for arm64, but as
the newly added RZ/Five is based on the same design, this now gets
reorganized in order to share most of the dts description between
the two and add the RZ/Five SMARC EVK board support.
Aside from that, there are the usual changes all over the tree:
- New boards on other platforms contain two ASpeed BMC users, two
Broadcom based Wifi routers, Zyxel NSA310S NAS, the i.MX6 based Kobo
Aura2 ebook reader, two i.MX8 based development boards, two Uniphier
Pro5 development boards, the STM32MP1 testbench board from DHCOR,
the TI K3 based BeagleBone AI-64 board, and the Mediatek Helio X10
based Sony Xperia M5 phone.
- The Starfive JH7100 source gets reorganized in order to support the
VisionFive V1 board.
- Minor updates and cleanups for Intel SoCFPGA, Marvell PXA168,
TI, ST, NXP, Apple, Broadcom, Juno, Marvell MVEBU, at91, nuvoton,
Tegra, Mediatek, Renesas, Hisilicon, Allwinner, Samsung, ux500,
spear, ... The treewide cleanups now have a lot of fixes for cache
nodes and other binding violoations.
- Somewhat larger sets of reworks for NVIDIA Tegra, Qualcomm
and Renesas platforms, adding a lot more on-chip device support
- A rework of the way that DTB overlays are built.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmOSFNQACgkQmmx57+YA
GNnAIg/+KAiUHpSI02V2sQyDXout2laM8fxl8pW4qREQLKV7U+fi74vbd297HSsv
yxOrrvD6aU9QUzWvdYEezqZxUEoOAibEAE3qMaJZrCjzdtmQvIeUJQuNhhg/oGFP
ZcSN8E+60qxsYwfXw9OHp5TTLi5X/ejRmJoPkC/DHbxbpu07YKT0aHf9qoeD8ntM
8Y+qRiC9AYMnK49rw/HSsQIOXKC0tUQrfsavnJGKFE2wUAdD1ZFf34VtMu580USo
eVX++hun/AKKhdU/ZV9xZKUCQTU405SwscGdP5OFtkjNqHCHwdcU10Kp/PxR3XNq
t5Zmfg9PO/OfV17K91t60hkgfZsNojP6mvGwGhYSuIEYKbya3o4YrPJZb/8jd2Vr
QclwN94m53zDTEfhdW4sJ1HGFV8FhQGjQ1PNBuUf2YXIztpuhd4PnCc/R31K4Yr8
O0S2tl/PxUPB2ouHzpuB+4QMGYZjK3OmFNIEZ8tucIuwOeagkZmDUPuq6o1Nj0Je
9XDJVAZf0wFztnbnAKdJkF15Fs8wT8wZLIZOnzy4Zp2HhKHkCKQ0EFSyN37WmM6l
fKktQ/U7sULwrEGSz9cBuYjrq7uOsCnRZD2R6MbB0rs16oHIl4OrVSSzoqYQSTlo
JOAimJJo2mLsslzaKr4TrqhUj9zkrYaWgOLPXD3c4MSLRK/Tqnk=
=WCFd
-----END PGP SIGNATURE-----
Merge tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC DT updates from Arnd Bergmann:
"The devicetree changes contain exactly 1000 non-merge changesets,
including a number of new arm64 SoC variants from Qualcomm and Apple,
as well as the Renesas r9a07g043f/u chip in both arm64 and riscv
variants.
While we have occasionally merged support for non-arm SoCs in the
past, this is now the normal path for riscv devicetree files.
The most notable changes, by SoC platform, are:
- The Apple T6000 (M1 Pro), T6001 (M1 Max) and T6002 (M1 Ultra) chips
now have initial support. This is particularly nice as I am typing
this on a T6002 Mac Studio with only a small number of driver
patches.
- Qualcomm MSM8996 Pro (Snapdragon 821), SM6115 (Snapdragon 662),
SM4250 (Snapdragon 460), SM6375 (Snapdragon 695), SDM670
(Snapdragon 670), MSM8976 (Snapdragon 652) and MSM8956 (Snapdragon
650) are all mobile phone chips that are closely related to others
we already support.
Adding those helps support more phones and we add several models
from Sony (Xperia 10 IV, 5 IV, X, and X compact), OnePlus (One, 3,
3T, and Nord N100), Xiaomi (Poco F1, Mi6), Huawei (Watch) and
Google (Pixel 3a).
There are also new variants of the Herobrine and Trogdor chromebook
motherboards. SA8540P is an automotive SoC used in the Qdrive-3
development platform
- Rockchips gains no new SoC variants, but a lot of new boards: three
mobile gaming systems based on RK3326 Odroid-Go/rg351 family, two
more Anbernic gaming systems based on RK3566 and a number of other
RK356x based single-board computers.
- Renesas RZ/G2UL (r9a07g043) was already supported for arm64, but as
the newly added RZ/Five is based on the same design, this now gets
reorganized in order to share most of the dts description between
the two and add the RZ/Five SMARC EVK board support.
Aside from that, there are the usual changes all over the tree:
- New boards on other platforms contain two ASpeed BMC users, two
Broadcom based Wifi routers, Zyxel NSA310S NAS, the i.MX6 based
Kobo Aura2 ebook reader, two i.MX8 based development boards, two
Uniphier Pro5 development boards, the STM32MP1 testbench board from
DHCOR, the TI K3 based BeagleBone AI-64 board, and the Mediatek
Helio X10 based Sony Xperia M5 phone.
- The Starfive JH7100 source gets reorganized in order to support the
VisionFive V1 board.
- Minor updates and cleanups for Intel SoCFPGA, Marvell PXA168, TI,
ST, NXP, Apple, Broadcom, Juno, Marvell MVEBU, at91, nuvoton,
Tegra, Mediatek, Renesas, Hisilicon, Allwinner, Samsung, ux500,
spear, ... The treewide cleanups now have a lot of fixes for cache
nodes and other binding violoations.
- Somewhat larger sets of reworks for NVIDIA Tegra, Qualcomm and
Renesas platforms, adding a lot more on-chip device support
- A rework of the way that DTB overlays are built"
* tag 'soc-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (979 commits)
arm64: dts: apple: t6002: Fix GPU power domains
arm64: dts: apple: t600x-pmgr: Fix search & replace typo
arm64: dts: apple: Add t8103 L1/L2 cache properties and nodes
arm64: dts: apple: Rename dart-sio* to sio-dart*
arch: arm64: apple: t600x: Use standard "iommu" node name
arch: arm64: apple: t8103: Use standard "iommu" node name
ARM: dts: socfpga: Fix pca9548 i2c-mux node name
dt-bindings: iio: adc: qcom,spmi-vadc: fix PM8350 define
dt-bindings: iio: adc: qcom,spmi-vadc: extend example
arm64: dts: qcom: sc8280xp: fix UFS DMA coherency
arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombie
arm64: dts: qcom: sm8250-sony-xperia-edo: fix no-mmc property for SDHCI
arm64: dts: qcom: sdm845-sony-xperia-tama: fix no-mmc property for SDHCI
arm64: dts: qcom: sda660-inforce-ifc6560: fix no-mmc property for SDHCI
arm64: dts: qcom: sa8155p-adp: fix no-mmc property for SDHCI
arm64: dts: qcom: qrb5165-rb: fix no-mmc property for SDHCI
arm64: dts: qcom: sm8450: align MMC node names with dtschema
arm64: dts: qcom: sc7180-trogdor: use generic node names
arm64: dts: qcom: sm8450-hdk: add sound support
arm64: dts: qcom: sm8450: add Soundwire and LPASS
...
Socinfo is extended with knowledge about MSM8956, MSM8976, SM6115,
SM4250, SM8150, SA8155 and SM8550.
Support for RSC v3, as found in SM8550 is added to the RPMH RSC driver.
Support for SM8550 and SM4250 ARC regulators are added to the RPM(h)
power-domain drivers. SM8550 support is added to the LLCC driver.
The AOSS QMP binding is declared compatible for SM8550.
BWMON and LLCC now selects REGMAP_MMIO to ensure dependencies are built
properly.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmOQtA8VHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FJl4QAJjmeWGK7Su6PNEn1ayFbFsPE6M1
tVrWc122vTayvIH2yK2Q0g2vGmYUwiTrigNCRh0jfWVJvlk4MFcIFMM13R7UFXA5
OcCC44SuaeBdbwlHrrhgUolWisSlyfFPiB+YIbR0L9I/fZgp5ayu30wJjHKBPyxu
sNImIs7yDfMg9bDE3VkwqVq/wF+FnPBhJQFEV4+sMMlXJxuFvkjtgVil9iXDZc4z
aOCsbs1IrMHGuMm/LUN8yeYmusqFpMHR3lGp+7/OwKclUkVzt59j1CyhWORXmnpF
vh0Zyepj4qtKlADxy2jg52w0H3LWma75mnp4x9Dt6NziZ7EBOVT6yQgSQZEXmZ11
FuIkz0+itsz/TkY8K+iMtnGgxMdCui1WNWNMkwXC4ETnJaZZnsZ42g7fLWN5cJYg
g9GV24rMTrS+chYHRCQCtNXXwl+At5II8vnPuRP8W0fowCwqvOCB3VIoLqXiiUyG
At6n6M0nazykLV19QvC2jgNFr5fhvHMRZ69rV7uQKuTrLblijzWF52cP3wlEPtzb
tiRYiNagbIpvD2Jsov3vqC5nzSJaj6zFh1m88dmP2Nb7vBawfwvVEJEuqrWY1AGu
0DjmgE+dmbjwJw5KV9XbS3+U/PBIHWCgjGPs8CUOeHjK01nbPnHgpjMUHLyTFSCn
Q1q9S5Wb75MNR5z2
=MwgS
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmORAKQACgkQmmx57+YA
GNm4pA//WhEcmFPkzGy1CZejxvdDSlNzcL3q1nL+YEE2jRYfe7/FLbtDUcrENioQ
htfF2d4zBf0Y5+cPQhBhsYnShTQKpaesotZ421wLI1XOR+yNA+zfOuukRPB1HGfn
v2TvSiROlaxJfhXv/4Wv/UKpl/ud4alVIuqsW0ah68bL+1A2loj4rKPuwTBCjynR
HMz5QQ0+UD8vBBFITM6qVQ1OLA3TdkLEBT7beSHXsSpBkGJ/jdeoGsF/XV6uigaM
i2CRPDNTZzBN8XkGb/95sJXOWFDmr28DJe4OQOnqYNSDZey4udvIS1MxgGw6h2je
nCKb8O6faYquvcxA2HIR46ywvKtQh/S54HJPPyqZPvZlqJe8LFTCdHzwo4HNcMTh
S/7GIpJV5QwJH5tK/YRW+P2cnRmMfGoCcXlCelH6vgYYXeyZjdNmFaZH59h/PnX9
e03cZehDMs1laZrhF4AZsdDcwu5AzMMpP4jHG7IoSM0H1BB6n7aQCVGMWWxSI876
Y7xz7s93brnYwCTIJnM/nG+wuFe0ITavTKozbEWoMEfMb69w/fqMH6F11SJWZY+P
LLywtFMhwsE7MEK8ZuWWLlseQG4a0AXljRE+DwVn1Kn53fjIKnZm6gPOUtjsoIgV
mxmJRwJjCixZYWOIK60i5AsEwkwars9wmGIxjvPKy2USVVHPnO0=
=u7Q7
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
More Qualcomm driver updates for 6.2
Socinfo is extended with knowledge about MSM8956, MSM8976, SM6115,
SM4250, SM8150, SA8155 and SM8550.
Support for RSC v3, as found in SM8550 is added to the RPMH RSC driver.
Support for SM8550 and SM4250 ARC regulators are added to the RPM(h)
power-domain drivers. SM8550 support is added to the LLCC driver.
The AOSS QMP binding is declared compatible for SM8550.
BWMON and LLCC now selects REGMAP_MMIO to ensure dependencies are built
properly.
* tag 'qcom-drivers-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: socinfo: Add SM6115 / SM4250 SoC IDs to the soc_id table
dt-bindings: arm: qcom,ids: Add SoC IDs for SM6115 / SM4250 and variants
soc: qcom: socinfo: Add SM8150 and SA8155 SoC IDs to the soc_id table
dt-bindings: arm: qcom,ids: Add SoC IDs for SM8150 and SA8155
dt-bindings: soc: qcom: apr: document generic qcom,apr compatible
soc: qcom: Select REMAP_MMIO for ICC_BWMON driver
soc: qcom: Select REMAP_MMIO for LLCC driver
soc: qcom: rpmpd: Add SM4250 support
dt-bindings: power: rpmpd: Add SM4250 support
dt-bindings: soc: qcom: aoss: Add compatible for SM8550
soc: qcom: llcc: Add configuration data for SM8550
dt-bindings: arm: msm: Add LLCC compatible for SM8550
soc: qcom: llcc: Add v4.1 HW version support
soc: qcom: socinfo: Add SM8550 ID
soc: qcom: rpmh-rsc: Avoid unnecessary checks on irq-done response
soc: qcom: rpmh-rsc: Add support for RSC v3 register offsets
soc: qcom: rpmhpd: Add SM8550 power domains
dt-bindings: power: rpmpd: Add SM8550 to rpmpd binding
soc: qcom: socinfo: Add MSM8956/76 SoC IDs to the soc_id table
dt-bindings: arm: qcom,ids: Add SoC IDs for MSM8956 and MSM8976
Link: https://lore.kernel.org/r/20221207154134.3233779-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add compatible and constants for the power domains exposed by the
SM4250 RPM.
Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221127112204.1486337-2-bhupesh.sharma@linaro.org
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm SM8550 platform.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221116111745.2633074-2-abel.vesa@linaro.org
Document the identifier of MSM8956/76.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111120156.48040-7-angelogioacchino.delregno@collabora.com
Add device tree bindings for global clock controller on SM8550 SoCs.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130112852.2977816-2-abel.vesa@linaro.org
Add bindings for the missing networking resets found in IPQ8074 GCC.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107132901.489240-2-robimarko@gmail.com
This introduces support for SM4250, SM6115, SM6375 and SDM670 platforms
and Sony Xperia 10 IV, Google Pixel 3a, OnePlus 3, OnePlus 3T, Google
Pazquel and OnePlus Nord N100.
A wide variety of updates to align with DeviceTree bindings across
many/most platforms is introduced, and incorrectly styled comments are
adjusted across the tree.
Apps RSC is added to the cluster-idle power-domain across SM8150,
SM8250, SM8350 and SM8450, to ensure sleep and wake votes are flushed as
the last core is being powered down.
Remoteproc firmware patches are aligned with agreed upon structure used
in linux-firmware across Inforce 6560, Lenovo Miix 630, various Sony
Xperia devices and Samsung Galaxy Book2 (although these are not
available in linux-firmware today).
On IPQ8074 CPU clocks are added, thermal zones are introduced and vqmmc
supply is specified for the HK01 board.
Alcatel OneTouch Idol 3 gains LED nodes and Samsung Galaxy A3U gained
vibrator support.
The application subsystem's IOMMU and the display subsystem is enabled
for MSM8953.
A new CPU frequency table is introduced for MSM8996Pro, to properly
describe it separate of MSM8996. The GPU opp-table is extended as well.
On SC7180 USB is marked as a wakeup source, USB gains required-opps to
ensure that the core voltage rail is voted for as needed. The
description of the fingerprint sensor in Trogdor is corrected.
On SC7280 Wake-on-WLAN is introduced, and PHY parameters for the SNPS
USB PHY is defined across SC7280.
The memory map across Google Herobrine is adjusted, to regain unused
memory on the WiFi SKUs. A LTE SKU of the Evoker board is introduced
and the bard gains touchscreen.
NVME support is disabled on Villager boards, as it's not used.
PCIe support is introduced on SC8280XP, with NVMe, SDX55 (5G) and WiFi
enabled on the Lenovo Thinkpad X13s and Compute Reference Device. ADCs
and thermal zones are intrduced for the same. Lenovo Thinkpad X13s
gains LID switch support.
Fairphone FP3 gains touchscreen support.
Support for Xiaomi Poco F1 variant with EBBG panel.
The round-robin ADC is enabled across DB845c, OnePlus devices and
Pocophone F1 devices.
The displayport controller on SDM845 is introduced.
SM6350 gains SDHCI support and on Sony Xperia 10 III sd-card,
touchscreen and GPI DMA is enabled.
Fairphone FP4 got SD-card support.
UFS PHY register ranges are corrected across SM8150, SM8250, SM8350 and
SM8450.
Sony Xperia 1 II got NFC support and Sony Xperia 5 III got PMIC
regulators defined and USB definition corrected, to enable USB3.
The SDHCI controller is described for SM8450 and microSD support is
enabled for the HDK and QRD devices.
SM8450 also gains camera CCI interface and display clock controller.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmN/QfsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FR8wP/3ynHPC8Kq/exZfb2n5M6gS3+3YZ
BxwCcjcwMCMBwFZUZ4LPYDctd+TL8rJ0htnK9Foq61i8FJl2cUqvU/OKtfD3W9gO
wTzZC1bZJItZCreb4T7Kj2t3hBhO5dkG+UgbovfOgk9tJXvgNbio66ZGJqKDtU92
ubIAJxFERACERT9g6gtAdBa2BEofG/zI2ei8HqkKP/7u51XXtRNzVCYXyHM8TydL
M03U6snZNJkkj+UM8Wzrg9mxkheAOSyo0nLK58Lje2I4CjV5WToCZUICqm7z7l36
GoBnDXaRacmb0gIco9sGMo5K7jNqQ/6U1JVJRAb+NNM16fp0mKOboZ8SLKI9oT6g
9UXiylzzz0buvNzzTu7HF8JRNQvxBnLKC+nE/ekWQm6uhsmJ9DkrMBnxn5fyZ1iL
5uFXcaVDagVQCdHOfYntQzKEGsoPwg0KQJbjoM+T3tkQX5NcWVP+06uYLWqRxgk5
jTn98JXK+2w4yYdhCKr8U71mBoWwoYwOZiEnZlL+P+52gZUoWDgA65BGnoqYk2cW
2KsfB+EM3ggye6a4X/gVVuCR8bYO5+YIUyoBWLRKd51xw0Mr99KUc+ugTmCKGZpW
31p/NhgdvfOK9qLRhEVH9zDT24Jqo1tRF2NgtJrFufMcYbdNbB8BA22aDLoTbE0m
Kru1n0WaaU4vBIbm
=0+lj
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmOHYjwACgkQmmx57+YA
GNn21Q/7B5vrpo21COOlybRqhhAJYKo1kouED1EW4Fh1qQ0PejkDEU9CZYuvTNyw
l0sFewhdpV9cEhSDm6nuk+wcs15r3tBp9fWWWBMbLLi+MohO0rY3Wi7ZIZDbK9N8
B1UqkCASqLRYbny6kT0JztlhdEAHlEJ2Bc63pHhVYdj74xyLm+ByIgGV0o0fWhNM
dUtJwz+W+uYMg/5OFj/UMLBvXFdDzz/LmYKS8UYP0sxmhOUJd1yTqxyqCxECWe6z
OgGeB+2bQ297OyWdQjZk6tucZcjpP0y6qtL1PQaDtfqMVXsaDKNqa+C1eTvTEQWT
tzOuWq4I5z7+vEe3JlKwHFmeblvD5FhNqUzyJabxXbTpe7m7sLbyeJdYaXXd6lmk
0hBAJdSNNqAoIMMXUWwDxzaTDzKq648fteP0VZIC2B24iSRz6tt2FhLi6X1Lh0Tj
LDHsbHvQIY3cFmYqIbgRt+lMxyy+pZWRuZFhMeIrNE1T4OQn2X3l5DlGAjUw2i51
KXWUHeUSWWE39FyV/V72BDIPM/kGrESdJACko989ZinKdvKSyyz9Tl4qKsYUWAFH
XZf3BvvsP20WKLvF79n500RBOh0J2uhTGTv6zphXXj5nRvv6NFiS1C+MWwaVnO4L
HABmamTgb/rkP36J7nOD3iBQxuYG4i/hDLG66Zibhf9gqUDAWV4=
=c209
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DTS updates for 6.2
This introduces support for SM4250, SM6115, SM6375 and SDM670 platforms
and Sony Xperia 10 IV, Google Pixel 3a, OnePlus 3, OnePlus 3T, Google
Pazquel and OnePlus Nord N100.
A wide variety of updates to align with DeviceTree bindings across
many/most platforms is introduced, and incorrectly styled comments are
adjusted across the tree.
Apps RSC is added to the cluster-idle power-domain across SM8150,
SM8250, SM8350 and SM8450, to ensure sleep and wake votes are flushed as
the last core is being powered down.
Remoteproc firmware patches are aligned with agreed upon structure used
in linux-firmware across Inforce 6560, Lenovo Miix 630, various Sony
Xperia devices and Samsung Galaxy Book2 (although these are not
available in linux-firmware today).
On IPQ8074 CPU clocks are added, thermal zones are introduced and vqmmc
supply is specified for the HK01 board.
Alcatel OneTouch Idol 3 gains LED nodes and Samsung Galaxy A3U gained
vibrator support.
The application subsystem's IOMMU and the display subsystem is enabled
for MSM8953.
A new CPU frequency table is introduced for MSM8996Pro, to properly
describe it separate of MSM8996. The GPU opp-table is extended as well.
On SC7180 USB is marked as a wakeup source, USB gains required-opps to
ensure that the core voltage rail is voted for as needed. The
description of the fingerprint sensor in Trogdor is corrected.
On SC7280 Wake-on-WLAN is introduced, and PHY parameters for the SNPS
USB PHY is defined across SC7280.
The memory map across Google Herobrine is adjusted, to regain unused
memory on the WiFi SKUs. A LTE SKU of the Evoker board is introduced
and the bard gains touchscreen.
NVME support is disabled on Villager boards, as it's not used.
PCIe support is introduced on SC8280XP, with NVMe, SDX55 (5G) and WiFi
enabled on the Lenovo Thinkpad X13s and Compute Reference Device. ADCs
and thermal zones are intrduced for the same. Lenovo Thinkpad X13s
gains LID switch support.
Fairphone FP3 gains touchscreen support.
Support for Xiaomi Poco F1 variant with EBBG panel.
The round-robin ADC is enabled across DB845c, OnePlus devices and
Pocophone F1 devices.
The displayport controller on SDM845 is introduced.
SM6350 gains SDHCI support and on Sony Xperia 10 III sd-card,
touchscreen and GPI DMA is enabled.
Fairphone FP4 got SD-card support.
UFS PHY register ranges are corrected across SM8150, SM8250, SM8350 and
SM8450.
Sony Xperia 1 II got NFC support and Sony Xperia 5 III got PMIC
regulators defined and USB definition corrected, to enable USB3.
The SDHCI controller is described for SM8450 and microSD support is
enabled for the HDK and QRD devices.
SM8450 also gains camera CCI interface and display clock controller.
* tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (261 commits)
arm64: dts: qcom: sdm845-polaris: Don't duplicate DMA assignment
arm64: dts: qcom: sm8350-sagami: Wire up USB regulators and fix USB3
arm64: dts: qcom: sm8350-sagami: Add most RPMh regulators
arm64: dts: qcom: sc7280: Make herobrine-audio-rt5682 mic dtsi's match more
arm64: dts: qcom: trim addresses to 8 digits
arm64: dts: msm8998: unify PCIe clock order withMSM8996
arm64: dts: msm8998: add MSM8998 specific compatible
arm64: dts: qcom: sc8280xp-x13s: enable WiFi controller
arm64: dts: qcom: sc8280xp-x13s: enable modem
arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD
arm64: dts: qcom: sc8280xp-crd: enable WiFi controller
arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem
arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD
arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulators
arm64: dts: qcom: sa8295p-adp: enable PCIe
arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes
arm64: dts: qcom: add sdm670 and pixel 3a device trees
arm64: dts: qcom: sc7280: Add Google Herobrine WIFI SKU dts fragment
arm64: dts: qcom: sc7280: Mark all Qualcomm reference boards as LTE
arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD card
...
Link: https://lore.kernel.org/r/20221124100650.1982448-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
New boards:
- Model A and blade baseboards for the SOQuartz (rk3568) SoM,
- Anberic RG351M, RG353V, RG353VS; Odroid Go Super, Advance gaming devices
- Odroid M1
- Theobroma px30 SoM with baseboard
- Rockchip's own rk3566 demo board
Some core support for per SoC specifics:
- crypto support for rk3399 and rk3328
- second I2S controller for rk3568
- Cache properties for follow the binding for rk3308 and rk3328
Bigger device support updates for:
- SOQuartz: PCIe2, video output, gpu, HDMI sound
- Rock 3A: eth regulator, eth clock input, Wifi+Bt, I2S, PCIe3
As well as some minor extensions for Rock960 (hdmi supplies),
rk3566-roc-pc (PCIe2), Rock 4C+ (thermal support), Pinephone Pro (Wifi+Bt)
* tag 'v6.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (51 commits)
arm64: dts: rockchip: update cache properties for rk3308 and rk3328
arm64: dts: rockchip: Add SOQuartz Model A baseboard
dt-bindings: arm: rockchip: Add SOQuartz Model A
arm64: dts: rockchip: Add SOQuartz blade board
dt-bindings: arm: rockchip: Add SOQuartz Blade
arm64: dts: rockchip: Add Anbernic RG351M
arm64: dts: rockchip: Add Odroid Go Super
arm64: dts: rockchip: Add Odroid Go Advance Black Edition
dt-bindings: arm: rockchip: Add more RK3326 devices
arm64: dts: rockchip: Move most of Odroid Go Advance DTS into a DTSI
arm64: dts: rockchip: Add support of regulator for ethernet node on Rock 3A SBC
arm64: dts: rockchip: Add support of external clock to ethernet node on Rock 3A SBC
arm64: dts: rockchip: Add HDMI supplies on Rock960
arm64: dts: rockchip: Add dts for rockchip rk3566 box demo board
dt-bindings: rockchip: Add Rockchip rk3566 box demo board
arm64: dts: rockchip: Enable PCIe 2 on SOQuartz CM4IO
arm64: dts: rockchip: Enable HDMI sound on SOQuartz
arm64: dts: rockchip: Enable video output and HDMI on SOQuartz
arm64: dts: rockchip: Enable GPU on SOQuartz CM4
arm64: dts: rockchip: enable pcie2 on rk3566-roc-pc
...
Link: https://lore.kernel.org/r/4716610.aeNJFYEL58@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the
name used in the RM is video_pll. So, let's rename "video_pll1" to
"video_pll" to be consistent with the RM and avoid misunderstandings.
The IMX8MN_VIDEO_PLL1* constants have not been removed to ensure
backward compatibility of the patch.
No functional changes intended.
Fixes: 96d6392b54 ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221117113637.1978703-4-dario.binacchi@amarulasolutions.com
The IMX8MN platform does not have any video processing unit (VPU), and
indeed in the reference manual (document IMX8MNRM Rev 2, 07/2022) there
is no occurrence of its pll. From an analysis of the code and the RM
itself, I think vpu pll is used instead of m7 alternate pll, probably
for copy and paste of code taken from modules of similar architectures.
As an example for all, if we consider the second row of the "Clock Root"
table of chapter 5 (Clocks and Power Management) of the RM:
Clock Root offset Source Select (CCM_TARGET_ROOTn[MUX])
... ... ...
ARM_M7_CLK_ROOT 0x8080 000 - 24M_REF_CLK
001 - SYSTEM_PLL2_DIV5
010 - SYSTEM_PLL2_DIV4
011 - M7_ALT_PLL_CLK
100 - SYSTEM_PLL1_CLK
101 - AUDIO_PLL1_CLK
110 - VIDEO_PLL_CLK
111 - SYSTEM_PLL3_CLK
... ... ...
but in the source code, the imx8mn_m7_sels clocks list contains vpu_pll
for the source select bits 011b.
So, let's rename "vpu_pll" to "m7_alt_pll" to be consistent with the RM.
The IMX8MN_VPU_* constants have not been removed to ensure backward
compatibility of the patch.
No functional changes intended.
Fixes: 96d6392b54 ("clk: imx: Add support for i.MX8MN clock driver")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221117113637.1978703-2-dario.binacchi@amarulasolutions.com
Add a new dt-bindings/media/video-interfaces.h header that defines
macros corresponding to the bus types from media/video-interfaces.yaml.
This allows avoiding hardcoded constants in device tree sources.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>
Reviewed-by: Paul Elder <paul.elder@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
The current QMP USB3-DP PHY bindings are based on the original MSM8996
binding which provided multiple PHYs per IP block and these in turn were
described by child nodes.
The QMP USB3-DP PHY block provides a single multi-protocol PHY and even
if some resources are only used by either the USB or DP part of the
device there is no real benefit in describing these resources in child
nodes.
The original MSM8996 binding also ended up describing the individual
register blocks as belonging to either the wrapper node or the PHY child
nodes.
This is an unnecessary level of detail which has lead to problems when
later IP blocks using different register layouts have been forced to fit
the original mould rather than updating the binding. The bindings are
arguable also incomplete as they only the describe register blocks used
by the current Linux drivers (e.g. does not include the PCS LANE
registers).
This is specifically true for later USB4-USB3-DP QMP PHYs where the TX
registers are used by both the USB3 and DP parts of the PHY (and where
the USB4 part of the PHY was not covered by the binding at all). Notably
there are also no DP "RX" (sic) registers as described by the current
bindings and the DP "PCS" region is really a set of DP_PHY registers.
Add a new binding for the USB4-USB3-DP QMP PHYs found on SC8280XP which
further bindings can be based on.
Note that the binding uses a PHY index to access either the USB3 or DP
part of the PHY and that this can later be used also for the USB4 part
if needed.
Similarly, the clock inputs and outputs can later be extended to support
USB4.
Also note that the current binding is simply removed instead of being
deprecated as it was only recently merged and would not allow for
supporting DP mode.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Qualcomm driver updates for 6.2
The qcom,msm-id and qcom,board-id DeviceTree properties are documented,
to allow them to be used in configurations or devices requiring these
and the socinfo driver is updated to reuse the introduced identifiers.
The rpmh-rsc driver is extended to register for PM runtime notifications
from the CPU clusters, in order to submit sleep and wake votes the last
core in a cluster is being powered down.
A mechanism for keeping rpmhpd resources voted until sync_state is
introduced, this ensures that power-domains required during boot are
kept enabled. The rpmhpd power-domains for SDM670 are also added.
Support for the new QDU1000/QRU1000 platform is introduced in the rpmhpd
and socinfo drivers.
The APR driver gains missing error handling. QMI message descriptors in
the PDR driver are made const.
Support for the RPM found in SM6375 is added. The SPM driver gains
support for MSM8939 and MSM8976 platforms.
The stats and command-db drvers are marked as not having PM support.
* tag 'qcom-drivers-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (36 commits)
dt-bindings: firmware: scm: add sdm670 compatible
soc: qcom: rpmh-rsc: Write CONTROL_TCS with next timer wakeup
soc: qcom: rpmh-rsc: Save base address of drv
PM: domains: Store the next hrtimer wakeup in genpd
soc: qcom: rpmh-rsc: Attach RSC to cluster PM domain
dt-bindings: soc: qcom: Update devicetree binding document for rpmh-rsc
dt-bindings: soc: qcom: qcom,smd-rpm: Use qcom,smd-channels on MSM8976
soc: qcom: apr: Add check for idr_alloc and of_property_read_string_index
soc: qcom: socinfo: Add QDU1000/QRU1000 SoC IDs to the soc_id table
dt-bindings: arm: qcom,ids: Add SoC IDs for QDU1000/QRU1000
soc: qcom: rpmhpd: Add QDU1000/QRU1000 power domains
dt-bindings: power: rpmpd: Add QDU1000/QRU1000 to rpmpd binding
dt-bindings: qcom: smp2p: Add WPSS node names to pattern property
soc: qcom: spm: Implement support for SAWv2.3, MSM8976 L2 PM
dt-bindings: soc: qcom: spm: Add compatibles for MSM8976 L2
soc: qcom: llcc: make irq truly optional
soc: qcom: spm: Add MSM8939 SPM register data
dt-bindings: soc: qcom: spm: Add MSM8939 CPU compatible
dt-bindings: soc: qcom: aoss: Add sc8280xp compatible
dt-bindings: firmware: document Qualcomm SM6375 SCM
...
Link: https://lore.kernel.org/r/20221122202748.1854487-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
New memory client IDs and IOMMU stream IDs, as well as new compatible
strings are introduced to support more hardware on Tegra234. Some device
tree bindings are converted to json-schema to allow formal validation.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmN7rm8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zobCvD/9AsZG67rQQjJwhouvUChcCezSyLvO7
l1v0u6L4mRd4+aavhV8yjhi0KEBKPDPXmfvcaXEXfQ5Atpcb37KHRdEskHFGo2+K
W47a/rdlN2wTacH/cGtzZ4S+phWEZSW27sGbZR7GWrVs2Au/O3Aug8IXFN2b6Flh
1Z6Y+rQ1wNCrUMLmPoLkb/8l579udiJDwFQOQ4KhvzKaLXTj5WTDXyOLAxB52TYT
almlmVhGwoDyzPWfMOVuFN5e4d3f4DLNJDI82frQrCdv3j3Tb+J3O9vZX3a4HcMv
awXz2SIHnOCYDSGEQvI+Dphx1gkUMBaIwQ7bmzAprlissrDczvg1uEZ8uQ5XrLcM
zi2q0rd/Z8Z6AzL4J8MNFkz/JmZqgbuGuCtRmB7dMYuFjkjhCe7ALMJYLBrJfwPB
B+KNE4Ib/xvUmzjbhzPapssuuNd9CuTcVRdMGxZB30WSUzmrTQW/kV5m447dJOoL
WvQbNc3RKqsMzpi7SK0zD7kCtrNk48/rNexxVxhnskNcdNOiNhBbaeYi6d894b1E
dWoVpTBXOQbSjjlVTeQcU7HZGM/53WooGWToAb19uanaqee5bAJuiH/Lyq4YzNof
DSfo+jSWLPP78ScfA3OtSyR3BA1oub1el3JqnNS4x09pI2ykctsRa35mWSBoGFNO
ZWG4Fy0A+GlP3w==
=Eawq
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmN9RpoACgkQmmx57+YA
GNm9TA//VYQpWDs5HD22hi3koKiEX781cgIm6WAshMMb22S5XpXT4n1pJJdWyucY
jt6mBSaMOWOAFHmhAzwTkAdYEUeT+J15sJbBj66PhgICCLfaE0HrnFXg9Vn8Js69
evNCK5n+hzgeUrXPU20kuIzQ5Qc5OgZHiXflA3waYaOhdG4Tavd3wErAdz3QBQ3H
I/UB8YirRFfVovw8cAh18fJgRsEtPIEX9qmG+tu8zKe1t7eyyijtehPv5faegE1t
A7iiAdSZvRHua5gQs4ukdDupJQVLf/KSDx7nHW22JzU5T69j8hc442hpIMN+n79N
KD15LBKZGdg1pjaoQWMIhEXAuxd50/pPAj+rskYgBQcuf7JuKpi026oqPz39/jkE
rQFfsOl9oZmJ4lv4hvTXqOitW7TMoYpkTmMm2d9mpG1RonKynuLPTuSuvYOBs38f
kV7g7x7JubLDw/rZ1pe6Thkd8lCDbqjOGJw3ppXsELUM9mpuPuIUkCSGBSSc+kcM
gNENyVmioGDS2gVKkkhjlqHKjQb/0ixyz1gmhyWy5TSZ/Y/qW1hyaGfBqHsKvOwV
2juitJtRxQOasR2/PP3U1Cjg+NmfTcuoBN6nhbdgf9ZDT58RM6bcpVOv1onY9hNX
/G1V3HmhIdfix6fTDtgf7fZu4pziXpJ7cSkx3i4UyW98yPxuIQA=
=OUO0
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.2-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.2-rc1
New memory client IDs and IOMMU stream IDs, as well as new compatible
strings are introduced to support more hardware on Tegra234. Some device
tree bindings are converted to json-schema to allow formal validation.
* tag 'tegra-for-6.2-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: usb: tegra-xusb: Convert to json-schema
dt-bindings: pwm: tegra: Convert to json-schema
dt-bindings: pinctrl: tegra194: Separate instances
dt-bindings: pinctrl: tegra: Convert to json-schema
dt-bindings: PCI: tegra234: Add ECAM support
dt-bindings: pwm: tegra: Document Tegra234 PWM
dt-bindings: Add bindings for Tegra234 NVDEC
dt-bindings: tegra: Update headers for Tegra234
dt-bindings: Add headers for NVDEC on Tegra234
Link: https://lore.kernel.org/r/20221121171239.2041835-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
All these IDs are for one single HW gate (CCGR101) that is shared
between these root clocks.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/1667811007-19222-2-git-send-email-shengjiu.wang@nxp.com
Per updated Reference Mannual, the TPM[1,3] LPIT[1,2] root clock entries
are reserved, it is because writing the CCM registers does nothing
because the TPM[1,3] and LPIT[1,2] IPs source from bus clk, not from the
TPM[1,3] LPIT[1,2] entries. And because there is no SW entity is using the
entries since adding them, let's drop them.
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221028095211.2598312-4-peng.fan@oss.nxp.com
usb suspend clock has a gate shared with usb_root_clk.
Fixes: 9c140d9926 ("clk: imx: Add support for i.MX8MP clock driver")
Cc: stable@vger.kernel.org # v5.19+
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/1664549663-20364-1-git-send-email-jun.li@nxp.com
Update the device-tree clock, memory, power and reset headers for
Tegra234 by adding the definitions for all the various devices.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
For some reason the mod clock for the Allwinner F1C100s CIR (infrared
receiver) peripheral was not modeled in the CCU driver.
Add the clock description to the list, and wire it up in the clock list.
By assigning a new clock ID at the end, it extends the number of clocks.
This allows to use the CIR peripheral on any F1C100s series board.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20221107005433.11079-5-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Add reset ID defines for rk3588.
Compared to the downstream bindings and previous rockchip
generations this uses continous gapless reset IDs starting
at 0 instead of register offsets as IDs. Thus all numbers
are different between upstream and downstream, but I kept
the names exactly the same.
Co-Developed-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add clock ID defines for rk3588.
Compared to the downstream bindings written by Elaine, this uses
continous gapless clock IDs starting at 0. Thus all numbers are
different between downstream and upstream, but I kept exactly the
same names.
Co-Developed-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20221018151407.63395-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rename the header guard of mt6795-pinfunc.h from __DTS_MT8173_PINFUNC_H to
__DTS_MT6795_PINFUNC_H what corresponding with the file name.
Fixes: 81557a7156 ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings")
Signed-off-by: Wei Li <liwei391@huawei.com>
Link: https://lore.kernel.org/r/20221108094529.3597920-1-liwei391@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm QDU1000 and QRU1000 platforms.
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221026190549.4005703-3-quic_molvera@quicinc.com
As per the new ADC7 architecture used by the Qualcomm PMICs, each PMIC
has the static Slave ID (SID) assigned by default. The primary PMIC
PMK8350 is responsible for collecting the temperature/voltage data from
the slave PMICs and exposing them via it's registers.
For getting the measurements from the slave PMICs, PMK8350 uses the
channel ID encoded with the SID of the relevant PMIC. So far, the
dt-binding for the slave PMIC PM8350 assumed that there will be only
one PM8350 in a system. So it harcoded SID 1 with channel IDs.
But this got changed in platforms such as Lenovo X13s where there are a
couple of PM8350 PMICs available. So to address multiple PM8350s, change
the binding to accept the SID specified by the user and use it for
encoding the channel ID.
It should be noted that, even though the SID is static it is not
globally unique. Only the primary PMIC has the unique SID id 0.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221103095810.64606-2-manivannan.sadhasivam@linaro.org
Add this previously missing index, since it is supported by the SoCs
targeted by the dispcc-sm8250 driver.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102090140.965450-4-robert.foss@linaro.org
This will be used from the devicetree bindings to specify the clocks
that should be obtained from the jz4755-cgu driver.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221027192024.484320-3-lis8215@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add bindings for audio-related clocks on the Ingenic X1000 SoC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20221026194345.243007-5-aidanmacdonald.0x0@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
RK3399 has 2 crypto instance, named crypto0 and crypto1 in the TRM.
Only reset for crypto1 is correctly named, but crypto0 is not.
Since nobody use them, add a 0 to be consistent with the TRM and
crypto1 entries.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220927075511.3147847-27-clabbe@baylibre.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the RPMh power domain IDs and compatible string for Snapdragon 670 to
make SDM670 power domains accessible to the device trees.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221004221130.14076-2-mailingradian@gmail.com
The top level qcom,msm-id and qcom,board-id properties are utilized by
bootloaders on Qualcomm MSM platforms to determine which device tree
should be used and passed to the kernel.
The commit b32e592d3c ("devicetree: bindings: Document qcom board
compatible format") from 2015 was a consensus during discussion about
upstreaming qcom,msm-id and qcom,board-id fields. There are however still
problems with that consensus:
1. It was reached 7 years ago but it turned out its implementation did
not reach all possible products.
2. Initially additional tool (dtbTool) was needed for parsing these
fields to create a QCDT image consisting of multiple DTBs, later the
bootloaders were improved and they use these qcom,msm-id and
qcom,board-id properties directly.
3. Extracting relevant information from the board compatible requires
this additional tool (dtbTool), which makes the build process more
complicated and not easily reproducible (DTBs are modified after the
kernel build).
4. Some versions of Qualcomm bootloaders expect these properties even
when booting with a single DTB. The community is stuck with these
bootloaders thus they require properties in the DTBs.
Since several upstreamed Qualcomm SoC-based boards require these
properties to properly boot and the properties are reportedly used by
bootloaders, document them along with the bindings header with constants
used by: bootloader, some DTS and socinfo driver.
Link: https://lore.kernel.org/r/a3c932d1-a102-ce18-deea-18cbbd05ecab@linaro.org/
Co-developed-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220830065744.161163-2-krzysztof.kozlowski@linaro.org
New drivers:
- Cypress CY8C95x0 chip pin control support, along with an immediate
cleanup.
- Mediatek MT8188 SoC pin control support.
- Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem)
pin control support.
- Qualcomm PM7250, PM8450
- Rockchip RV1126 SoC pin control support.
Improvements:
- Fix some missing pins in the Armada 37xx driver.
- Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro.
- Fix some GPIO irq_chips to be immutable.
- Massive Qualcomm device tree binding cleanup, with more to come.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmNEhjMACgkQQRCzN7AZ
XXMNXRAAuqKM8b/Kw7H9S2sBgMuESk2WKe/lmJ6mQCWK1iyo0xecEQi1wN3WGZt1
DfoYHdsB45GWnRcwIVIl2wAjce72EFepCa/sut55TR/bLDxRfSiHGBKatSk5VkQp
IGx75EtsRPgnZCUU3jQgrQEiI8eqj90nr8CugZwD7gocjAtaRJXb0cc3NPyk/TDh
Wyku3rYuzztLCJHwsZ7Q9zh3s9b8Vb43pK9BW8HHeuODqMECaDWTEQUDetKz/Z8X
v7v01PSOafBQUCoFPezz/20kOV9llxFSCeCqbwG3zvjPSjofVwSFoSH1Op4Ybr/t
JWM8Py1+/G/rbsRhZuEahLJ+/eLy7SWABSUq2sxwCEr/VkzNCZ1jKH/qB1S7ZkI6
GcHPbEeCDzcN+yfKIo8p6WHUYivpj2XKXqh/BWIY63rJ3ukrq3WHuJNvCO15F/TJ
PDuLIL0RdNxSanoamsplNtFWA3ap92P2P933k+v06VEZpZys8j/JHFUaysbiqpL+
GoHdRjspFC/4Ob3FwbbiYktpoKmRsZl7PCJSYnnz5nrHFUbQ4LtrgppqMgGXny16
P0pW8IBmIF4yVteodQFsyYZq2yH91TengHleqoFsK0OjYXG0BmRm3lYWLjWbojxe
U7E5T5qQo2rtdVct9d47UznK3IRThDDJx9DtG+Y19VpkKiOy6j8=
=PvLX
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"There is nothing exciting going on, no core changes, just a few
drivers and cleanups.
New drivers:
- Cypress CY8C95x0 chip pin control support, along with an immediate
cleanup
- Mediatek MT8188 SoC pin control support
- Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin
control support
- Qualcomm PM7250, PM8450
- Rockchip RV1126 SoC pin control support
Improvements:
- Fix some missing pins in the Armada 37xx driver
- Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP()
macro
- Fix some GPIO irq_chips to be immutable
- Massive Qualcomm device tree binding cleanup, with more to come"
* tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits)
MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement
pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"
pinctrl: Create subdirectory for StarFive drivers
dt-bindings: pinctrl: st,stm32: Document interrupt-controller property
dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property
dt-bindings: pinctrl: st,stm32: Document gpio-line-names
pinctrl: st: stop abusing of_get_named_gpio()
pinctrl: wpcm450: Correct the fwnode_irq_get() return value check
pinctrl: bcm: Remove unused struct bcm6328_pingroup
pinctrl: qcom: restrict drivers per ARM/ARM64
pinctrl: bcm: ns: Remove redundant dev_err call
gpio: rockchip: request GPIO mux to pinctrl when setting direction
pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback
pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops
pinctrl: cy8c95x0: Drop atomicity on operations on push_pull
pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux()
pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper
pinctrl: stm32: Switch to use dev_err_probe() helper
dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings
pinctrl: qcom: spmi-gpio: Add compatible for PM7250B
...
Including:
- Removal of the bus_set_iommu() interface which became
unnecesary because of IOMMU per-device probing
- Make the dma-iommu.h header private
- Intel VT-d changes from Lu Baolu:
- Decouple PASID and PRI from SVA
- Add ESRTPS & ESIRTPS capability check
- Cleanups
- Apple DART support for the M1 Pro/MAX SOCs
- Support for AMD IOMMUv2 page-tables for the DMA-API layer. The
v2 page-tables are compatible with the x86 CPU page-tables.
Using them for DMA-API prepares support for hardware-assisted
IOMMU virtualization
- Support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver
- Some smaller fixes and cleanups
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmNEC5oACgkQK/BELZcB
GuNcOQ/6A5SXmcvDRLYZW1ENM5Z6xsZ1LabSZkjhYSpmbJyu8Uny/Z2aRWqxPMLJ
hJeHTsWSLhrTq1VfjFhELHB3kgT2DRr7H3LXXaMNC6qz690EcavX1wKX2AxH0m22
8YrktkyAmFQ3BG6rsQLdlMMasLph/x06ix/xO9opQZVFdj/fV0Jx7ekX1JK+U3hx
MI96i5W3G5PBVHBypAvjxSlmA4saj9Fhk7l3IZL7py9AOKz7NypuwWRs+86PMBiO
EzLt5aF4g8pmKChF/c9BsoIbjBYvTG/s3NbycIng0ACc2SOvf+EvtoVZQclWifbT
lwti9PLdsoVUnPOZHLYOTx4xSf/UyoLVzaLxJ52aoXnNYe2qaX5DANXhT2mWIY/Y
z1mzOkShmK7WF7a8arRyqJeLJ4SvDx8GrbvLiom3DAzmqVHzzFGadHtt5fvGYN4F
Jet/JIN3HjECQbamqtPBpWquBFhLmgusPksIiyMFscRvYdZqkaVkTkElcF3WqAMm
QkeecfoTQ9Vdtdz44ZVLRjKpS77yRZmHshp1r/rfSI+9Ok8uRI+xmmcyrAI6ElqH
DH14tLHPzw694rTHF+bTCd+pPMGOoFLi0xAfUXAeGWm1uzC1JIRrVu5JeQNOUOSD
5SQDXB7dPrhXngaws5Fx2u3amCO3688mslcGgM7q54kC+LyVo0E=
=h0sT
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel:
- remove the bus_set_iommu() interface which became unnecesary because
of IOMMU per-device probing
- make the dma-iommu.h header private
- Intel VT-d changes from Lu Baolu:
- Decouple PASID and PRI from SVA
- Add ESRTPS & ESIRTPS capability check
- Cleanups
- Apple DART support for the M1 Pro/MAX SOCs
- support for AMD IOMMUv2 page-tables for the DMA-API layer.
The v2 page-tables are compatible with the x86 CPU page-tables. Using
them for DMA-API prepares support for hardware-assisted IOMMU
virtualization
- support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver
- some smaller fixes and cleanups
* tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (59 commits)
iommu/vt-d: Avoid unnecessary global DMA cache invalidation
iommu/vt-d: Avoid unnecessary global IRTE cache invalidation
iommu/vt-d: Rename cap_5lp_support to cap_fl5lp_support
iommu/vt-d: Remove pasid_set_eafe()
iommu/vt-d: Decouple PASID & PRI enabling from SVA
iommu/vt-d: Remove unnecessary SVA data accesses in page fault path
dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names
iommu: dart: Support t6000 variant
iommu/io-pgtable-dart: Add DART PTE support for t6000
iommu/io-pgtable: Add DART subpage protection support
iommu/io-pgtable: Move Apple DART support to its own file
iommu/mediatek: Add support for MT6795 Helio X10 M4Us
iommu/mediatek: Introduce new flag TF_PORT_TO_ADDR_MT8173
dt-bindings: mediatek: Add bindings for MT6795 M4U
iommu/iova: Fix module config properly
iommu/amd: Fix sparse warning
iommu/amd: Remove outdated comment
iommu/amd: Free domain ID after domain_flush_pages
iommu/amd: Free domain id in error path
iommu/virtio: Fix compile error with viommu_capable()
...
DT core:
- Fix node refcounting in of_find_last_cache_level()
- Constify device_node in of_device_compatible_match()
- Fix 'dma-ranges' handling in bus controller nodes
- Fix handling of initrd start > end
- Improve error reporting in of_irq_init()
- Taint kernel on DT unittest running
- Use strscpy instead of strlcpy
- Add a build target, dt_compatible_check, to check for
compatible strings used in kernel sources against compatible strings
in DT schemas.
- Handle DT_SCHEMA_FILES changes when rebuilding
DT bindings:
- LED bindings for MT6370 PMIC
- Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
and arm,versatile-sysreg to DT schema format
- Add nvmem cells to u-boot,env schema
- Add more LED_COLOR_ID definitions
- Require 'opp-table' uses to be a node
- Various schema fixes to match QEMU 'virt' DT usage
- Tree wide dropping of redundant 'Device Tree Binding' in schema titles
- More (unevaluated|additional)Properties fixes in schema child nodes
- Drop various redundant minItems equal to maxItems
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmM7QzsACgkQ+vtdtY28
YcNMgg//eZr/y+FUyF3tE7DRRmCzbptAfRG0Ccmj6z0VM9HNmOiacnNdqGjOFHj6
CCFUHYsFJhiTwgM5MzMMZcQetrF+dZDok5HQNAkYqz5jtdcg1T0ZgrcpHcZpxfGv
lpAFaDkyoWQ7BXJbgLJJFP6pZ4IDyekWjU49php5pYlmTvzLwMvYW2MYvElLJ4It
tKi0XAzVyT/TrynFAOYDVO+kwZ4DDctsJM44K0LRW0e05Den9zCZDeVXik0J9l8o
jMpVy5xgqAbNUe/TCj8n91nG/Cl3wiW8l8JGWPAcb3D1Em6CQlsJCGN1a/rSHUiE
Pseql1ufUzpjcpTMnmdbRE/jWwJcLI2DqandxqIrEpUFmF4hlGeSviKib9qtacN0
pWC5pZgxrWvM9rHbbe2cYLozkYd8eiRo2l8hfefTopYbQ3UHa2hsU+f6vm9t0Gru
vxH7BmdlI22aGlnP0jl8t84v5cpu8O4C6Zmf2B/b5xj3Tif2GTLU1aYPuX3PkqHL
F9Ni+JqhnQBl1+t90PJogEFicjeyrjUO9lkKbzuoWwiJk5AgJcGck8tkBotlWYPc
B59DTigELMlssYIoF4/oX8ZF1QVmws6Xc0f9/GkgCEA0bR1qdo63qPjM9FIpd1G4
9sUhxiQbPCtIMMwD1M26LGUE/C4WESL9VXjdakoMaj7ekon2vjw=
=IDIz
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Fix node refcounting in of_find_last_cache_level()
- Constify device_node in of_device_compatible_match()
- Fix 'dma-ranges' handling in bus controller nodes
- Fix handling of initrd start > end
- Improve error reporting in of_irq_init()
- Taint kernel on DT unittest running
- Use strscpy instead of strlcpy
- Add a build target, dt_compatible_check, to check for compatible
strings used in kernel sources against compatible strings in DT
schemas.
- Handle DT_SCHEMA_FILES changes when rebuilding
DT bindings:
- LED bindings for MT6370 PMIC
- Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller,
mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc,
and arm,versatile-sysreg to DT schema format
- Add nvmem cells to u-boot,env schema
- Add more LED_COLOR_ID definitions
- Require 'opp-table' uses to be a node
- Various schema fixes to match QEMU 'virt' DT usage
- Tree wide dropping of redundant 'Device Tree Binding' in schema
titles
- More (unevaluated|additional)Properties fixes in schema child nodes
- Drop various redundant minItems equal to maxItems"
* tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits)
of: base: Shift refcount decrement in of_find_last_cache_level()
dt-bindings: leds: Add MediaTek MT6370 flashlight
dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator
dt-bindings: mailbox: Convert mtk-gce to DT schema
of: base: make of_device_compatible_match() accept const device node
of: Fix "dma-ranges" handling for bus controllers
of: fdt: Remove unused struct fdt_scan_status
dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node
dt-bindings: timer: Add power-domains for TI timer-dm on K3
dt: Add a check for undocumented compatible strings in kernel
kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs
dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML
dt-bindings: i2c: migrate mt7621 text bindings to YAML
dt-bindings: power: gpcv2: correct patternProperties
dt-bindings: virtio: Convert virtio,pci-iommu to DT schema
dt-bindings: timer: arm,arch_timer: Allow dual compatible string
dt-bindings: arm: cpus: Add kryo240 compatible
dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema
dt-bindings: nvmem: u-boot,env: add basic NVMEM cells
dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema
...
late breaking reports that a patch series to rework clk rate range
support broke boot on some devices, so I've left that branch out of this
PR. Hopefully we can get to that next week, or punt on it and let it
bake another cycle. That means we don't really have any changes to the
core framework this time around besides a few typo fixes. Instead this
is all clk driver updates and fixes.
The usual suspects are here (again), with Qualcomm dominating the
diffstat. We look to have gained support for quite a few new Qualcomm
SoCs and Dmitry worked on updating many of the existing Qualcomm drivers
to use clk_parent_data. After that we have MediaTek drivers getting some
much needed updates, in particular to support GPU DVFS. There are also
quite a few Samsung clk driver patches, but that's mostly because there
was a maintainer change and so last release we missed some of those
patches.
Overall things look normal, but I'm slowly reviewing core framework code
nowadays and that shows given the rate range patches had to be yanked
last minute. Let's hope this situation changes soon.
New Drivers:
- Support for Renesas VersaClock7 clock generator family
- Add Spreadtrum UMS512 SoC clk support
- New clock drivers for MediaTek Helio X10 MT6795
- Display clks for Qualcomm SM6115, SM8450
- GPU clks for Qualcomm SC8280XP
- Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers
Deleted Drivers:
- Remove DaVinci DM644x and DM646x clk driver support
Updates:
- Convert Baikal-T1 CCU driver to platform driver
- Split reset support out of primary Baikal-T1 CCU driver
- Add some missing clks required for RPiVid Video Decoder on RaspberryPi
- Mark PLLC critical on bcm2835
- More devm helpers for fixed rate registration
- Various PXA168 clk driver fixes
- Add resets for MediaTek MT8195 PCIe and USB
- Miscellaneous of_node_put() fixes
- Nuke dt-bindings/clk path (again) by moving headers to dt-bindings/clock
- Convert gpio-clk-gate binding to YAML
- Various fixes to AMD/Xilinx Zynqmp clk driver
- Graduate AMD/Xilinx "clocking wizard" driver from staging
- Add missing DPI1_HDMI clock in MT8195 VDOSYS1
- Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
- Fix GPU clock topology on MT8195
- Propogate rate changes from GPU clock gate up the tree
- Clock mux notifiers for GPU-related PLLs
- Conversion of more "simple" drivers to mtk_clk_simple_probe()
- Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
- Fixes to previous |struct clk| to |struct clk_hw| conversion on MediaTek
- Shrink MT8192 clock driver by deduplicating clock parent lists
- Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
clocks for i.MX8MP
- Drop unnecessary newline in i.MX8MM dt-bindings
- Add more MU1 and SAI clocks dt-bindings Ids
- Introduce slice busy bit check for i.MX93 composite clock
- Introduce white list bit check for i.MX93 composite clock
- Add new i.MX93 clock gate
- Add MU1 and MU2 clocks to i.MX93 clock provider
- Add SAI IPG clocks to i.MX93 clock provider
- add generic clocks for U(S)ART available on SAMA5D2 SoCs
- reset controller support for Polarfire clocks
- .round_rate and .set rate support for clk-mpfs
- code cleanup for clk-mpfs
- PLL support for PolarFire SoC's Clock Conditioning Circuitry
- Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car V4H
- Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
- Add I2C clocks and resets on RZ/V2M
- Document clock support for the RZ/Five SoC
- mux-variant clock using the table variant to select parents
- clock controller for the rv1126 soc
- conversion of rk3128 to yaml and relicensing of the yaml bindings
to gpl2+MIT (following dt-binding guildelines)
- Exynos7885: add FSYS, TREX and MFC clock controllers
- Exynos850: add IS and AUD (audio) clock controllers with bindings
- ExynosAutov9: add FSYS clock controllers with bindings
- ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
controllers, due to duplicated entries. This is an acceptable ABI
break: recently developed/added platform so without legacies, acked
by known users/developers
- ExynosAutov9: add few missing Peric 0/1 gates
- ExynosAutov9: correct register offsets of few Peric 0/1 clocks
- Minor code improvements (use of_device_get_match_data() helper, code
style)
- Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as he
already maintainers that architecture/platform
- Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving retention
issues during suspend of USB on Qualcomm sc7180/sc7280 and SC8280XP
- Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
- Qualcomm SDM660 SDCC1 moved to floor clk ops
- Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018 was
added/fixed
- The Qualcomm MSM8996 CPU clocks are updated with support for ACD
- Support for Qualcomm SDM670 GCC and RPMh clks was added
- Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
num_parents was done for many Qualcomm SoCs
- Support for per-reset defined delay on Qualcomm was introduced
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmM/trwRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSUEoA/+LiftbrF8Xtu7lGdxRjqLzRftUmHaUQWO
d0cadtzMsgxzFJsxp99IiJBVJoaYCBOGlnZDx8p/JGv+mmdhl5+yHgKQbR8nEmTk
5A+bdA1okOdm8SPBPMcLvuMjsgmx+DHkuxvnC2hT8ZGfQDoa+6PnObpP30LJkHT0
oVY8g8ScEuHI5eJcNz3UgxAetKeJd+WRQPxKCrjsOeyhWuNAJ7wdTVQjjzH49X4C
RS3fjeHvhr2VZm23IgildY++a6hPO72gtBjEpDRoFwnmWAVqUtxiwptoJJNkC5kB
toD/ndQHOLh/XOJFKgksS20L4JHtSp5F3Ma8sIuOjAXmDCyqMdTQhydnl5Pyrow+
ct8BMUGkx0Sw8pXBJYINtHpwTtIxvLu/sBNqBb/lRCWd8byrPlUnKvF/COcoxp27
miZTwJI28fHU5a2K/46iWZCI5YUvVcnBSz8WbEWWvOltIT8S0JvZozA3KuRm5vys
/k2HaQwO2I0QWQzPjfg6SRlTTWH6p+Hc47fSg7LSM6Scsb7ZraajTM2QOvgn7Mgp
m/136q7jr9mvuLqqy1fBY3F2hDZYNSJX+UfmIFcpCyxvht0GVFN9YCc+Ibgyl2vQ
P3b9LXV2OqhtDJg6ds7v8aPgAGUwUFO8GTPBG1cuom7z5u/kdIpjKaFAyr8wWSuJ
wqPIFevggsA=
=9jI+
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"We have some late breaking reports that a patch series to rework clk
rate range support broke boot on some devices, so I've left that
branch out of this. Hopefully we can get to that next week, or punt on
it and let it bake another cycle. That means we don't really have any
changes to the core framework this time around besides a few typo
fixes. Instead this is all clk driver updates and fixes.
The usual suspects are here (again), with Qualcomm dominating the
diffstat. We look to have gained support for quite a few new Qualcomm
SoCs and Dmitry worked on updating many of the existing Qualcomm
drivers to use clk_parent_data. After that we have MediaTek drivers
getting some much needed updates, in particular to support GPU DVFS.
There are also quite a few Samsung clk driver patches, but that's
mostly because there was a maintainer change and so last release we
missed some of those patches.
Overall things look normal, but I'm slowly reviewing core framework
code nowadays and that shows given the rate range patches had to be
yanked last minute. Let's hope this situation changes soon.
New Drivers:
- Support for Renesas VersaClock7 clock generator family
- Add Spreadtrum UMS512 SoC clk support
- New clock drivers for MediaTek Helio X10 MT6795
- Display clks for Qualcomm SM6115, SM8450
- GPU clks for Qualcomm SC8280XP
- Qualcomm MSM8909 and SM6375 global and SMD RPM clk drivers
Deleted Drivers:
- Remove DaVinci DM644x and DM646x clk driver support
Updates:
- Convert Baikal-T1 CCU driver to platform driver
- Split reset support out of primary Baikal-T1 CCU driver
- Add some missing clks required for RPiVid Video Decoder on
RaspberryPi
- Mark PLLC critical on bcm2835
- More devm helpers for fixed rate registration
- Various PXA168 clk driver fixes
- Add resets for MediaTek MT8195 PCIe and USB
- Miscellaneous of_node_put() fixes
- Nuke dt-bindings/clk path (again) by moving headers to
dt-bindings/clock
- Convert gpio-clk-gate binding to YAML
- Various fixes to AMD/Xilinx Zynqmp clk driver
- Graduate AMD/Xilinx "clocking wizard" driver from staging
- Add missing DPI1_HDMI clock in MT8195 VDOSYS1
- Clock driver changes to support GPU DVFS on MT8183, MT8192, MT8195
- Fix GPU clock topology on MT8195
- Propogate rate changes from GPU clock gate up the tree
- Clock mux notifiers for GPU-related PLLs
- Conversion of more "simple" drivers to mtk_clk_simple_probe()
- Hook up mtk_clk_simple_remove() for "simple" MT8192 clock drivers
- Fixes to previous |struct clk| to |struct clk_hw| conversion on
MediaTek
- Shrink MT8192 clock driver by deduplicating clock parent lists
- Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
clocks for i.MX8MP
- Drop unnecessary newline in i.MX8MM dt-bindings
- Add more MU1 and SAI clocks dt-bindings Ids
- Introduce slice busy bit check for i.MX93 composite clock
- Introduce white list bit check for i.MX93 composite clock
- Add new i.MX93 clock gate
- Add MU1 and MU2 clocks to i.MX93 clock provider
- Add SAI IPG clocks to i.MX93 clock provider
- add generic clocks for U(S)ART available on SAMA5D2 SoCs
- reset controller support for Polarfire clocks
- .round_rate and .set rate support for clk-mpfs
- code cleanup for clk-mpfs
- PLL support for PolarFire SoC's Clock Conditioning Circuitry
- Add watchdog, I2C, pin control/GPIO, and Ethernet clocks on R-Car
V4H
- Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
- Add I2C clocks and resets on RZ/V2M
- Document clock support for the RZ/Five SoC
- mux-variant clock using the table variant to select parents
- clock controller for the rv1126 soc
- conversion of rk3128 to yaml and relicensing of the yaml bindings
to gpl2+MIT (following dt-binding guildelines)
- Exynos7885: add FSYS, TREX and MFC clock controllers
- Exynos850: add IS and AUD (audio) clock controllers with bindings
- ExynosAutov9: add FSYS clock controllers with bindings
- ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock
controllers, due to duplicated entries. This is an acceptable ABI
break: recently developed/added platform so without legacies, acked
by known users/developers
- ExynosAutov9: add few missing Peric 0/1 gates
- ExynosAutov9: correct register offsets of few Peric 0/1 clocks
- Minor code improvements (use of_device_get_match_data() helper,
code style)
- Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as
he already maintainers that architecture/platform
- Keep Qualcomm GDSCs enabled when PWRSTS_RET flag is there, solving
retention issues during suspend of USB on Qualcomm sc7180/sc7280
and SC8280XP
- Qualcomm SM6115 and QCM2260 are moved to reuse PLL configuration
- Qualcomm SDM660 SDCC1 moved to floor clk ops
- Support for the APCS PLLs for Qualcomm IPQ8064, IPQ8074 and IPQ6018
was added/fixed
- The Qualcomm MSM8996 CPU clocks are updated with support for ACD
- Support for Qualcomm SDM670 GCC and RPMh clks was added
- Transition to parent_data, parent_hws and use of ARRAY_SIZE() for
num_parents was done for many Qualcomm SoCs
- Support for per-reset defined delay on Qualcomm was introduced"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (283 commits)
clk: qcom: gcc-sm6375: Ensure unsigned long type
clk: qcom: gcc-sm6375: Remove unused variables
clk: qcom: kpss-xcc: convert to parent data API
clk: introduce (devm_)hw_register_mux_parent_data_table API
clk: allow building lan966x as a module
clk: clk-xgene: simplify if-if to if-else
clk: ast2600: BCLK comes from EPLL
clk: clocking-wizard: Depend on HAS_IOMEM
clk: clocking-wizard: Use dev_err_probe() helper
clk: nxp: fix typo in comment
clk: pxa: add a check for the return value of kzalloc()
clk: vc5: Add support for IDT/Renesas VersaClock 5P49V6975
dt-bindings: clock: vc5: Add 5P49V6975
clk: mvebu: armada-37xx-tbg: Remove the unneeded result variable
clk: ti: dra7-atl: Fix reference leak in of_dra7_atl_clk_probe
clk: Renesas versaclock7 ccf device driver
dt-bindings: Renesas versaclock7 device tree bindings
clk: ti: Balance of_node_get() calls for of_find_node_by_name()
clk: imx: scu: fix memleak on platform_device_add() fails
clk: vc5: Use regmap_{set,clear}_bits() where appropriate
...
Here is the large set of char/misc and other small driver subsystem
changes for 6.1-rc1. Loads of different things in here:
- IIO driver updates, additions, and changes. Probably the largest
part of the diffstat
- habanalabs driver update with support for new hardware and features,
the second largest part of the diff.
- fpga subsystem driver updates and additions
- mhi subsystem updates
- Coresight driver updates
- gnss subsystem updates
- extcon driver updates
- icc subsystem updates
- fsi subsystem updates
- nvmem subsystem and driver updates
- misc driver updates
- speakup driver additions for new features
- lots of tiny driver updates and cleanups
All of these have been in the linux-next tree for a while with no
reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCY0GQmA8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ylyVQCeNJjZ3hy+Wz8WkPSY+NkehuIhyCIAnjXMOJP8
5G/JQ+rpcclr7VOXlS66
=zVkU
-----END PGP SIGNATURE-----
Merge tag 'char-misc-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc and other driver updates from Greg KH:
"Here is the large set of char/misc and other small driver subsystem
changes for 6.1-rc1. Loads of different things in here:
- IIO driver updates, additions, and changes. Probably the largest
part of the diffstat
- habanalabs driver update with support for new hardware and
features, the second largest part of the diff.
- fpga subsystem driver updates and additions
- mhi subsystem updates
- Coresight driver updates
- gnss subsystem updates
- extcon driver updates
- icc subsystem updates
- fsi subsystem updates
- nvmem subsystem and driver updates
- misc driver updates
- speakup driver additions for new features
- lots of tiny driver updates and cleanups
All of these have been in the linux-next tree for a while with no
reported issues"
* tag 'char-misc-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (411 commits)
w1: Split memcpy() of struct cn_msg flexible array
spmi: pmic-arb: increase SPMI transaction timeout delay
spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes
spmi: pmic-arb: correct duplicate APID to PPID mapping logic
spmi: pmic-arb: add support to dispatch interrupt based on IRQ status
spmi: pmic-arb: check apid against limits before calling irq handler
spmi: pmic-arb: do not ack and clear peripheral interrupts in cleanup_irq
spmi: pmic-arb: handle spurious interrupt
spmi: pmic-arb: add a print in cleanup_irq
drivers: spmi: Directly use ida_alloc()/free()
MAINTAINERS: add TI ECAP driver info
counter: ti-ecap-capture: capture driver support for ECAP
Documentation: ABI: sysfs-bus-counter: add frequency & num_overflows items
dt-bindings: counter: add ti,am62-ecap-capture.yaml
counter: Introduce the COUNTER_COMP_ARRAY component type
counter: Consolidate Counter extension sysfs attribute creation
counter: Introduce the Count capture component
counter: 104-quad-8: Add Signal polarity component
counter: Introduce the Signal polarity component
counter: interrupt-cnt: Implement watch_validate callback
...
- New support:
- Bjorn Andersson provided Qualcomm SC8280XP eDP & DP and USB3 UNI phy support
- Chris Morgan added Rockchip rk3568 inno dsidphy support
- Colin Foster converted ocelot-serdes phy binding to yaml
- Geert Uytterhoeven converted Renesas gen2-usb phy binding to yaml
- Horatiu Vultur added RGMII suport in lan966x driver
- Konrad Dybcio provided Qualcomm SM6375 usb snps-femto-v2 bindings
- Michael Riesch added support for rockchip rk356x csi-dphya
- Richard Acayan provided Qualcomm sdm670 usb2 bindings
- Vincent Shih provided new Sunplus USB2 PHY driver
- Updates:
- Chunfeng Yun provided Mediatek hdmi, ufs, tphy and xsphy updates
to use bitfield helpers.
- Dmitry Baryshkov & Johan Hovold continued with Qualcomm qmp phy
driver split and cleanup. More patches are under review and
expected that next cycle might see completion of this activity.
- Roger Quadros added support for TI wiz driver for j7200 10g
- Sandeep Maheswaram added support in Qualcomm femto phy driver to
override params to help with tuning
- Siddharth Vadapalli added SGMII support in TI wiz driver
- Yuan Can did bunch of dev_err_probe simplification
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmNAI0YACgkQfBQHDyUj
g0f1Og//T7iaDW6Psq8hOkQE756JwrIxjJRHuNxnVDOpdjN7XTrXYE46pFyjMrkx
hVHd1QDQMLkLsGNPzt2QdJ7i3xwSJ/iPeskfqvWgEJdKUP+AtGTSkyOiyikadcy5
rdaG0OrBhMiQNMvAnS3zmYL/tqZeOxvjisYsevlPDNQAINqF2AFl2ravbc3kLxnb
5zAAWwv11oVYVONTqUfd4gW7KsU2de8wU6UY9jk1iJaWT1u9O8EmDEXbOHONhcTN
tA52Yw1PJXsurbpgtJIgUec6IIqHM0iG2/VS5l4UJTtddzNYhihFFTtD6noSiDCM
Wzijf/uFJDckDakzwYPf6XSw+Y9Md1JkNlQQ/I+DzL0TddJZvu10RNtmwZQVbhWN
SvgGsPKsjMFf3av8N4/gjnYHcWdAOU7Rz0hd1k6KqkzbUrbWWUoExpW9yCFCjN7i
rAQ+7wG4UwNkbaOz0ZOBtDzDUn2gE2mH366eZHZ25FhdRwzxMKW5O/uJF0oOcSf6
o5ln1G7/5Ml0RT9OChj+vkiRP0/lOUrC40HyHaEmohPKGPkFcGUznEI6X3soqhlC
xUNlY3FF1NeU5eHthnUXPOMySurK72VEVLTrVSCZzmFZPkN34UjdU/adKnzCO2+9
un2EKfAtPlXEQKxqc13JtZ5AXmZZ3GIstdjXWWcgPthJ6h5FbIg=
=N3+u
-----END PGP SIGNATURE-----
Merge tag 'phy-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul:
"This contains bunch of new device support and one new Sunplus driver
along with updates which include another big round of qmp phy
conversion.
New support:
- Qualcomm SC8280XP eDP & DP and USB3 UNI phy (Bjorn Andersson)
- Rockchip rk3568 inno dsidphy (Chris Morgan)
- ocelot-serdes phy yaml binding (Colin Foster)
- Renesas gen2-usb phy yaml binding (Geert Uytterhoeven)
- RGMII suport in lan966x driver (Horatiu Vultur)
- Qualcomm SM6375 usb snps-femto-v2 bindings (Konrad Dybcio)
- Rockchip rk356x csi-dphya (Michael Riesch)
- Qualcomm sdm670 usb2 bindings (Richard Acayan)
- Sunplus USB2 PHY (Vincent Shih)
Updates:
- Mediatek hdmi, ufs, tphy and xsphy updates to use bitfield helpers
(Chunfeng Yun)
- Continued Qualcomm qmp phy driver split and cleanup. More patches
are under review and expected that next cycle might see completion
of this activity (Dmitry Baryshkov & Johan Hovold)
- TI wiz driver support for j7200 10g (Roger Quadros)
- Qualcomm femto phy driver support for override params to help with
tuning (Sandeep Maheswaram)
- SGMII support in TI wiz driver (Siddharth Vadapalli)
- dev_err_probe simplification (Yuan Can)"
* tag 'phy-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (170 commits)
phy: phy-mtk-dp: make array driving_params static const
dt-bindings: phy: qcom,qusb2: document sdm670 compatible
phy: qcom-qmp-pcie: fix resource mapping for SDM845 QHP PHY
phy: rockchip-snps-pcie3: only look for rockchip,pipe-grf on rk3588
phy: tegra: xusb: Enable usb role switch attribute
phy: mediatek: fix build warning of FIELD_PREP()
phy: qcom-qmp-usb: Use dev_err_probe() to simplify code
phy: qcom-qmp-ufs: Use dev_err_probe() to simplify code
phy: qcom-qmp-pcie-msm8996: Use dev_err_probe() to simplify code
phy: qcom-qmp-combo: Use dev_err_probe() to simplify code
phy: qualcomm: call clk_disable_unprepare in the error handling
phy: intel: Use dev_err_probe() to simplify code
phy: tegra: xusb: Use dev_err_probe() to simplify code
phy: qcom-snps: Use dev_err_probe() to simplify code
phy: qcom-qusb2: Use dev_err_probe() to simplify code
phy: qcom-qmp-pcie: Use dev_err_probe() to simplify code
phy: ti: phy-j721e-wiz: fix reference leaks in wiz_probe()
phy: mediatek: mipi: remove register access helpers
phy: mediatek: mipi: mt8183: use common helper to access registers
phy: mediatek: mipi: mt8183: use GENMASK to generate bits mask
...
* Print the timeout value for internal command failures due to a
timeout (from Tomas).
* Improve parameter names in ata_dev_set_feature() to clarify this
function use (from Niklas).
* Improve the ahci driver low power mode setting initialization to allow
more flexibility for the user (from Rafael).
* Several patches to remove redundant variables in libata-core,
libata-eh and the pata_macio driver and to fix typos in comments (from
Jinpeng, Shaomin, Ye).
* Some code simplifications and macro renaming (for clarity) in various
functions of libata-core (from me).
* Add a missing check for a potential failure of sata_scr_read() in
sata_print_link_status() (from Li).
* Cleanup of libata Kconfig PATA_PLATFORM and PATA_OF_PLATFORM options
(from Lukas).
* Cleanups of ata dt-bindings and improvements of libahci_platform, ahci
and libahci code (from Serge)
* New driver for Synopsys AHCI SATA controllers, based of the generic
ahci code (from Serge). One compilation warning fix is added for this
driver (from me).
* Several fixes to macros used to discover a drive capabilities to be
consistent with the ACS specifications (from Niklas).
* A couple of simplifcations to some libata functions, removing
unnecessary arguments (from Niklas).
* An improvements to libata-eh code to avoid unnecessary link reset when
revalidating a drive after a failed command. In practice, this extra,
unneeded reset, reset does not cause any arm beyond slightly slowing
down error recovery (from Niklas).
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQSRPv8tYSvhwAzJdzjdoc3SxdoYdgUCYz0asgAKCRDdoc3SxdoY
drHoAQCJhb6MuQHzbN/wR5cTGAfWXQJWBJx2mJr7oKJCrB34PwD/RzphcsuaXDta
kwbTGlpitegByZTDKt9eMRLWmKgyngw=
=CnJj
-----END PGP SIGNATURE-----
Merge tag 'ata-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata
Pull ata updates from Damien Le Moal:
- Print the timeout value for internal command failures due to a
timeout (from Tomas)
- Improve parameter names in ata_dev_set_feature() to clarify this
function use (from Niklas)
- Improve the ahci driver low power mode setting initialization to
allow more flexibility for the user (from Rafael)
- Several patches to remove redundant variables in libata-core,
libata-eh and the pata_macio driver and to fix typos in comments
(from Jinpeng, Shaomin, Ye)
- Some code simplifications and macro renaming (for clarity) in various
functions of libata-core (from me)
- Add a missing check for a potential failure of sata_scr_read() in
sata_print_link_status() (from Li)
- Cleanup of libata Kconfig PATA_PLATFORM and PATA_OF_PLATFORM options
(from Lukas)
- Cleanups of ata dt-bindings and improvements of libahci_platform,
ahci and libahci code (from Serge)
- New driver for Synopsys AHCI SATA controllers, based of the generic
ahci code (from Serge). One compilation warning fix is added for this
driver (from me)
- Several fixes to macros used to discover a drive capabilities to be
consistent with the ACS specifications (from Niklas)
- A couple of simplifcations to some libata functions, removing
unnecessary arguments (from Niklas)
- An improvements to libata-eh code to avoid unnecessary link reset
when revalidating a drive after a failed command. In practice, this
extra, unneeded reset, reset does not cause any arm beyond slightly
slowing down error recovery (from Niklas)
* tag 'ata-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/dlemoal/libata: (45 commits)
ata: libata-eh: avoid needless hard reset when revalidating link
ata: libata: drop superfluous ata_eh_analyze_tf() parameter
ata: libata: drop superfluous ata_eh_request_sense() parameter
ata: fix ata_id_has_dipm()
ata: fix ata_id_has_ncq_autosense()
ata: fix ata_id_has_devslp()
ata: fix ata_id_sense_reporting_enabled() and ata_id_has_sense_reporting()
ata: libata-eh: Remove the unneeded result variable
ata: ahci_st: Enable compile test
ata: ahci_st: Fix compilation warning
MAINTAINERS: Add maintainers for DWC AHCI SATA driver
ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface support
ata: ahci-dwc: Add platform-specific quirks support
dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schema
ata: ahci: Add DWC AHCI SATA controller support
ata: libahci_platform: Add function returning a clock-handle by id
dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schema
ata: ahci: Introduce firmware-specific caps initialization
ata: ahci: Convert __ahci_port_base to accepting hpriv as arguments
ata: libahci: Don't read AHCI version twice in the save-config method
...
Most of the changes fall into one of three categories: adding support
for additional devices on existing machines, cleaning up issues found
by the ongoing conversion to machine-readable bindings, and addressing
minor mistakes in the existing DT data.
Across SoC vendors, Qualcomm and Freescale stick out as getting the most
updates, which corresponds to their dominance in the mobile phone and
embedded industrial markets, respectively.
There are 636 non-merge changeset in this branch, which is a little
lower than most times, but more importantly we only add 36 machine
files, which is about half of what we had the past few releases.
Eight new SoCs are added, but all of them are variations of already
supported SoC families, and most of them come with one reference board
design from the SoC vendor:
- Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
cores.
- TI AM62A is another member of the K3 family with Cortex-A53 cores,
this one is targetted at Video/Vision processing for industrial
and automotive applications.
- NXP i.MX8DXL is another chip for this market in the ever-growing
i.MX8 family, this one again with two Cortex-A35 cores.
- Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
minor updates of R8A77951 and R8A77980, respectively.
- Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
IPQ8064 chip, with minimally different features.
The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
this time, but in the end did not make the cut.
The new machines based on existing SoC support are fairly uneventful:
- Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
Snapdragon 8 Gen 1.
- Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
Grand Max. These are added for both 32-bit and 64-bit kernels,
as they originally shipped running 32-bit code.
- Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere
Mt. Mitchell
- Three new machines based on Rockchips RK3399 and RK3566:
Anberic RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab
- Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board
- Two development boards in the Microchip AT91 family:
SAMA5D3-EDS and lan966x-pcb8290.
- Minor variants of existing boards using Amlogic, Broadcom, Marvell,
Rockchips, Freescale Layerscape and Socionext Uniphier SoCs.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmM+jwsACgkQmmx57+YA
GNnqJg//dgGHQ+dpmxvTHUAx/2WSojAyC7pXPuSoNzAiVDF+95ARM7as+5GtaeU7
me8fIw/EXQiVeEbxRPVhmGLZy0uXOhyKIQO4o58dd5YSalngI6Q7t8YFaiLCaHoF
cL7m17nk88sYOzTtSCjfnCPX8KSB7JmElsoWme3PzYhnildEmeBYfiqyqRsGP8KI
pLOec8GXfwDcnaLvBYT6EO/pAO1lZgp531spVacv4brJtQGFRbm4VuvzyFqE2b7g
0PxkRMXAE2ohrw6jAIeN2zp8BgFNPlMnuZF2cp330aX5urICk8nCo+GFAM1bK8e6
0mnKFaXEsRIphxyja8rs9B/pz4Qal2OlC1lGoeQI+QuzYEM5vOroe0EQKw0OLIyQ
YUslu4CnQgEeM9FVsm1cTYlPPf6geU8Y9vju4VwyDtgD270+5vOqMpTpiC1k4tJI
JlaZdNhp5+Cdz3W+qssrQfOP9tkQmcWNZxJQJxpy41VR+BrGoCweGZa5NifPYO7m
AwqisfppTodtF/m6XuHiQg+vDrJXPs/Ydv8vRfTeWA4/EuadewYwBhRpSKEZX7N8
HuaasPMp9rSoDvuz+kKnKFZfHuTqruwt/qnCduAk5N91z1BJD5wXtvD3zUXEwy1d
hPcDJl8M3xfgLF1t38r6srNDt/MupafaDifNAqG6QRZMr8PqvnE=
=xPfV
-----END PGP SIGNATURE-----
Merge tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"Most of the changes fall into one of three categories: adding support
for additional devices on existing machines, cleaning up issues found
by the ongoing conversion to machine-readable bindings, and addressing
minor mistakes in the existing DT data.
Across SoC vendors, Qualcomm and Freescale stick out as getting the
most updates, which corresponds to their dominance in the mobile phone
and embedded industrial markets, respectively.
There are 636 non-merge changeset in this branch, which is a little
lower than most times, but more importantly we only add 36 machine
files, which is about half of what we had the past few releases.
Eight new SoCs are added, but all of them are variations of already
supported SoC families, and most of them come with one reference board
design from the SoC vendor:
- Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
cores.
- TI AM62A is another member of the K3 family with Cortex-A53 cores,
this one is targetted at Video/Vision processing for industrial and
automotive applications.
- NXP i.MX8DXL is another chip for this market in the ever-growing
i.MX8 family, this one again with two Cortex-A35 cores.
- Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
minor updates of R8A77951 and R8A77980, respectively.
- Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
IPQ8064 chip, with minimally different features.
The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
this time, but in the end did not make the cut.
The new machines based on existing SoC support are fairly uneventful:
- Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
Snapdragon 8 Gen 1.
- Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
Grand Max. These are added for both 32-bit and 64-bit kernels, as
they originally shipped running 32-bit code.
- Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere Mt.
Mitchell
- Three new machines based on Rockchips RK3399 and RK3566: Anberic
RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab
- Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board
- Two development boards in the Microchip AT91 family: SAMA5D3-EDS
and lan966x-pcb8290.
- Minor variants of existing boards using Amlogic, Broadcom, Marvell,
Rockchips, Freescale Layerscape and Socionext Uniphier SoCs"
* tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (617 commits)
Revert "ARM: dts: BCM5301X: Add basic PCI controller properties"
ARM: dts: s5pv210: correct double "pins" in pinmux node
ARM: dts: exynos: fix polarity of VBUS GPIO of Origen
arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2
arm64: dts: uniphier: Add L2 cache node
arm64: dts: uniphier: Remove compatible "snps,dw-pcie" from pcie node
arm64: dts: uniphier: Fix opp-table node name for LD20
arm64: dts: uniphier: Add USB-device support for PXs3 reference board
arm64: dts: uniphier: Add ahci controller nodes for PXs3
arm64: dts: uniphier: Use GIC interrupt definitions
arm64: dts: uniphier: Rename gpio-hog nodes
arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
arm64: dts: uniphier: Rename pvtctl node to thermal-sensor
ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node
ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card
ARM: dts: uniphier: Add ahci controller nodes for PXs2
ARM: dts: uniphier: Add ahci controller nodes for Pro4
ARM: dts: uniphier: Use GIC interrupt definitions
ARM: dts: uniphier: Rename gpio-hog node
...
The drivers branch for 6.1 is a bit larger than for most releases. Most
of the changes come from SoC maintainers for the drivers/soc subsystem:
- A new driver for error handling on the NVIDIA Tegra
'control backbone' bus.
- A new driver for Qualcomm LLCC/DDR bandwidth measurement
- New Rockchip rv1126 and rk3588 power domain drivers
- DT binding updates for memory controllers, older Rockchip
SoCs, various Mediatek devices, Qualcomm SCM firmware
- Minor updates to Hisilicon LPC bus, the Allwinner SRAM
driver, the Apple rtkit firmware driver, Tegra firmware
- Minor updates for SoC drivers (Samsung, Mediatek, Renesas,
Tegra, Qualcomm, Broadcom, NXP, ...)
There are also some separate subsystem with downstream maintainers that
merge updates this way:
- Various updates and new drivers in the memory controller
subsystem for Mediatek and Broadcom SoCs
- Small set of changes in preparation to add support for FF-A
v1.1 specification later, in the Arm FF-A firmware subsystem
- debugfs support in the PSCI firmware subsystem
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmM+j54ACgkQmmx57+YA
GNkK1Q//fSzCHUPNTrZKJi8mRtp/32Nrpav3eorMZWltKnYbYQyhqH/LCuSZJfe/
rmGYFxsH6DHEgfHqqyzm6PNC0S4Hle6KiB5xnqXrTgqciPuSg4Fa9OMQgkbiQF6x
uB2KR+TouQA3MssQh6NW4wy5XAkEqudZCSnEyOTJTmdpepZd/1Eu2Rhn8kx5AYQN
pzYNGURRoirgYbO9vHMssCcpqyGNdR9SWXcOkROyd65L4LCHQ9JRh4etg7fSXP5j
abWtTHSOwD8MTXOENOiNw/vyCfBX7wUoJkY2v8OUo3G/20qbOXKWPWi056gyDjVQ
kJdlnnK4APtiluyBg2alEEZmJOd1iCaVP2j84EO1N4FEek2UGd/lMNOtAOJa+wbh
eiE6KC5gswe+99//PdY4gB+7dRM3I0gU7FDMl9G5A4DPMEE/0bMKLKk1jR5vyYXl
6QpN2N0OlU7d16MJiP9RvWf2/xJrcQrLQcy8FKvFVWClJ9wMvBXozKrvXgji9l3I
ZTW+EViQiyWmj6KbFlDZkYT+Q6YosxaogJUNrZeIaAwmwJj1oTa+M6jYRnFU6uha
XxG5TrybC9JQ/BpYCTYEqb16LOYALwEm7NWmylWASUCCZclC1u35qmmVEhDyBcS9
98ePumkAwrcjmW0TZsiYXOCQWNOITuvU/Ku2t/+6Mhg+Xl44zX4=
=WX9J
-----END PGP SIGNATURE-----
Merge tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM driver updates from Arnd Bergmann:
"The drivers branch for 6.1 is a bit larger than for most releases.
Most of the changes come from SoC maintainers for the drivers/soc
subsystem:
- A new driver for error handling on the NVIDIA Tegra 'control
backbone' bus.
- A new driver for Qualcomm LLCC/DDR bandwidth measurement
- New Rockchip rv1126 and rk3588 power domain drivers
- DT binding updates for memory controllers, older Rockchip SoCs,
various Mediatek devices, Qualcomm SCM firmware
- Minor updates to Hisilicon LPC bus, the Allwinner SRAM driver, the
Apple rtkit firmware driver, Tegra firmware
- Minor updates for SoC drivers (Samsung, Mediatek, Renesas, Tegra,
Qualcomm, Broadcom, NXP, ...)
There are also some separate subsystem with downstream maintainers
that merge updates this way:
- Various updates and new drivers in the memory controller subsystem
for Mediatek and Broadcom SoCs
- Small set of changes in preparation to add support for FF-A v1.1
specification later, in the Arm FF-A firmware subsystem
- debugfs support in the PSCI firmware subsystem"
* tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (149 commits)
ARM: remove check for CONFIG_DEBUG_LL_SER3
firmware/psci: Add debugfs support to ease debugging
firmware/psci: Print a warning if PSCI doesn't accept PC mode
dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props
dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros
dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name
dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support
soc: sunxi: sram: Add support for the D1 system control
soc: sunxi: sram: Export the LDO control register
soc: sunxi: sram: Save a pointer to the OF match data
soc: sunxi: sram: Return void from the release function
soc: apple: rtkit: Add apple_rtkit_poll
soc: imx: add i.MX93 media blk ctrl driver
soc: imx: add i.MX93 SRC power domain driver
soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell
soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets
soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl
soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR
soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl
soc: imx: add icc paths for i.MX8MP media blk ctrl
...
Add the SoC name to make it more clear. Also the next generation StarFive
SoCs will use "pinctrl-starfive" as the core of StarFive pinctrl driver.
No functional change.
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220930061404.5418-1-hal.feng@linux.starfivetech.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add the clock bindings for the MediaTek MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20220822152652.3499972-2-msp@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Aside with a set of the trigger-like resets Baikal-T1 CCU provides
additional directly controlled reset signals for the DDR and PCIe
controllers. As a preparation before adding these resets support to the
kernel let's extent the Baikal-T1 CCU IDs list with the new IDs, which
will be used to access the corresponding reset controls.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220929225402.9696-7-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
There are four SDHC peripherals on the PXA168, but only three of them
were present in the DT bindings. This commit adds the fourth.
Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-10-doug@schmorgal.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This adds a few new clocks divided from PLL1 and CLK32 that are
potentially used by a few peripherals with muxed clocks.
Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-4-doug@schmorgal.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add device tree bindings for global clock controller for SM6375 SoCs.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220921001303.56151-2-konrad.dybcio@somainline.org
Add device tree bindings for display clock controller for
Qualcomm Technology Inc's SM6115 SoC.
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
[bjorn: Minor fix of binding description]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220911164635.182973-2-a39.skl@gmail.com
Expand dt-bindings slot for VDOSYS1 of MT8195.
This clock is required by the DPI1 hardware
and is a downstream of the HDMI pixel clock.
Signed-off-by: Pablo Sun <pablo.sun@mediatek.com>
Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220919-v1-1-4844816c9808@baylibre.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
The icc-bwmon driver is expected to support measuring LLCC/DDR bandwidth
on SDM845 and SC7280.
The LLCC driver is extended to provide per-platform register mappings to
the LLCC EDAC driver. The QMI encoder/decoder is updated to allow the
passed qmi_elem_info to be const.
Support for SDM845 is added to the sleep stats driver. Power-domains for
the SM6375 platform is added to RPMPD and the platform is added to
socinfo, together with the PM6125 pmic id.
A couple of of_node reference issues are corrected in the smem state and
smsm drivers.
The Qualcomm SCM driver binding is converted to YAML.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmMrMtQVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Foy8P/3xNqiQAVdWD/49rycmoNg02Jg6A
L9WM0GI1TMKCJV+tr2QFFknFOzTxr4VhIefddUWWJYGnzN89sHqYbWjBbnPaHVv/
Im7opHZ1Aq5hPct5TvlXrMjNDhe3+2y44qv4+H9q8Kk7nOVUQwOfE3J7VE71B1tO
gLHEdlafSH+M62PJsiDQRIgtU2jfFBBpOC+J4OazvRsYQboI29U5Aro08Yqy/KFq
opEMJlnetzPl1zI+7Tu56V8gVWnBIedQJJCT/EZEWMJ8Lf8XMbuTaTrW+ioSnjrT
SyLgAzvLCI8yMOaLSssdpk6pgtsMleqRI/SHlvUX2+sUlxK3Gycw9rxsU6RJ80gk
SRjYXEwr78w4QGcC/eY8Lg+d0xi/A1MOMGLYoQGyKzHtyi+q1x3yQQ5HW6YS0qlO
J6a9zSL2PNfLyXv7DE1PblKUZtifV/8U+gYviwe09Rj7mkZWzlOC946uUp4B9VEE
R96qoLZtyvgAzBCnpWIJ0IwYSRdqVNYpDKKb4CGQ9qAdyHZIg+DL9i6vozwWsyZk
gRTXo4K9MuqHya+vZYOH4zyi8eIHgqdSNSbo/4893E3GcAtPBw1YRdCPWNPITdQg
bcTfg/7bFymeHN3arbkXjclXp1O12JA+umsPnRnWtmmoCPNqh8wki4v32dqcpyQq
FvkQpszZbeHQGxq4
=R/5I
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMt02wACgkQmmx57+YA
GNlEyw/+Je0NXWJdKYHw9+nkc5GJCrB7Sytz9xmavB/1JMTDyjMcRgbmXg0gl1ZF
6gYACVcv1GgIFFrDrjEHm81qVunjr+z3oyqY/Tr4XDk2AvFJicX/kltSOxWozHrV
TYGd3HtneGMA6jhT7T76b849N4p0S9gJu62+tQiD2wa31oFAnfhrf790QJZahHZf
/VPGiNiOhINMJJk+rUal8R4A8CWXdx9GTTulhcSD3g9HPTWJuq+SJ6SSCuNmOLPO
4KZeWytBmihSWIjWsyuKUwSmK1ceNH/Vt6QhenPUZynZ4ojuJOUeOTnkf+mR6M2A
ysetlsi8GDiQSWW/hb/+b733YFOTVVFbigEjt6B40HKLAXlgiAqwCVzWFQ61Eg48
UNnx26RUlT3PGw0oF1pSOvl8a/0DDKhzteyQSJQ/gR59SKLjhwEB27Ml1C2B+VVM
FHn0WnhnAvC6qPBrRh6HUVtoqblRsaT6UJ+qwr6TDhmiDMTmQP49dMbA9Me+lphb
ACbhqk+yUoaYhq6oK2pneqtgP0A4QuFSZAzGE6tXryILYeme+LOpL2ff2NNAsY5C
6jX+6oyAZVSmJKs0itQyTyQqmJ/5bFp8ob5dpwNeFMLgRvohpDh/EChjkTV7N0EU
NK12FkJIvDptBFMOClVx5PurCLPwG4cI2/qIZ8xHuEdzrpELYgI=
=GSE8
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for 6.1
The icc-bwmon driver is expected to support measuring LLCC/DDR bandwidth
on SDM845 and SC7280.
The LLCC driver is extended to provide per-platform register mappings to
the LLCC EDAC driver. The QMI encoder/decoder is updated to allow the
passed qmi_elem_info to be const.
Support for SDM845 is added to the sleep stats driver. Power-domains for
the SM6375 platform is added to RPMPD and the platform is added to
socinfo, together with the PM6125 pmic id.
A couple of of_node reference issues are corrected in the smem state and
smsm drivers.
The Qualcomm SCM driver binding is converted to YAML.
* tag 'qcom-drivers-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (29 commits)
soc: qcom: rpmpd: Add SM6375 support
dt-bindings: power: rpmpd: Add SM6375 power domains
firmware: qcom: scm: remove unused __qcom_scm_init declaration
dt-bindings: power: qcom,rpmpd: drop non-working codeaurora.org emails
soc: qcom: icc-bwmon: force clear counter/irq registers
soc: qcom: icc-bwmon: add support for sc7280 LLCC BWMON
dt-bindings: interconnect: qcom,msm8998-bwmon: Add support for sc7280 BWMONs
soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver
soc: qcom: llcc: Rename reg_offset structs to reflect LLCC version
soc: qcom: qmi: use const for struct qmi_elem_info
soc: qcom: icc-bwmon: remove redundant ret variable
dt-bindings: soc: qcom: stats: Document SDM845 compatible
soc: qcom: stats: Add SDM845 stats config and compatible
dt-bindings: firmware: document Qualcomm SM6115 SCM
soc: qcom: Make QCOM_RPMPD depend on OF
dt-bindings: firmware: convert Qualcomm SCM binding to the yaml
soc: qcom: socinfo: Add PM6125 ID
soc: qcom: socinfo: Add an ID for SM6375
soc: qcom: smem_state: Add refcounting for the 'state->of_node'
soc: qcom: smsm: Fix refcount leak bugs in qcom_smsm_probe()
...
Link: https://lore.kernel.org/r/20220921155753.1316308-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Support for Samsung Galaxy E5, E7 and Grand Max is added, with support
for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value
Edition gains magnetometer support.
MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs.
On SA8295P ADP problems arising from regulators being switched into
low-power mode is worked around by removing this ability, for now.
The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC
related updates are introduced.
On SC7280 support for the CPU and LLC bwmon instances are introduced.
Soundwire, audio codecs and sound introduced for a variety of boards.
Using required-opps the USB controllers votes for a minimum corner on
VDD_CX.
The onboard USB Hub Herobrine is described. A new board, the Google
Evoker is added, as is another revision of Herobrine Villager.
On SC8280XP the USB controllers are marked as wakeup-sources, to keep
them powered during suspend. The CRD has HID devices marked as
wakeup-sources to enable resuming the system. In addition to these
changes the alternative touchpad is introduced on the Lenovo ThinkPad
X13s.
SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350
interconnect providers and GPI DMA is introduced. A description of the
PM7280b PMIC is added to Fairphone FP4 on SM7225.
With the multi-MSI support added in the PCIe controller, SM8250 gets all
its MSI interrupts added.
UFS ICE and the second SDHCI controller is introduced on SM8450. Support
for the Sony Xperia 1 IV is introduced.
Throughout a variety of platforms the TCSR mutex syscon is replaced with
the MMIO-based binding. TCSR nodes gained proper compatibles and halt
syscon nodes are split out from the mutex ranges.
A range of fixes to align with DT bindings are introduced. Among these
are the changes to the follow the TLMM binding and suffix pinctrl states
with -state and subnodes thereof with -pins, another is a number of
changes transitioning to use -gpios and introduction of proper parent
clock references in various clock providers.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmMrosIVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FCkkP/iuTNOUwcpz03IijhJJILfUF1aSS
o7UAadfYj4dKqvc9BGdq+A9OSDqaMmceXwbPWYZQONpHrSNVMIUxUevtrUAxOxYj
fEf4VLRk2AJ2GqtRasqQL7WOESPS1bD7rRyNg5nFD3urTTqXjkgC9XoYQk9uufPx
hLdFeEB672pi0HWiQIgk5iL36O6OEEeK6rl0/PF1y8N8GkYVln1XD7SKNs2tsDcM
0unclymdckPbhxq1tuuRWXhCUZlOWRUP8+89L14M+HT3RrtudnJ8v2jtgygtziPS
TZ+wJa2CMcIZCgQ7kBcORSiMquIHV4bGcq5UNAX0juU2CFIFIQu+VzStT80+6SsU
ATkJSl4GKw/HuJS4W0JLk73mLIhtEhqIfR7qFfiDjhGphbgRkTEdMtqG5WIKzf7D
3ourD0qs3IC+XmtkjnTykJZam9BYNFt99QBHdsjZq37rMvll7BKtEPdrKIKmzzzY
hqOv27Bt4cp2xgZ6Hoot/oSfCOSQffcHPuDzkrfsinM0ZEeDLpMW7ynIQDvw08Fs
2OMbhbP3c/onhoaEuLp9eLt+ghV58PkNvKPcWBma5oNCDvi84CRDU8HOGLbnmeDv
4haXe/Ib3OoT4+raCLYrY5fI3lf2CG9cLQVHs02apilKUQ7HiMLeH3L6vNpH9v0g
BXpu2rG+gbAgJzgH
=XT9N
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtxHsACgkQmmx57+YA
GNnDbw/7BIQIOXFkx6xb5dJbfxAs9EGlPngcgUGWHMUZ166Q+e+nGCUMiDtekLrC
E07g05dPO2oaS2XtcHYVQmaR+Sq9SQYb1nFE6P1kvHmz0SxueR8fDpUheFn4IunP
OCcyPoKGar72HcFh/v2r9SdJgVAEQ6bYvNzwJN2qqMQRW5fMHUBlJtcMumGNyg/0
MNzoSvmx/s2sL6yf6xVt7kqerl/7szFF13PnbWlUEnDhbZUHoOh5VYt2Xxpp9rjX
M09iM/mOkyms7ngcU9m+izYAg+aVeDBSynoyhqQUlrDwbFu83TQ+jFSp0MkJrSiQ
RHJSBNnXx9wmJuox/A2ZBUmMcjqaizz4ciXXVu5t7xP8wFKQZRfblCX1+B2G0qSu
1rqxBqGrVEzRanoZjpMCSrObSjD/t1wIpTN5hqvpEoR3nXWRFzLOIQjXyIkKVZ4p
ePc8Et1yYlQqv7S3GS12jLy8s/sKxOk0sTAzWuTavT+QrgJVDZScaSU9t9hhk4tC
HRlwHBag0nallJcz+gnmbG56f0zcVsvOHnMV+OBFA4wHInlVS+A+Rt0TouqjEiAo
IlVCXlO24jgsZi/x6ZwVboIBYzPLsaOmsr5Tg9Dua494/U+Im23qCFBvRGHiEoBe
tAyCAsYSLNsOhgjxC/tFVOQJOmlw+moerBpZNcu2XMG/aXLHwMA=
=ZHbe
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DTS updates for 6.1
Support for Samsung Galaxy E5, E7 and Grand Max is added, with support
for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value
Edition gains magnetometer support.
MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs.
On SA8295P ADP problems arising from regulators being switched into
low-power mode is worked around by removing this ability, for now.
The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC
related updates are introduced.
On SC7280 support for the CPU and LLC bwmon instances are introduced.
Soundwire, audio codecs and sound introduced for a variety of boards.
Using required-opps the USB controllers votes for a minimum corner on
VDD_CX.
The onboard USB Hub Herobrine is described. A new board, the Google
Evoker is added, as is another revision of Herobrine Villager.
On SC8280XP the USB controllers are marked as wakeup-sources, to keep
them powered during suspend. The CRD has HID devices marked as
wakeup-sources to enable resuming the system. In addition to these
changes the alternative touchpad is introduced on the Lenovo ThinkPad
X13s.
SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350
interconnect providers and GPI DMA is introduced. A description of the
PM7280b PMIC is added to Fairphone FP4 on SM7225.
With the multi-MSI support added in the PCIe controller, SM8250 gets all
its MSI interrupts added.
UFS ICE and the second SDHCI controller is introduced on SM8450. Support
for the Sony Xperia 1 IV is introduced.
Throughout a variety of platforms the TCSR mutex syscon is replaced with
the MMIO-based binding. TCSR nodes gained proper compatibles and halt
syscon nodes are split out from the mutex ranges.
A range of fixes to align with DT bindings are introduced. Among these
are the changes to the follow the TLMM binding and suffix pinctrl states
with -state and subnodes thereof with -pins, another is a number of
changes transitioning to use -gpios and introduction of proper parent
clock references in various clock providers.
* tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (136 commits)
arm64: dts: qcom: sc7280: Add required-opps for USB
arm64: dts: qcom: sm8450: fix UFS PHY serdes size
arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size
arm64: dts: qcom: sa8295p-adp: add missing gpio-ranges in PMIC GPIOs
arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs
arm64: dts: qcom: msm8996-xiaomi: align PMIC GPIO pin configuration with DT schema
arm64: dts: qcom: msm8994-msft-lumia-octagon: align resin node name with bindings
arm64: dts: qcom: pmi8994: add missing MPP compatible fallback
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
arm64: dts: qcom: sc7280-villager: Adjust LTE SKUs
dt-bindings: arm: qcom: Adjust LTE SKUs for sc7280-villager
arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hub
arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub
arm64: dts: qcom: align SDHCI reg-names with DT schema
arm64: dts: qcom: sm8250: provide additional MSI interrupts
arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node
arm64: dts: qcom: Use WCD9335 DT bindings
arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO
arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
...
Link: https://lore.kernel.org/r/20220921234854.1343238-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well
as stream IDs for the shared host1x context devices.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmMkSw8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zocJTEACYpoTDx2T2lLMv8iGCL0wWDJrOU2/Y
N0plnJi+kJKXwwGAjC95A5Lbm+7PQeAgeH/Ai1NxBu4LCL83QHN0Zzc25g9MdMFa
HH4g030V14TEM8Yj0WCXAVtO+y6OsAX4ycwRA9OJEz+c+lKPIbAiXe6vibVFQz/f
yTeumGT0iOI8efqzYpP0x7gSHUsrY0i+4+Td4aqSapE1/93FCEzvUAz/vj/2OGGe
fXOXVnVVk9IWuhTw61Sum9dborq3g4SHAAldygffC6Ivx1/3AkrF5fvFYYopZrSf
h2orSrDg4S3kqhF6mwPksBFLoWChoWQB/t620kuXuUYEVFV0mTqdgnMbv/w3CYPC
JsiNfKrtWND53LMh2UOrJjRLnTtxZCOLXalyovJkkoccaKi2BxiRAHryj/sogoxW
GRinz48bxnF58MQ1v4BBbUrntzf2SSF7d11zkQg1MQ1qljEZJV0piZDPDyLLyWME
xOggT8DSfwJWG+nlA51+UCjr4Qvv4u6gkOXo7lbv3uOiVHHq/aMqeJKCkOpySqbk
J0kxURvRmNRXvMf+jsDsyk3L6EhSElfwF9UKB4vdjI9O+wj/rs2C2C024lOWHI14
ew09v6UnBzGfOoq7YmBl0RP6B6HcCWFfKaZSEJ+bS9pzPPT54iZq+e853ZANG9GO
oaCO0XVSFYnzXQ==
=fXO9
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtt9QACgkQmmx57+YA
GNmUUg//U5Bdddza9xHN3uOoJJRTIuciMK1KC8EGlW7RUGkJV3lK+8Qmb/GzbZ8e
xSwhNSgP9cyJ5c2khU+IT+dNQtvBpnAsezLWccdEbhx48OOV3D+4OxQDJKtX/z27
FMXaryY7TLKfLR1utlCcZ8+l5fV/8fiO/Py18hM2TUv86v8IHSbpsyGiDcsywi3N
Fa8Vlz+Vbr2N4kfe3FOUQZUw1lTEjh9negDKXMQJYE0I5IyHkEqIBNjJbP6mtWfg
i9G0sEvC2LjVF1KnoflNmpFjXzLWoiEasY6GEv9FsVhYfTgvLwfnsHH3/l2Dv+da
v5gGrqQGmtr7jZeKU2Zz4oKvg91e098JCaUUJjLirpA0uS16kbt5v9Uof27MXY8b
/htgFQgjMPx+Jn1K9tYxBk+WnmtMI40O5MSj+QG2uL1x6Q/QYFSL346YmLDDJvL0
6c3J1rlh/VlMI3EzycFl2CAFEBpYzBP6ERFw/2BtkEfhGUEhBaX4wG6uKevNDOo8
HJsOcIJKNCgQk88nGB+ItqDbxfwaa2UQnXufWPdV8Rty1ysfvlU60CWR7SK8NAeX
gcPdqH9Z1B8doYGmrtj9HKCdtpo0qyYI3Ruz/0pBQgFiVoO0FltN/d6fItf8aJKf
yHUigmWiQ4FKM3sjl4H5rpWqDv3Q+oGPQmfMoE5jVQgp6tL0b+o=
=PY4Y
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v6.1-rc1
Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well
as stream IDs for the shared host1x context devices.
* tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Add Host1x context stream IDs on Tegra234
dt-bindings: net: Add Tegra234 MGBE
Link: https://lore.kernel.org/r/20220916101957.1635854-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add MU[1,2]_[A,B] clock entries.
Add SAI IPG clock entries.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20220830033137.4149542-2-peng.fan@oss.nxp.com
Avoid the following checkpatch warning:
include/dt-bindings/clock/imx8mm-clock.h:284: check: Please don't use
multiple blank lines
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20220722215445.3548530-13-marcel@ziswiler.com
Add the dt-bindings header for the Rockchip RV1126, that gets shared
between the clock controller and the clock references in the dts.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20220915163947.1922183-3-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the missing resource IDs for imx8dxl.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse
the i.MX8MM VPU blk ctrl yaml file. And add description for the items.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In case if the platform doesn't have BIOS or a comprehensive firmware
installed then the HBA capability flags will be left uninitialized. As a
good alternative we suggest to define the DT-properties with the AHCI
platform capabilities describing all the HW-init flags of the
corresponding capability register. Luckily there aren't too many of them.
SSS - Staggered Spin-up support and MPS - Mechanical Presence Switch
support determine the corresponding feature availability for the whole HBA
by means of the "hba-cap" property. Each port can have the "hba-port-cap"
property initialized indicating that the port supports some of the next
functionalities: HPCP - HotPlug capable port, MPSP - Mechanical Presence
Switch attached to a port, CPD - Cold Plug detection, ESP - External SATA
Port (eSATA), FBSCP - FIS-based switching capable port.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Add defines for stream IDs used for Host1x context isolation
on Tegra234. The same stream IDs are used for both NISO0 and
NISO1 SMMUs since Host1x's stream ID protection tables don't
make a distinction between the two.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
1. Minor fix in order of initializing pinctrl driver - GPIOs should be
configured before registering gpiolib.
2. Final steps to deprecated bindings headers with register constants.
The constants were moved to include files in DTS directories, because
these are not suitable for bindings. Remove final references and
mark binding header as deprecated to warn any users.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmMbWHIQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD16J7EACBiMzTW1s6h2Z+/8yu3D8dhyy184Lykj/3
tf4mR3fEEX7svUbcll08hquMCgeZ5dZeowgfBN0ylhPetT6E5y0EgBAAR5C6r8I1
0ZbnaFbiSapo4Y3E0ZbhQxE+/Vq6/WCYw43KJEmU8EjFIhogyyOlt2HWKfHTKDlq
5b+amkNOuZ6ERhvhpyH//bwdjSCdz2RsPlv+a63VJxfrU5P78opp9+25DJbIpLD3
SdBDwRI/A0YN6zEpoX+NnqyevmSsTVu1BAh0fiFca0uqimwrkeOlqsKMXlS8/B7F
3YP7RVFFHkWFt+dHp4hPHlREaAEfkCUoJgozKV/wCC+DRG1lvLQ2KZhJ8F+kjnSb
fHJ9xqf0BFh7RQszOd/Odn1wqSESTAKADq/m5abwy+cdHhQwfLVyEzeFs7foLMHa
K1QzP4Ta/AviRclVz3Y9Joxeo1LMgejMqrnE0biSc/d5vDVbr1xynurPzqym9wbh
q2Mh1aP0pSMTjr5+umb3BAd3pQsDSzrhjFUeeLRb5RN5EgOsNRTGnvk7AGKMMo2J
ZEQOrbjHHLZxHx+2E1SS11haXYv2EhBa+13xJv7jZFKtiW7bboBJs9/5MwdG71fP
HegPLggmDa2MSHuAzE5mDPy7N8429Kq61XFWOGv4aA0kK4M55qyuoyIJSCbhFsfz
qwueV7J3oQ==
=YIgT
-----END PGP SIGNATURE-----
Merge tag 'samsung-pinctrl-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v6.1
1. Minor fix in order of initializing pinctrl driver - GPIOs should be
configured before registering gpiolib.
2. Final steps to deprecated bindings headers with register constants.
The constants were moved to include files in DTS directories, because
these are not suitable for bindings. Remove final references and
mark binding header as deprecated to warn any users.
The Global Clock Controller (GCC) in the MSM8909 SoC provides clocks,
resets and power domains for the various hardware blocks in the SoC.
Add a DT schema to describe it, similar to other Qualcomm SoCs.
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220706134132.3623415-2-stephan.gerhold@kernkonzept.com
The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most
of the new clocks, GDSCs, and resets already have reserved IDs but there
are some resources that don't. Add the new clock from Snapdragon 670 and
document the differences between the SoC parent clocks.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220914013922.198778-2-mailingradian@gmail.com
Support external mclk to interface external MI2S clocks for SC7280.
Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-5-git-send-email-quic_c_skakit@quicinc.com
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.
Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com
Support external mclk to interface external MI2S clocks for SC7280.
Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-5-git-send-email-quic_c_skakit@quicinc.com
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.
Fixes: 4185b27b3b ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com
Add pinctrl macros for AM62AX SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.
checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses
However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Devarsh Thakkar <devarsht@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220901141328.899100-4-vigneshr@ti.com
Rearrange SOC specific IOPAD macros alphabetically, so that its easier
to read. No functional change intended.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Devarsh Thakkar <devarsht@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220901141328.899100-2-vigneshr@ti.com
Add all the power domains listed in the RK3588 TRM.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220906143825.199089-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the reset index for USBSIF P1 (T-PHY port 1), used as either USB
or PCI-Express PHY reset.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220720102817.237483-2-angelogioacchino.delregno@collabora.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Add HACE reset bit definition for AST2500/AST2600.
Signed-off-by: Neal Liu <neal_liu@aspeedtech.com>
Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add the pinctrl header file on MediaTek mt8188.
Add the new binding document for pinctrl on MediaTek mt8188.
Signed-off-by: Hui.Liu <hui.liu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220818075012.20880-2-hui.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
CMU_MFCMSCL generates MFC, M2M, MCSC and JPEG clocks for BLK_MFCMSCL.
Add clock indices and binding documentation for CMU_MFCMSCL.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-4-semen.protsenko@linaro.org
CMU_IS generates CSIS, IPP, ITP, VRA and GDC clocks for BLK_IS. Add
clock indices and bindings documentation for CMU_IS domain.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-3-semen.protsenko@linaro.org
CMU_AUD generates Cortex-A32 clock, bus clock and audio clocks for
BLK_AUD. Add clock indices and binding documentation for CMU_AUD.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220809113323.29965-2-semen.protsenko@linaro.org
There are duplicated definitions of peric0 and peric1 cmu blocks. Thus,
they should be defined correctly as numerical order.
Fixes: 680e1c8370 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220727021357.152421-2-chanho61.park@samsung.com
Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
This was discovered while investigating the state of ownership of the
files in include/dt-bindings/ according to the MAINTAINERS file.
This change here is similar to commit 8e28918a85 ("dt-bindings: clock:
Move ti-dra7-atl.h to dt-bindings/clock") and commit 35d35aae81
("dt-bindings: clock: Move at91.h to dt-bindigs/clock").
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20220613081632.2159-3-lukas.bulwahn@gmail.com
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Most of the clock-related dt-binding header files are located in
include/dt-bindings/clock. It would be good to keep all the similar
header files at a single location.
This was discovered while investigating the state of ownership of the files
in include/dt-bindings/ according to the MAINTAINERS file.
This change here is similar to commit 8e28918a85 ("dt-bindings: clock:
Move ti-dra7-atl.h to dt-bindings/clock") and commit 35d35aae81
("dt-bindings: clock: Move at91.h to dt-bindigs/clock").
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20220613081632.2159-2-lukas.bulwahn@gmail.com
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
For convenience (less code duplication, some meaning added to raw
number), the pin controller pin configuration register values
were defined in the bindings header. These are not some IDs or other
abstraction layer but raw numbers used in the registers
These constants do not fit the purpose of bindings. They do not provide
any abstraction, any hardware and driver independent ID. With minor
exceptions, the Linux drivers actually do not use the bindings header at
all.
All of the constants were moved already to headers local to DTS
(residing in DTS directory) and to Samsung pinctrl driver (where
applicable), so remove any references to the bindings header and add a
warning tha tit is deprecated.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220816133016.77553-3-krzysztof.kozlowski@linaro.org
Add support to new clocks that are added in Q6DSP as part of newer version
of LPASS support on SM8450 and SC8280XP.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220816170118.13470-1-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Add macros for NMI and IRQ0-7 interrupts which map to SPI0-8 present on
RZ/G2L (and alike) SoC's so that these can be used in the first cell of
interrupt specifiers.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220722151155.21100-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Core changes:
- Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).
New drivers:
- Intel Meteor Lake support.
- Reneasas RZ/V2M and r8a779g0 (R-Car V4H).
- AXP209 variants AXP221, AXP223 and AXP809.
- Qualcomm MSM8909, PM8226, PMP8074 and SM6375.
- Allwinner D1.
Improvements:
- Proper pin multiplexing in the AMD driver.
- Mediatek MT8192 can use generic drive strength and pin
bias, then fixes on top plus some I2C pin group fixes.
- Have the Allwinner Sunplus SP7021 use the generic DT schema and
make interrupts optional.
- Handle Qualcomm SC7280 ADSP.
- Handle Qualcomm MSM8916 CAMSS GP clock muxing.
- High impedance bias on ZynqMP.
- Serialize StarFive access to MMIO.
- Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmLy1PoACgkQQRCzN7AZ
XXOavA/+O9lIcZqt/I3ZzA4+paEJsXM/win6NKGUHlAE76D5qOvMEXPYCszccGVl
0ZV9s3A3xmlb0AQZONeiK5M6FTghnIHiPMI5Ewzw358hZQg68Mgaba5+/yTqc9ZT
L5zs6whboB1Mlr05L3g5e5ImM1FdFklGHimI6G/evE5r1ZXAAdoyXbSzWgtgLwp9
Gn3rstfqxwwPa9QWIjCXXIeZ/EFnX6BRFT5Pu47dRz/67UWB3xzJjRkZXBf8Nag9
/H/TpmkXSFNaP8HK2kN8m5eNtfWLYM1AmjFPNICWtKLhH12ArD3j+MBYLcJoDnAI
JZryrMSFi2P14Ov42zYeJaSjReTt/QBcRAlWBhSiuotJHl6wrFXzM6wA6JirfvsJ
XQsNm7rKfkmfJ84VjqmCg6QF+39fwKw9MYY9IMXsey7864pBWSyl2xYXUjwXFLua
EWh+6I1CX4db/S6I/uqvluDenT0NKAPZ3rwK5Al1m1DMI47kz0qoW5ZxAW10xeYB
BNGN7IyRvYZhfA/DHcxMB5XgateIKTJqfcYnmHD29Ep4skEetOSac0wVytd3S+Hw
v1zklpcGDLHNiCBXmTYniTlfgBkWJUmVCLA4K6TjSNUKfeoR+33wlpnPHveq8ckn
PJLf79A+5Br3IsLnr6AzDrmtCd0sV46Gy8Vi5I1TD1i/LUUhnL0=
=enmk
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Outside the pinctrl driver and DT bindings we hit some Arm DT files,
patched by the maintainers.
Other than that it is business as usual.
Core changes:
- Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).
New drivers:
- Intel Meteor Lake support.
- Reneasas RZ/V2M and r8a779g0 (R-Car V4H).
- AXP209 variants AXP221, AXP223 and AXP809.
- Qualcomm MSM8909, PM8226, PMP8074 and SM6375.
- Allwinner D1.
Improvements:
- Proper pin multiplexing in the AMD driver.
- Mediatek MT8192 can use generic drive strength and pin bias, then
fixes on top plus some I2C pin group fixes.
- Have the Allwinner Sunplus SP7021 use the generic DT schema and
make interrupts optional.
- Handle Qualcomm SC7280 ADSP.
- Handle Qualcomm MSM8916 CAMSS GP clock muxing.
- High impedance bias on ZynqMP.
- Serialize StarFive access to MMIO.
- Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO"
* tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (117 commits)
dt-bindings: pinctrl: qcom,pmic-gpio: add PM8226 constraints
pinctrl: qcom: Make PINCTRL_SM8450 depend on PINCTRL_MSM
pinctrl: qcom: sm8250: Fix PDC map
pinctrl: amd: Fix an unused variable
dt-bindings: pinctrl: mt8186: Add and use drive-strength-microamp
dt-bindings: pinctrl: mt8186: Add gpio-line-names property
ARM: dts: imxrt1170-pinfunc: Add pinctrl binding header
pinctrl: amd: Use unicode for debugfs output
pinctrl: amd: Fix newline declaration in debugfs output
pinctrl: at91: Fix typo 'the the' in comment
dt-bindings: pinctrl: st,stm32: Correct 'resets' property name
pinctrl: mvebu: Missing a blank line after declarations.
pinctrl: qcom: Add SM6375 TLMM driver
dt-bindings: pinctrl: Add DT schema for SM6375 TLMM
dt-bindings: pinctrl: mt8195: Use drive-strength-microamp in examples
Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable"
pinctrl: imx93: Add MODULE_DEVICE_TABLE()
pinctrl: sunxi: Add driver for Allwinner D1
pinctrl: sunxi: Make some layout parameters dynamic
pinctrl: sunxi: Refactor register/offset calculation
...
As diffstat shows, we've had lots of developments in a wide range
at this time; the majority of changes are about ASoC, including
subsystem-wide cleanups, continued SOF / Intel updates and a
bunch of new drivers (as usual), while there have been some
significant (but almost invisible) improvements in ALSA core
side, too. Below are some highlights:
Core:
- Faster lookups of control elements with Xarray; normal user
won't notice, but on the devices with tons of control elements,
it can be visibly faster
- Support for input validation for controls; this will harden
for badly written drivers in general with a slight overhead
- Deferred async signal handling for working around the potential
deadlocks
- Cleanup / refactoring raw MIDI locking code
ASoC:
- Restructing of the set_fmt() callbacks for making things clearer
in situations like CODEC to CODEC links
- Clean up and modernizing the DAI naming scheme setups
- Merge of more of the Intel AVS driver stack, including some
board integrations
- New version 4 mechanism for communication with SOF DSPs
- Suppoort for dynamically selecting the PLL to use at runtime on
i.MX platforms
- Improvements for CODEC to CODEC support in the generic cards
- Support for AMD Jadeite and various machines, AMD RPL, Intel
MetorLake DSPs, Mediatek MT8186 DSPs and MT6366, nVidia Tegra
MDDRC, OPE and PEQ, NXP TFA9890, Qualcomm SDM845, WCD9335 and
WAS883x, and Texas Instruments TAS2780
HD- and USB-audio:
- Continued improvement for CS35L41 (sub)codec support
- More quirks for various devices (HP, Lenovo, Dell, Clevo)
-----BEGIN PGP SIGNATURE-----
iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmLr5bcOHHRpd2FpQHN1
c2UuZGUACgkQLtJE4w1nLE93IQ/+OleeiGv7C487QN5MrBCkdFnSAiXsXDArcMgo
Gt6XLubH54et1tqi2ms4gRQOqr4HiBelERuqmaCLMZfEgVDc0VhJnf2jjhluYq9+
o9+kcYKul6qTZeNZLPjEX8pBvDe7HzOl7yep++ZnKeH6DAKNQQLDjVuOcQU/BXdY
kL8vYrLI3zfqj/pCePb5xpkBx4XdCrE3TfiCr3tAHVg9MyvSGOJyWs02mEBqQRnc
rlLmkjQVQyln/AGK4RAPMmrrFytktAvBjmIDyFL7kAzhdxe0ouNzTvdxESeojNJv
CVo/p3hl/+0LYjpD2x9v2pQuifOfpjwSCy6f8jsaF366sMwR1D45h051prILsxAF
05D5AOwMCnnJdFQFxw3mIkoDva3/PRX8GFfHsXoz+efc5Ibp8ksNYVgAJ3D2TTtt
7nAYMn0dimVDtw2LHiKantgWAs/rOqD3hDzGxFj2sR662ahsHr8pT8csnJAGoBvW
7kgx7ZzFo/wSyZJqVqV7p4g6J79ScehRwhqoiwZau9Eo+PhuxZUKvm4RwGFh0Vvg
GbiVRPfLV4xQd/pDin6qRX1M7cgPc62qGLkhQHAzrX6H5ipwIbQrpyDGLjwdSEp8
XcQmzCG1zGOvb9A8BY1VBOQXxZRTqN58XujbZ6hsms7Uw8sqagxpYLA/e1bvt1E1
RQoHQRw=
=1n0/
-----END PGP SIGNATURE-----
Merge tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"As the diffstat shows, we've had lots of developments in a wide range
at this time; the majority of changes are about ASoC, including
subsystem-wide cleanups, continued SOF / Intel updates and a bunch of
new drivers (as usual), while there have been some significant (but
almost invisible) improvements in ALSA core side, too.
Below are some highlights:
Core:
- Faster lookups of control elements with Xarray; normal user won't
notice, but on the devices with tons of control elements, it can be
visibly faster
- Support for input validation for controls; this will harden for
badly written drivers in general with a slight overhead
- Deferred async signal handling for working around the potential
deadlocks
- Cleanup / refactoring raw MIDI locking code
ASoC:
- Restructing of the set_fmt() callbacks for making things clearer in
situations like CODEC to CODEC links
- Clean up and modernizing the DAI naming scheme setups
- Merge of more of the Intel AVS driver stack, including some board
integrations
- New version 4 mechanism for communication with SOF DSPs
- Suppoort for dynamically selecting the PLL to use at runtime on
i.MX platforms
- Improvements for CODEC to CODEC support in the generic cards
- Support for AMD Jadeite and various machines, AMD RPL, Intel
MetorLake DSPs, Mediatek MT8186 DSPs and MT6366, nVidia Tegra
MDDRC, OPE and PEQ, NXP TFA9890, Qualcomm SDM845, WCD9335 and
WAS883x, and Texas Instruments TAS2780
HD- and USB-audio:
- Continued improvement for CS35L41 (sub)codec support
- More quirks for various devices (HP, Lenovo, Dell, Clevo)"
* tag 'sound-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (778 commits)
ALSA: hda/realtek: Add quirk for HP Spectre x360 15-eb0xxx
ALSA: line6: Replace sprintf() with sysfs_emit()
ALSA: hda: Replace sprintf() with sysfs_emit()
ALSA: pcm: Replace sprintf() with sysfs_emit()
ALSA: core: Replace scnprintf() with sysfs_emit()
ALSA: control-led: Replace sprintf() with sysfs_emit()
ALSA: aoa: Replace sprintf() with sysfs_emit()
ALSA: ac97: Replace sprintf() with sysfs_emit()
ALSA: hda/realtek: Add quirk for Clevo NV45PZ
ALSA: hda/realtek: Add quirk for Lenovo Yoga9 14IAP7
ALSA: control: Use deferred fasync helper
ALSA: pcm: Use deferred fasync helper
ALSA: timer: Use deferred fasync helper
ALSA: core: Add async signal helpers
ASoC: q6asm: use kcalloc() instead of kzalloc()
ACPI: scan: Add CLSA0101 Laptop Support
ALSA: hda: cs35l41: Support CLSA0101
ALSA: hda: cs35l41: Use the CS35L41 HDA internal define
ASoC: dt-bindings: use spi-peripheral-props.yaml
ASoC: codecs: va-macro: use fsgen as clock
...
and prepare and enable them at the same time. This also comes with devm support
so that drivers can make a single call to get and prepare and enable the clk
and have that all undone when their driver is removed. Many folks have
requested this feature over the years, but we've had disagreements about how to
implement it and if it was worthwhile to encourage drivers to use such an API.
Now it's here, so let's see how it goes. I hope that by introducing this API we
can identify drivers that would benefit from further consolidation of clk API
usage, possibly by moving such logic to the bus layer and out of drivers
altogether.
Outside of that major API update, we have the usual collection of driver
updates. A few new SoCs are supported, mostly Qualcomm and Renesas this time
around. Then we have the long tail of non-critical fixes and minor feature
additions to various clk drivers. And finally more clk provider migration to
struct clk_parent_data, reducing boot times in the process.
Core:
- devm helpers for clk_get() + clk_prepare() and clk_enable()
New Drivers:
- Support for the camera clock controller in Qualcomm SM8450 and
the display and gpu clock controllers in Qualcomm SM8350
- Add support for the Renesas RZ/Five SoC
Updates:
- Various fixes, new clocks and USB GDSCs are introduced for Qualcomm IPQ8074
- Fixes to Qualcomm MSM8939 for issues introduced by inheriting the MSM8916
GCC driver
- Support for a new type of voteable GDSCs used by Qualcomm SC8280XP PCIe
GDSCs
- Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux implementation
- Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994 GCC are
migrated to use clk_parent_data
- Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845 and
SM8250
- Qualcomm MSM8916 gains more possible frequencies for its GP clocks.
- The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic the
design in IPQ8074 to allow the GCC driver to probe earlier.
- The regulator based mmcx supply for Qualcomm dispcc and videocc is dropped,
as the only upstream target that adapted this interface was transitioned
several kernel versions ago
- Qualcomm GDSCs found to be enabled at boot will now reflect in the enable
count of the supply, as was done with the regulator supplies previously
- Correct adc1, nic_media and edma1's parents for NXP i.MX93
- rdiv, mfd values, the return rate in recalc_rate and add more frequencies in
the table for fracn-gppll on i.MX
- Remove Allwinner workaround logic/compatible in fixed factor code
- MediaTek clk driver cleanups
- Add reset support to more MediaTek clk drivers
- deduplicate Allwinner ccu_clks arrays
- Allwinner H6 GPU DFS support
- Adjust Allwinner Kconfig to limit choice
- Fix initconst confusion on Renesas R-Car Gen4
- Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L
- Add PFC and WDT clocks and resets on Renesas RZ/V2M
- Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
Renesas R-Car S4-8
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmLsVRsRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSVo7g//WK8+RORL+I48Pzu21Al+eT4Thz3OQJJj
v3Jk4UY8/7Hnj5jpXI/FguOyah14Jpjp6dJdIvJ/llIHGQHiwIjXlrGQghtOMMHO
6Tkgc4MTPrkQ7asF/D22afG1yMv/qPne2HAtu7gRVebn6AOaje2tnbbQA0e11geD
9wPWhzhgCdShLxxjifN9t1ucklW9BCij1dhczEsf13uACwkUwihC26s3JTzvMxF+
PAXQ1YFzooFFBop6eT0+jQ8JB5V1HPZ55q7K144aFIMhbue4VzyFtTxL16wdzygX
qeMT9cHy1agLEk8djyh/ZIGU/iUD2byE3zTU6xIITfj+oEMTrYdoQIv/chk4h/4u
gz2ihCY4Tj2nBRblDuaXRn46E5XlAVlllJ7bFrK3SlpefyPEc3B6qF8tm1wBJ5pL
dfP2DZACrFEqHVYxZpj6VTLDoR7c1fuyQT0SbPagnqAiboS2wlB4zyyogrOXZ/JO
FqMC+qEkxm25ByY0+RgiKnZ7GSAyt6etZcFGnA3yz7jgoXT4PRYk3uQ40wxE/ttx
eoUoc3QbW5mjSNLlcb8FcxVRkPoh2g+vGlkhQx2xJ5RMbk07pqylaCs5p6cbh0uu
8wn8yIq3bqYTFDR0zurwWGKVRcnH4ukzKScnUfpbrvzXJ9bhHXVC3kAHtXlpOzRe
5IVQPxEVd+8=
=jUh+
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"The clk core gains a new set of APIs that allow drivers to both
acquire clks and prepare and enable them at the same time. This also
comes with devm support so that drivers can make a single call to get
and prepare and enable the clk and have that all undone when their
driver is removed.
Many folks have requested this feature over the years, but we've had
disagreements about how to implement it and if it was worthwhile to
encourage drivers to use such an API.
Now it's here, so let's see how it goes.
I hope that by introducing this API we can identify drivers that would
benefit from further consolidation of clk API usage, possibly by
moving such logic to the bus layer and out of drivers altogether.
Outside of that major API update, we have the usual collection of
driver updates. A few new SoCs are supported, mostly Qualcomm and
Renesas this time around. Then we have the long tail of non-critical
fixes and minor feature additions to various clk drivers.
And finally more clk provider migration to struct clk_parent_data,
reducing boot times in the process.
Summary:
Core:
- devm helpers for clk_get() + clk_prepare() and clk_enable()
New Drivers:
- Support for the camera clock controller in Qualcomm SM8450 and the
display and gpu clock controllers in Qualcomm SM8350
- Add support for the Renesas RZ/Five SoC
Updates:
- Various fixes, new clocks and USB GDSCs are introduced for Qualcomm
IPQ8074
- Fixes to Qualcomm MSM8939 for issues introduced by inheriting the
MSM8916 GCC driver
- Support for a new type of voteable GDSCs used by Qualcomm SC8280XP
PCIe GDSCs
- Qualcomm SC8280XP pipe clocks transitioned to the new phy-mux
implementation
- Qualcomm MSM8996 GCC, RPM clock driver and some clocks in MSM8994
GCC are migrated to use clk_parent_data
- Corrected the topology for Titan (camera) GDSCs on Qualcomm SDM845
and SM8250
- Qualcomm MSM8916 gains more possible frequencies for its GP clocks.
- The GCC and tsens handling on Qualcomm MSM8960 is reworked to mimic
the design in IPQ8074 to allow the GCC driver to probe earlier.
- The regulator based mmcx supply for Qualcomm dispcc and videocc is
dropped, as the only upstream target that adapted this interface
was transitioned several kernel versions ago
- Qualcomm GDSCs found to be enabled at boot will now reflect in the
enable count of the supply, as was done with the regulator supplies
previously
- Correct adc1, nic_media and edma1's parents for NXP i.MX93
- rdiv, mfd values, the return rate in recalc_rate and add more
frequencies in the table for fracn-gppll on i.MX
- Remove Allwinner workaround logic/compatible in fixed factor code
- MediaTek clk driver cleanups
- Add reset support to more MediaTek clk drivers
- deduplicate Allwinner ccu_clks arrays
- Allwinner H6 GPU DFS support
- Adjust Allwinner Kconfig to limit choice
- Fix initconst confusion on Renesas R-Car Gen4
- Add GPT/POEG (PWM) clocks and resets on Renesas RZ/G2L
- Add PFC and WDT clocks and resets on Renesas RZ/V2M
- Add thermal, SDHI, Z (CPU core), PCIe, and HSCIF (serial) clocks on
Renesas R-Car S4-8"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (124 commits)
clk: fixed-factor: Introduce *clk_hw_register_fixed_factor_parent_hw()
clk: mux: Introduce devm_clk_hw_register_mux_parent_hws()
clk: divider: Introduce devm_clk_hw_register_divider_parent_hw()
clk: qcom: gcc-msm8994: use parent_hws for gpll0/4
clk: qcom: clk-rpm: convert to parent_data API
dt-bindings: clock: fix wrong clock documentation for qcom,rpmcc
clk: qcom: gcc-msm8939: Add missing USB HS system clock frequencies
clk: qcom: gcc-msm8939: Add missing MDSS MDP clock frequencies
clk: qcom: gcc-msm8939: Add missing CAMSS CPP clock frequencies
clk: qcom: gcc-msm8939: Fix venus0_vcodec0_clk frequency definitions
clk: qcom: gcc-msm8939: Add missing CAMSS CCI bus clock
clk: qcom: gcc-msm8939: Fix weird field spacing in ftbl_gcc_camss_cci_clk
clk: qcom: gdsc: Bump parent usage count when GDSC is found enabled
clk: qcom: Drop mmcx gdsc supply for dispcc and videocc
clk: qcom: fix build error initializer element is not constant
clk: sprd: Add dt-bindings include file for UMS512
dt-bindings: clk: sprd: Add bindings for ums512 clock controller
clk: sunxi-ng: sun50i: h6: Modify GPU clock configuration to support DFS
dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
clk: qcom: add support for SM8350 DISPCC
...
- remove gpio-vr41xx driver as the only platform using it got dropped too
- add support for suspend/resume to gpio-davinci
- improvements to the GPIO character device code
- add support for disabling bias for in-kernel users (up until now
only user-space could set it)
- drop unused devm_gpio_free()
- fix a refcount issue in gpiolib OF
- use device match helpers where applicable
- add support for a new model to gpio-rockchip
- non-functional improvements in gpio-adp5588
- improve and simplify teardown in gpio-twl4030 and gpio-ucb1400
- modernize the gpio-74xx-mmio and gpio-adnp drivers
- coding style improvements in gpio-xilinx, gpio-104-idi-48
- support new model (pca9571) in gpio-pca9570
- convert the DT bindings to YAML for gpio-mvebu and update the document
- don't return error codes from remove() in gpio-brcmstb
- add a library for the intel 8255 PPI interface and use it in drivers
- reduce using magic numbers and improve code readability in several drivers
- convert DT bindings to YAML for gpio-tpic2810
- add new models to DT bindings for gpio-frl-imx
- Kconfig improvements
- other minor tweaks and improvements
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmLruBoACgkQEacuoBRx
13LSqA//QMdrdsYOvSp3m6Dy1swj8a2VpeInDclx/JQ51hIsv03lW6sysrRBBKfy
gslkj0KO+kelEQbcHZdXF6f434Y2QqSU/JRCPQlQ55Uo3vSbUulvVkUtSoegdNKG
airr5KebZtLzjBgc23n38HiTJxa1J238+3UScxYHqL9jQ6AA6sPx7Kpy2zlTwojn
iygJ1CKuyMyHOjU1uhAWYVzCAoguVvOb58emUt5HUsOjjW42d8T+iCHxrJnjC3ST
YWwHnkSd3GO5CLI+5w7MmLk4kaOA8KU7PGRljglwpbsNGknUQ3PFFSlqFUziBzMU
nOG1gZ9bvzOy5xjFcLkT3p/NHZiTnyq+ugDl2RAVQB2UF31KHk2sVGrzIsRpbBgt
kDst5Wn21oymfEO6FM269h5ln+haXouJv2eQvnayBr3rfMxaZCm8veFxjQBDRADf
D3muvi6u/EJPsPg08owcaVrINPVYVGQIzQp5hi+UCBkzXghn+MovNuI/i07Qf1kr
fBELOXTy+MGK22p+rO+rXsp0Cp1zUIbwSz0m8ImbhLqcYLa+Vm5bJHk31/Igvbv3
9FMR75RmfE98EvMhd6ECarZHF9rvCVN7R1U9P1aK8+85m7X5eIVehoQ125uAZf+N
+W49bceSCI/mGqIg8MiQCM5NIW0AXvyjd7gTNN5kr7qsMGTJI3c=
=rGNU
-----END PGP SIGNATURE-----
Merge tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio updates from Bartosz Golaszewski:
"Here are the updates for this merge window from the GPIO subsystem.
We have more lines removed than added thanks to dropping of a driver
for a platform that's no longer supported. Otherwise the changes are
pretty straightforward: support for some new models, various
improvements to existing drivers, some tweaks to the core library code
and DT bindings updates.
Summary:
- remove gpio-vr41xx driver as the only platform using it got dropped
too
- add support for suspend/resume to gpio-davinci
- improvements to the GPIO character device code
- add support for disabling bias for in-kernel users (up until now
only user-space could set it)
- drop unused devm_gpio_free()
- fix a refcount issue in gpiolib OF
- use device match helpers where applicable
- add support for a new model to gpio-rockchip
- non-functional improvements in gpio-adp5588
- improve and simplify teardown in gpio-twl4030 and gpio-ucb1400
- modernize the gpio-74xx-mmio and gpio-adnp drivers
- coding style improvements in gpio-xilinx, gpio-104-idi-48
- support new model (pca9571) in gpio-pca9570
- convert the DT bindings to YAML for gpio-mvebu and update the
document
- don't return error codes from remove() in gpio-brcmstb
- add a library for the intel 8255 PPI interface and use it in
drivers
- reduce using magic numbers and improve code readability in several
drivers
- convert DT bindings to YAML for gpio-tpic2810
- add new models to DT bindings for gpio-frl-imx
- Kconfig improvements
- other minor tweaks and improvements"
* tag 'gpio-updates-for-v6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (52 commits)
dt-bindings: gpio: fsl-imx-gpio: Add i.MXRT compatibles
gpio: 74xx-mmio: Use bits instead of plain numbers for flags
gpio: xilinx: add missing blank line after declarations
MAINTAINERS: Update Intel 8255 GPIO driver file list
gpio: gpio-mm: Implement and utilize register structures
gpio: 104-idi-48: Implement and utilize register structures
gpio: 104-dio-48e: Implement and utilize register structures
gpio: i8255: Introduce the Intel 8255 interface library module
gpio: 104-idio-16: Implement and utilize register structures
gpio: ws16c48: Implement and utilize register structures
gpio: remove VR41XX related gpio driver
dt-bindings: gpio: add pull-disable flag
gpiolib: acpi: support bias pull disable
gpiolib: of: support bias pull disable
gpiolib: add support for bias pull disable
gpio: 74xx-mmio: use bits.h macros for all masks
gpio: 74xx-mmio: Check MMIO_74XX_DIR_IN flag in mmio_74xx_dir_in()
gpio: 74xx-mmio: Make use of device properties
gpiolib: cdev: compile out HTE unless CONFIG_HTE selected
gpiolib: cdev: consolidate edge detector configuration flags
...
Bindings:
- Add spi-peripheral-props.yaml references to various SPI device
bindings
- Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm CCN
PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and arm-firmware-suite
bindings to DT schema format
- New bindings for Arm virtual platforms display, Qualcomm IMEM memory
region, Samsung S5PV210 ChipID, EM Microelectronic EM3027 RTC, and
arm,cortex-a78ae
- Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
quanta, and densitron
- Add missing MSI and IOMMU properties to host-generic-pci
- Remove bindings for removed EFM32 platform
- Remove old chosen.txt binding (replaced by schema)
- Treewide add missing type information for properties
- Treewide fixing of typos and its vs. it's in bindings. Its all good
now.
- Drop unnecessary quoting in power related schemas
- Several LED binding updates which didn't get picked up
- Move various bindings to proper directories
DT core code:
- Convert unittest GPIO related tests to use fwnode
- Check ima-kexec-buffer against memory bounds
- Print reserved-memory allocation/reservation failures as errors
- Cleanup early_init_dt_reserve_memory_arch()
- Simplify of_overlay_fdt_apply() tail
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmLpmdUQHHJvYmhAa2Vy
bmVsLm9yZwAKCRD6+121jbxhw8RKD/0dWJ6kDoM5IgS+gzklHA4cBgtHoqHa8Aun
wDMP6bLxFtlGtAExkfO1ZvNgv1movEYwtSkNKKLuzK/Uv65ln693xWMKza0VEQCl
1/C1+BQUGMrrMxheMvyWyoGTzOuP65Oh74xDutVlOMN5GxUNEtnU6OdX+F1TLNtD
utL0arf44y8pAC+eouLTl0bDeMi3rnLT7Y/UEuhh59nVVy+Fi04jvV/UjNx0Vp6m
/jViiCSxPl77zU2nL7kdOE91Peaqb4YgdXjSgvnhXcJ8zDZZgai64u3Kq0k5whM6
U6HvIpjvzwDJG5qfW7rdM8dFMUECYNWMqlrqhpX1m/FQQejUBalPnklTtqwkrzsj
8QXJB0y1BMf6lwIjFDHZoxk4sfd3fcSJegkZK+wip9FdpGe+78GBUp2RU+gfMgv9
lUSLq0mrmjEuazqm+C95okzFbLeZk+WAgAmH2GYaTc1VYa6WrBYnTZIy8ngTe+VS
ywklQbBUXMaV13A5gKQSNZx9rdyJVgqRcLuRxosxNt5ms411oiKjjj2m6adTUXmR
jos67YYdSHiKmn7Omj8biOw2lDQe0PMZmhgqNTe7nAWho26v6uV/HgLz6xNPtEDx
Lj6+xBz96RH0ANWS9O0GLk+GDe7svsXTmj+9GkCFlY3PioMvB3Fmph7p9Hjxkq2P
8zQFxWGgAg==
=8/kk
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"Bindings:
- Add spi-peripheral-props.yaml references to various SPI device
bindings
- Convert qcom,pm8916-wdt, ds1307, Qualcomm BAM DMA, is31fl319x,
skyworks,aat1290, Rockchip EMAC, gpio-ir-receiver, ahci-ceva, Arm
CCN PMU, rda,8810pl-intc, sil,sii9022, ps2-gpio, and
arm-firmware-suite bindings to DT schema format
- New bindings for Arm virtual platforms display, Qualcomm IMEM
memory region, Samsung S5PV210 ChipID, EM Microelectronic EM3027
RTC, and arm,cortex-a78ae
- Add vendor prefixes for asrock, bytedance, hxt, ingrasys, inventec,
quanta, and densitron
- Add missing MSI and IOMMU properties to host-generic-pci
- Remove bindings for removed EFM32 platform
- Remove old chosen.txt binding (replaced by schema)
- Treewide add missing type information for properties
- Treewide fixing of typos and its vs. it's in bindings. Its all good
now.
- Drop unnecessary quoting in power related schemas
- Several LED binding updates which didn't get picked up
- Move various bindings to proper directories
DT core code:
- Convert unittest GPIO related tests to use fwnode
- Check ima-kexec-buffer against memory bounds
- Print reserved-memory allocation/reservation failures as errors
- Cleanup early_init_dt_reserve_memory_arch()
- Simplify of_overlay_fdt_apply() tail"
* tag 'devicetree-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (65 commits)
dt-bindings: mtd: microchip,mchp48l640: use spi-peripheral-props.yaml
dt-bindings: power: supply: drop quotes when not needed
dt-bindings: power: reset: drop quotes when not needed
dt-bindings: power: drop quotes when not needed
dt-bindings: PCI: host-generic-pci: Allow IOMMU and MSI properties
of/fdt: declared return type does not match actual return type
devicetree/bindings: correct possessive "its" typos
dt-bindings: net: convert emac_rockchip.txt to YAML
dt-bindings: eeprom: microchip,93lc46b: move to eeprom directory
dt-bindings: eeprom: at25: use spi-peripheral-props.yaml
dt-bindings: display: use spi-peripheral-props.yaml
dt-bindings: watchdog: qcom,pm8916-wdt: convert to dtschema
dt-bindings: power: reset: qcom,pon: use absolute path to other schema
dt-bindings: iio/dac: adi,ad5766: Add missing type to 'output-range-microvolts'
dt-bindings: power: supply: charger-manager: Add missing type for 'cm-battery-stat'
dt-bindings: panel: raydium,rm67191: Add missing type to 'video-mode'
of/fdt: Clean up early_init_dt_reserve_memory_arch()
dt-bindings: PCI: fsl,imx6q-pcie: Add missing type for 'reset-gpio-active-high'
dt-bindings: rtc: Add EM Microelectronic EM3027 bindings
dt-bindings: rtc: ds1307: Convert to json-schema
...
Here is the set of SPDX comment updates for 6.0-rc1.
Nothing huge here, just a number of updated SPDX license tags and
cleanups based on the review of a number of common patterns in GPLv2
boilerplate text. Also included in here are a few other minor updates,
2 USB files, and one Documentation file update to get the SPDX lines
correct.
All of these have been in the linux-next tree for a very long time.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYupz3g8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ynPUgCgslaf2ssCgW5IeuXbhla+ZBRAzisAnjVgOvLN
4AKdqbiBNlFbCroQwmeQ
=v1sg
-----END PGP SIGNATURE-----
Merge tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx
Pull SPDX updates from Greg KH:
"Here is the set of SPDX comment updates for 6.0-rc1.
Nothing huge here, just a number of updated SPDX license tags and
cleanups based on the review of a number of common patterns in GPLv2
boilerplate text.
Also included in here are a few other minor updates, two USB files,
and one Documentation file update to get the SPDX lines correct.
All of these have been in the linux-next tree for a very long time"
* tag 'spdx-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (28 commits)
Documentation: samsung-s3c24xx: Add blank line after SPDX directive
x86/crypto: Remove stray comment terminator
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_406.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_398.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_391.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_390.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_385.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_319.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_318.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_298.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_292.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_179.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 2)
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_168.RULE (part 1)
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_160.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_152.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_149.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_147.RULE
treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_133.RULE
...
Here is the large set of char and misc and other driver subsystem
changes for 6.0-rc1.
Highlights include:
- large set of IIO driver updates, additions, and cleanups
- new habanalabs device support added (loads of register maps
much like GPUs have)
- soundwire driver updates
- phy driver updates
- slimbus driver updates
- tiny virt driver fixes and updates
- misc driver fixes and updates
- interconnect driver updates
- hwtracing driver updates
- fpga driver updates
- extcon driver updates
- firmware driver updates
- counter driver update
- mhi driver fixes and updates
- binder driver fixes and updates
- speakup driver fixes
Full details are in the long shortlog contents.
All of these have been in linux-next for a while without any reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYup9QQ8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ylBKQCfaSuzl9ZP9dTvAw2FPp14oRqXnpoAnicvWAoq
1vU9Vtq2c73uBVLdZm4m
=AwP3
-----END PGP SIGNATURE-----
Merge tag 'char-misc-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char / misc driver updates from Greg KH:
"Here is the large set of char and misc and other driver subsystem
changes for 6.0-rc1.
Highlights include:
- large set of IIO driver updates, additions, and cleanups
- new habanalabs device support added (loads of register maps much
like GPUs have)
- soundwire driver updates
- phy driver updates
- slimbus driver updates
- tiny virt driver fixes and updates
- misc driver fixes and updates
- interconnect driver updates
- hwtracing driver updates
- fpga driver updates
- extcon driver updates
- firmware driver updates
- counter driver update
- mhi driver fixes and updates
- binder driver fixes and updates
- speakup driver fixes
All of these have been in linux-next for a while without any reported
problems"
* tag 'char-misc-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (634 commits)
drivers: lkdtm: fix clang -Wformat warning
char: remove VR41XX related char driver
misc: Mark MICROCODE_MINOR unused
spmi: trace: fix stack-out-of-bound access in SPMI tracing functions
dt-bindings: iio: adc: Add compatible for MT8188
iio: light: isl29028: Fix the warning in isl29028_remove()
iio: accel: sca3300: Extend the trigger buffer from 16 to 32 bytes
iio: fix iio_format_avail_range() printing for none IIO_VAL_INT
iio: adc: max1027: unlock on error path in max1027_read_single_value()
iio: proximity: sx9324: add empty line in front of bullet list
iio: magnetometer: hmc5843: Remove duplicate 'the'
iio: magn: yas530: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: magnetometer: ak8974: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: light: veml6030: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: light: vcnl4035: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: light: vcnl4000: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr() macros
iio: light: tsl2591: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr()
iio: light: tsl2583: Use DEFINE_RUNTIME_DEV_PM_OPS and pm_ptr()
iio: light: isl29028: Use DEFINE_RUNTIME_DEV_PM_OPS() and pm_ptr()
iio: light: gp2ap002: Switch to DEFINE_RUNTIME_DEV_PM_OPS and pm_ptr()
...
This adds initial support for two SoC families that have been under
review for a while. In both cases, the origonal idea was to have a
minimally functional version, but we ended up leaving out the clk drivers
that are still under review and will be merged through the corresponding
subsystem tree.
The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and
based on the 32-bit NPCM7xx family but is now getting added to
arch/arm64 as well.
Sunplus SP7021, also known as Plus1, is a general-purpose
System-in-Package design based on the 32-bit Cortex-A7 SoC
on the main chip, plus an I/O chip and memory in the same
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+24ACgkQmmx57+YA
GNkPVw//XAC/uK7WR4oz1D1YaPPNhEvFa6hV1gjGB7Iif72SzyDJmC+36MATU/AY
neQjCOLJMhxI0hpDGY9nLYe+aP1C6vD32zsjffjt/+s9em+YZZCUkRJuQ5xO3fID
Uk8ZAnCIcOqX9sjXr9ChW8irlcWFbKzhgWXnPqwQmycIaE7QVz1wx32dbc64YuAK
S+290U8wbj8bukr33TyZPMdYlfqNU3c1W+dCaeVsQlX1juoHEV3stmIjslRefd6X
Jre22YJE41VlPufZej76nHXuVnjKf54Oi347TcbPOWNDtEAIESt3mzKy+zICBT2p
v01rNBf0SogyOtSbWDPTFCAH9W9hujSOJIUOWpbOLaPdfElXxcoTBwj2e2LMoW0k
ke7YR1m6FKDam5GFU9Oe98CWIiVm/GnTA5mnhhETU1QTXQ3KeZ+Z8X779YuSWPv9
kJuOPRSk9NdcfRtxZz1vpCvhv/2hBbeBuz+GZi3bisMWdvVqS3lFqVbr6kziQbJZ
kE6KJH48FdL0VLVvuy+aNSF2umLT42b+5+cmQFuP2zePQgo1DEMKEtFXpZjQJbha
3iu3sHnieOFMLcbNzbqSz2im3yYNBjl1M5qoGEXaw3Rkzqiht0kMNvAa4LmAejbh
E+5BIczwWNbaUKgToV1ij65O4a78Bw98m2SIS7awEZC5MW/nXYA=
=7Id+
-----END PGP SIGNATURE-----
Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM new SoC support from Arnd Bergmann:
"This adds initial support for two SoC families that have been under
review for a while. In both cases, the origonal idea was to have a
minimally functional version, but we ended up leaving out the clk
drivers that are still under review and will be merged through the
corresponding subsystem tree.
The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and
based on the 32-bit NPCM7xx family but is now getting added to
arch/arm64 as well.
Sunplus SP7021, also known as Plus1, is a general-purpose
System-in-Package design based on the 32-bit Cortex-A7 SoC on the main
chip, plus an I/O chip and memory in the same"
* tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE
arm64: defconfig: Add Nuvoton NPCM family support
arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
arm64: dts: nuvoton: Add initial NPCM8XX device tree
arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string
dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string
dt-bindings: arm: npcm: Add maintainer
reset: npcm: Add NPCM8XX support
dt-bindings: reset: npcm: Add support for NPCM8XX
reset: npcm: using syscon instead of device data
ARM: dts: nuvoton: add reset syscon property
dt-bindings: reset: npcm: add GCR syscon property
dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock
dt-bindings: watchdog: npcm: Add npcm845 compatible string
dt-bindings: timer: npcm: Add npcm845 compatible string
ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree
ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig
ARM: sunplus: Add initial support for Sunplus SP7021 SoC
irqchip: Add Sunplus SP7021 interrupt controller driver
...
As usual, the bulk of the changes for the SoC tree are devicetree file
updates, and most of these changes are for 64-bit embedded machines.
As before, there are a ton of style cleanups, and additional hardware
support for existing machines.
Looking only at the new SoC, the notable additions are:
- A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813.
Each SoC comes with a corresponding reference board.
- The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
i.MX8 embedded SoCs, now using Cortex-A55 cores and the
Ethos-U65 NPU.
- Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end
of Arm based Laptop SoCs, and its automotive cousin, the
SA8540P. The SC8280XP is used in the Lenovo Thinkpad X13s
laptop that also gets added here in addition to the reference
boards.
- Allwinner H616, a newer version of the H6 SoC, targeted at
Set-top-box applications. It comes with dts files for the
Orange Pi zero2 single-board computer and the X96 Mate
set-top-box
- Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip
in the Armada SoC family based on the Cortex-A55 core.
New machines based on previously supported SoCs include:
- Several new machines on NXP i.MX platforms: multiple Toradex
Colibri boards using the "Iris" and "Ixora" carriers,
DH electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems
TQMa8MPQL, and phytech phyBOARD-Polis-i.MX8MM.
- Google Chameleon v3 FPGA board based on Intel Arria10 and
Stratix 10 Software Virtual platform, both in the SoCFPGA
platform.
- Two new wireless devices based on Broadcom SoCs:
The Asus GT-AX6000 Router and the Cisco Meraki MR26 access point
- Improved Chromebook support for both the Mediatek and Qualcomm
SoC families brought added machines: Acer Chromebook 514 (MT8192),
Acer Chromebook Spin 513 (MT8195) and a couple of SC7180 based
machines including the Lenovo IdeaPad Chromebook Duet 3.
- Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.
- Finally, there are a few development board on other chips:
PCB8309 (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308)
DH DRC Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm
SDM660)
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+7MACgkQmmx57+YA
GNlTQQ//QnOoW3fl2l4TvuBuP1Vxp7KW3GxZEkWBEfy7lfgkfBzksJ2GT+c96fxk
+XEvSJcDsSo8zNYXXu/q0jjVKW4lEkiBtaB53NbLayNTFtJccKPiL4hccUkwSg1K
zOhfu6SEgkwuYNAhtcQOfIec+gdF2PvpZSWUfuGvM2Z3rNhhyfhgoRRZCpc62eeS
VQ+bVJH/7hG4XAJEcwmNK+8GoCcLbOclCa14oa9/LuEVjfYwOblfPjSflmfALzbM
BoTDdeMbZoOdy3LOmLpT26Wv7zWQxLhTpiSYiSV0CI4NHUfzJj8ncNh+w9OiN+KO
Z7cblHhveW5WSEP/jDp9YTf2XXA5UgpFQQjuXS8zQVECw5YxrSBB96GroQhvpcmT
oSS0BVvlmp5snBRx4Oev2ldJ0BuyYYljF0DmmTrQ6s2gvB4WBlRSqplCAkDy59Im
+mc5BBTqZYoxzCpzXEZR7VPzk1jzAO5wnYYd1mLJSHVExlSw8CQijy1a4YXxsvmK
4Sysrm8UbmPN/0anbiyPKeIkuNuufFUvUCR3Vm2HnMzNPza8YBJ0xm6zr8J7ecXe
QcucpXyLi17GTLOm+pcyj2fQ19yVqO3xbutP4sy9StctEXLZe3rH2hY+GPK6N+Uj
83MbABMCmpUAyPMzR0AwTKx/RwWbf1jjYvcKg2VW8NNV5kkQQzM=
=X6mA
-----END PGP SIGNATURE-----
Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM DT updates from Arnd Bergmann:
"As usual, the bulk of the changes for the SoC tree are devicetree file
updates, and most of these changes are for 64-bit embedded machines.
As before, there are a ton of style cleanups, and additional hardware
support for existing machines.
Looking only at the new SoC, the notable additions are:
- A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit:
BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146,
BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813. Each SoC comes
with a corresponding reference board.
- The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and
i.MX8 embedded SoCs, now using Cortex-A55 cores and the Ethos-U65
NPU.
- Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end of
Arm based Laptop SoCs, and its automotive cousin, the SA8540P. The
SC8280XP is used in the Lenovo Thinkpad X13s laptop that also gets
added here in addition to the reference boards.
- Allwinner H616, a newer version of the H6 SoC, targeted at
Set-top-box applications. It comes with dts files for the Orange Pi
zero2 single-board computer and the X96 Mate set-top-box
- Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip in the
Armada SoC family based on the Cortex-A55 core.
New machines based on previously supported SoCs include:
- Several new machines on NXP i.MX platforms: multiple Toradex
Colibri boards using the "Iris" and "Ixora" carriers, DH
electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems TQMa8MPQL, and
phytech phyBOARD-Polis-i.MX8MM.
- Google Chameleon v3 FPGA board based on Intel Arria10 and Stratix
10 Software Virtual platform, both in the SoCFPGA platform.
- Two new wireless devices based on Broadcom SoCs: The Asus GT-AX6000
Router and the Cisco Meraki MR26 access point
- Improved Chromebook support for both the Mediatek and Qualcomm SoC
families brought added machines: Acer Chromebook 514 (MT8192), Acer
Chromebook Spin 513 (MT8195) and a couple of SC7180 based machines
including the Lenovo IdeaPad Chromebook Duet 3.
- Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on
Qualcomm SDM845, while Mi 5s Plus is based on MSM8996.
- Finally, there are a few development board on other chips: PCB8309
(Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308) DH DRC
Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm SDM660)"
* tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (829 commits)
dt-bindings: soc: bcm: use absolute path to other schema
dt-bindings: soc: bcm: drop quotes when not needed
dt-bindings: soc: microchip: use absolute path to other schema
dt-bindings: soc: microchip: drop quotes when not needed
ARM: dts: lan966x: keep lan966 entries alphabetically sorted
ARM: dts: lan966x: add support for pcb8309
dt-bindings: arm: at91: add lan966 pcb8309 board
ARM: dts: lan966x: Enable network driver on pcb8291
ARM: dts: lan966x: Disable can0 on pcb8291
ARM: dts: lan966x: Add gpio-restart
dt-bindings: arm: aspeed: add Aspeed Evaluation boards
arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
dt-bindings: arm: qcom: add missing SM6350 board compatibles
dt-bindings: arm: qcom: add missing SM6125 board compatibles
dt-bindings: arm: qcom: add missing SDM845 board compatibles
dt-bindings: arm: qcom: add missing SDM636 board compatibles
dt-bindings: arm: qcom: add missing SDM630 board compatibles
dt-bindings: arm: qcom: add missing QCS404 board compatibles
...