Commit Graph

26 Commits

Author SHA1 Message Date
Stephen Warren 553c0a200e ARM: tegra: set up /aliases entries for RTCs
This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.

tegra124-venice2.dts isn't touched yet since we haven't added any off-
SoC RTC device to its device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-18 14:10:48 -07:00
Laxman Dewangan ba4104e794 ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra20 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Laxman Dewangan 6bccbd5e18 ARM: tegra: convert device tree files to use key defines
Use key code macros for all key code refernced for keys.

For tegra20-seaboard.dts and tegra20-harmony.dts:
  The key comment for key (16th row and 1st column) is KEY_KPSLASH but
  code is 0x004e which is the key code for KEY_KPPLUS. As there other
  key exist with KY_KPPLUS, I am assuming key code is wrong and comment
  is fine. With this assumption, I am keeping the key code as KEY_KPSLASH.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Stephen Warren 58ecb23f64 ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:16 -07:00
Stephen Warren 3393d42205 ARM: tegra: update DT files to add reset properties
An earlier patch updated the Tegra DT bindings to require resets and
reset-names properties to be filled in. This patch updates the DT files
to include those properties.

Note that any legacy clocks and clock-names entries that are replaced by
reset properties are not yet removed; the drivers must be updated to use
the new resets and reset-names properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-11 16:42:32 -07:00
Joseph Lo 47d2d63ba6 ARM: tegra: enable LP1 suspend mode
Enabling the LP1 suspend mode for Tegra devices.

Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 12:23:14 -06:00
Hiroshi Doyu 885a8cfac6 ARM: tegra20: convert device tree files to use CLK defines
Use the Tegra20 CAR binding header (tegra20-car.h) to replace magic
numbers in the device tree. For example,

-               clocks = <&tegra_car 28>;
+               clocks = <&tegra_car CLK_HOST1X>;

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, updated since tegra20-car.h moved for consistency]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:50 -06:00
Stephen Warren 6cecf916b9 ARM: tegra: convert device tree files to use IRQ defines
Use the GIC and standard IRQ binding defines in all IRQ specifiers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:50 -06:00
Stephen Warren 3325f1bcd0 ARM: tegra: convert device tree files to use GPIO defines
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties,
and some interrupts properties. Use standard GPIO flag defines too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Stephen Warren 1bd0bd499d ARM: tegra: use #include for all device trees
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.

This allows future use of #defines and header files in order to define
names for various constants, such as the IDs and flags in GPIO
specifiers. Use of those features will increase the readability of the
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Venu Byravarasu 4c94c8b5b3 ARM: tegra: update device trees for USB binding rework
This patch updates all Tegra board files so that they contain all the
properties required by the updated USB DT binding. Note that this patch
only adds the new properties and does not yet remove the old properties,
in order to maintain bisectability. The old properties will be removed
once the driver has been updated to assume the new bindings.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
[swarren: fixed some newly added regulator-name properties to better
match schematic, avoided duplicate regulator-name on Whistler.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-17 16:23:09 -06:00
Venu Byravarasu 9dffe3be3f ARM: tegra: modify ULPI reset GPIO properties
1. All Tegra20 ULPI reset GPIO DT properties are modified to indicate active
low nature of the GPIO.
2. Placed USB PHY DT node immediately below the EHCI controller DT nodes
and corrected reg value in the name of USB PHY DT node.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-17 16:22:05 -06:00
Prashant Gaikwad 1071b2df22 clk: tegra: Fix cdev1 and cdev2 IDs
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:44 -06:00
Joseph Lo a44a019d45 ARM: dts: tegra: add the PM configurations of PMC
Adding the PM configuration of PMC when the platform support suspend
function.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:43 -06:00
Joseph Lo 7a2617a64d ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
This patch adds "non-removable" property of MMC host where the eMMC device
is for Tegra platform.

And the "keep-power-in-suspend" property was used for the SDIO device that
need this to go into suspend mode (e.g. BRCM43xx series).

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:43 -06:00
Stephen Warren f9cd2b3bf4 ARM: tegra: add clocks property to sound nodes
Audio-related clocks need to be represented in the device tree. Update
bindings to describe which clocks are needed, and DT files to include
those clocks.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:42 -06:00
Joseph Lo 7021d12205 ARM: tegra: add clock source of PMC to device trees
Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 14:29:56 -06:00
Joseph Lo 908ab93688 ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host
The GPIO pin of SD slot card detection should active low.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-11 14:25:10 -06:00
Olof Johansson 5b22c33e8e ARM: tegra: device tree updates
Numerous updates to the various Tegra device trees are made:
 
 * Addition of NVIDIA Beaver (Tegra30) and Toradex Colibri T20 and Iris
   carrier boards.
 * Enablement of the HDMI connector on most boards.
 * Enablement of the keyboard controller on a few boards.
 * Addition of the AC'97 controller to Tegra20.
 * Addition of a GPIO poweroff node for TrimSlice.
 * Changes to support the new "high speed UART" (DMA-capable) driver for
   Tegra serial ports, and enablement for Cardhu's UART C.
 * A few cleanups, such as compatible flag fixes, node renames, node
   ordering fixes, commonizing properties into SoC .dtsi files, etc..
 
 This pull request is based on (most of) the previous pull request with
 tag tegra-for-3.9-soc-t114.
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Merge tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt

From Stephen Warren:
ARM: tegra: device tree updates

Numerous updates to the various Tegra device trees are made:

* Addition of NVIDIA Beaver (Tegra30) and Toradex Colibri T20 and Iris
  carrier boards.
* Enablement of the HDMI connector on most boards.
* Enablement of the keyboard controller on a few boards.
* Addition of the AC'97 controller to Tegra20.
* Addition of a GPIO poweroff node for TrimSlice.
* Changes to support the new "high speed UART" (DMA-capable) driver for
  Tegra serial ports, and enablement for Cardhu's UART C.
* A few cleanups, such as compatible flag fixes, node renames, node
  ordering fixes, commonizing properties into SoC .dtsi files, etc..

This pull request is based on (most of) the previous pull request with
tag tegra-for-3.9-soc-t114.

* tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (22 commits)
  ARM: dt: tegra30: Rename "smmu" to "iommu"
  ARM: dt: tegra20: Rename "gart" to "iommu"
  ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi
  ARM: tegra: Add Toradex Iris carrier board DT with T20 512MB COM
  ARM: tegra: Add Colibri T20 512MB COM device tree
  ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi
  ARM: tegra: harmony: enable keyboard in DT
  ARM: tegra: whistler: enable keyboard in DT
  ARM: tegra: cardhu: register UARTC
  ARM: tegra: seaboard: enable keyboard in DT
  ARM: tegra: add DT entry for KBC controller
  ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT
  ASoC: tegra: add ac97 host controller to device tree
  ARM: DT: tegra: Add Tegra30 Beaver board support
  ARM: DT: tegra: Add board level compatible properties
  ARM: tegra: paz00: enable HDMI port
  ARM: tegra: ventana: enable HDMI port
  ARM: tegra: seaboard: enable HDMI port
  ARM: tegra: trimslice: add gpio-poweroff node to DT
  ARM: DT: tegra: Unify the description of Tegra20 boards
  ...
2013-02-05 13:19:11 -08:00
Venu Byravarasu 40e8b3a690 ARM: tegra: Add reset GPIO information to PHY DT node
As reset GPIO information is PHY specific detail, adding
it to PHY DT node.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:41:45 -07:00
Lucas Stach ab343e91aa ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Stephen Warren 11a3c868f9 ARM: tegra: paz00: enable HDMI port
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:07 -07:00
Prashant Gaikwad d409b3af89 ARM: tegra: paz00: add clock information to DT
Add clock i2c clock information to device node.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:33 -07:00
Stephen Warren b9c665d75b ARM: tegra: update *.dts for regulator-compatible deprecation
Commit 13511de "regulator: deprecate regulator-compatible DT property"
now allows for simpler content within the regulators node within a PMIC.
Modify all the Tegra device tree files to take advantage of this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-11-05 11:36:04 -07:00
Stephen Warren 217b8f0f35 ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.

Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
  names.
* The AC100 kernel used by the Ubuntu port:

  repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
  branch chromeos-ac100-3.0
  file arch/arm/mach-tegra/board-paz00-power.c

  For many rails, the constraints in that tree specified differing min
  and max voltages. In all cases, the min value was ignored, since
  there's no need currently to vary any of the voltages at run-time.
  DVFS might change this in the future.

In most cases these sources all matched. Differences are:

sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.

sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.

ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.

ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.

Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-09-06 11:48:39 -06:00
Stephen Warren 702b0e4f2f ARM: dt: tegra: rename board files to match SoC
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This
change modifies the Tegra board files to be named the same way for
consistency.

Once a related change is made in U-Boot, this will cause both U-Boot and
the kernel to use the same names for the .dts files and SoC identifiers,
thus allowing U-Boot's recently added "soc" and "board" environment
variables to be used to construct the name of Tegra .dtb files, and hence
allow board-generic U-Boot bootcmd scripts to be written.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-20 12:30:10 -06:00