2 Commits

Author	SHA1	Message	Date
Abel Vesa	a64a9c088b	clk: imx: Fix fractional clock set rate computation ... Before multiplying by PLL_FRAC_DENOM, the temp64 needs to be temp64 = rate * 2 - divfi * parent_rate * 8, instead of: temp64 = (rate * 2 - divfi) * parent_rate Fixes: 6209624b9a ("clk: imx: Add fractional PLL output clock") Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2019-01-24 11:17:28 -08:00
Lucas Stach	6209624b9a	clk: imx: Add fractional PLL output clock ... This is a new fractional clock type introduced on i.MX8. The description of this fractional clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834 Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-03 10:13:34 -08:00