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OpenCloudOS-Kernel
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4 Commits

Author SHA1 Message Date
Boyuan Zhang 44287b7190 drm/amdgpu: add system interrupt mask for jrbc 
Add new mask for enabling system interrupt for jrbc.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-08-27 11:10:10 -05:00
Boyuan Zhang 8709890892 drm/amdgpu: add system interrupt register offset header 
Add new register offset for enabling system interrupt.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-08-27 11:10:09 -05:00
Boyuan Zhang 50613395ab drm/amdgpu: add more jpeg register offset headers 
Add more jpeg registers defines that are needed for jpeg ring functions

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-06-15 12:20:35 -05:00
Feifei Xu b1ebd7c0cd drm/amd/include:cleanup raven1 vcn header files. 
Cleanup asic_reg/raven1/VCN folder. Remove unused vcn_1_0_default.h.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:48:26 -05:00