imx6q-tbs2910 board uses sgtl5000 codec and the machine file (imx-sgtl5000)
already sets SSI in slave mode and codec in master mode, so there is no need
for having this property.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Since restructuring of the device tree files, the USB misc/phy
nodes are disabled by default. Hence we need to enable those
explicitly when USB is used.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use GPIO support by adding SD card detection configuration and
GPIO pinmux for Colibri's standard GPIO pins. Attach the GPIO
pins to the iomuxc node to get the GPIO pin settings applied.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Since pins and frequency are specific to module (pfla02), not base board
(pbab02), it is better to be initialized in corresponding dts file.
This patch fixes i2c2, i2c3 pin configuration which caused messages:
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/i2c2grp
imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/i2c3grp
imx6q-pinctrl 20e0000.iomuxc: unable to find group for node i2c2grp
imx6q-pinctrl 20e0000.iomuxc: unable to find group for node i2c3grp
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add Colibri VF50 device tree files vf500-colibri.dtsi and
vf500-colibri-eval-v3.dts, in line with the Colibri VF61 device tree
files. However, to minimize dupplication we also add vf-colibri.dtsi
and vf-colibri-eval-v3.dtsi which contain the common device tree
nodes.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds more generic base device trees for Vybrid SoCs. There
are three series of Vybrid SoC commonly available:
- VF3xx series: single core, Cortex-A5 without external memory
- VF5xx series: single core, Cortex-A5
- VF6xx series: dual core, Cortex-A5/Cortex-M4
The second digit represents the presents of a L2 cache (VFx1x).
The VF3xx series are not suitable for Linux especially since the
internal memory is quite small (1.5MiB).
The VF500 is essentially the base SoC, with only one core and
without L1 cache. The VF610 is a superset of the VF500, hence
vf500.dtsi is then included and enhanced by vf610.dtsi. There is
no board using VF510 or VF600 currently, but, if needed, they can
be added easily.
The Linux kernel can also run on the Cortex-M4 CPU of Vybrid
using !MMU support. This patchset creates a device tree structure
which allows to share peripherals nodes for a VF6xx Cortex-M4
device tree too. The two CPU types have different views of the
system: Foremost they are using different interrupt controllers,
but also the memory map is slightly different. The base device
tree vfxxx.dtsi allows to create SoC and board level device trees
supporting the Cortex-M4 while reusing the shared peripherals
nodes.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The clock controller module (CCM) has several clock inputs, which
are connected to external crystal oscillators. To reflect this,
assign these fixed clocks to the CCM node directly.
This especially resolves initialization order dependencies we had
with the earlier initialization code: When resolving of the fixed
clocks failed in clk-vf610, the code created fixed clocks with a
rate of 0.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The LS1021A TWR is a low cost, high-performance evaluation,
development and test platform supporting the LS1021A processor.
It is optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.
For more detail information about the LS1021A TWR board, please
refer to LS1021A QorIQ Tower System Reference Manual.
Signed-off-by: Chao Fu <B44548@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The LS1021A QorIQ development system (QDS) is a high-performance
computing evaluation, development and test platform supporting
the LS1021A processor. The LS1021A QDS is optimized to support
the high-bandwidth DDR3LP/DDR4 memory and a full complement of
high-speed SerDes ports.
For more detail information about the LS1021AQDS, please refer to
the QorIQ LS1021A Development System Reference Manual.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Chao Fu <B44548@freescale.com>
Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On registration I2C bus drivers attemp to get ids from device tree
aliases, add a missing alias for I2C4 found on iMX6 DualLite/Solo.
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
TBS2910 is a i.MX6Q based board. For additional details refer to
http://www.tbsdtv.com/products/tbs2910-matrix-arm-mini-pc.html
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add enet2 support for imx6sx-sdb board, and add the "fsl,imx6q-fec"
compatible for fec2 node to be compatible with the old version.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add all required properties for the cpufreq-dt driver.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The Colibri standard defines four pins as PWM outputs, two of them (PWM
A and C) are routed to FTM instance 0 and the other two (PWM B and D)
are routed to FTM instance 1. Hence enable both FTM instances for the
Colibri module and mux the four pins accordingly.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add Global Timer support which is part of the private peripherals
of the Cortex-A5 processor. This Global Timer is compatible with the
Cortex-A9 implementation. It's a 64-bit timer and is clocked by the
peripheral clock, which is typically 133 or 166MHz on Vybrid.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock
for generating bit clock when SSI operates in master mode.
Add the extra 'baud' clock so that we can have SSI functional in master mode.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
SSI block has 'ipg' clock for internal peripheral access and also 'baud' clock
for generating bit clock when SSI operates in master mode.
Add the extra 'baud' clock so that we can have SSI functional in master mode.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Stock firmware on rk3288 does not initizalize the CNTVOFF registers
of the architected timer correctly. This introduces issues with the
newly added SMP support for rk3288, resulting in rcu stalls due to
differing timer values per core.
There exist preliminary and tested patches for u-boot for this problem,
but there are a minority of boards using other bootloaders like coreboot.
There also is currently a second solution for miss-initialized architected
timers in the works:
- clocksource: arch_timer: Fix code to use physical timers when requested
- clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
Therefore disable smp on rk3288 again till these are finalized, also
allowing coreboot-based boards to boot again.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
sclk_mfc is required for MFC device since commit
0c2272170d ("media: s5p-mfc: rename
special clock to sclk_mfc"), so add it to exynos4 dts.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This ensures the core and the audio subsystem clocks are configured
properly, as expected by the sound machine driver. These bits are
missing to obtain proper audio sample rates in kernel v3.17, where
audio support for Odroid X2/U3 was first added.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The HP Chromebook 11 uses an Atmel maXTouch as trackpad.
The keymap was found by trial-and-error.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Spotted in the Chrome OS 3.8 based device tree.
Needs CONFIG_SENSORS_LM90.
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Reported-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds max77693-haptic node to support for haptic motor driver.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add PWM(Pulse Width Modulation) node and
handle to use pwm property.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Specify the default mux and divider clocks in device tree
to ensure the FIMC devices on Trats, Trats2, Universal_c210
and Odroid X2/U3 boards are clocked from recommended clock
source and with maximum supported frequency.
For Trats2 also the MIPI-CSIS and the camera sensor clocks
are configured, the 'clock-frequency' property is deprecated
in favour of 'assigned-clock-rates' property.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables support for TMU at Exynos4412 based Trats2 board.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The TMU device tree node definition for Exynos4x12 family of SoCs.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Synology DS414 is a 4-bay NAS powered by a Marvell Armada XP
(mv78230 dual-core @1.33Ghz). It is very similar on many aspects
to previous 4-bay synology models based on Marvell kirkwood SoC.
Here is a short summary of the device:
- 1GB RAM
- Boot on SPI flash (64Mbit Micron N25Q064)
- 2 GbE interfaces (Armada MAC connected to two Marvell 88E1512
PHY via RGMII)
- 1 front USB 2.0 ports (directly handled by the Armada 370)
- 2 rear USB 3.0 ports (handled by an EtronTech EJ168A XHCI
controller on the PCIe bus)
- 4 internal SATA ports handled by a Marvell 88SX7042 SATA-II
controller on the PCIe bus)
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a Microchip PIC16F883)
Additional note: the front LEDs the and the two fans are not directly
connected to the SoC and under its control. The former are presumably
driven by the SATA controller, the latter by the PIC.
[ jac: fixed up s/ge[01]_rgmii_pins/pmx_ge[01]_rgmii/ to match
armada-xp.dtsi ]
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/5b678d6d1f2f42f4bf0d087878b9d8024d463ea7.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Synology DS213j is a 2-bay NAS powered by a Marvell Armada 370
(88F6710 @1.2Ghz). It is very similar on many aspects to previous
2-bay synology models based on Marvell kirkwood SoC. Here is a
short summary of the device:
- 512MB RAM
- boot on SPI flash (64Mbit Micron N25Q064)
- 1 GbE interface (Armada MAC connected to a Marvell 88E1512
PHY via SGMII)
- 2 rear USB 2.0 ports (directly handled by the Armada 370)
- 2 internal SATA ports handled by the Armada 370: 2 GPIO for
presence, 2 for powering them
- two front amber LED (disk1, disk2) controlled by the SoC
- Seiko S-35390A I2C RTC chip
- UART0 providing serial console
- UART1 used for poweroff (connected to a TI MSP430F2111)
- Fan handled via 4 GPIO (3 for speed, 1 for alarm)
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/20f1a03897df1d825b62abdd525e588a8e39b3ec.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch defines common Armada XP pinctrl settings in armada-xp.dtsi
for the supported SPI interface (MPP36-39) and use it as default
for Armada XP spi interface. That being done, it removes the now
redundant definitions in armada-xp-axpwifiap.dts.
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their spi interfaces if the default
above does not match their config (i.e. if they do not use CS0).
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/d404b7abd80ee5a0fd8e8d3586d33cd37740d589.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch defines common Armada XP pinctrl settings for uart2 and
uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP):
uart2: MPP42-43 as default
uart3: MPP44-45 as default
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/fd51c080c7139a67ec01df8d797f1e88ce557796.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch defines common Armada 370 pinctrl settings for uart0 and
uart1 interfaces:
uart0: MPP0-1 as default
uart1: MPP41-42 as default
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their uart interfaces if the default
above does not match their config.
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/31412e57955c98bc9cc47b70726b5072af945cc3.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch defines common Armada 370 pinctrl settings for spi0 and spi1
interfaces:
spi0: MPP33-36 as default, MPP32,63-65 as available alternate config
spi1: MPP49-52 as default
Currently, the Armada 370 DB .dts file has no explicit pinctrl info
for the spi0 interface used to access the flash on the board. The
patch fixes that by also adding explicit pinctrl info (MPP32,63-65)
for this SPI interface.
Note: this patch has the potential to break out-of-tree users w/o
specific pinctrl settings for their spi interfaces if the default
above does not match their config.
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/1e812eb63b37718e273463e22e4d7512f8f0b624.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
What was done by Sebastian in 264a05e19b ("ARM: mvebu: armada-xp:
Add node alias to pinctrl and add base address") and 01c434225e
("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for
Armada 370, i.e.
- Rename Armada 370 pinctrl node to pin-ctrl with its address encoded
- Add a node alias to access the pinctrl node easily.
- use the newly available alias in existing Armada 370 .dts files
We can even go a bit further by putting the pinctrl node definition in
armada-370-xp.dtsi, with only its reg property defined. This allows us
to then also use the newly defined node alias in armada-xp.dtsi,
armada-370.dtsi.
Suggested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that labels for uartX are available in Marvell Armada .dtsi files,
this patch replaces the "/soc/internal-regs/serial@12000" found in
armada-xp-lenovo-ix4-300d.dts file for stdout-path property by the more
concise &uart0.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Suggested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/d1a883510e01f7f212a385e826dccbef903fae42.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds uartX labels for Armada SoC serial nodes. This is
a preliminary work to be able to easily reference the serial lines
in Device Tree files. One expected use is when providing stdout-path
property for barebox.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/0683d1a823fe9b75849f3dafcf1cf6ee291cdca6.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
As reported by Andrew, the vendor prefix for Seiko Instruments, Inc.
S-35390A I2C RTC chip in kirkwood-synology.dtsi has a typo (ssi
instead of sii). This patches fixes it.
Note: i2c devices ignore the optional vendor prefix, which explains
why it worked with the typo and also why there is no backward
compatibility issues with the fix.
Reported-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Link: https://lkml.kernel.org/r/0444140a267d982c3e5f5f2b7b5f2dc41d010e2a.1416613429.git.arno@natisbad.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Commit a095b1c78a ("ARM: mvebu: sort DT nodes by address")
missed placing the system-controller in the correct order.
Fixes: a095b1c78a ("ARM: mvebu: sort DT nodes by address")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/20141114204333.GS27002@pengutronix.de
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to update MAC address entries in the ethernet nodes in Device Tree
both mainline U-Boot and Barebox bootloaders accept the same format of aliases,
which is 'ethernetX', where X stands for an interface number.
Other platforms in the mainline Linux, that comprise ethernet references in
'/aliases' node (like various flavours of imx or sunXi), follow the naming
scheme described above.
This commit ajusts ethernet aliases of Marvell Armada 38x SoC to be properly
recognized by bootloaders' MAC address fixup routines.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-5-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
For proper operation of Armada 38x SDHCI controller proper 'clocks' property
is sufficient. Therefore it is not useful to keep an additional
'clock-frequency' property in SDHCI controller node of board-level Device Tree
file for Armada 385 DB.
This commit gets rid of useless 'clock-frequency' property.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-4-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell Armada 38x SoC's SDHCI interface is capable of using 1.8v voltage,
needed for driving "UHS-I" SD cards at their full speed. It is not, however,
possible on the DB board. Due to physical connectivity connector supply is tied
to 3v and any attempt of changing voltage in order to operate in the fastest UHS
modes fails.
This patch enables equivalent SDHCI quirk in order to adjust controller
operation to system capabilities.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1415980652-7429-3-git-send-email-mw@semihalf.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds tscadc DT entries for am437x-gp-evm
and am43x-epos-evm.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add node for RTC.
Note that on dra7xx are no separate interrupts for alram
and timer unlike for SoCs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[nm@ti.com: update with rtc crossbar number]
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds support for the N900's battery to the
Nokia N900 DTS file.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The HDMI node does not have a power supply attached. As a result its
power regulator, VDAC, shuts off on boot and screen loses signal.
This attaches VDAC (vdda_hdmi_dac) to HDMI's vdda-supply.
Signed-off-by: Adam YH Lee <adam.yh.lee@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since commit e409dfbfcc ("ASoC: dapm: Add a few supply widget sanity
checks") the following error is seen:
imx-wm8962 sound: wm8962 <-> 202c000.ssi mapping ok
imx-wm8962 sound: Connecting non-supply widget to supply widget is not supported (AMIC -> MICBIAS)
imx-wm8962 sound: ASoC: no dapm match for AMIC --> (null) --> MICBIAS
imx-wm8962 sound: ASoC: Failed to add route AMIC -> direct -> MICBIAS
Invert the route between the microphone and the bias in order to fix it.
While at it, align the audio routing with imx6sl-evk and imx6sx-sdb, which have
the same wm8962 circuitry.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6qdl-rex boards use sgtl5000 codec and the machine file (imx-sgtl5000)
already sets SSI in slave mode and codec in master mode, so there is no need
for having this property.
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6qdl-gw5x boards use sgtl5000 codec and the machine file (imx-sgtl5000)
already sets SSI in slave mode and codec in master mode, so there is no need
for having this property.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use IMX6QDL_CLK_CKO definition instead of its hard coded clock number for better
readability.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds the NovaTech OrionLXm which is based on the AM335x SoC
http://www.novatechweb.com/substation-automation/orionlxm/
RAM: 512MiB
Flash: 4GB eMMC
Ethernet PHYs: 2x Micrel KSZ8041FTLI
USB ports are used internally by the expansion cards.
Internal micro SD slot is available.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- OMAP4/5: DSS hwmod cleanup patches from Tomi Valkeinen.
- DRA7xx: hwmod data support for UARTs 7 through 10.
- AM43xx: hwmod data support for the onboard ADC.
Basic build, boot, and PM test reports are here:
http://www.pwsan.com/omap/testlogs/omap-b-for-v3.19/20141121110550/
Note that I cannot test the DRA7xx or AM43xx patches, since I do not have
these boards.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUb48LAAoJEMePsQ0LvSpLiGoQAJvUltt1gZNMJ9gV0MWDnWKe
pexUhSDGdNZG20rKH3NXgdwbY3AycO77rZJh+Gcez9IoEWJU4SwAkgRUbgEIdprW
MDJ74WaRExg+j/FI6oHZ/mIKXS2GZlhu2eaeGB1bIEmDAmsxbaC5szISc3wygISp
7TJA/FDExDqzX4XY+ySC8gTf2iBqT5t4m78wbUo9onYVy7YVmIujDxfkYBnlXAXP
Jue1KVNVrzE6p05H7rDLyRezdpRKseZ0rsPN4aoRGmeJJl8mR85473o6QlYmnY+E
UCwoa36wVFnFYkUxP3qIEoXvnYA9cRL0l2zegAq0aYUKAgYHWt2eBRvCs90yehiq
v88GtQ1TS4mFjxbPLO1F9XWKoLu8N1v5g4xADE+kr64hwYHL0NLfBN3M4zyewlYE
NZ6c/zmYRFZ0CPFRBVzfcJ1PExB9XS8IDxjpvZaUNnb/AlcGw3mggUAN/qTYXBvZ
UIHEZUx2fxq30TkIPBI/BhBqRqxqMdIBjJhvsP0Kx3ZtivFnMIH/dPc8UdmVOqOv
d6BZYgLQMf0pgtuYOdP6FSYdfAbPfqKvAE4jfdxAld+LAmNtbURdKG5Xyl2N1lSq
ilWcRnsK6R2alxMi2xOXZhFWSP1cYHOmD1gsfLOZ0NieOHjoE6Zais/BFQu3N3xP
6O5w6cJRljIc5BlDG87A
=zeC6
-----END PGP SIGNATURE-----
Merge tag 'for-v3.19/omap-b2' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.19/soc
Several more OMAP patches targeted for v3.19. They include:
- OMAP4/5: DSS hwmod cleanup patches from Tomi Valkeinen.
- DRA7xx: hwmod data support for UARTs 7 through 10.
- AM43xx: hwmod data support for the onboard ADC.
Basic build, boot, and PM test reports are here:
http://www.pwsan.com/omap/testlogs/omap-b-for-v3.19/20141121110550/
Note that I cannot test the DRA7xx or AM43xx patches, since I do not have
these boards.
- Add DTS support for a new chip in the SOCFPGA family, the Arria 10.
- Enable watchdog node.
- Add SPI nodes.
- Add the OCRAM node.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJUbslHAAoJEBmUBAuBoyj0R0EP/2nF0rHzM7s9TivfLLnknwu5
UCPFkuB9DFsfBn6XauAjuioY2/K1yugU5Xh4IyKgXfOdUYDRxT18FzltJl8Tk25h
yx7tm5DlukQ68sdKgcSNMXgH1VNR0zV0k0P1PBjdB2W78DGpQTi5KUDb29a6wk7a
g7pYnhrzlKgLVfAazhxsD/N2o+ImxFvsVpdQBxi4/oR5zgYEoLbv6i4CKzPBrPv9
T/v4MP9E9p8tviSpuj99plMZN8w4uBQ7Clc1xCrh8y+KvKRjViFnUZPXFZHnPENs
XnqPuDyHvMxYEKQgrSDO5GQ4USUFM+TTSKGSobkCYYmaw53F+g6FxYTCDkubyCW/
v9OAH5t3lQf3P8SyHdZ2hhGH4EAoTzxC7uYJes/JdjxZgBHpfZv/bj3MGMI6r+w8
5rUF8ueipQjVOVJtr2YkkGM9U0CFw1dBGFBGk3eMrXPV418fcrIJZkRoDwdnvpQj
I8sG1rEoZHAbPOu2ejyxVAlvHF5uy7HAXpt3ktekJV70DtcNTUpREbMso7fksEzL
xufDmwe/BjUzJBFsVhZZLULUlHt1rZLYHXOn/NdfBEWluT4+uhc+1DcsCsc99Bhe
AIUMX+ngDpWZazxRGhzlOxdzi9dhuN1pFtJlXuj2wBhVNdivac4OjgBgFYWu9lpZ
cC/byWHasY2Kyyi1+tDd
=sh1R
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_updates_for_v3.19' of git://git.rocketboards.org/linux-socfpga-next into next/dt
Pull "SoCFPGA DTS updates for v3.19" from Dinh Nguyen:
- Add DTS support for a new chip in the SOCFPGA family, the Arria 10.
- Enable watchdog node.
- Add SPI nodes.
- Add the OCRAM node.
* tag 'socfpga_dts_updates_for_v3.19' of git://git.rocketboards.org/linux-socfpga-next:
arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC
arm: dts: socfpga: enable watchdog for socfpga platform
arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.
arm: dts: socfpga: Add OCRAM node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add labels for LEDs on kzm9g-reference and koelsch
* Add Sound support to r8a7790/lager and r8a7791/koelsch
* Add IIC DMA nodes to r8a7790 and r8a7791
* Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
* Add SGX, MMP and VSP1 clocks to r8a7794
* Add USBDMAC{0,1} clocks to r8a7790 and r8a7791
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUbbZkAAoJENfPZGlqN0++A0gQAJ5bs24c0fRzIPXrkeIzY0aQ
262nBv175LG8wihixOAJB/jiTPSpaZavlR+iXYq2iU+IqkkwIzFtdNs4q/ZMdppW
J7LPUj0DwJe6+B8AYhSsSDDNW0P4avBXfU4rFXzLp2IkAqi/HdxJjB3/9C5Nzi7b
mpsTvz3x4iP2NZdEKIDGtMBwtjghsfKBRaLsgNow+JdxLDLuWKWjaR8PMxvF1LFa
Z/jz343PmFGCaWypq5HVyu+h3eNvh9HpOUleurGijXzoZl61U1SDceTygfbF+Ht2
nNq8gqynokYWfmDQa8HJlPEmeCFhDtBHc9NNPJBEOCv7pWWdsXgfEYW5OepH+xzp
FqfXM2DwKVMDcSL3LDwXYT1xZQfI8KUDg6ek5gXk8pDDpVhAb2ishEt+Vr3zEL+H
uro9wruHl8lYujq9P4Jmh9icl2fMx3hXIoq3PVkzOkmJhViwSm55pqlAAVN72d4u
xIthmwmvQ/zsvn5RwV3jmWUlwlYJmMz2gXqtsq+9NUy55yUMqjeSB9kchTzrM6SJ
CzfiCl5j2SC6jiCNGsiFjI603kdIKq0uvaLQStEAHoWJkuf+jEWmfjV9qPptE+sa
rPhIhWUXqs5Emw3DgQynIOy+szTWlg1hJl9MDF/SaeiyZ/dh/teqIoYhAjfqlCFS
7etGw24D7YujpG9jlfC4
=0cH9
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman:
* Add labels for LEDs on kzm9g-reference and koelsch
* Add Sound support to r8a7790/lager and r8a7791/koelsch
* Add IIC DMA nodes to r8a7790 and r8a7791
* Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4
* Add SGX, MMP and VSP1 clocks to r8a7794
* Add USBDMAC{0,1} clocks to r8a7790 and r8a7791
* tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: shmobile: r8a7791: add USBDMAC{0,1} clocks to device tree
ARM: shmobile: r8a7790: add USBDMAC{0,1} clocks to device tree
ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree
ARM: shmobile: r8a7794: Add SGX clock to device tree
ARM: shmobile: koelsch: add Volume Ramp usage on comment
ARM: shmobile: lager: add Volume Ramp usage on comment
ARM: shmobile: r8a7791: add DMA nodes for IIC
ARM: shmobile: r8a7790: add DMA nodes for IIC
ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs
ARM: shmobile: koelsch dts: Add labels for the LEDs
ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties
ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible properties
ARM: shmobile: koelsch: Sound DMA support via DVC on DTS
ARM: shmobile: koelsch: Sound DMA support via SRC on DTS
ARM: shmobile: koelsch: Sound DMA support via BUSIF on DTS
ARM: shmobile: koelsch: Sound DMA support on DTS
ARM: shmobile: koelsch: Sound PIO support on DTS
ARM: shmobile: koelsch: fixup I2C2 clock frequency
ARM: shmobile: lager: Sound DMA support via DVC on DTS
ARM: shmobile: lager: Sound DMA support via SRC on DTS
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- AHCI and SATA PHY nodes for BG2
- USB and USB PHZ nodes for BG2/BG2CD/BG2Q
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUbm0pAAoJEN2kpao7fSL4RW8P/A+0U0qoj8FbBpDwiwhjADwG
4327uzYbI+TG1fajJYxbDlMzvDNjRXb2yRb/eivgEoY7LsLR7Vbi1mwKsNAqH6+6
n1RRtil1Rir4nILN2gnN911O24owGkvOUV4CN14uzDLR6K/smoaSYFcfFH6FS6Os
NaYccrpobWCb4tZKjWPxo8FuknmTD+siUQmZRtazToWd9xiir7RhKwSrX8i/1jNp
6vuhtn4L2nTZhycFjl1RZI6sZBOKtVBRD6yiuUSc6YjUPo+UEpaZdYQwcjOu906R
c/99RgPa1ThN4OGYnGdco4grnSYU5hta0/xvVgaWXVDXie2Gg/gE3TCKzM6iWT2b
EIWL8sCAOvHs8qTyknRukSGREPaTlcxMt+nogz6iD60+Dv//AJziJSqGnzGPDPSO
Ud4hshdScwSGRZHfa0GRk3b2Y6P5F+gf2YuJuMcuWqz6kN5bbnQl3YvNYCiypvNH
PWalrCaV8xS5UqN2JsRinJioUnVcGRBikfY/09xTLcweizZdXyoXjVvsNf7i5tPu
XgyuXZob7uHwjJn6rQ2YsVeDQW/WPZ+df+da5Atq3xAnhAEuIgY74SPrRugdzdJQ
r59v6YdSauMJdh5xJ1pNsaWDMJ7mGkv2E8txXOazWVWErfaI57lRwepXz99UgXBa
RIUUPggoO/lrecw5c5mb
=ZS1m
-----END PGP SIGNATURE-----
Merge tag 'berlin-dt-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Pull "Berlin DT changes for v3.19 (round 2)" from Sebastian Hesselbarth:
- AHCI and SATA PHY nodes for BG2
- USB and USB PHZ nodes for BG2/BG2CD/BG2Q
* tag 'berlin-dt-3.19-2' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: enable USB on the Google Chromecast
ARM: dts: berlin: add BG2CD nodes for USB support
ARM: dts: Berlin: enable USB on the BG2Q DMP
ARM: dts: berlin: add BG2Q nodes for USB support
ARM: berlin: Enable SATA on Sony NSZ-GS7
ARM: berlin: Add AHCI and SATA PHY nodes to BG2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Arria 10 is latest SOC+FPGA from the Altera SOCFPGA platform. The Arria10
SOC shares some similarities with the SOCFPGA Cyclone5 and Arria5, but there
are enough differences to warrant a new base dtsi.
The differences are:
* 3 EMAC controllers
* 5 I2C controllers
* 3 SPI controllers
* 1.5 GHZ dual A9s
* Support for DDR4
Besides the usual memory map and IRQ changes, the clock framework will be
different, so this patch just adds the fixed-clocks.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
- rate init for rk3288 clocks
- enablement of various peripherals
- new boardfile for Haoyu Marsboard (rk3066 based)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJUa1KSAAoJEPOmecmc0R2BuUsIAKC74yQhApYDPib1o8PrtW4I
f8N41vfF+zrxUHYOAIZUMCjNuaBBagnvlXe6EmGZ9crQhThMytEKUP4rG2pkScw5
+MKF2aw4sKUHPDDZ0n9VMVMW0i0HfkVlhB921cDfhKVcBpGE44YNusC5+1wsa+8r
USGDl0EVTSMyAjXD/ogSqberQBBfFc4eqS0H+ZkCmA/saKa+tLpH0heqY/prq3FU
mryXryGIUkCSwN7CB/lt45jT6qfb1UdNOgahK24lt2EmH9R/0IIrqzI8dOf6mnSA
lBKnLPazbes0jny2iJSVfNQmlgWodpPY3kNEwxho4LrYhu+sTzW2oKMZrAXTxqY=
=j7JA
-----END PGP SIGNATURE-----
Merge tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "ARM: rockchip: second batch of dts related changes" from Heiko Stuebner:
- the dts part of the rk3288 smp support
- rate init for rk3288 clocks
- enablement of various peripherals
- new boardfile for Haoyu Marsboard (rk3066 based)
* tag 'v3.19-rockchip-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: enable PWM on Radxa Rock
ARM: dts: rockchip: fix invalid unit-address in rk3188.dtsi
ARM: dts: rk3288: add VOP iommu nodes
ARM: dts: rockchip: add reset for CPU nodes
ARM: dts: rockchip: add intmem node for rk3288 smp support
ARM: dts: rockchip: add pmu references to cpus nodes
ARM: dts: rockchip: add serial aliases for rk3066 and rk3188
ARM: dts: rockchip: Add devicetree source for MarsBoard RK3066
ARM: dts: rockchip: Add EMAC Rockchip for RK3066 SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A lot of things happened during that merge window, but mostly:
- Preliminary Support for the A80
- New Boards Support
+ Mele M3
+ Banana Pi
+ Optimus
+ OLinuXino Lime2
- Device Tree Relicensing to GPLv2/X11 dual license
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUa8GwAAoJEBx+YmzsjxAgswkP/Rf1EwwEbQYnIDJaSbK6/okS
DYo9Sv2b3drI6sOR5TduYY7tH9DchCootb5YtLSboZTieEOrmM2VHwV/ZRMcKRXD
OglmS6EcSkXTCs05X2dPtvnRxNQxzebmD64V1AmQylIuOBQQL2mW2FqHYH5JtGQ8
UXj1RNAOwBuCWFwxsiUt92seQZOVMsHjeEyTDuCBFw0QbVpDdaJ5OBrNxDY2nrKp
XzbMUvVBoPQXk65KBXvxL6l5yGKEyRxXXYNEtf6tb7bj8tfSst9fqVQgK6/V073+
oJn+Fr4qHSr7PmRkWkVKjS7UIZdkip2SKrdkZPJeowGRLKFDGafCsc95FCKbo9B4
RbBS6adETilkSpkVUh2amg6F+o1DnzNleeeEDrGEoDfumaLU567vN/VWeQralgwC
9uDYfy7f3MHBt7mp8aMnE4N6cOY99yHILSv2AI7ndzo1iXR+l2tYcRgj9P6eXkxq
/ytSCN477IMdFzwStHngzqyYAtfKsjJoGH1dComqEjDvorSNWDFY7odW43hEWzZF
cW/vAs6Jitofn70PbpSTNJrjzGAJbEqAv9llBMubSkcq8Uxfk6ZF53ahbAEPh177
Xqtd2QLyB+oOPbF/pbqkM19an/XDa9ZmZAQEBX3c38KTp5GfdpZV9CroClWwNXDH
kJg8WRAtjWIjd8n/THBA
=dKZr
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner Device Tree Changes for 3.19" from Maxime Ripard:
A lot of things happened during that merge window, but mostly:
- Preliminary Support for the A80
- New Boards Support
+ Mele M3
+ Banana Pi
+ Optimus
+ OLinuXino Lime2
- Device Tree Relicensing to GPLv2/X11 dual license
* tag 'sunxi-dt-for-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (52 commits)
ARM: dts: sun6i: Add ethernet support to M9 board
ARM: sun6i: DT: Add PLL6 multiple outputs
ARM: dts: sun6i: Add support for the status led
ARM: dts: sun6i: Add EHCI support for the M9 board
ARM: dts: sunxi: Add regulator-boot-on property to ahci-5v regulator
ARM: dts: sun7i: Cubietruck: add power supply regulator for USB OTG VBUS
ARM: dts: sun7i: Cubietruck: override regulator pin
ARM: sun7i: dtsi: add support for usbphy0
ARM: dtsi: sunxi: add common VBUS regulator
ARM: dts: sunxi: Banana Pi: increase startup-delay for the GMAC PHY regulator
ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks.
ARM: dts: sunxi: unify APB1 clock
ARM: dts: sun6i: Re-parent ahb1_mux to pll6 as required by dma controller
ARM: sun5i: olinuxino: Relicense the device tree under GPLv2/X11
ARM: sun4i: cubieboard: Relicense the device tree under GPLv2/X11
ARM: sun7i: pcduino3: Relicense the device tree under GPLv2/X11
ARM: sun4i: pcduino: Relicense the device tree under GPLv2/X11
ARM: sun7i: olinuxino lime: Relicense the device tree under GPLv2/X11
ARM: dts: sun9i: Enable uart4 for A80 Optimus board
ARM: dts: sun9i: Add uart4 pinmux setting for A80 SoC
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "ARM: meson: DTS related changes" from Carlo Caione:
here is the pull request for the DT related changes for the 3.19.
It's mainly the work done by Beniamino for the preliminary support of
the Amlogic Meson8 SoC, the support for L2 cache and the I2C
controller.
Please note that the support for the Tronsmart S89 Elite TV box has not
been included since the Meson8 development will be done now on a
different dev board kindly provided by Amlogic.
* tag 'v3.19-meson-dts' of https://github.com/carlocaione/linux-meson:
ARM: dts: meson: add I2C controller nodes
ARM: meson: DTS: enable L2 cache
ARM: dts: add dtsi for Amlogic Meson8 SoCs
DTS: meson: Add forgotten compatible in board DTS
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
top of the multiplatform patches, this moves out
some drivers and reduced the amount of code carried
in arch/arm/mach-integrator.
- Move the Integrator/AP timer to drivers/clocksource
- Move the restart functionality to the device tree,
patches to enable restart for the Integrator have
been merged to the reset tree (orthogonal)
- Move debug LEDs to device tree (using the syscon
LED driver merged for v3.18)
- Move core module LEDs to device tree (using the
syscon LED driver merged for v3.18)
- Move the SoC driver (chip ID etc) to
drivers/soc/versatile/soc-integrator.c
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUavcgAAoJEEEQszewGV1zxHgP/3i1LxdQ+B1ztOpZRZ+Bi4iQ
5KU9j93eMMTlZ3nASvRBIx4MgnUVItuUQ5idnmATCDfoP2lhj/JWPw7G5vyEvRoj
2yuTB9IoutGoTPm58UeglPPedwcv2Lc9p7Boz/cnZVc4KfLldU66yoIV+s1vlijN
OAhgOyShIjLUv5ikwNPRAjEXw7fJZc6ixhTt/EJrPbiMhjkXMKJs/SXovzhOw25a
UVmMu36rwnVyQllfoS4yd+wpHa+Jg6ZhxH3nIveQpEVt8MOukOPiYa5ePmglXpkF
B0u0vaACrZfiPCeQL3RD4LN8Z9QLR9Mt1VDbFkWnTRTKdNA034dhIoD0ZxsoGepb
cV9QfA1n1Q6hKUqg59PfZv4MKwPXA1TmF5J3ZBNL1xK+bsRBHZmBq1dKg4rww1bu
tyxJfg3LmUCQe5PkcT7HZJFv1yXnEXduXUX0TYclPhp+GnAyudwNkw4/7mmz2gPT
XEhd64xjB+yVyzN8zu34KIrsDvv/Z7CyKzYAsaR+yY4DbUuh2p2sNupCnci4Hs/k
PO09w76mxRulFBVw5ZuLBzevPpa3hasny05bqnku6/VTp1RfOM+5i60B/gGnIWFo
KLxaDcvbyuP+nAdQIl+/X8Zv0tQ0KAqlZFvgroxCeUtF5JwXlbdYbbVEO0FVmMB/
TjfE+8xCchI2cZPci9J2
=rplU
-----END PGP SIGNATURE-----
Merge tag 'integrator-v3.19-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
Pull "ARM SoC Integrator updates for v3.19" from Linus Walleij:
Integrator updates for the v3.19 merge cycle on
top of the multiplatform patches, this moves out
some drivers and reduced the amount of code carried
in arch/arm/mach-integrator.
- Move the Integrator/AP timer to drivers/clocksource
- Move the restart functionality to the device tree,
patches to enable restart for the Integrator have
been merged to the reset tree (orthogonal)
- Move debug LEDs to device tree (using the syscon
LED driver merged for v3.18)
- Move core module LEDs to device tree (using the
syscon LED driver merged for v3.18)
- Move the SoC driver (chip ID etc) to
drivers/soc/versatile/soc-integrator.c
* tag 'integrator-v3.19-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
soc: move SoC driver for the ARM Integrator
ARM: integrator: move core module LED to device tree
ARM: integrator: move debug LEDs to syscon LED driver
ARM: integrator: move restart to the device tree
ARM: integrator: move AP timer to clocksource
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds critical trip points to the Jetson TK1 device tree.
The device will do a controlled shutdown when either the CPU, GPU
or MEM thermal zone reaches 101 degrees Celsius.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
This adds the soctherm thermal sensing and management unit to the
Tegra124 device tree along with the four thermal zones corresponding
to the four thermal sensors provided by soctherm.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Add a DT node for the TRNG (True Random Number Generator) block.
Keep this block enabled as it does not depend on any external connection,
and thus should be available on all boards.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
all other nodes in bcm63138.dtsi use "interrupts", this had to be just a typo
which never got noticed, even it may have quite some consequences.
Signed-off-by: Radek Dostal <radek.dostal@streamunlimited.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUZiGhAAoJELQ5Ylss8dNDs6oQAIVbGnJA4j2ajIGQmUuTVCdy
8S+QfAogEem3ZSpeG/Ku8UgV6QCbfF/gg/++hoXn5XyR8pl8Mk6lh+3mfpiJr/Bt
zVPmqxaS4cRbDToBpMah05YMBwDoG3C/zArGglKJDMQV+TIzid/fDcyAH4Z6LqpL
vS+kAm8ovTiCLIFLgXeimhxldPhP4xcVE+i0t2hfGzyTglmJJvn1YwCpMgkfBazM
D9xkZIcoI0YgNkqFfiCfVRPxm6Tb95kYtUn6XwwQwJUx5pKW/uwSx54tf9sV2myQ
0UsuMGtBb2CIraPsAvY67ndC3lcA1f/RpaA2cjJyaDg+EYNr44nLbu14v4+xqoo6
Ud6iXjrzqa/pfACdRmUaWhReCFdmrHceuVd4hYPBvMRsCSNVjLnDVLr1LwVqpPv0
Nsxtzjw2s3+M43mBZfrva8lJVas/OgxGEk1JlufXFirfZBEyPiSGy7gxtQ/lm+kM
aSpCsreIOcTjkN2MXNea3BWOLo/vHzoMEvQeqo2EwYqTjNqYMS5mdMvIvEJcxUVa
uLWTf6SjcEeEVKamZ9Y3m6uIOgZv2KiQzeibaxccDCZG4DH2QR6IJvzQYEgI1Ui2
MXxrLY0SFp4G1UKv/nXalMDwI/HreGQGCCenlWyABv6/7/qiLX27CkVU8I5WOuod
31+J0spYkykFJ9vee9qC
=DrlM
-----END PGP SIGNATURE-----
Merge tag 'v3.19-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
Pull "Add support for mt6592, mt8127 and mt8135 Socs from Mediatek"
from Matthias Brugger:
Here comes the pull request which introduces basic support for
Mediatek SoCs mt6592, mt8127 and mt8135.
The patches for the mt81xx got merged in the late tree for v3.18 but
were not be merged at the end. They got a small fix regarding the
compatible and model string in the dts files.
* tag 'v3.19-next-dts' of https://github.com/mbgg/linux-mediatek:
dt-bindings: add documentation for Mediatek SoC
ARM: mediatek: add dts for mt6592-evb
ARM: mediatek: Add basic support for mt6592
dt-bindings: add more chips in documentation for Mediatek SoC
ARM: dts: Build dtb for mt8127 & mt8135
ARM: mediatek: add dts for MT8135 evaluation board.
ARM: mediatek: Add basic support for mt8135
ARM: mediatek: add dts for 8127 Moose board
ARM: mediatek: Add basic support for mt8127
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
- some trivial fixes: macro for IRQ, license wording
- DMA description for sama5d4
- RTT as RTC driver definition plus associated GPBR for several SoCs
- addition of missing nodes: rtc for at91sam9rl, isi for at91sam9g45
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJUbMTeAAoJEAf03oE53VmQnG0H/1EDeVYZhOaFkCyLjNsrQhLt
w080xpUDwRRKYbUP/RJvRp7BcArwe650xncaWjh7tLrA3BZQ5WAMeNggFjUofykr
uNzE2ZuIfeW08g7OEo7tFuZxKsejW14e0ezyR64hClFON1S2+kHtOkBe8Vxd0VPc
LG3W2UoPLK6rzzYKO6vRzm8k0Ah27dhbDhhN+Z52DstQ+bx0fWEF0Y9bTx/pszlJ
YGuDnGBruyIkAxtZYbqQ8UXH3uB8FeT9VOPYG8ADIdQgEPchOoHxy56yKVXa7tKo
PP/HUE2fZ4tNv6eSVi/P5ZVCD+ycoevwfOGk+NJKwzoIwMMVfdYAlrnorWfplsk=
=3QgK
-----END PGP SIGNATURE-----
Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt2
Pull "Second DT batch for 3.19" from Nicolas Ferre:
- some trivial fixes: macro for IRQ, license wording
- DMA description for sama5d4
- RTT as RTC driver definition plus associated GPBR for several SoCs
- addition of missing nodes: rtc for at91sam9rl, isi for at91sam9g45
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: at91sam9g45: add ISI node
ARM: at91/dt: enable the RTT block on the at91sam9m10g45ek board
ARM: at91/dt: enable the RTT block on the sam9g20ek board
ARM: at91/dt: add GPBR nodes
ARM: at91/dt: add RTT nodes to at91 dtsis
ARM: at91/dt: at91sam9rl: add rtc
ARM: at91: fix GPLv2 wording
ARM: at91/dt: sama5d4: add DMA support
ARM: at91/dt: sama5d4: use macro instead of numeric value
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull "Broadcom Cygnus SoC Device Tree changes" from Florian Fainelli:
This pull request contains the Broadcom Cygnus Device Tree changes:
- binding documentation for the SoC and clock
- cygnus SoC and clock dtsi files
- DTS for Cygnus Entreprise phone, BCM911360K and BCM958300K
* tag 'arm-soc/for-3.19/cygnus-dts-v2' of http://github.com/brcm/linux:
ARM: dts: Enable Broadcom Cygnus SoC
dt-bindings: Document Broadcom Cygnus SoC and clocks
[arnd: something went wrong here, we already had pulled an earlier
version of the same patches, which had the wrong license statement.
I've pulled this one over the old pull request and fixed up the
conflicts now]
Conflicts:
arch/arm/boot/dts/bcm-cygnus-clock.dtsi
arch/arm/boot/dts/bcm-cygnus.dtsi
arch/arm/boot/dts/bcm911360_entphn.dts
arch/arm/boot/dts/bcm911360k.dts
arch/arm/boot/dts/bcm958300k.dts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch corrects the vendor-prefix for isl29028 in the compatible property from
"isil,isl29028" to "isl,isl29028" according to listed vendor-prefixes in
Documentation/devicetree/bindings/vendor-prefixes.txt. Incorrect vendor-prefix "isl"
was reported by checkpatch.pl warning for drivers/staging/iio/light/isl29028.c.
Thus incorrect vendor-prefix "isil" was corrected for every mention of device isl29028.
Signed-off-by: Darshana Padmadas <darshanapadmadas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The model B and B+ differ in the GPIO lines for ACT and PWR leds, and the
I2S interface.
Signed-off-by: Matthias Klein <matthias.klein@linux.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix currently harmless but wrong sizes for various GPMC connected
devices
- Set up timings for several GPMC connected devices to get rid of
bootloader dependencies in later patches
- Enable various drivers for dra7xx
- Prepare Igep boards to support new variants
- Add intial support for BeagleBoard-X15
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUY5fPAAoJEBvUPslcq6VzbiUQAMIwdwWCqW3DZEy9PP8U1/ON
kBRsRCNveVOUyGQPWAQDcGREKo6qSVies46PLvJLEfPolTRFcU157ADPfID5+5FR
FcfkSAit4fSma+RdQqV9QwkyPvNWolL9zTzUeDEdu3Ic50NMhUhO5+ZT1PrNRtcR
S77H9yjIWqdqAma8uzFBiNp9oSSSERnl43FoOuHOsuqABYwWECejv+TC9FzA4TDM
b8rCHbBULwhk3oRDs558SBu+6YgnIppQ6EeXbWqv7D4lkmeVM3lPKg2MRXg/Zg42
+36nS9Ld0uIqs3u84p6IeauKCCz1D4rKsd/Wkzj9BiTI4/YD2e4aO4RhZVFugjAo
poTBiDD/fJwPm5bwFq7Yake3CY6q3l55gzOrisW+nbCRlMXm9rQ8Do23nIPsQ7tx
tbnjNvOfR7SFkgL0R1yyI138MMI/qvm0bkqXA7IP9mGN6v73tepBeHwFyHGwVebD
IFqrGbxIAC1A46w09q6yF9W3BExWUEW+FKIkV+wwg8NSMdsw6nDNlalcyWXyUO1n
j/RQ9y0EXJ051koMd8Wx5eWgpWRZDp3HrQkTqgcWTHf8JwS9fP1GFSM2LgUU0FJ4
OR/rozfEEJzeuhv4jAIDzD9o/dRd29Yx+xiFKxJfOK4yhIhBzlEmNfriv7HG7lYi
Pf0bsZwTIoy9FOiIjmhA
=7eWb
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.19/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Pull "Device tree related changes for omaps" from Tony Lindgren:
- Fix currently harmless but wrong sizes for various GPMC connected
devices
- Set up timings for several GPMC connected devices to get rid of
bootloader dependencies in later patches
- Enable various drivers for dra7xx
- Prepare Igep boards to support new variants
- Add intial support for BeagleBoard-X15
* tag 'omap-for-v3.19/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (37 commits)
ARM: dts: DRA7: Add aliases for all serial ports
ARM: dts: Add am57xx-beagle-x15
ARM: OMAP2+: igep00x0: Add pdata-quirks for the btwilink device.
ARM: dts: omap3-igep00x0: Remove i2c2 node.
ARM: dts: omap3-igep0020-rev-f: Support IGEPv2 Rev. F
ARM: dts: omap3-igep0020-common: Introduce igep0020 common dtsi file.
ARM: dts: omap3-igep0030-rev-g: Support IGEP COM MODULE Rev. G
ARM: dts: omap3-igep0030-common: Introduce igep0030 common dtsi file.
ARM: dts: omap3-igep00x0: Move outside common file the on board Wifi module.
ARM: dts: omap3-igep0020: Specify IGEPv2 revision in device tree.
ARM: dts: omap3-igep0030: Specify IGEP COM revision in device tree.
ARM: dts: omap3-igep00x0: Move NAND configuration to a common place.
ARM: dts: omap3-igep00x0: Fix UART2 pins that aren't common.
ARM: dts: dra7: add labels to DWC3 nodes
ARM: dts: dra72x-evm: Enable CPSW and MDIO
ARM: dts: dra7-evm: Keep all VDD rails always-on
ARM: dts: dra72-evm: Add MMC nodes
ARM: dts: dra72-evm: Add power button node
ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMIC
ARM: dts: dra72-evm: Add regulator information to USB2 PHYs
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
"dss_fck" is a hacky clock, used to work around problems with MODULEMODE
bit handling in DSS hwmods.
These problems have now been solved, so we can remove the dss_fck clock.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
RFBI iclk was set to point to hacky "dss_fck", which will be removed.
Instead use "l3_div_ck", which is the proper clock for this. "l3_div_ck"
is the parent of "dss_fck", so the clock rate is the same as previously.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Archit Taneja <archit.taneja@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
- Add reboot node, reusing syscon-reboot
- Add I2C nodes Hisilicon IP
- Add IR node based on Hisilicon IP
- Add Watchdog node based on ARM IP
- Add GPIO nodes based on ARM GPIO IP
- Add SATA node based on Hisilicon IP
- Add USB nodes
- Add MMC nodes based on Synopsys IP
- Add GMAC nodes based on Hisilicon IP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJUXLB1AAoJEGROujcbgXtLFMAP/inSVfdrh06VppC62eaeHTjV
xX7qTOU8Kk9LpbNIU0KEOWkKWDpKHdwK/aG60+Ep2jly+IAxI9e7ZizzO/f20zKe
jYvvVr1ODvNsADXlZL/EkF8przzQjD9eQm0UCkjGKHEosad9cO/vGD4RYaw2Ip/s
N1gQMAvJJaQrYZQUGhbfW/DAJbf3EkevZnfY7WXwEejyQGfvzD6iJcL/5sRm36N2
12Nq+KaO8hg7Y2RED3yyqBPcf73feM8zDoqh7skuthGwKwtVYrsYb/AfJwaIIqPW
+llvO+VAxdIg4xu0OGpM4FsTrhTA444cRQfv0AtjG10cg+FOfk3SA9XshZCAuTiu
h1Kb/yQO3d/FfLvkl/MIpZbOaaDsXahysphaVNDMoEkrvoUvvT0JEbt4nh8+T9yi
ahOh9Z3IIrOHndY7CmNDrig9YAzcFJoW+0yqkDUSgmg6ZkuAnK9W07G98PAW1M5r
rB3emfHXjF9c4VLLO6PqetWEObhjyiIf3UY4wyjq7ZsYeT70OuhT3BqTPedLgFRM
KEPvbhzDtIuL65u6pbc3c5TSwceHZM9fU54psRsC3Ec29j/SzYTr486RVMffOFWH
Jh0Zz23K+LPRJHzI3Ci8D5/UXjhr+5/HZFXYxb3bs0OWEpEz/ZXRLdgYU3gsfxsT
1ut4CTRYMvT6oz9W05DC
=ltI6
-----END PGP SIGNATURE-----
Merge tag 'hix5hd2-dt-for-3.19' of git://github.com/hisilicon/linux-hisi into next/dt
Pull "ARM: DT: Hisilicon terminal SoC HiX5HD2 DT updates for 3.19" from Wei Xu:
- Add reboot node, reusing syscon-reboot
- Add I2C nodes Hisilicon IP
- Add IR node based on Hisilicon IP
- Add Watchdog node based on ARM IP
- Add GPIO nodes based on ARM GPIO IP
- Add SATA node based on Hisilicon IP
- Add USB nodes
- Add MMC nodes based on Synopsys IP
- Add GMAC nodes based on Hisilicon IP
* tag 'hix5hd2-dt-for-3.19' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hix5hd2: add reboot node
ARM: dts: hix5hd2: add i2c node
ARM: dts: hix5hd2: add ir node
ARM: dts: hix5hd2: add wdg node
ARM: dts: hix5hd2: add gpio node
ARM: dts: hix5hd2: add sata node
ARM: dts: hix5hd2: add usb node
ARM: dts: hix5hd2: add mmc node
ARM: dts: hix5hd2: add gmac node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Use keyboard as gpio-keys node name
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUapdxAAoJENfPZGlqN0++GJ0P/ROuRziwZCeXmsOv6zPNv1XR
EVY93sam8qoFTgJaGiGbEi7stOIpEW0GPxUJzGDPgysMhSxBt2hqqAMtzRAK8uvl
d+zMFIPGxPpzQW7lpVdeYnZLyr78jmhwXUsX//bOyIAmhDA80Oo43rWK5ksgGXml
wkGVhKRipVkyCRztae72T0I5oTIbPSs25P4Qo6NdYlzLOWQ9ss3iQWxYBUBlMb/v
MwJIy515IF+qhLJngaIG1J+d5x2s4gF68szv+oaUFPH6fRFpgEtl7XMrnvFrj/us
HGWOi2L6cRBrySkY9D/ApbC4VC/QGbGdRkOJxWj+/p+JxXm3WVm+uPzH6WNARsFU
EDrODAUfob9eilylDOxrv6fKmc/i4NOYfPfOor9dYDWeNgSXLgWorB1P26cVR9Yg
bhE5zUcJguw2PJDPIDdfotFxU4cdU6E/NUaMVbGvKRjwB8zTYxMoj2psdYxorMap
MRn504OAoiHiXqgGHaKvRYTlqE2PO0Mqc1EsPJSE1MVwdI2P4i4SPb3/qija8LWW
bz1bTxxdCcGEe17EDisgbrqF0Bmeit3GB896UR8XZPy/Xsocjx0p4NkFatkkrMAb
UNcSY6UfOssqH0+0CfMELP1uLOhwMZGNpw/ifKvOJGO7RDPi9d1VYSjY+vqWaf96
nLFR+oR2uja0F0/DaotP
=H8mr
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-cleanups3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Third Round of Renesas ARM Based SoC DT Cleanups for v3.19" from Simon Horman:
* Use keyboard as gpio-keys node name
* tag 'renesas-dt-cleanups3-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g-reference: Use keyboard as gpio-keys node name
ARM: shmobile: koelsch: Use keyboard as gpio-keys node name
ARM: shmobile: lager: Use keyboard as gpio-keys node name
ARM: shmobile: armadillo800eva: Use keyboard as gpio-keys node name
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Enable DU using DT on marzen/r8a7779, lager/r8a7790 and koelsch/r8a7791
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUWBRRAAoJENfPZGlqN0++Pm0P/3Qa+X8o4kAZETi+ER+Q7s/B
d0EGNAw/1b/Si7D2SpftRHvHx5TDL2QiU0QIAPWAcd4u1NJxaYP/SDwRETGQnHbV
TsL25mASYNByP6DXTrBJneiDS5U88DwVP5q5FW9WEkvIbmtzbxTe/7OnSPAjhxl0
83kXATiHwdRct4KYLW8ngNhaY/9OUjrL+wZ8ffN/dM0EpSyixXK5bHmWLFC5/HGY
D8b+zW/NTSBOYTk1OR6QSlp/eGmjRCG2UJn4toHWKse2defxZ/hyTUas4ysgDXzC
gsWT96yLwmueTRcSBglkKGFbPukWcyKPt7sRphtZlTYbJmpS0ncBTfC2s0+Jv2RR
VDpeAmB6NXQ5L7Ck51ryt4A8kX88uOgHrmcz+NGJadNE07TZgLJBLDf6aSjDsytr
NIZq7RFNK975Qv3QldQJX4PYmqcWJMI5WDPnm2buzZsKHkjQrpKIicAiSlwzJX/9
4SeCF2yrZuJJVnJwit8gOvvBHq5ORQrumAs1xrPQiu570p+6jBjjJ5v4sDvuF5UY
nXfMTUGrNYe8JSxjf8NTmXJX8DRKSLq0tGcHbzajvKVzuy8Gp6+yFNkrqzQj2HK6
dy4TLtuvMk5JB4E5Q22xdYYV4TorO28qiuGoGDOOwIx6+940MdY/ucE2Z4i4M2R7
/NZJCpITds6HxVZJWAKo
=m0Ov
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-du-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
Pull "Renesas ARM Based SoC DT DU Updates for v3.19" from Simon Horman:
* Enable DU using DT on marzen/r8a7779, lager/r8a7790 and koelsch/r8a7791
* tag 'renesas-dt-du-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: koelsch: Enable DU device in DT
ARM: shmobile: koelsch-reference: Remove DU platform device
ARM: shmobile: lager: Enable DU device in DT
ARM: shmobile: lager-reference: Remove DU platform device
ARM: shmobile: marzen: Enable DU device in DT
ARM: shmobile: dts: Add common file for AA104XD12 panel
ARM: shmobile: r8a7791: Add DU node to device tree
ARM: shmobile: r8a7790: Add DU node to device tree
ARM: shmobile: r8a7779: Add DU node to device tree
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains the serial port numbering fixes that are required for the
serial port numbering to stay the same with or without the serial core
making use of the aliases defined in DT.
eMMC is also fixed for TN7 and Roth boards which were using the wrong
regulators.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJUZNbZAAoJEN0jrNd/PrOhZugP/2SABzzEa1EwAwE0ksM/Z47x
MYDGUQ7nKuagGNwdHsQPEf+JXLADS1eOzdoQ187SaJdSt0DmbOzoU2IbG9b6Rm4j
31Al6XL2PdyDOeopMSbrwLHh7+HVhaW7TEQcCMqDJEEgsJIWY0sLuuDLLirpMoaO
oPD9anXAlVYhcDN8bPdW0gUMrZOGU9rB+q1jTj9kW1qX9xsNHb05WvLiZOwV032d
Hw0/q/BJ/MzoqXT/Z2UrIPpgcL9xnVw3NUPqE+dCXoAGRSsG6ggue+9TDAVyU7Xw
Fg4Hwm/qwnk1lAKvMgGw+fjLd/gUdIuo2kAg5sY2tGo+HTbgMMIz2LlXoz3gmx8/
XnBIKnCqv79kVIyRsOVYLXWrPJx5Ns8rMWXxM/SnD6hPNsudE/rr5dBHP+vS40AU
V/ty6G7BME1LM99h76Ixoaaw5ojjYLPdTb30SEKePKLsY+8gYh6up5Fuo1SdENlv
sIuQR1R7pGbsmshfMd5+xNH55QEucYD/IKz59Zc5+fZJBMEViMH2Q2NIsLYCsO1C
oSN3ck9Gwan2PrEV42uVOHPoQdqta8ZGm02Fl3pJb/2W04/KB3ahdCcPbBI9UGol
zR1EPbUlEiLN1Fczw7gy0/zrFO2Cq4VzwuHZgwiQvsxY8K2ChmsvloBnt9Rpj+VS
Xqbno7ENFXdRiIMWoIn0
=ick3
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.18-fixes-for-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into fixes
Pull "ARM: tegra: Device tree fixes for v3.18-rc5" from Thierry Reding:
This contains the serial port numbering fixes that are required for the
serial port numbering to stay the same with or without the serial core
making use of the aliases defined in DT.
eMMC is also fixed for TN7 and Roth boards which were using the wrong
regulators.
* tag 'tegra-for-3.18-fixes-for-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: roth: Fix SD card VDD_IO regulator
ARM: tegra: Remove eMMC vmmc property for roth/tn7
ARM: dts: tegra: move serial aliases to per-board
ARM: tegra: Add serial port labels to Tegra124 DT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Correct IIC0 parent clock on r8a7740
* Correct SD3CKCR address to device tree on r8a7790
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUYrybAAoJENfPZGlqN0++V0EP/1VvilCY1UkP4JG142J9GLKl
8V4H30OfVWr9m9O6LPEwOB/qkl9L6mlyu+oxTi1VI+96542IREfYz/REdy3HmgS2
zD7SEMikoqNbuPfjimonBSbtjRvNLrdcNBjrP9u0pJEZYmGBJelNWxTHAsp6fxDy
6nG+/hiNO3i7hyMaZwsYB+5E+9itJkSv4YOS9bh0IAM+WIMN+VasrMSGu9ZKUCT/
f2zcy2xLR/Zmd2ad6zpfFXDznO6C2vBfGg+fZ97K7H5mkSdkpSR5vYwxVWQY+49L
iTlevIi9E7ubp3QIgiSDy9qLAmWxL6wGm4Utj90c+jSKeLPd9NTmGAz0bIjVSYND
b8pmdww3dbYsxyqsWbYlscpYwxN83jynEQx3ZU0dCEA9X7o7SfkQpZlhw/qkNAIu
3iwEqNbrLLlz9nyl7lMFRUPGcn6pugd5ylq6zhfHR9cRRuMAjkkA/1iTEt4kPXSq
6wFLArgNSID9ood0mpuVzp0xWmqY9XsxwYQJLfIE53W8CatWP/HAWAEBiunCJVTg
p0A1WbRrVL0GIQ8QEOjfAo+a0WF0gaiT4Xr66tq6U0o0JwSXr7fws77cl82GXyol
m7AKJ+lzPS2RQg0DdjZAQ1OkA9laQmXtQb44a6OipMw2JdM3oG5yvK0IAb+sxjh1
mOiUw0Zggyf/L+PAxeKJ
=Du2A
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Pull "Renesas ARM Based SoC DT Fixes for v3.18" from Simon Horman:
* Correct IIC0 parent clock on r8a7740
* Correct SD3CKCR address to device tree on r8a7790
* tag 'renesas-dt-fixes-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock
ARM: shmobile: r8a7790: Fix SD3CKCR address to device tree
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the RTT and GPBR devices and specify the general purpose register
used to store the current time.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Enable the RTT and GPBR devices and specify the general purpose register
used to store the current time.
Enable wakeup on RTT event on the shutdown controller device.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
at91sam926x, at91sam9g45 and at91sam9rl SoCs all have at least one RTT
block.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add rtc support to the at91sam9rl dtsi file.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
During the submission of these new sama5d4 files, the GPL notice mentioned the
device tree as a library, which is not really accurate.
Fix all these library mentions to reflect the fact that it's actually just a
file.
Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
A fix for the A31 dma controller that requires the AHB clock to be parented to
PLL6 in order to operate.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUa8ABAAoJEBx+YmzsjxAg2HoP/3UCG+58cnEAQTFwVsroU4MT
f91pcPounpGXPmZupQCs/aEHQKSVOEzn2EnHSZQb3I9XEezVKqJHgwm/BlsCHkL0
8WCnG/72p/HoWyMDPr2EPIa1s5oS5wqG0V7rTztTndQI/jHXqPqOdhkicF2n4B7D
hLTxIGeCXA8yh6B3pXF4SdvJEd/I63gcQexzxOJ4HSEsEyGExeTSWwNJqfkl+T2f
ZdyKvvgDbqfgwM6eOX8R6n9RET1Rxtm8NBVdSB2ruuixSV3TT3nYofOgdFddSMtf
WpNUwbVBKE/J0r+NpSQ44E4hFR8W99ieXH3HCPn1+GjHWvFALC0cZTPd6NgIkpBy
uEuAVShJd02Z0JzeTVW7DaCyDgW0QRV7BhBazKuCMppbv8eNR8CbqPe44iY1tmmP
+m7b3HURgs9I5FAwDMrScSPfyH7+tALdTmsXJdBk273cXptRoJAPe+N5G02WLjSk
wo1sW86XcG02Jd20lbdubjsSL5b6pD5pu8zjKISZZI/1kH8m8delvH+ObCjsvaC8
DWELzxRqE6hsi6HjWmkakCZvydn9P0Te5AjX/kzonpqGN30Kzwkk902K3gI/6fT1
5bE9QcC435ckeWLGPMRkLSadHIaUMrmlzt0X4ZN9Evu8F4heT/HqT9wApx8dCwuo
AkcVwXY7Kzxs6dICuojB
=SmW6
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Merge "Allwinner fixes for 3.18" from Maxime Ripard:
A fix for the A31 dma controller that requires the AHB clock to be parented to
PLL6 in order to operate.
* tag 'sunxi-fixes-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun6i: Re-parent ahb1_mux to pll6 as required by dma controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There is a macro for the irq type.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Explicitly set the dr_mode for the dwc3 controller on the
Snow board to host mode. This is required to ensure the
controller is initialized in the right mode if the kernel is
build with USB gadget support.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The LEDs on the kzm9g board are labeled using upper-case characters.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The LEDs on the koelsch board are labeled using upper-case characters.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The IIC nodes used the generic compatible properties only.
This causes the driver to fail when using Standard Speed, as the
operational clock is driven by the 104 MHz HP clock:
i2c-sh_mobile e6820000.i2c: timing values out of range: L/H=0x208/0x1bf
i2c-sh_mobile: probe of e6820000.i2c failed with error -22
Add the SoC-specific compatible property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The IIC nodes used the generic compatible properties only.
This may cause the driver to fail when using Standard Speed on IIC
masters where the operational clock is driven by the 130 MHz HP clock.
Add the SoC-specific compatible property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current Koelsch I2C2 has 400kHz settings,
but, ak4643 audio codec chip which is connected to I2C2 can't
work such frequency.
Fixup I2C2 clock frequency to 100kHz.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current Lager IIC2 is using default clock frequency,
but, ak4643 audio codec chip needs 100kHz
This patch clarifies IIC2 clock frequency as 100kHz.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable usb1 on Google Chromecast which is connected to micro-USB
plug used for external power supply, too.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD
SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role
capable.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
DMP.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Add nodes for I2C controllers A,B,AO, which are available in both
Meson6 and Meson8.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@caione.org>
This enables the L2 cache controller available in Amlogic SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
This adds a dtsi for Amlogic Meson8 SoCs. It differs from the Meson6
dtsi for the number of Cortex-A9 cores (4 vs 2) and for the frequency
of clk81.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
Following Arnds review comments, update the miphy365 to follow the
common convention of naming the phy node names as phy@addr.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
At the moment we don't take a reference on some core interconnect
clocks which means when CCF turns off unused clocks the SoC will
hang. As a temp soltuion we will boot with clk_ignore_unused
parameter for all b2120 boards.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The STiH410 is an advanced multi-HD AVC processor with 3D graphics acceleration
and 1.5-GHz ARM Cortex-A9 SMP CPU part of the stih407 family.
It has wide connectivity including USB 3.0, PCI-e, SATA and gigabit ethernet.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The stih410 soc which will be added in the following commit is very similar to
the stih407, to enable maximum re-use of the dt files this commit abstracts the
common parts into a shared dt file stihxxx-b2120 for the board, and also a shared
file stih407-family.dtsi for the SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the required pin configiguration for the extra usb
controllers found on the stih410 device.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the DT nodes for the 4 usb ehci and ohci usb controllers
on the stih416 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This usb picophy is found on stih415/6 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the required pin config for all usb controllers
on the stih416.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The Mele M9 has an ethernet board, enable it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
PLL6 on sun6i has multiple outputs, just like the other sunxi platforms.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Some DT files had a typo with a missing "5" in sama5d3x first compatible string.
Signed-off-by: Peter Rosin <peda@axentia.se>
[nicolas.ferre@atmel.com: modify commit log]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
MAINTAINERS file to avoid missing PMIC and SoC related patches:
- Fix random hangs on am437x because of incorrect default
value for the DDR regulator
- Fix wrong partition name for NAND on am335x-evm
- Fix wrong pinctrl defines for dra7xx
- Update maintainers entries for PMICs and SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUYj1ZAAoJEBvUPslcq6VzpBEQAL12JZOSxU7WP5gTaKmTTBi9
YVIlE0yM8gkkfbyAqZLZDrssjjRPE696ys6aB+WdhuxasyIH5uhn9UHjWW/4UflG
8rEazQJBC/gqv8DqBUDGz/c3EiKOPmHt6XUNeFxeDHgRrOVh1ivpxNOGKGnJOMmi
UNpSBejWUO7O8vR2mDgnDeSTgmIC6yq5Wm7JDaWwuh9iyCmzD2z0+AYF8tf6vrDf
LubKHXfdatNjAj5NCyJQsJtfr9iS57o3YIsqOS43KvGIYDLVQhzbezQjGtkAavUR
HNZcVDbmK3ohIsPT6CuzPIbAg+l0YL/8lRytSaFjmMN6b2TPV6NKeijIK85GUYvN
aR/8nFnZSJNaG8F7NAPuA6qxq4d0m6oPC3q2PLX9P1RQNP+ch/DrQarK4AMMMpV6
C8sUDvhWYH7Lsa/xVomKo/0pTNc+K11xdVpxxdEridYLsCxR1UE7yr2P8tM0gq2F
yb14rsw9kgH89n8sIUZRgC3eM5dUhL4pidx8kiBvkqbDZc90C+Oclj52EEnKiA96
6BXSVAFaXU9+A9Q/EKXCqeJjLZX4GXbG8oe4n1uGePiS6hxpbHt3nhxvdOjDFYgc
69jlVkKY1M0mG1JfVKl/eYn/HYHs9a84BI1Lra4zmdmSl55/kD1Q1OFCkBi8rZQ0
5FFumJMQ1AVrQ6oOvIPM
=YQGC
-----END PGP SIGNATURE-----
Merge tag 'omap-fixes-against-v3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap fixes against v3.18-rc4" from Tony Lindgren:
Few omap fixes for hangs and wrong pinctrl defines, and update
MAINTAINERS file to avoid missing PMIC and SoC related patches:
- Fix random hangs on am437x because of incorrect default
value for the DDR regulator
- Fix wrong partition name for NAND on am335x-evm
- Fix wrong pinctrl defines for dra7xx
- Update maintainers entries for PMICs and SoCs
* tag 'omap-fixes-against-v3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
pinctrl: dra: dt-bindings: Fix output pull up/down
MAINTAINERS: Update entry for omap related .dts files to cover new SoCs
MAINTAINERS: add more files under OMAP SUPPORT
ARM: dts: AM437x-SK-EVM: Fix DCDC3 voltage
ARM: dts: AM437x-GP-EVM: Fix DCDC3 voltage
ARM: dts: AM43x-EPOS-EVM: Fix DCDC3 voltage
ARM: dts: am335x-evm: Fix 5th NAND partition's name
Signed-off-by: Olof Johansson <olof@lixom.net>
This enables user space access to the 3 PWM available on the Radxa Rock headers.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The clock nodes for DSS VIDEO1/2 and HDMI have wrong register addresses.
This patch fixes the addresses so that they point to
CM_CLKSEL_VIDEO1_PLL_SYS, CM_CLKSEL_VIDEO2_PLL_SYS and
CM_CLKSEL_HDMI_PLL_SYS.
Reported-by: Somnath Mukherjee <somnath@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The mt6592-evb is an evaluation board based on the MT6592 SoC.
Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* A dtsi for boards based on Mediatek MT6592 SoCs
* Compatible string in arch/arm/mach-mediatek/mediatek.c
Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This allows the "make dtbs" to build the moose and mt8135-evbp1
for MediaTek SoC
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The Mele M9 / A1000G quad has a blue status led, add support for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Mele M9 / A1000G quad uses both usb-ports, one goes to an internal
usb wifi card, the other to a build-in usb-hub, so neither need their
OHCI companion controller to be enabled since the are always connected at
USB-2 speeds.
The controller which is attached to the wifi also does not need a vbus
regulator.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This avoids it getting briefly turned off between when the regulator getting
registered and the ahci driver turning it back on, thus avoiding the disk
going into emergency head park mode.
Reported-by: Bruno Prémont <bonbons@linux-vserver.org>
Tested-by: Bruno Prémont <bonbons@linux-vserver.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
vddio_sdmmc3 is a vdd_io, and thus should be under the vqmmc-supply
property, not vmmc-supply.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This property was wrong and broke eMMC since commit 52221610d ("mmc:
sdhci: Improve external VDD regulator support"). Align the eMMC
properties to those of other Tegra boards.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
There are general changes pending to make the /aliases/serial* entries
number the serial ports on the system. On Tegra, so far the ports have
been just numbered dynamically as they are configured so that makes them
change.
To avoid this, add specific aliases per board to keep the old numbers.
This allows us to change the numbering by default on future SoCs while
keeping the numbering on existing boards.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Thierry Reding <treding@nvidia.com>
These labels will be used to provide deterministic numbering of consoles
in a later patch.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
[treding@nvidia.com: drop aliases, reword commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
This gets rid of the custom LED driver in the Integrator directory
altogether and switches us over to using the syscon LEDs for this.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Integrator debug block is a simple set of registers, make
it a syscon and register the four LEDs on the Integrator/AP
baseboard as syscon LEDs.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Using the augmented reset driver for the Versatile family,
we can move the reset handling for the Integrator out of the
machine. We add a "syscon" attribute to the core module, and
access the syscon registers using this handle. We need to
select SYSCON, POWER, POWER_RESET and POWER_RESET_VERSATILE
in order for the restart functionality to always be
available on all systems (it should not be optional).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Add items in arch/arm/boot/dt/Makefile to compile the dtb
for mach-mmp.
Change the dts and dtsi file to use #include instead of \include\
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Unit addresses, whilst written in hex, don't contain a 0x prefix.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cubietruck uses different pin for the USB OTG VBUS that
is why we override the one defined in sunxi-common-regulators.dtsi
Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Until now the regulator nodes for powering USB VBUS
existed only for the two host controllers. Now the regulator
is added for USB OTG too.
Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Evbp1 is a tablet evaluation board based on MT8135 SoC.
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Moose is a tablet evalutation board based on MT8127 SoC.
Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
OMAP wdt driver supports only ti,omap3-wdt compatible. In DRA7 dt
wdt compatible property is defined as ti,omap4-wdt by mistake instead of
ti,omap3-wdt. Correcting the typo.
Fixes: 6e58b8f1da ("ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBoard-X15 is the next generation Open Source Hardware
BeagleBoard based on TI's AM5728 SoC featuring dual core 1.5GHz A15
processor. The platform features 2GB DDR3L (w/dual 32bit busses),
eSATA, 3 USB3.0 ports, integrated HDMI (1920x1080@60), separate LCD
port, video In port, 4GB eMMC, uSD, Analog audio in/out, dual 1G
Ethernet.
For more information, refer to:
BeagleBoard-X15 Wiki:
http://www.elinux.org/Beagleboard:BeagleBoard-X15
AM5728 is part of the Sitara product family whose additional details
will be available: http://www.ti.com/lsds/ti/arm/overview.page
Technical Reference Manual for AM5728 is public domain at:
http://www.ti.com/lit/spruhz6
Just add basic support for the moment, the following updates are needed:
i) Ethernet - depends on SoC dts fixes
ii) USB Client (USB2) - depends on GPIO extcon
ii) HDMI - additional driver fixes pending
iii) Audio - additional driver fixes pending
NOTE:
AM5728 Data Manual (SPRS915L - August 2014) section 4.1.1 states: "All
unused power supply balls must be supplied with the voltages specified
in the Section 5.2, Recommended Operating Conditions". This implies
that all unused voltage rails for AM5728 can never be switched off even
if the hardware blocks inside that voltage domain is unused. Switching
off these unused rails may result in stability issues on other domains
and increased leakage and power-on-hour impacts.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can't suppose that the i2c2 pins are configured as I2C bus, these pins are
connected to expansion connectors.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the new hardware revision of the IGEPv2. Basically, the new
revision F replaces the old Wifi module for a Wilink8 based module.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the omap3-igep0020-common.dtsi file and remove repeated parts leaving
the nodes that are not common between IGEPv2 hardware revisions.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for the new hardware revision of the IGEP COM MODULE. Basically,
the new revision G replaces the old Wifi module for a Wilink8 based module.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the omap3-igep0030-common.dtsi file and remove repeated parts leaving
the nodes that are not common between IGEP COM MODULE hardware revisions.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
New IGEP boards revisions will use another Wifi module, so this patch moves
the DT nodes outside the common omap3-igep.dtsi file to specific DT for every
board.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We'll introduce new hardware revisions soon. This patch is only to
indicate which board revision supports this device tree file in order
to avoid confusions.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We'll introduce new hardware revisions soon. This patch is only to
indicate which board revision supports this device tree file in order
to avoid confusions.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
At this moment all supported boards use same NAND chip, so has more sense
move the GPMC and NAND configuration to the omap3-igep.dtsi common place.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
UART2 is used to connect the processor with the bluetooth chip, these pins
are not common between IGEPv2 boards and IGEP COM MODULE boards. This patch
muxes the correct pins for every board and removes UART2 configuration from
common omap3-igep.dtsi file.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Acked-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On the LeMaker Banana Pi, probing the external ethernet PHY connected
to the SoC's internal GMAC module sometimes fails. The PHY power
supply is handled via a GPIO-controlled regulator, and the existing
regulator startup-delay of 50000us is too short to make sure that the
PHY is always fully powered up when it is queried by phylib. Tests
have shown that to provide a reliable PHY detection, the startup-delay
has to be increased to at least 60000us. To have a certain safety margin
and to cater for manufacturing variations between different boards,
the delay gets set to 100000us as discussed on the linux-arm-kernel
mailinglist.
Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Marvell Berlin BG2 based Sony NSZ-GS7 has an unpopulated SATA plug
on its PCB solder side. As it is quite easy to populate and I have
done it, enable AHCI and SATA by default.
Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Add DT nodes for the AHCI controller and SATA PHY found on Marvell
Berlin2 SoCs.
Acked-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The apb2 clocks are actually the same as apb1 clocks on the other sunxi
platforms, hence compatible with "allwinner,sun4i-a10-apb1-clk".
Update the dtsi to use the new unified apb1 clk.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
With the new factors infrastructure in place, we can unify apb1 and
apb1_mux as a single clock now.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
[wens@csie.org: Change apb1 node label to "apb1"; reword commit title]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
by adding labels to DWC3 nodes, it's far easier
for boards to reference them.
Signed-off-by: Felipe Balbi <balbi@ti.com>
[tony@atomide.com: updated for otg 4 move to dra74x.dtsi]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Whenever Suspend PHY bit is set on AM437x devices,
USB will not work due to Set EP Configuration command
always failing.
This was only found after a recent commit 2164a47 (usb:
dwc3: set SUSPHY bit for all cores, which will be merged
for v3.19) added a missing *required* step to dwc3
initialization. Synopsys Databook requires that we enable
Suspend PHY bit after initialization but that, unfortunately,
breaks AM437x.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
sleep states and enable them in board evm dts file.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 Data Manual (SPRS857L - August 2014) section 4.1.1 states: "All
unused power supply balls must be supplied with the voltages specified
in the Section 5.2, Recommended Operating Conditions".
This implies that all unused voltage rails for Vayu can never be
switched off even if the hardware blocks inside that voltage domain is
unused. Switching off these unused rails may result in stability issues
on other domains and increased leakage and power-on-hour impacts.
J6eco-evm dts file already considers this, however j6evm-dts file needs
to be fixed to consider this constraint of the SoC.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add MMC1 and 2 nodes. MMC1 is SDcard and MMC2 is eMMC.
NOTE on MMC1 card detect: Ideally, we should be using in-built SDCD
support, but we dont have it yet. So, use the fact that control module
of DRA7 is setup such that no matter what mode one configures it, GPIO
option is always hardwired in - use GPIO mode for SDcard detection.
[peter.ujfalusi@ti.com]
The power line feeding the SD card is also used by other devices on the EVM.
Use generic name instead of mmc2_3v3 so when other devices want to use the
same regulator it will look a bit better.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
With Commit adff5962fd ("Input: introduce palmas-pwrbutton"), we can
now support tps power button as a event source - This is SW7 (PB/WAKE)
on the J6-evm.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Even thought sys_nirq1 is hardwired on the SoC for the pin, it is
better to configure the pin to the required mux configuration.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The ldo4_reg regulator provides power to the USB1 and USB2
High Speed PHYs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add USB data and pinctrl for USB.
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The 4th USB controller instance present only on the DRA74x family of
devices so move it there.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA72-evm has a 256MB 16-bit wide NAND chip. Add
pinmux and NAND node.
The NAND chips 'Chip select' and 'Write protect' can be
controlled using DIP Switch SW5. To use NAND,
the switch must be configured like so:
SW5.1 (NAND_SELn) = ON (LOW)
SW5.9 (GPMC_WPN) = OFF (HIGH)
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
sleep states and enable them in board evm dts file.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use omap specific pinctrl defines (OMAP3_CORE1_IOPAD) to configure
the padconf register offset.
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add DSS related pinmux and display data nodes required to support
DVI video out on SBC-T3530, SBC-T3730 and SBC-T3517.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: Tony Lindgren <tony@atomide.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset
value. Programming to a non-reset value while executing from DDR will result
in random hangs.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset
value. Programming to a non-reset value while executing from DDR will result
in random hangs.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DCDC3 supplies voltage to DDR. Fix DCDC3 volatge to 1.5V which is the reset
value. Programming to a non-reset value while executing from DDR will result
in random hangs.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: Tony Lindgren <tony@atomide.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The '#mbox-cells' property is added to all the OMAP mailbox
nodes. This property is mandatory with the new mailbox framework.
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the interrupts property to all the 13 mailbox nodes in
DRA7xx. The interrupts property information added is inline
with the expected values with the DRA7xx crossbar driver,
and is common to both DRA74x and DRA72x SoCs.
Do note that the mailbox 1 is only capable of generating out
3 interrupts, while all the remaining mailboxes have 4
interrupts each.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Instantiate the Audio DMAC peri peri controllers
in the r8a7791 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate the Audio DMAC peri peri controllers
in the r8a7790 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate the two Audio DMA controllers in the r8a7791 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instantiate the two Audio DMA controllers in the r8a7790 device tree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[geert: corrected spelling of audmac1]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to the datasheet, the operating clock for IIC0 is the HPP
(RT Peri) clock, not the SUB (Peri) clock. Both clocks run at the same
speed (50 Mhz).
This is consistent with IIC0 being located in the A4R PM domain, and
IIC1 in the A3SP PM domain.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
- Rearrange the DTS files to make a pure SoC-specific file and
a pure board file for S8815.
- Add the device tree for the NDK15 board.
- Update the defconfig and configure in the STMPE expander by
default on the Nomadik.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUWyzIAAoJEEEQszewGV1z0Q0P/3yvUT1NWTSRAhu+5V1ycVSi
UmctP58ZPSU14Zavvb6E4XunfgrLNRIGTXAL1YbSUURGLNJ6+bsKLmBHQB3z/oQ4
4ynSE0pqdLna3fxhgxqfikh4Oc1213Nppnb1RcGupS1S7ya5JGsg6PD50nSlUCan
xR+WG4U5ZQ80Z0eWMoafFeESt4n2xv4J1BwNyiFDoSDaAmUdRJTiWtXYlVaMcuXD
Ysrp7QNSihvUO74AcS43H2zv1nMxnUDgKpKWTq4UGHMRkdDSlAo2zskATmYhenBd
CteDwuGHgTtBcnUOEA+AHidSw25Pl2QmS5CX9Dgt70DNq/OCKIOyi2nwn4NnKhWY
+WfL4TKLshREe83GCBOkDO5bBNV4qP9W81ASisIp2T6ALCQQEqyRU4BIF1vsAJuR
fynPzzSDuwAzPbxOTVB8HVyzY2XEKEzMOwAFLBt7U1dteuIGkOUbfM8bso13AAYR
bI4XPaPpY5l5TE5OKC3AzdMltiVU8onwsMaBfx4Gp3aIhzVN+OH/Tr4Bu1TDAhSb
hSZ74Z+SAKdrLBvZRe6FJUp+8bV5znTFq/R9g4QmIruw3drOWzxIdZFvvA+Oyz/J
pGH/kBSRKze1TJfYy2QMbZ1vKj2sD0S8AOIOGTL+hXjHZFDyd7367JsuSWrTGXK6
oHtUyZhKmHQ+rIUhawy6
=6oZZ
-----END PGP SIGNATURE-----
Merge tag 'nomadik-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Merge "Nomadik updates for the v3.19 series" from Linus Walleij:
Nomadik changes for the v3.19 development series:
- Rearrange the DTS files to make a pure SoC-specific file and
a pure board file for S8815.
- Add the device tree for the NDK15 board.
- Update the defconfig and configure in the STMPE expander by
default on the Nomadik.
* tag 'nomadik-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: configure in STMPE support
ARM: update Nomadik config
ARM: nomadik: device tree for NHK15 board
ARM: nomadik: push ethernet down to board
ARM: nomadik: set up MCDATDIR2
ARM: nomadik: move GPIO I2C to S8815 board file
ARM: nomadik: disable chrystals in top level board files
ARM: nomadik: move MMC/SD card detect GPIO to board DTS
Signed-off-by: Olof Johansson <olof@lixom.net>
The Parallella board comes with a U-Boot bootloader that loads one of
two predefined FPGA bitstreams before booting the kernel. Both define an
AXI interface to the on-board Epiphany processor.
Enable clocks FCLK0..FCLK3 for the Programmable Logic by default.
Otherwise accessing, e.g., the ESYSRESET register freezes the board,
as seen with the Epiphany SDK tools e-reset and e-hw-rev, using /dev/mem.
Cc: <stable@vger.kernel.org> # 3.17.x
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- CAN device nodes for at91sam9263 and at91sam9x5
- at91sam9x5 DMA definitions for usart
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJUV73TAAoJEAf03oE53VmQJYcH/1ExETCf3J9ohXxF3n9R7zf4
fp+KxCVmpmFdkZSyUSemxTp31MLAgHUD/155pPveaAJ9LsgnEqalX+cqz0b4NVuT
+5GivQQp5CQGvb8rqrC9UYFroMWJjUY/lNrDDo2WRmX6ay1jLpM7nFupoUxt6+fh
c/KXHNXf+vQ0Qhx6vVYmGRHnzqAPJEMkLy5LhFo2Yjmg0IRAvhVDZBCVZ2W7Fwy9
A16w2YIuyQ0Yw2YYPP6KCLls2gRqUvDtNJMKAQ7YB473GwNLRU4qGpdfVJQTgAe/
4SsMGZHen4DT2k2WgbnQl7b4pwUVaud5F/vshAoU/4NJs4XiTEhItfV3cI9xU3o=
=r9z8
-----END PGP SIGNATURE-----
Merge tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "at91: dt for 3.19 #1" from Nicolas Ferre:
"Very little DT update for AT91. More will come but I want to send this first
batch soon so it doesn't get in the way of larger modifications."
First DT batch for 3.19:
- CAN device nodes for at91sam9263 and at91sam9x5
- at91sam9x5 DMA definitions for usart
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: at91sam9263: Add CAN device nodes
ARM: at91/dt: at91sam9x5: Add CAN device nodes
ARM: at91/dt/trivial: at91sam9x5_can.dtsi: comment and whitespace fixes
ARM: at91: at91sam9x5 dt: add usart dma definitions to dt
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUVqxEAAoJEEEQszewGV1zRcQP/AxYB/o+6Zb/HgCxIT+9vujJ
4ghuDElDUffBCXhv8IGuvzcAK+UKAqoj98vZNmI6Kl/MvXoHLcyTfu7e9i/zPFcM
szYdlG+ui4PEhuwPgWHCpOzyWWjqBuujFyYG8Kk/akUtMntV0NXoS7snqoAw47Y1
IAn7oov+UHFDw8ewWU+i5qrdPKOQ4IaIQcWB58EfJHfsU4f9sUB6JVSBJ3mCtAhg
N8P3qg9WV0sqvZt1oI+naTRZL/CtNlrDYVnWVQb0WeGEI3MGEibEkWr1HScHmwko
eNsOvTV+/3iFz/RUQtFqw4kidHiIdpTHgCLEauJ+KBz86X5sRq23CXLWnZy3h9Mw
q/05yl0/IgTZlNCrULqmkcapjLp89nk5PGYOtuXuaYPj7y8og3LWc+bCYIXJd7Ay
OMH9CJQpysWdyDOMt2C7xOI3/IkUjluEvOGN8iWoze9k8Dxr2+Ajmvf74lu0QtYm
hejdKS6Jr0a43FHwJFS/oX7LAGSft76xvs9bGa033YRcNGLXYLcjlbNqynep0Hhm
SKk67IfI+FXjo28FWlp7sXWsfhyg3tJHkAgEPZ1o+V8UNWT5Pb+Pop/DqJG6Jvjc
+F3m+wkvcP7kOpVHdyFqY026lb0nMyDimTvqYjfDxwaElVcUSBu3/0/A9SJGqBcH
L0mMNkBMP5HDmwy6bo2u
=8T8T
-----END PGP SIGNATURE-----
Merge tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
Merge "Ux500 core changes for v3.19" from Linus Walleij:
"please pull in these Ux500 core changes for this kernel development
cycle: mainly a generic power domain implementation from Ulf Hansson
that needs to get queued up in -next and tested."
Generic power domains for the Ux500
* tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Add i2c devices to the VAPE PM domain
ARM: ux500: Add spi and ssp devices to the VAPE PM domain
ARM: ux500: Add sdi devices to the VAPE PM domain
ARM: ux500: Add DT node for ux500 PM domains
ARM: ux500: Enable Kconfig for the generic PM domain
ARM: ux500: Initial support for PM domains
dt: bindings: ux500: Add header for PM domains specifiers
dt: bindings: ux500: Add documentation for PM domains
ARM: u300: Convert pr_warning to pr_warn
- AHCI and SATA PHY nodes for BG2Q
- Reset controller binding docs
- Ethernet nodes for BG2, BG2CD
- SDHCI nodes for BG2, BG2CD
- Corresponding board changes to enable AHCI, Ethernet, SDHCI
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUVhGkAAoJEN2kpao7fSL42icQAIC5LG0eL8yi6HXOAhI1Tkky
0g6J2/HZtUqoGHKU92kvBa7kba852oMi2NIIF9LI03b8o1z7E4Of8sZCPCvH/BQ/
hBmUIDi6himQ8+SxDBFcsETjIu2vPgemvy1mvwd/OUNY2YEFkYLKT48qrU3pD5oU
F2W33RpHrkkazG7/WrcRa+Tk2G2eb3tC90czAjE5A5PkAp4LUEZq24treuVv424h
S6qe76WQs+EHIW3nkIBmRjr3D7yWW1U9vknxwz6XNyNkvW9bcMfTMq1dQY5RXt17
JiZli9d62Z1Fu8k0qDebcgTw5YzyoXIuLd4+hbPn8qFkT/umjIgrZOZYD4dZmBvB
vxwQ5NOw1mI27Lbb1IkpizldzpJ1XwhvY3POfgGVYSeI5R4CyLamvzaMJbo8zWWs
CvneMaghQNWweC9AiOlUXJKzlaYJMu6pfMJssZuzyLx4g+YGKQunoGIEXehWzRAh
g8K0bUfYxWHmhZPz9nQLaDJTJI85Xytm0/iP14STp59OsKQsFokm4m9X5ZyJrQHc
ig1NivEC8qDZqegRhjDLsatkI8xsQA6ovA/h7HHil5D04hxI6OlRiFfob9ZAhkxc
hud9Ne7vocJ6uhB72xm4eTKcMSg1iSi6wDEsaoK/jU6yTdOgV2i3QvIr8wQZ+yru
SFy2OPWebL9AaCdgTfaO
=VVTX
-----END PGP SIGNATURE-----
Merge tag 'berlin-dt-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin into next/dt
Merge "ARM: berlin: DT changes for v3.19 (round 1)" from Sebastian Hesselbarth:
"This is Berlin DT changes for v3.19 and contains those patches that missed
the v3.18 merge window plus corresponding patches to catch-up with Antoine's
BG2Q improvements for BG2 and BG2CD. We now have working SDHCI and Ethernet
on all SoCs (well, BG2CD has HDMI HEC only), SATA PHY support for BG2 is still
pending."
Berlin DT changes for v3.19 (round 1)
- AHCI and SATA PHY nodes for BG2Q
- Reset controller binding docs
- Ethernet nodes for BG2, BG2CD
- SDHCI nodes for BG2, BG2CD
- Corresponding board changes to enable AHCI, Ethernet, SDHCI
* tag 'berlin-dt-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: Enable eMMC on Sony NSZ-GS7
ARM: dts: berlin: Enable WiFi on Google Chromecast
ARM: dts: berlin: Add SDHCI controller nodes to BG2/BG2CD
ARM: dts: berlin: Enable ethernet on Sony NSZ-GS7
ARM: dts: berlin: Add phy-connection-type to BG2Q Ethernet
ARM: dts: berlin: Add BG2CD ethernet DT nodes
ARM: dts: berlin: Add BG2 ethernet DT nodes
ARM: dts: berlin: Add GPIO leds to Google Chromecast
ARM: dts: berlin: enable timer 1 for sched_clock
ARM: dts: berlin: add a required reset property in the chip controller node
Documentation: bindings: add reset bindings docs for Marvell Berlin SoCs
ARM: dts: berlin: enable the eSATA interface on the BG2Q DMP
ARM: dts: berlin: add the AHCI node for the BG2Q
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Broadcom Cygnus SoC Device Tree changes" from Florian Fianelli:
This patchset contains initial support for Broadcom's Cygnus SoC based on our
iProc architecture. Initial support is minimal and includes just the mach
platform code, clock driver, and a basic device tree configuration. Peripheral
drivers will be submitted soon, as will device tree configurations for other
Cygnus board variants.
These are the Device Tree changes
* tag 'arm-soc/for-3.18/cygnus-dts-v9' of http://github.com/brcm/linux:
ARM: dts: Enable Broadcom Cygnus SoC
dt-bindings: Document Broadcom Cygnus SoC and clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
The dma controller requires that the ahb1 bus clock be driven by pll6
for peripheral access to work. Previously this was done in the dma
controller driver, but was since removed as part of a series to unify
the ahb1_mux and ahb1 clock drivers, in
14e0e28 dmaengine: sun6i: Remove obsolete clk muxing code
Unfortunately the rest of that series did not make it, leaving us with
broken dma on sun6i.
This patch reparents ahb1_mux to pll6 using the DT assigned-clocks
properties in the dma controller node.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Support for 16 PTMs, funnel, TPIU and replicator connected
to the ETB are included.
Signed-off-by: Xia Kaixu <kaixu.xia@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Support for the 2 PTMs, 3 ETMs, funnel, TPIU and replicator
connected to the ETB are included. Proper handling of the
ITM and the replicator linked to it along with the CTIs
and SWO are not included.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Currently supporting ETM and ETB. Support for TPIU
and SDTI are yet to be added.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Fabio Estevam