2 Commits

Author	SHA1	Message	Date
Yoshihiro Shimoda	086b399965	soc: renesas: r8a77990-sysc: Add workaround for 3DG-{A,B} ... This patch adds workaround for 3DG-{A,B} of R-Car E3 ES1.0 because the SoC has a restriction about the order. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2018-05-16 10:57:44 +02:00
Takeshi Kihara	44b12d4311	soc: renesas: rcar-sysc: Add support for R-Car E3 power areas ... This patch adds Cortex-A53 CPU{0,1}, Cortex-A53 SCU, Cortex-R7, A3VC, A2VC1 and 3DG-{A,B} power domain areas for the R8A77990 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [shimoda: fix 3DG-{A,B} and add SPDX-License-Identifier] Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2018-05-16 10:57:13 +02:00