The Qualcomm SM6375 platform has two instances of the tsens v2.8.0 block,
add a compatible for these instances.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230516-topic-lost_tsens_bindings-v1-2-99715746ddb1@linaro.org
Correct spelling problems for Documentation/PCI/ as reported
by codespell.
Link: https://lore.kernel.org/linux-pci/20230209071400.31476-14-rdunlap@infradead.org
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Pick up initial support for the CXL 3.0 performance monitoring
definition. Small conflicts with the firmware update work as they both
placed their init code in the same location.
Very basic introduction to the device and the current driver support
provided. I expect to expand on this in future versions of this patch
set.
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230526095824.16336-6-Jonathan.Cameron@huawei.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Move Loongson RTC bindings from trivial-rtc.yaml into loongson,rtc.yaml.
The architectures associated with this driver use the built-in DTB, so
we can just drop the compatible(rtc-ls2x) with wildcards.
Also, soc-based compatible is more accurate for hardware differences
between chips.
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/1b0bb443bd74647c17b7902f3d719700f81a1dba.1685693501.git.zhoubinbin@loongson.cn
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add the first typical (non-sanitization) consumer of the new background
command infrastructure, firmware update. Given both firmware-update and
sanitization were developed in parallel from the common
background-command baseline, resolve some minor context conflicts.
Pick up the sanitization work and the infrastructure for other
background commands for 6.5. Sanitization has a different completion
path than typical background commands so it was important to have both
thought out and implemented before either went upstream.
The sysfs based firmware loader mechanism was created to easily allow
userspace to upload firmware images to FPGA cards. This also happens to
be pretty suitable to create a user-initiated but kernel-controlled
firmware update mechanism for CXL devices, using the CXL specified
mailbox commands.
Since firmware update commands can be long-running, and can be processed
in the background by the endpoint device, it is desirable to have the
ability to chunk the firmware transfer down to smaller pieces, so that
one operation does not monopolize the mailbox, locking out any other
long running background commands entirely - e.g. security commands like
'sanitize' or poison scanning operations.
The firmware loader mechanism allows a natural way to perform this
chunking, as after each mailbox command, that is restricted to the
maximum mailbox payload size, the cxl memdev driver relinquishes control
back to the fw_loader system and awaits the next chunk of data to
transfer. This opens opportunities for other background commands to
access the mailbox and send their own slices of background commands.
Add the necessary helpers and state tracking to be able to perform the
'Get FW Info', 'Transfer FW', and 'Activate FW' mailbox commands as
described in the CXL spec. Wire these up to the firmware loader
callbacks, and register with that system to create the memX/firmware/
sysfs ABI.
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: Russ Weight <russell.h.weight@intel.com>
Cc: Alison Schofield <alison.schofield@intel.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Ben Widawsky <bwidawsk@kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>
Link: https://lore.kernel.org/r/20230602-vv-fw_update-v4-1-c6265bd7343b@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
As per the HW manual, XTOSCB bit setting is as follows
If using an external clock signal, set the XTOSCB bit as 1 to
disable the crystal oscillator.
If using an external crystal, the XTOSCB bit needs to be set at 0
to enable the crystal oscillator.
Document clock and clock-names properties.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230623140948.384762-6-biju.das.jz@bp.renesas.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Convert the isl1208 RTC device tree binding documentation to json-schema.
Update the example to match reality.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230623140948.384762-5-biju.das.jz@bp.renesas.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Implement support for the non-pmem exclusive secure erase, per
CXL specs. Create a write-only 'security/erase' sysfs file to
perform the requested operation.
As with the sanitation this requires the device being offline
and thus no active HPA-DPA decoding.
The expectation is that userspace can use it such as:
cxl disable-memdev memX
echo 1 > /sys/bus/cxl/devices/memX/security/erase
cxl enable-memdev memX
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
Link: https://lore.kernel.org/r/20230612181038.14421-7-dave@stgolabs.net
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Implement support for CXL 3.0 8.2.9.8.5.1 Sanitize. This is done by
adding a security/sanitize' memdev sysfs file to trigger the operation
and extend the status file to make it poll(2)-capable for completion.
Unlike all other background commands, this is the only operation that
is special and monopolizes the device for long periods of time.
In addition to the traditional pmem security requirements, all regions
must also be offline in order to perform the operation. This permits
avoiding explicit global CPU cache management, relying instead on the
implict cache management when a region transitions between
CXL_CONFIG_ACTIVE and CXL_CONFIG_COMMIT.
The expectation is that userspace can use it such as:
cxl disable-memdev memX
echo 1 > /sys/bus/cxl/devices/memX/security/sanitize
cxl wait-sanitize memX
cxl enable-memdev memX
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
Link: https://lore.kernel.org/r/20230612181038.14421-5-dave@stgolabs.net
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Add a read-only sysfs file to display the security state
of a device (currently only pmem):
/sys/bus/cxl/devices/memX/security/state
This introduces a cxl_security_state structure that is
to be the placeholder for common CXL security features.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Davidlohr Bueso <dave@stgolabs.net>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20230612181038.14421-3-dave@stgolabs.net
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This device is an iteration over the AOKZOE A1 with the same EC mapping
and features.
It also has support for tt_toggle.
Signed-off-by: Jerrod Frost <jcfrosty@proton.me>
Signed-off-by: Joaquín Ignacio Aramendía <samsagax@gmail.com>
Link: https://lore.kernel.org/r/20230625012347.121352-2-samsagax@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
mlx5 driver minor cleanup and fixes to net-next
-----BEGIN PGP SIGNATURE-----
iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAmSV8icACgkQSD+KveBX
+j6WgAf+Ph5w2dAfuadjlAcQlK2WKXyS1OliVpvCuglepgsP9Zree11WVoyiAKef
70Xd5Vu4xAQTdpCsw4DGM7sh6xW1SxvZFP1A/FVk7UU1E0zL2SXzKyEHK29I1MH5
nej2hRf/W1dwYtxfwNOTKAFco3wr0e1vLgMDEqZBZbJXzcUetDRADkgWrx9U+pno
lBPhVMZWK5R0GzOjlWZXoedaXx2RIcm+5U02ov5S6d1y8AA+sE93tiYxrP9z/2lj
nml1KeQQl0Ku/y+e8RMSUd9mPdomQZi6CVHMD1wV5DNv6dnrT1bPrUdt4torSXEI
KAzkVie979XP2jvkDKY2nyXZ8dn7cw==
=woKn
-----END PGP SIGNATURE-----
Merge tag 'mlx5-updates-2023-06-21' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says:
====================
mlx5-updates-2023-06-21
mlx5 driver minor cleanup and fixes to net-next
* tag 'mlx5-updates-2023-06-21' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux:
net/mlx5: Remove pointless vport lookup from mlx5_esw_check_port_type()
net/mlx5: Remove redundant check from mlx5_esw_query_vport_vhca_id()
net/mlx5: Remove redundant is_mdev_switchdev_mode() check from is_ib_rep_supported()
net/mlx5: Remove redundant MLX5_ESWITCH_MANAGER() check from is_ib_rep_supported()
net/mlx5e: E-Switch, Fix shared fdb error flow
net/mlx5e: Remove redundant comment
net/mlx5e: E-Switch, Pass other_vport flag if vport is not 0
net/mlx5e: E-Switch, Use xarray for devcom paired device index
net/mlx5e: E-Switch, Add peer fdb miss rules for vport manager or ecpf
net/mlx5e: Use vhca_id for device index in vport rx rules
net/mlx5: Lag, Remove duplicate code checking lag is supported
net/mlx5: Fix error code in mlx5_is_reset_now_capable()
net/mlx5: Fix reserved at offset in hca_cap register
net/mlx5: Fix SFs kernel documentation error
net/mlx5: Fix UAF in mlx5_eswitch_cleanup()
====================
Link: https://lore.kernel.org/r/20230623192907.39033-1-saeed@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Add a display-hint property to the netlink schema that is for providing
optional hints to generic netlink clients about how to display attribute
values. A display-hint on an attribute definition is intended for
letting a client such as ynl know that, for example, a u32 should be
rendered as an ipv4 address. The display-hint enumeration includes a
small number of networking domain-specific value types.
Signed-off-by: Donald Hunter <donald.hunter@gmail.com>
Link: https://lore.kernel.org/r/20230623201928.14275-2-donald.hunter@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQTFp0I1jqZrAX+hPRXbK58LschIgwUCZJX+ygAKCRDbK58LschI
g0/2AQDHg12smf9mPfK9wOFDNRIIX8r2iufB8LUFQMzCwltN6gEAkAdkAyfbof7P
TMaNUiHABijAFtChxoSI35j3OOSRrwE=
=GJgN
-----END PGP SIGNATURE-----
Merge tag 'for-netdev' of https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next
Daniel Borkmann says:
====================
pull-request: bpf-next 2023-06-23
We've added 49 non-merge commits during the last 24 day(s) which contain
a total of 70 files changed, 1935 insertions(+), 442 deletions(-).
The main changes are:
1) Extend bpf_fib_lookup helper to allow passing the route table ID,
from Louis DeLosSantos.
2) Fix regsafe() in verifier to call check_ids() for scalar registers,
from Eduard Zingerman.
3) Extend the set of cpumask kfuncs with bpf_cpumask_first_and()
and a rework of bpf_cpumask_any*() kfuncs. Additionally,
add selftests, from David Vernet.
4) Fix socket lookup BPF helpers for tc/XDP to respect VRF bindings,
from Gilad Sever.
5) Change bpf_link_put() to use workqueue unconditionally to fix it
under PREEMPT_RT, from Sebastian Andrzej Siewior.
6) Follow-ups to address issues in the bpf_refcount shared ownership
implementation, from Dave Marchevsky.
7) A few general refactorings to BPF map and program creation permissions
checks which were part of the BPF token series, from Andrii Nakryiko.
8) Various fixes for benchmark framework and add a new benchmark
for BPF memory allocator to BPF selftests, from Hou Tao.
9) Documentation improvements around iterators and trusted pointers,
from Anton Protopopov.
10) Small cleanup in verifier to improve allocated object check,
from Daniel T. Lee.
11) Improve performance of bpf_xdp_pointer() by avoiding access
to shared_info when XDP packet does not have frags,
from Jesper Dangaard Brouer.
12) Silence a harmless syzbot-reported warning in btf_type_id_size(),
from Yonghong Song.
13) Remove duplicate bpfilter_umh_cleanup in favor of umd_cleanup_helper,
from Jarkko Sakkinen.
14) Fix BPF selftests build for resolve_btfids under custom HOSTCFLAGS,
from Viktor Malik.
* tag 'for-netdev' of https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next: (49 commits)
bpf, docs: Document existing macros instead of deprecated
bpf, docs: BPF Iterator Document
selftests/bpf: Fix compilation failure for prog vrf_socket_lookup
selftests/bpf: Add vrf_socket_lookup tests
bpf: Fix bpf socket lookup from tc/xdp to respect socket VRF bindings
bpf: Call __bpf_sk_lookup()/__bpf_skc_lookup() directly via TC hookpoint
bpf: Factor out socket lookup functions for the TC hookpoint.
selftests/bpf: Set the default value of consumer_cnt as 0
selftests/bpf: Ensure that next_cpu() returns a valid CPU number
selftests/bpf: Output the correct error code for pthread APIs
selftests/bpf: Use producer_cnt to allocate local counter array
xsk: Remove unused inline function xsk_buff_discard()
bpf: Keep BPF_PROG_LOAD permission checks clear of validations
bpf: Centralize permissions checks for all BPF map types
bpf: Inline map creation logic in map_create() function
bpf: Move unprivileged checks into map_create() and bpf_prog_load()
bpf: Remove in_atomic() from bpf_link_put().
selftests/bpf: Verify that check_ids() is used for scalars in regsafe()
bpf: Verify scalar ids mapping in regsafe() using check_ids()
selftests/bpf: Check if mark_chain_precision() follows scalar ids
...
====================
Link: https://lore.kernel.org/r/20230623211256.8409-1-daniel@iogearbox.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
The series 2022/2023 reports slightly longer vendor/product strings
and shares USB ids. Technically the reply size is the USB HID packet
size (64 bytes) but all the supported commands do not use more than 8
bytes and replies reporting back strings do not use more then 24 bytes
(vendor and product are in one string in the newer devices now). The
rest of the reply is always filled with '\0'. Also update comments
and documentation accordingly.
Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
Link: https://lore.kernel.org/r/ZJbB72CAPmLflhHG@monster.localdomain
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Commit a3eb95484f ("spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7
compatible") adding sam9x7 compatible did not make any sense as it added
new compatible into middle of existing compatible list. The intention
was probably to add new set of compatibles with sam9x7 as first one.
Fixes: a3eb95484f ("spi: dt-bindings: atmel,at91rm9200-spi: add sam9x7 compatible")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/Message-Id: <20230624082054.37697-1-krzysztof.kozlowski@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Merge series from Biju Das <biju.das.jz@bp.renesas.com>:
This patch series aims to add support for Renesas PMIC RAA215300 and
built-in RTC found on this PMIC device.
The details of PMIC can be found here[1].
Renesas PMIC RAA215300 exposes two separate i2c devices, one for the main
device and another for rtc device.
Note the behaviour of kasan.fault=panic_on_write for async modes, since
all asynchronous faults will result in panic (even if they are reads).
Link: https://lkml.kernel.org/r/ZJHfL6vavKUZ3Yd8@elver.google.com
Fixes: 452c03fdbe ("kasan: add support for kasan.fault=panic_on_write")
Signed-off-by: Marco Elver <elver@google.com>
Reviewed-by: Andrey Konovalov <andreyknvl@gmail.com>
Cc: Aleksandr Nogikh <nogikh@google.com>
Cc: Alexander Potapenko <glider@google.com>
Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Taras Madan <tarasmadan@google.com>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
The final bug fixes for Qualcomm and Rockchips came in, all of them
for devicetree files:
- Devices on Qualcomm SC7180/SC7280 that are cache coherent are now
marked so correctly to fix a regression after a change in kernel behavior.
- Rockchips has a few minor changes for correctness of regulator and cache
properties, as well as fixes for incorrect behavior of the RK3568 PCI
controller and reset pins on two boards.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSWBpUACgkQYKtH/8kJ
UidebQ/+Pjt1TPVQTf8A20jC7LgyTU/oqmuC+QZbNbn/w/GDLS+mnjZe66r13q4n
cejYVWoz4hsbDEcmW5RHetDwV1uyqnyXiZrq5zh4LkmzvGJkqCu823KYWM0h+SGg
bzQkpXVrKVwLzg+wehpFxybq0GmIblQ44IJrGZoQpe0/mWHiT3l+icgxhD1fUUVo
cB/qBz7tOjk3HeGec5g9tpBQX/i0IN4Q6ql4+5U3xRlDfnRIbKH4olkJD2U87cqY
8wg+sEyNB7Qa8jcnpmtqKQFWd6J9mbUT0Qe/sQc7XW8ijfetULey8sa5kzCITA0O
Avg9a9893Zgtx5G9E640d3q00Vo5VSb7IkgX90lNuCVI0iQzDjW44B3glOiuxfst
srKnFjJowl9q2bG/HL+ze9QTM+Osr4bb232JX+yhko/q5B98PitxomrjHxUhMkal
JARVRRCqNLK/gi4IsjjjseHbHvqXOiXxZiGUBTVCpCdyHTs1e0Tks2sNu8YdfPYr
xbqU5B8Lyg+ZfEdcwz2S4bmn5XHRoGyGzomZRHsypjKpzOPXoWUtnv+BnbOor2QK
JBqnEKnVjX3t3rBT7JEZCwHXqWYxH+CLxGkY5H2bVh2Gm/INrktANh0JhfPiPlSQ
P/qC4Se9Ls5SF053R5Iyup2MNycejeLx3zLUjiKt8Kfcy9VVT+4=
=lfU1
-----END PGP SIGNATURE-----
Merge tag 'arm-fixes-6.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"The final bug fixes for Qualcomm and Rockchips came in, all of them
for devicetree files:
- Devices on Qualcomm SC7180/SC7280 that are cache coherent are now
marked so correctly to fix a regression after a change in kernel
behavior
- Rockchips has a few minor changes for correctness of regulator and
cache properties, as well as fixes for incorrect behavior of the
RK3568 PCI controller and reset pins on two boards"
* tag 'arm-fixes-6.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: dts: qcom: sc7280: Mark SCM as dma-coherent for chrome devices
arm64: dts: qcom: sc7180: Mark SCM as dma-coherent for trogdor
arm64: dts: qcom: sc7180: Mark SCM as dma-coherent for IDP
dt-bindings: firmware: qcom,scm: Document that SCM can be dma-coherent
arm64: dts: rockchip: Fix rk356x PCIe register and range mappings
arm64: dts: rockchip: fix button reset pin for nanopi r5c
arm64: dts: rockchip: fix nEXTRST on SOQuartz
arm64: dts: rockchip: add missing cache properties
arm64: dts: rockchip: fix USB regulator on ROCK64
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230609140709.64655-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230621064403.9221-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Changes related to cache management for DMA memory caused WiFi to stop
work on SC7180 and SC7280 based products, using TF-A. These changes
marks the relevant device dma-coherent to correct the behavior.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSUpxYVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F6mgP/0lybAjuULXku98KmDv+OxGQ1Wtd
fNnYHHA3sfCk5S6Njxrq3GWAd5F3XVBDgHjNshR1cRZgl1MIuJdvjxl0gSCI8b81
dl2MNi9enogL+kKeVD3w2pzE4ABpGM787qjPGRJFjwWlsxtO2q2oesrJGZRG5wLl
N2remtGZy2huzG/NEJO+NR59RYnMqIuxmrQaDiU+BaqfEAQjZx4VRLB13ixTBceX
6BIog6Q0Idl9BS31AOFePSa+BGN4WKPVQuZcHuJMqrQ1Ocqm4E7pOoynu4dpuP1x
XT1IzcIavR71doZWUA8WKsKEU5AArDIotUi8WRieEGWt9KWWOXuHYyMUtI8uhz7r
CgTmsDFI+gnmPG9VZLTkT/oIJu5+Ha/jk1jngwPZhbIqqM3rKK7gXYerpTKlTKRR
XmH1c8smTI255kYYKAY4vvY/dNinyPjEFJ89KhqE6Jlsq27VOQj+2RedmAjthj60
c8K3BuWRsDlkul5czuBre/soTn/vWl/GbbfhD2gXMLrbLXnLvYnFudR7AdiPWcSl
4QEr2MrErvGlmbT4GbBVw6q6z/UbLpTzcQMekFk6shpq1x3SuBSlKTwbHEpV8vHR
Z13jt/Pon4ysg00kFGJUDastzSHEKf41ggoGD4m++Z2pk4R0iA02dr8U/9i1wyeR
3rtRHHyG3cJI0zby
=ZdjH
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSV/OcACgkQYKtH/8kJ
UidD+Q//XxciqeCyOqnK+Uv2MXj3CDswUPZIQ3bTi8/JJt6WpT6qP8ZYWP3CbfeX
qTe3tgbjmG+5Co2cUq1PSwNTLn1/vG2mEyhz48EDOmh+20joeduKRwt5DrN29+GP
nk/N+1bslHpEmjgfSIliOLJNLlMvBpUOyFKTT70zDkRN1o3en/aLKhI1N5h1G8IF
f3wt68siitFKNEBgLyN6VTZeEO0LWuX4oqC5ggq8hA+0k3XuGRHcp4OXQvTbhrF8
AgRQSaaWc9awBSO0kVbOG+P3cXTc2KdJIua6uaq5ToJ6LPArQ3jtIDfMMMWBQtWd
4evU2maitV384SpqlQ1PN8TC5oqIEVdvfh/bujDPO5iTajj9x8LT9u0suPkU7q0A
tpF9zwpcClo7K1svgEi3wJ7vr/Ktm8mxhu+OKmYeQfQCIyAIGD+00UCVuHbSUuzo
doptwvUNQzJ3i6Ifszdl5fslnN/ol5gP02PdUsQiXwC3NIAtWjTgtENYq4WN0VwV
REQzIhHRlXF2NO+UBmAvL/Ju9+7yV3fYkdFBTjJ85BnIDejnZbaZ4ErRYTxzuNYA
/VGiSuE5aVpTBuLPLF2pAmUnFsITXMTKEv/knObq4BM0YiWgixee0PFmCPWVvUOd
P7tDO9TUFHjcFJGHge+nRgiMRzedVqIW2d4SfPFWAF5KgiVwH74=
=f/SB
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-fixes-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
One last Qualcomm ARM64 DeviceTree fix for v6.4
Changes related to cache management for DMA memory caused WiFi to stop
work on SC7180 and SC7280 based products, using TF-A. These changes
marks the relevant device dma-coherent to correct the behavior.
* tag 'qcom-arm64-fixes-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: dts: qcom: sc7280: Mark SCM as dma-coherent for chrome devices
arm64: dts: qcom: sc7180: Mark SCM as dma-coherent for trogdor
arm64: dts: qcom: sc7180: Mark SCM as dma-coherent for IDP
dt-bindings: firmware: qcom,scm: Document that SCM can be dma-coherent
Link: https://lore.kernel.org/r/20230622203248.106422-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A PCI endpoint function driver can define function specific attributes
under its function configfs directory using the add_cfs() endpoint driver
operation. This is done by tying up the mkdir operation for the function
configfs directory to a call to the add_cfs() operation. However, there
are no checks preventing the user from repeatedly creating function
specific attribute directories with different names, resulting in the same
endpoint specific attributes group being added multiple times, which also
result in an invalid reference counting for the attribute groups. E.g.,
using the pci-epf-ntb function driver as an example, the user creates the
function as follows:
$ modprobe pci-epf-ntb
$ cd /sys/kernel/config/pci_ep/functions/pci_epf_ntb
$ mkdir func0
$ tree func0
func0/
|-- baseclass_code
|-- cache_line_size
|-- ...
`-- vendorid
$ mkdir func0/attrs
$ tree func0
func0/
|-- attrs
| |-- db_count
| |-- mw1
| |-- mw2
| |-- mw3
| |-- mw4
| |-- num_mws
| `-- spad_count
|-- baseclass_code
|-- cache_line_size
|-- ...
`-- vendorid
At this point, the function can be started by linking the EP controller.
However, if the user mistakenly creates again a directory:
$ mkdir func0/attrs2
$ tree func0
func0/
|-- attrs
| |-- db_count
| |-- mw1
| |-- mw2
| |-- mw3
| |-- mw4
| |-- num_mws
| `-- spad_count
|-- attrs2
| |-- db_count
| |-- mw1
| |-- mw2
| |-- mw3
| |-- mw4
| |-- num_mws
| `-- spad_count
|-- baseclass_code
|-- cache_line_size
|-- ...
`-- vendorid
The endpoint function specific attributes are duplicated and cause a crash
when the endpoint function device is torn down:
refcount_t: addition on 0; use-after-free.
WARNING: CPU: 2 PID: 834 at lib/refcount.c:25 refcount_warn_saturate+0xc8/0x144
CPU: 2 PID: 834 Comm: rmdir Not tainted 6.3.0-rc1 #1
Hardware name: Pine64 RockPro64 v2.1 (DT)
pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
...
Call trace:
refcount_warn_saturate+0xc8/0x144
config_item_get+0x7c/0x80
configfs_rmdir+0x17c/0x30c
vfs_rmdir+0x8c/0x204
do_rmdir+0x158/0x184
__arm64_sys_unlinkat+0x64/0x80
invoke_syscall+0x48/0x114
...
Fix this by modifying pci_epf_cfs_work() to execute the new function
pci_ep_cfs_add_type_group() which itself calls pci_epf_type_add_cfs() to
obtain the function specific attribute group and the group name (directory
name) from the endpoint function driver. If the function driver defines an
attribute group, pci_ep_cfs_add_type_group() then proceeds to register this
group using configfs_register_group(), thus automatically exposing the
function type specific configfs attributes to the user. E.g.:
$ modprobe pci-epf-ntb
$ cd /sys/kernel/config/pci_ep/functions/pci_epf_ntb
$ mkdir func0
$ tree func0
func0/
|-- baseclass_code
|-- cache_line_size
|-- ...
|-- pci_epf_ntb.0
| |-- db_count
| |-- mw1
| |-- mw2
| |-- mw3
| |-- mw4
| |-- num_mws
| `-- spad_count
|-- primary
|-- ...
`-- vendorid
With this change, there is no need for the user to create or delete
directories in the endpoint function attributes directory. The
pci_epf_type_group_ops group operations are thus removed.
Also update the documentation for the pci-epf-ntb and pci-epf-vntb function
drivers to reflect this change, removing the explanations showing the need
to manually create the sub-directory for the function specific attributes.
Link: https://lore.kernel.org/r/20230415023542.77601-2-dlemoal@kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
* arm64/for-next/perf:
docs: perf: Fix warning from 'make htmldocs' in hisi-pmu.rst
docs: perf: Add new description for HiSilicon UC PMU
drivers/perf: hisi: Add support for HiSilicon UC PMU driver
drivers/perf: hisi: Add support for HiSilicon H60PA and PAv3 PMU driver
perf: arm_cspmu: Add missing MODULE_DEVICE_TABLE
perf/arm-cmn: Add sysfs identifier
perf/arm-cmn: Revamp model detection
perf/arm_dmc620: Add cpumask
dt-bindings: perf: fsl-imx-ddr: Add i.MX93 compatible
drivers/perf: imx_ddr: Add support for NXP i.MX9 SoC DDRC PMU driver
perf/arm_cspmu: Decouple APMT dependency
perf/arm_cspmu: Clean up ACPI dependency
ACPI/APMT: Don't register invalid resource
perf/arm_cspmu: Fix event attribute type
perf: arm_cspmu: Set irq affinitiy only if overflow interrupt is used
drivers/perf: hisi: Don't migrate perf to the CPU going to teardown
drivers/perf: apple_m1: Force 63bit counters for M2 CPUs
perf/arm-cmn: Fix DTC reset
perf: qcom_l2_pmu: Make l2_cache_pmu_probe_cluster() more robust
perf/arm-cci: Slightly optimize cci_pmu_sync_counters()
* for-next/kpti:
: Simplify KPTI trampoline exit code
arm64: entry: Simplify tramp_alias macro and tramp_exit routine
arm64: entry: Preserve/restore X29 even for compat tasks
* for-next/missing-proto-warn:
: Address -Wmissing-prototype warnings
arm64: add alt_cb_patch_nops prototype
arm64: move early_brk64 prototype to header
arm64: signal: include asm/exception.h
arm64: kaslr: add kaslr_early_init() declaration
arm64: flush: include linux/libnvdimm.h
arm64: module-plts: inline linux/moduleloader.h
arm64: hide unused is_valid_bugaddr()
arm64: efi: add efi_handle_corrupted_x18 prototype
arm64: cpuidle: fix #ifdef for acpi functions
arm64: kvm: add prototypes for functions called in asm
arm64: spectre: provide prototypes for internal functions
arm64: move cpu_suspend_set_dbg_restorer() prototype to header
arm64: avoid prototype warnings for syscalls
arm64: add scs_patch_vmlinux prototype
arm64: xor-neon: mark xor_arm64_neon_*() static
* for-next/iss2-decode:
: Add decode of ISS2 to data abort reports
arm64/esr: Add decode of ISS2 to data abort reporting
arm64/esr: Use GENMASK() for the ISS mask
* for-next/kselftest:
: Various arm64 kselftest improvements
kselftest/arm64: Log signal code and address for unexpected signals
kselftest/arm64: Add a smoke test for ptracing hardware break/watch points
* for-next/misc:
: Miscellaneous patches
arm64: alternatives: make clean_dcache_range_nopatch() noinstr-safe
arm64: hibernate: remove WARN_ON in save_processor_state
arm64/fpsimd: Exit streaming mode when flushing tasks
arm64: mm: fix VA-range sanity check
arm64/mm: remove now-superfluous ISBs from TTBR writes
arm64: consolidate rox page protection logic
arm64: set __exception_irq_entry with __irq_entry as a default
arm64: syscall: unmask DAIF for tracing status
arm64: lockdep: enable checks for held locks when returning to userspace
arm64/cpucaps: increase string width to properly format cpucaps.h
arm64/cpufeature: Use helper for ECV CNTPOFF cpufeature
* for-next/feat_mops:
: Support for ARMv8.8 memcpy instructions in userspace
kselftest/arm64: add MOPS to hwcap test
arm64: mops: allow disabling MOPS from the kernel command line
arm64: mops: detect and enable FEAT_MOPS
arm64: mops: handle single stepping after MOPS exception
arm64: mops: handle MOPS exceptions
KVM: arm64: hide MOPS from guests
arm64: mops: don't disable host MOPS instructions from EL2
arm64: mops: document boot requirements for MOPS
KVM: arm64: switch HCRX_EL2 between host and guest
arm64: cpufeature: detect FEAT_HCX
KVM: arm64: initialize HCRX_EL2
* for-next/module-alloc:
: Make the arm64 module allocation code more robust (clean-up, VA range expansion)
arm64: module: rework module VA range selection
arm64: module: mandate MODULE_PLTS
arm64: module: move module randomization to module.c
arm64: kaslr: split kaslr/module initialization
arm64: kasan: remove !KASAN_VMALLOC remnants
arm64: module: remove old !KASAN_VMALLOC logic
* for-next/sysreg: (21 commits)
: More sysreg conversions to automatic generation
arm64/sysreg: Convert TRBIDR_EL1 register to automatic generation
arm64/sysreg: Convert TRBTRG_EL1 register to automatic generation
arm64/sysreg: Convert TRBMAR_EL1 register to automatic generation
arm64/sysreg: Convert TRBSR_EL1 register to automatic generation
arm64/sysreg: Convert TRBBASER_EL1 register to automatic generation
arm64/sysreg: Convert TRBPTR_EL1 register to automatic generation
arm64/sysreg: Convert TRBLIMITR_EL1 register to automatic generation
arm64/sysreg: Rename TRBIDR_EL1 fields per auto-gen tools format
arm64/sysreg: Rename TRBTRG_EL1 fields per auto-gen tools format
arm64/sysreg: Rename TRBMAR_EL1 fields per auto-gen tools format
arm64/sysreg: Rename TRBSR_EL1 fields per auto-gen tools format
arm64/sysreg: Rename TRBBASER_EL1 fields per auto-gen tools format
arm64/sysreg: Rename TRBPTR_EL1 fields per auto-gen tools format
arm64/sysreg: Rename TRBLIMITR_EL1 fields per auto-gen tools format
arm64/sysreg: Convert OSECCR_EL1 to automatic generation
arm64/sysreg: Convert OSDTRTX_EL1 to automatic generation
arm64/sysreg: Convert OSDTRRX_EL1 to automatic generation
arm64/sysreg: Convert OSLAR_EL1 to automatic generation
arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
...
* for-next/cpucap:
: arm64 cpucap clean-up
arm64: cpufeature: fold cpus_set_cap() into update_cpu_capabilities()
arm64: cpufeature: use cpucap naming
arm64: alternatives: use cpucap naming
arm64: standardise cpucap bitmap names
* for-next/acpi:
: Various arm64-related ACPI patches
ACPI: bus: Consolidate all arm specific initialisation into acpi_arm_init()
* for-next/kdump:
: Simplify the crashkernel reservation behaviour of crashkernel=X,high on arm64
arm64: add kdump.rst into index.rst
Documentation: add kdump.rst to present crashkernel reservation on arm64
arm64: kdump: simplify the reservation behaviour of crashkernel=,high
* for-next/acpi-doc:
: Update ACPI documentation for Arm systems
Documentation/arm64: Update ACPI tables from BBR
Documentation/arm64: Update references in arm-acpi
Documentation/arm64: Update ARM and arch reference
* for-next/doc:
: arm64 documentation updates
Documentation/arm64: Add ptdump documentation
* for-next/tpidr2-fix:
: Fix the TPIDR2_EL0 register restoring on sigreturn
kselftest/arm64: Add a test case for TPIDR2 restore
arm64/signal: Restore TPIDR2 register rather than memory state
Conor Dooley <conor@kernel.org> says:
From: Conor Dooley <conor.dooley@microchip.com>
Do the various bits needed to drop the additionalProperties: true that
we currently have in riscv/cpu.yaml, to permit actually enforcing what
people put in cpus nodes.
* b4-shazam-merge:
dt-bindings: riscv: cpus: switch to unevaluatedProperties: false
dt-bindings: riscv: cpus: add a ref the common cpu schema
Link: https://lore.kernel.org/r/20230615-creamer-emu-ade0fa0bdb68@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Conor Dooley <conor@kernel.org> says:
From: Conor Dooley <conor.dooley@microchip.com>
Here are some bits that were discussed with Drew on the "should we
allow caps" threads that I have now created patches for:
- splitting of riscv_of_processor_hartid() into two distinct functions,
one for use purely during early boot, prior to the establishment of
the possible-cpus mask & another to fit the other current use-cases
- that then allows us to then completely skip some validation of the
hartid in the parser
- the biggest diff in the series is a rework of the comments in the
parser, as I have mostly found the existing (sparse) ones to not be
all that helpful whenever I have to go back and look at it
- from writing the comments, I found a conditional doing a bit of a
dance that I found counter-intuitive, so I've had a go at making that
match what I would expect a little better
- `i` implies 4 other extensions, so add them as extensions and set
them for the craic. Sure why not like...
* b4-shazam-merge:
RISC-V: always report presence of extensions formerly part of the base ISA
dt-bindings: riscv: explicitly mention assumption of Zicntr & Zihpm support
RISC-V: remove decrement/increment dance in ISA string parser
RISC-V: rework comments in ISA string parser
RISC-V: validate riscv,isa at boot, not during ISA string parsing
RISC-V: split early & late of_node to hartid mapping
RISC-V: simplify register width check in ISA string parsing
Link: https://lore.kernel.org/r/20230607-audacity-overhaul-82bb867a825f@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Document Renesas RAA215300 PMIC bindings.
The RAA215300 is a high Performance 9-Channel PMIC supporting DDR
Memory, with Built-In Charger and RTC.
It supports DDR3, DDR3L, DDR4, and LPDDR4 memory power requirements.
The internally compensated regulators, built-in Real-Time Clock (RTC),
32kHz crystal oscillator, and coin cell battery charger provide a
highly integrated, small footprint power solution ideal for
System-On-Module (SOM) applications. A spread spectrum feature
provides an ease-of-use solution for noise-sensitive audio or RF
applications.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/Message-Id: <20230623140948.384762-2-biju.das.jz@bp.renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Fix some typos, adjust documentation and comments to current state of
knowledge and update coding style to be more uniform.
Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net>
Link: https://lore.kernel.org/r/ZJWf3H972hGgLK-8@monster.localdomain
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Convert the DT binding document for pwm-bcm2835 from .txt to YAML.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Make the pattern matching node names a bit stricter to improve DTS
consistency. The pattern is restricted to:
1. Only one unit address or one -N suffix,
2. -N suffixes to decimal numbers.
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
i.MX8QXP compatible is missing in the list, add it.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add compatible string for the PWM unit found of the MediaTek MT7981 SoC.
This is in preparation to adding support in the pwm-mediatek.c driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
"regstep" may be deprecated, but it still needs a type.
Fixes: 8ad69f4905 ("dt-bindings: i2c: convert ocores binding to yaml")
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Peter Korsgaard <peter@korsgaard.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
The conditional if/then schema has an error as the "enum" values have
"const" in them. Drop the "const".
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230621231012.3816139-1-robh@kernel.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Add dt-bindings for the CSI IP found inside the RZ/V2M SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/Message-Id: <20230622113341.657842-2-fabrizio.castro.jz@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add YAML documentation for the timer which is present on Ralink SoCs.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230620100231.1412582-1-sergio.paracuellos@gmail.com
Convert Broadcom Kona family timer bindings to DT schema.
Changes during conversion:
- drop deprecated compatible (it's been deprecated for ~10 years)
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230618144635.GA22166@standask-GA-A55M-S2HP
MAINTAINERS
* add missing driver git trees
ath11k
* factory test mode support
iwlwifi
* config rework to drop test devices and
split the different families
* major update for new firmware and MLO
stack
* initial multi-link reconfiguration suppor
* multi-BSSID and MLO improvements
other
* fix the last few W=1 warnings from GCC 13
* merged wireless tree to avoid conflicts
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEpeA8sTs3M8SN2hR410qiO8sPaAAFAmSUmQwACgkQ10qiO8sP
aAB2DQ//ZuU93rYpch/NGQcl8dmcOH7SeSo2CMU8niBMkQxn2O4oz/05L2EFjRsx
xqF8GQoVCOK4UWsJ4luEJzqTn7ZTvzkfpy77YHMRStTx0jbQqC+5SPp1pKU7TNAE
jjMngYVIi3ZDCwqe44bw79+ybyMySf9vSjPVgLDtX00WdUWvectw2wcrR1vrKwq1
DbIwuwe8Nn0Qn3BGyJAP4iaYi9wxi+c+tS2VY+7bP+0sZEYemZP4rEQ/LPKn8zl3
+IDv9VwR1ns6d+2+3pvf6ihtZilrHuNRtEYbaBA0TdG4M00tPEsS+YUjwFEmeieJ
E/wM+lR4/LIHC3rsY6Cwl8TyvdjLka3HqpytHWGCXF0wicjia1UtTkzlJDiM9esi
ptnb1d26o2SGOPONOlMyKt8NooccAt3MIlYq25teshDr1P4tXD92j7oNVk7RhwAM
XYzBDGDQYJsAMo/tqzkbOQeUS1ojpsftGf2sQy5qYGRrHZCMquJApwKP1IfbEsF8
FR3/gZxLKdZfr06rWZJccH4Y7gnGm+EEmPBnREPdm6ABR/Rvm0orhJZSrhNY7IdB
bgvnwn5CWyrYXjkywcqMBzZRWPD0vZLLbPuRkneuOMmroA1oCjFzbj06/7UT6jpe
gZPPelIq1GvRHguCI+8jRgxlCiBOI5+GT6FY+9YTLAOFYBY1AZI=
=KSBu
-----END PGP SIGNATURE-----
Merge tag 'wireless-next-2023-06-22' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next
Johannes Berg says:
====================
Notable changes this time around:
MAINTAINERS
- add missing driver git trees
ath11k
- factory test mode support
iwlwifi
- config rework to drop test devices and
split the different families
- major update for new firmware and MLO
stack
- initial multi-link reconfiguration suppor
- multi-BSSID and MLO improvements
other
- fix the last few W=1 warnings from GCC 13
- merged wireless tree to avoid conflicts
* tag 'wireless-next-2023-06-22' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next: (245 commits)
wifi: ieee80211: fix erroneous NSTR bitmap size checks
wifi: rtlwifi: cleanup USB interface
wifi: rtlwifi: simplify LED management
wifi: ath10k: improve structure padding
wifi: ath9k: convert msecs to jiffies where needed
wifi: iwlwifi: mvm: Add support for IGTK in D3 resume flow
wifi: iwlwifi: mvm: update two most recent GTKs on D3 resume flow
wifi: iwlwifi: mvm: Refactor security key update after D3
wifi: mac80211: mark keys as uploaded when added by the driver
wifi: iwlwifi: remove support of A0 version of FM RF
wifi: iwlwifi: cfg: clean up Bz module firmware lines
wifi: iwlwifi: pcie: add device id 51F1 for killer 1675
wifi: iwlwifi: bump FW API to 83 for AX/BZ/SC devices
wifi: iwlwifi: cfg: remove trailing dash from FW_PRE constants
wifi: iwlwifi: also unify Ma device configurations
wifi: iwlwifi: also unify Sc device configurations
wifi: iwlwifi: unify Bz/Gl device configurations
wifi: iwlwifi: pcie: also drop jacket from info macro
wifi: iwlwifi: remove support for *nJ devices
wifi: iwlwifi: don't load old firmware for 22000
...
====================
Link: https://lore.kernel.org/r/20230622185602.147650-2-johannes@sipsolutions.net
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Document newly introduced modes and entry for the LED netdev trigger.
Add documentation for new modes:
- link_10
- link_100
- link_1000
- half_duplex
- full_duplex
Add documentation for new entry:
- hw_control
Also add additional info for the interval entry and the tx/rx modes with
the special case of hw_control ON.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20230621092653.23172-1-ansuelsmth@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
The RK3588 has two reset lines for the combphy. One for the
APB interface and one for the actual PHY.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
This adds Rockchip RK3588 AHCI binding. In order to narrow down the
allowed clocks without bloating the generic binding, the description
of Rockchip's AHCI controllers has been moved to its own file.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Add PHY transmit and receive clocks as described by the
DW SATA AHCI HW manual.
Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
"Buffers" are buffers of the metadata/checksum area of dm-integrity.
They are always at most as large as a single metadata area on-disk, but
may be smaller.
Signed-off-by: Russell Harmon <eatnumber1@gmail.com>
Reviewed-by: Bagas Sanjaya <bagasdotme@gmail.com>
Signed-off-by: Mike Snitzer <snitzer@kernel.org>
Add a KVM x86 doc to the subsystem/maintainer handbook section to explain
how KVM x86 (currently) operates as a sub-subsystem, and to soapbox on
the rules and expectations for contributing to KVM x86.
Reviewed-by: Like Xu <likexu@tencent.com>
Link: https://lore.kernel.org/r/20230411171651.1067966-3-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Add a label for the tip tree's "Coding style notes" so that a forthcoming
KVM x86 handbook can reference/piggyback the tip tree's preferred coding
style.
Link: https://lore.kernel.org/r/20230411171651.1067966-2-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
To permit validation of RISC-V cpu nodes, "additionalProperties: true"
needs to be swapped for "unevaluatedProperties: false". To facilitate
this in a way that passes dt_binding_check, a reference to the cpu
schema is required.
Disallow the generic cache-op-block-size property that that drags in,
since the RISC-V CBO extensions do not require a common size, and have
individual properties.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230615-dubiously-parasail-79d34cefedce@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Switch the DT binding to a YAML schema to enable the DT validation.
There was also an incorrect reference to dma-names being "rxtx" where
the driver and existing device trees actually use dma-names = "data" so
this is corrected in the conversion.
Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230619040742.1108172-2-chris.packham@alliedtelesis.co.nz
Reference mtd-physmap.yaml which contains all the relevant properties
for this device. Add "unevaluatedProperties: false" to avoid any
spurious addition of random properties.
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-18-miquel.raynal@bootlin.com
nand-on-flash-bbt is a generic property which may apply to any raw NAND
chip, it does not need to be listed in each controller
description. The raw NAND chip description file which contains the
property is already referenced, so no need to mention the property here
again.
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-17-miquel.raynal@bootlin.com
The mediatek NAND controller should reference the new raw-nand-chip.yaml
binding instead of the original nand-chip.yaml which does not contain
*all* the properties that may be used to fully describe the NAND
devices, certain properties being actually described under
nand-controller.yaml.
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-16-miquel.raynal@bootlin.com
List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-15-miquel.raynal@bootlin.com
List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-14-miquel.raynal@bootlin.com
nand-ecc-mode is a generic property which may apply to any raw NAND
chip, it does not need to be listed in each controller
description. Instead, let's reference the raw NAND chip description file
which contains the property. The description contained
"additionalProperties: false" which is wrong as other properties such as
partitions might very well be added in the final .dts, and anyway needs
to be converted into "unexpectedProperties: false" to fit the property
change new requirements.
Cc: Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-13-miquel.raynal@bootlin.com
Ensure all raw NAND chip properties are valid by referencing the
relevant schema and set unevaluatedProperties to false in the NAND chip
section to avoid spurious additions of random properties.
Doing this in one location also saves us from dupplicating the
description of the NAND chip object.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-12-miquel.raynal@bootlin.com
Ensure all raw NAND chip properties are valid by referencing the
relevant schema and set unevaluatedProperties to false in the NAND chip
section to avoid spurious additions of random properties.
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-11-miquel.raynal@bootlin.com
Ensure all raw NAND chip properties are valid by referencing the
relevant schema and set unevaluatedProperties to false in the NAND chip
section to avoid spurious additions of random properties.
Cc: Liang Yang <liang.yang@amlogic.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-10-miquel.raynal@bootlin.com
nand-ecc-mode is a generic property which may apply to any raw NAND
chip, it does not need to be listed in each controller
description. Instead, let's reference the raw NAND chip description file
which contains the property. The description contained
"additionalProperties: false" which is wrong as other properties such as
partitions might very well be added in the final .dts, and anyway needs
to be converted into "unexpectedProperties: false" to fit the property
change new requirements.
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: Samuel Holland <samuel@sholland.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-9-miquel.raynal@bootlin.com
List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.
Cc: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-8-miquel.raynal@bootlin.com
List all the possible properties in the NAND chip as per the example and
set unevaluatedProperties to false in the NAND chip section.
Cc: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-7-miquel.raynal@bootlin.com
qcom,boot-partitions is a NAND chip property, not a NAND controller
property. Move the description of the property into the NAND chip
section and just enable the property in the if/else block.
Fixes: 5278cc93a9 ("dt-bindings: mtd: qcom_nandc: document qcom,boot-partitions binding")
Cc: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-6-miquel.raynal@bootlin.com
This property has been extensively used for almost two decades already,
a lot of device trees use it, this is not the preferred way to configure
the ECC engines but we cannot just ignore it. Describe the property,
list the exact strings which have once been supported and mark it
deprecated.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-5-miquel.raynal@bootlin.com
The nand-ecc-placement property has been deprecated for a long time
already, it does not really mean something useful for the ECC engines
and is anyway in the vast majority of cases totally useless. Just mark
it deprecated to avoid appealing people to use it.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-4-miquel.raynal@bootlin.com
In an effort to constrain as much as we can the existing binding, we
want to add "unevaluatedProperties: false" in all the NAND chip
descriptions part of NAND controller bindings. But in order to do that
properly, we also need to reference a file which contains all the
"allowed" properties. Right now this file is nand-chip.yaml but in
practice raw NAND controllers may use additional properties in their
NAND chip children node. These properties are listed under
nand-controller.yaml, which makes the "unevaluatedProperties" checks
fail while the description are valid. We need to move these NAND chip
related properties into another file, because we do not want to pollute
nand-chip.yaml which is also referenced by eg. SPI-NAND devices.
Let's create a raw-nand-chip.yaml file to reference all the properties a
raw NAND chip description can contain. The chain of inheritance becomes:
nand-controller.yaml <- raw-nand-chip.yaml
raw-nand-chip.yaml <- nand-chip.yaml
spi-nand.yaml <- nand-chip.yaml
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-3-miquel.raynal@bootlin.com
There is no addition there, but the mtd.yaml file is so generic, it can
be referenced by a wide variety of devices, including nand ones which
already define the node name to "nand@<cs>". Right now it does not lead
to any failure but when we will constrain more the schema, this will
become a problem because we want the mtd-wide properties like label or
partitions to be available for the callers.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/linux-mtd/20230619092916.3028470-2-miquel.raynal@bootlin.com
Trogdor devices use firmware backed by TF-A instead of Qualcomm's
normal TZ. On TF-A we end up mapping memory as cacheable. Specifically,
you can see in Trogdor's TF-A code [1] in qti_sip_mem_assign() that we
call qti_mmap_add_dynamic_region() with MT_RO_DATA. This translates
down to MT_MEMORY instead of MT_NON_CACHEABLE or MT_DEVICE.
Let's allow devices like trogdor to be described properly by allowing
"dma-coherent" in the SCM node.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230616081440.v2.1.Ie79b5f0ed45739695c9970df121e11d724909157@changeid
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
The BTF_TYPE_SAFE_NESTED macro was replaced by the BTF_TYPE_SAFE_TRUSTED,
BTF_TYPE_SAFE_RCU, and BTF_TYPE_SAFE_RCU_OR_NULL macros. Fix the docs
correspondingly.
Fixes: 6fcd486b3a ("bpf: Refactor RCU enforcement in the verifier.")
Signed-off-by: Anton Protopopov <aspsk@isovalent.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Yonghong Song <yhs@fb.com>
Link: https://lore.kernel.org/bpf/20230622095424.1024244-1-aspsk@isovalent.com
Fix the description of the seq_info field of the bpf_iter_reg structure which
was wrong due to an accidental copy/paste of the previous field's description.
Fixes: 8972e18a43 ("bpf, docs: BPF Iterator Document")
Signed-off-by: Anton Protopopov <aspsk@isovalent.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Yonghong Song <yhs@fb.com>
Link: https://lore.kernel.org/bpf/20230622095407.1024053-1-aspsk@isovalent.com
STM32F4-F7 are, from hardware point of view, capable to handle device mode.
So this property should not be forced at false in dt-bindings.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/Message-Id: <20230621115523.923176-3-valentin.caron@foss.st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
"enum" values should be integers or strings, not arrays (though json-schema
does allow arrays, we do not). In this case, all possible combinations are
allowed anyways, so there's little point in expressing as an array.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/Message-Id: <20230621231044.3816914-1-robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
1. Renesas RPC IF: correct the Strobe Timing Adjustment.
2. Broadcom DPFE: fix smatch warning for testing array offset after use.
3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling
clock which is not handled by its clock controller.
4. Minor bindings cleanup.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmSHW7MQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD12azD/0b7k0T02IRlfIQLPfzJAVT85ax0SJNFZrV
3SmGu1EJMK7n8vBQJh4Jos7ImqI6zoSdK66d7QjsdI7sUTf1yuM78YWAyuvaUcnM
kln2X5GM6HQo65g8WgwmIVvfV1Ty3kLl2eiBYYuBd5Mf6qwPz2AZ7QrFVzCL3fg3
FI+JqyVWUaRHNPgPFHTND+M6TK2n6r+t0/FYxQuN6vj96fN3W3jx79Owjf6lSB6x
LWS5BFC5yRqXBKXWeTC8Llp8Q6vYhy7qwjuVxV9ERVJSA/R6NhjiLZQX8tB/NKRH
JyZEFjnL/fKVQrti25GZIkyD/w4wjsEECHeTwMtzORhOedkW5fpoiVQQP5xzPBie
Wkjdd0xPC7t4HxPxyFGDUrnllNbdAqNTRLpBPLiOvfoe/FBYNHp6AjDCh33feNMD
lbON+2E4j0KY0nrLTsZuID+h0dtaAYTSVubrTQiCoRoVT8vANy57eyCaet6feqyK
HFK+V8QN18X4jG5Me5SkrMOcihZWV2qZK/uTBe17EsJPsz4r0C/jlSy4HCcgl57e
0KuFpZUu2Y87Ssx7PFBCF144U+A6aWz0S+PbWD+rcK4WGEGn4c/514PtFa7KfLg2
U+KvadDIYBXZ+T95bAjqY75Ci4kqWpIAwP/J3Qcfb5URD/ZYkaxi+EsOkZvZoEsE
f+zZ/ahUYg==
=Q7+J
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSUaeoACgkQYKtH/8kJ
UifUvw/8Cb6UG88BJeQG3PS4B1ZiJ5Dd35u26o80ReUmFTLCcUUgUDHjXHHUbW+9
B/oooX6cOB6U3eiW5HVpWcq+5jOz2NhrPiQqXx49M5D80jvA1WgNUYeI9tma8F/m
ThMCWc1O0xTHzN4N1TtUdOg52Wh17Ynww8pLBTissxYqurhzuMIVtve72dpSaKsC
E891yZ3yz0S/tK1FjfP7Hgixlyc0Pbwg5F2JESPYXDPIpefaA5oLQC+5nV870MxJ
B32MWjQpSveUHgchFDPOuC9y7GMbzQCB580WezNtAns9rn1zn1hCVfmBXYt0tt6l
XW46+nd+a1G5T+0Z6KQxr86a/5ckkPxEEIfTcPCznonYFZTwxa2No4w16dmBARYW
SCsQ9JKI8pYve6k7/hk20lWFakn/A+VshbIjuR/MI/jLUNMrR4q6NXuRlcyO2WbK
MYvopJd6oHsfSDxqGHiH5QuAXyOngdd7CZdKYCIHPatrh2cTPgeGmX1e6eYeHJmv
ByO2vsaR/ijnXdsrq+mzL+oaAy6rGGFOYWKuNFov6MI+SnP7ijW9hAOwpGxnY8rz
Odh7Mbe7VoiHlWLfKCgCcjudHCFnG9ctVmNw6h2pPmY+guFnBp8+6dtlR/icENlI
h/nNoOLIt1zachOXOMbQFXDs2e0z7i1YLaz+2+OH7AR10s54EsY=
=stpo
-----END PGP SIGNATURE-----
Merge tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers
Memory controller drivers for v6.5
1. Renesas RPC IF: correct the Strobe Timing Adjustment.
2. Broadcom DPFE: fix smatch warning for testing array offset after use.
3. Atmel SDRAMC: drop driver because it was just a wrapper over enabling
clock which is not handled by its clock controller.
4. Minor bindings cleanup.
* tag 'memory-controller-drv-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
dt-bindings: memory-controllers: drop unneeded quotes
memory: atmel-sdramc: remove the driver
memory: brcmstb_dpfe: fix testing array offset after use
memory: renesas-rpc-if: Fix PHYCNT.STRTIM setting
Link: https://lore.kernel.org/r/20230612175508.288775-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Couple of main additions :-
1. Support for multiple SMC/HVC transports for SCMI:
Some platforms need to support multiple SCMI instances within
a platform(more commonly in a VM). The same SMC/HVC FID is used with
all the instances. The platform or the hypervisor needs a way to
distinguish among SMC/HVC calls made from different instances.
This change adds support for passing shmem channel address as the
parameters in the SMC/HVC call. The address is split into 4KB-page
and offset for simiplicity.
2. Addition od SCMI v3.2 explicit powercap enable/disable support:
SCMI v3.2 specification introduces support to disable powercapping
as a whole on the desired zones.
This change adds the needed support to the core SCMI powercap protocol,
exposing enable/disable protocol operations and then wiring up the new
operartions in the related powercap framework helpers.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmSHCbQACgkQAEG6vDF+
4phj9hAAjYYoJ9HvIqxJ68jRRh7BFnsdeCVqsGUzopeXbiWwr+uc0hko+oP8+hjz
R/tHvqhKuUiKC+ROOVHSx0VdU5721v2Uhvn5gtp2ZzKN/Iw7Mm/6dMlGDF790MSw
gkxJ5dog9H04HSGG1LvQIPKKY/BNUh7xvPkwoKlCO7DyNG+WQ5yyQT0v9DiZH8gg
j5eKX29gDZJEuzr8TlkpYHATyDlzMNVD0/pX97DedhqEqzVnms/yAa1R6zu+M0sn
8xyR2gy0UJ0w3unT8KxEbbxdJcykYxTbyVqJIc28xtVYA1EOGkFwZLYcVvy4z0LC
xny3PJSeL8g/pbrilbYNbYcqz9Qjb9eNU9XdDFa+Oy09skwnYr2uYje6XPBk/KFu
cQ5xs9ChJezcIRPBq/iV4Aqe5WK05IPZ0Q0HKsuTmdOOMaCsPui5nMkkybrm3KOU
uZ6z90Br854FI/pQqAqpwYY1Wqa1g6I4DFUwOtd04qD1V19s0CEDrx8uPtoKcSaP
0W+BeSv56Ukvn2rYPbu0teIzbk3s00kGqHcy1YKyq1rGmZSYrBf1bfmZkIJgfN/2
0cyzJAch4j4ggvnJQJPybWYjbmKfxE+A9hk3hjZ1mrew2wWeIsjevclu4wtNUCjc
qT3wa8SOtjaUGTQmvEWBKeYrkMcOhx+vxSo8SjemW/X3WjYswdw=
=uVB0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSUabgACgkQYKtH/8kJ
UieE8A//Rvcl3hDpZgNa6pCvX7dH3m2JttmBgBmGbH4mVffjqhstYknp8Fb8Faxq
91cGvAJ0QTn0Kaox7ycHQQVxLK5u7UfTmCe6pGGIDWZqXQDj6TETZoeWmiBgnTeS
510Id9S/CsSnjErO1D575fogSx2AohgBzIIk4r0YxZ0HcQiGteS7fAFjd4JMoheF
ZhUUmAu8Kp//grgeujvgQ59bCP4w6dqJ7KT/wnBZCy0CACpECA+LmYS1N/bnfPB2
rzxMo1GgUfSNEKxNx6T8UC9+LfUkitHNwfPyoe3av9GAGhozaTbGD9xll0DTj2iz
yFyhbgyY9aCxNMAwzq6hnveZi90X/bC1hnIidH5oyQkqTNTgE1X1y7SA6+SSfBzF
UlFafLq2xw+ENmDYOV6Lz4JREPhC2gFwjYqjn8teLQBriaCBIdtaedbGDnUVN0Ht
Iiv4baGtrIqbwosO2o/mfCLAveY/zh5aINv3rY1bkdfdFUQqS8gDlNGTuKDN+H+3
v80eyP8XPU2pZ7NTzSxcnz5SHSZWagVcugnzDEdeX2ZBeSKY50PzFZEY7OSU5k9o
iYjRyChHTTab/rG51GyhthVvszU9iKSQzmGco6OnaHd/vfCeXUfNKey98zVLbjUO
V8xJOAIZ9NNU9SzIfupfe9vjfIPOTxEqbWV3M4pvkgyKjNEddr4=
=Ze5+
-----END PGP SIGNATURE-----
Merge tag 'scmi-updates-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers
Arm SCMI updates for v6.5
Couple of main additions :-
1. Support for multiple SMC/HVC transports for SCMI:
Some platforms need to support multiple SCMI instances within
a platform(more commonly in a VM). The same SMC/HVC FID is used with
all the instances. The platform or the hypervisor needs a way to
distinguish among SMC/HVC calls made from different instances.
This change adds support for passing shmem channel address as the
parameters in the SMC/HVC call. The address is split into 4KB-page
and offset for simiplicity.
2. Addition od SCMI v3.2 explicit powercap enable/disable support:
SCMI v3.2 specification introduces support to disable powercapping
as a whole on the desired zones.
This change adds the needed support to the core SCMI powercap protocol,
exposing enable/disable protocol operations and then wiring up the new
operartions in the related powercap framework helpers.
* tag 'scmi-updates-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
powercap: arm_scmi: Add support for disabling powercaps on a zone
firmware: arm_scmi: Add Powercap protocol enable support
firmware: arm_scmi: Refactor the internal powercap get/set helpers
firmware: arm_scmi: Augment SMC/HVC to allow optional parameters
dt-bindings: firmware: arm,scmi: support for parameter in smc/hvc call
Link: https://lore.kernel.org/r/20230612121017.4108104-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
rk3588-based "General-register-files" register areas and a move to
C99 array inits for the dtpm driver to fix sparse warnings.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmSGMvYQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgVtnB/9Mm4ppU1GRJiK8TSZIVFfM5YZRoNyGgRXF
oGtF8LvMq7/v0Ep1G+NgvbwdwCpzlIM0Z9Uo/3AfVqft9rFN8TpKbYDLRGryuIbC
L+8kqk4pmBo/U6ZApwylUcBGNymyliHdsOYqMqbWqRvwK2tXbgMlO6c3Yna0VXD7
l8fvn9/jtHBQwVniF9iIGbQbAS+avJcyCamh8Wn/Hs5Ke60NRNUhLuvHs4mom82R
26IuO9QkkRQCU/hC22NydPnBmK7dSQMqiInI9XgoMYOZi9TJ8+OrTExc0kkUZVAL
i4Vg+XGmDXmTtAd11C6NjsLhMuzhsR1znk3ndQjsjUnw0QlhNSHP
=rrNf
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSUaYQACgkQYKtH/8kJ
UicjvQ/+KRFMBrgNgpylHsVDrOIEVCyBhxk7duMmOGEEljJwVM1MPsqRqBXr3Eck
4B8ZlKNDYw0V7+2mSdbwHWYsGmHd2srpJfXxTHQiCXNAxDXEIoJnDoTtIOYoY8ZD
CeTWEkPmavTT0AvkLPI4Es/2e/AbRbehp/SkNMfmN/d4UXL5lIqsNNZ7eqsqKCPU
VuR7vwvcB0+rJdjU/84eYdjPag2//r3+0qN6LzWNLLOO0Za7FAJ34WUZDiYM3db7
vHvvgbJo7YXuOueAmpv/wGB7NwZfXw8lYPPj230M1wH1cPqy4Dpo8Drj377HWPkk
90BxSkTnT2kN+dhjx3afzlIgemil3C8u60/QmdkwhY2MiFqB5TOClswI9oQZBTyY
1OiU8MxfXsprV2eFQqiTvf1XaDSVlVyUdQDgSVzxoTSd2WIxEnreKJZt7mxm97rW
w4D2ujbBuu9yfyMdAdWei2s/hFJdXIAJvXZjMgOu40nZdfL9myohdbaAVPe+fGV+
wZsvdUJJbAgEYSewvgFIjNTlA5/ATicr53DtPzcjslJT0C14Yp3jAGJJQao1ZJXP
A0h/BeW+VyNr/UYUPccJFL1hi83XXJqdndl/JOHyrZUbVZD7QA9AqT2gnquisWPA
2akMZ6mxdwN9ZgbMUIUOsv7DiSw6zctRe16whFljbynRDW0NzVg=
=R3D1
-----END PGP SIGNATURE-----
Merge tag 'v6.5-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/drivers
An addition to the rk3588 power-domains, some new syscon compatibles for
rk3588-based "General-register-files" register areas and a move to
C99 array inits for the dtpm driver to fix sparse warnings.
* tag 'v6.5-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: dtpm: use C99 array init syntax
dt-bindings: soc: rockchip: add rk3588 pipe-phy syscon
dt-bindings: soc: rockchip: add rk3588 usb2phy syscon
soc: rockchip: power-domain: add rk3588 mem module support
Link: https://lore.kernel.org/r/10286366.nUPlyArG6x@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Going a step further, we propose a way to use any user-space
workload as the task waiting for the timerlat timer. This is done
via a per-CPU file named osnoise/cpu$id/timerlat_fd file.
The tracef_fd allows a task to open at a time. When a task reads
the file, the timerlat timer is armed for future osnoise/timerlat_period_us
time. When the timer fires, it prints the IRQ latency and
wakes up the user-space thread waiting in the timerlat_fd.
The thread then starts to run, executes the timerlat measurement, prints
the thread scheduling latency and returns to user-space.
When the thread rereads the timerlat_fd, the tracer will print the
user-ret(urn) latency, which is an additional metric.
This additional metric is also traced by the tracer and can be used, for
example of measuring the context switch overhead from kernel-to-user and
user-to-kernel, or the response time for an arbitrary execution in
user-space.
The tracer supports one thread per CPU, the thread must be pinned to
the CPU, and it cannot migrate while holding the timerlat_fd. The reason
is that the tracer is per CPU (nothing prohibits the tracer from
allowing migrations in the future). The tracer monitors the migration
of the thread and disables the tracer if detected.
The timerlat_fd is only available for opening/reading when timerlat
tracer is enabled, and NO_OSNOISE_WORKLOAD is set.
The simplest way to activate this feature from user-space is:
-------------------------------- %< -----------------------------------
int main(void)
{
char buffer[1024];
int timerlat_fd;
int retval;
long cpu = 0; /* place in CPU 0 */
cpu_set_t set;
CPU_ZERO(&set);
CPU_SET(cpu, &set);
if (sched_setaffinity(gettid(), sizeof(set), &set) == -1)
return 1;
snprintf(buffer, sizeof(buffer),
"/sys/kernel/tracing/osnoise/per_cpu/cpu%ld/timerlat_fd",
cpu);
timerlat_fd = open(buffer, O_RDONLY);
if (timerlat_fd < 0) {
printf("error opening %s: %s\n", buffer, strerror(errno));
exit(1);
}
for (;;) {
retval = read(timerlat_fd, buffer, 1024);
if (retval < 0)
break;
}
close(timerlat_fd);
exit(0);
}
-------------------------------- >% -----------------------------------
When disabling timerlat, if there is a workload holding the timerlat_fd,
the SIGKILL will be sent to the thread.
Link: https://lkml.kernel.org/r/69fe66a863d2792ff4c3a149bf9e32e26468bb3a.1686063934.git.bristot@kernel.org
Cc: Juri Lelli <juri.lelli@redhat.com>
Cc: William White <chwhite@redhat.com>
Cc: Daniel Bristot de Oliveira <bristot@kernel.org>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Daniel Bristot de Oliveira <bristot@kernel.org>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Adding new available_filter_functions_addrs file that shows all available
functions (same as available_filter_functions) together with addresses,
like:
# cat available_filter_functions_addrs | head
ffffffff81000770 __traceiter_initcall_level
ffffffff810007c0 __traceiter_initcall_start
ffffffff81000810 __traceiter_initcall_finish
ffffffff81000860 trace_initcall_finish_cb
...
Note displayed address is the patch-site address and can differ from
/proc/kallsyms address.
It's useful to have address avilable for traceable symbols, so we don't
need to allways cross check kallsyms with available_filter_functions
(or the other way around) and have all the data in single file.
For backwards compatibility reasons we can't change the existing
available_filter_functions file output, but we need to add new file.
The problem is that we need to do 2 passes:
- through available_filter_functions and find out if the function is traceable
- through /proc/kallsyms to get the address for traceable function
Having available_filter_functions symbols together with addresses allow
us to skip the kallsyms step and we are ok with the address in
available_filter_functions_addr not being the function entry, because
kprobe_multi uses fprobe and that handles both entry and patch-site
address properly.
We have 2 interfaces how to create kprobe_multi link:
a) passing symbols to kernel
1) user gathers symbols and need to ensure that they are
trace-able -> pass through available_filter_functions file
2) kernel takes those symbols and translates them to addresses
through kallsyms api
3) addresses are passed to fprobe/ftrace through:
register_fprobe_ips
-> ftrace_set_filter_ips
b) passing addresses to kernel
1) user gathers symbols and needs to ensure that they are
trace-able -> pass through available_filter_functions file
2) user takes those symbols and translates them to addresses
through /proc/kallsyms
3) addresses are passed to the kernel and kernel calls:
register_fprobe_ips
-> ftrace_set_filter_ips
The new available_filter_functions_addrs file helps us with option b),
because we can make 'b 1' and 'b 2' in one step - while filtering traceable
functions, we get the address directly.
Link: https://lore.kernel.org/linux-trace-kernel/20230611130029.1202298-1-jolsa@kernel.org
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Andrii Nakryiko <andrii.nakryiko@gmail.com>
Tested-by: Jackie Liu <liuyun01@kylinos.cn> # x86
Suggested-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Suggested-by: Andrii Nakryiko <andrii@kernel.org>
Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Add the 'fsl,imx6ul-usdhc' value to the compatible properties list in
the fsl-imx-esdhc.yaml file. This is required to match the compatible
strings present in the 'mmc@2190000' node of 'imx6ul-prti6g.dtb'. This
commit addresses the following dtbs_check warning:
imx6ul-prti6g.dtb:0:0: /soc/bus@2100000/mmc@2190000: failed to match any schema with compatible: ['fsl,imx6ul-usdhc', 'fsl,imx6sx-usdhc']
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230621093245.78130-2-o.rempel@pengutronix.de
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The conditional if/then schema has an error as the "enum" values have
"const" in them. Drop the "const".
Signed-off-by: Rob Herring <robh@kernel.org>
Fixes: 46b616c157 ("dt-bindings: phy: brcm, brcmstb-usb-phy: add BCM4908 binding")
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Message-ID: <20230621230958.3815818-1-robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Update the example in the documentation to a valid example.
Address for mem-base was invalid, it pointed to address
0x8000'0000 which is the upper region of the DDR which
is not necessarily populated depending on the board.
This address should point to the base of the memory
window region of the controller which is 0xfa00'0000.
Add missing pinctrl.
Link: https://lore.kernel.org/r/20230418074700.1083505-7-rick.wertenbroek@gmail.com
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Socionext's DeveloperBox is based on the SC2A11B SoC (Synquacer).
Specify bindings for the platform and boards based on that.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Link: https://lore.kernel.org/r/20230621153658.60646-1-jaswinder.singh@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Allow a single HS port to be used e.g. without reg property and a unit
address. OF graph allows a single port node, without 'reg' property.
This removes a couple of Warnings or errors on STM32MP boards.
When using single HS port currently, when doing building with W=1:
arch/arm/boot/dts/stm32mp157c-dk2.dtb: stusb1600@28: connector:
Unevaluated properties are not allowed ('port' was unexpected)
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20230620085633.533187-1-fabrice.gasnier@foss.st.com
Signed-off-by: Rob Herring <robh@kernel.org>
The Micrel KS8851 can be attached to SPI or parallel bus and the
difference is expressed in compatibles. Allow common SPI properties
when this is a SPI variant and narrow the parallel memory bus properties
to the second case.
This fixes dtbs_check warning:
qcom-msm8960-cdp.dtb: ethernet@0: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230619170134.65395-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
WCN3990 comes with two chains - CH0 and CH1 - where each takes VDD
regulator. It seems VDD_CH1 is optional (Linux driver does not care
about it), so document it to fix dtbs_check warnings like:
sdm850-lenovo-yoga-c630.dtb: bluetooth: 'vddch1-supply' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230617165716.279857-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Hello,
This patch is to expose misc.current on cgroup v2 root for tracking
how much of the resource has been consumed in total on the system.
Most of the cloud infrastucture use cgroup to fetch the host
information for scheduling purpose.
Currently, the misc controller can be used by Intel TDX HKIDs and
AMD SEV ASIDs, which are both used for creating encrypted VMs.
Intel TDX and AMD SEV are mostly be used by the cloud providers
for providing confidential VMs.
In actual use of a server, these confidential VMs may be launched
in different ways. For the cloud solution, there are kubvirt and
coco (tracked by kubepods.slice); on host, they can be booted
directly through qemu by end user (tracked by user.slice), etc.
In this complex environment, when wanting to know how many resource
is used in total it has to iterate through all existing slices to
get the value of each misc.current and add them up to calculate
the total number of consumed keys.
So exposing misc.current to root cgroup tends to give much easier
when calculates how much resource has been used in total, which
helps to schedule and count resources for the cloud infrastucture.
Signed-off-by: LeiZhou-97 <lei.zhou@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Fix typo (period vs comma) in list of valid clock names.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230620200917.24958-1-mans@mansr.com
Signed-off-by: Rob Herring <robh@kernel.org>
The detection of split/non-split firmware files in the MDT loader is
corrected. The Geni driver is updated to not enable unused interrupts,
in some configurations. The count unit for MSM8998 in BWMON is corrected.
RPM master stats driver is corrected to check for the right return value
of devm_ioremap().
Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to
the list of platforms.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLPJsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3Fc9AQAMvf/8aE2FyhH3LE9n1otbRa82Lv
5MjvAM9N6PUJgMSuA71lZm6Bh3h/3SpbGjuRGkfGi4ZpkjZiI37ButZQq8YKVcOi
hDPjGiF8oiO1wk+JEwrC29jgpL+37T7/7jSynO2cYfu+uKXt3MhF9kmDeIiydjyf
hpN6IhGuyLm+dx38x9Vzsq4ew4uFNos+zP0ZInScSJV8UQ5sJjUCjQ4FDu1bHoFn
wQXa0Bd5ObYJilh71on9eJO7dQYLapv5omHI0lM04cYpYGfPpSTmXQwnbpmL7xqF
dyLiE+eq6jpi5yWIVpEFFwonty7Ixuq4yuMwMafYVGIriQ8a8J56HvfvZQ2FSb7D
1F/Rx74qkx1LEenNOBM5rUFyIGc93Up19DzFPNBX/WjJW0+7yBlXNUsg/bI2a/xV
Z+jURxcUWKa/ugiqjMZRXQ7VXC2uhrjD8xn22+w8eyziRoPPecq5KITizHv3CkOT
G7AhI69nFn8zhXHJ3cp4ci4AWzOCW4HXnTE9H8XMDFcu6hxylJDovrqCtt0nWqg+
QPKSqVtUF7BX/UMhhE5XdxqkxG//MyMN2W4dowxv+u35+6DCydyEm3XFuD85ETnt
YJx4iC5n8IGfb5jfOIyLK0JHQNU9ijPSd9rssLRebh96m4H0Op9gHlxDHyXghaRS
umZA+uKoxQQZhEXn
=KYPl
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTWk8ACgkQYKtH/8kJ
Uicu3hAAgerZS9Wdt+w+2cUhnkWWayByRwUmTvowFUR8vsbWLJVf1UwYQFiHVXhn
BsPSSGWSRm3vyUZjZyv3GegoWLsxH3LD8s7QngjPpF75HI+2ekD8J+tLNRiNqPll
/cZ1iQFVoTtfYUzAFpgBrYlFYV9P7B/6ghjEhuMc0HWLN4xFJ+13HL5NdCtvbDyn
zTrBSDlz3j94+PoS6n/y+9r8nLNZyp5Li5FUEoXf7uABI9dUqWokoSDV1hRA7zeF
MewEEcH7p5AZiL54L7cfLAlKwPQrUNYjerNxeljrwcp621wECniB030JmYKslSzS
ccfracaf7EBqRuu4SYH47VeLadikpBxrjP39CJFAlKQhB2X3uUNrSYjLyTLDkRRA
X/SN4sbm0ipToa6FlGJ68D3Ca+MHs541U6fhMgQuJ+S4D0pBjbmKUmQfs76L2Eu4
0ZDyYCQuJFmvd/P6ZKjX6hmkxDJ4OItop+K6doedAFf0/tAp6APry05aF56mbhDW
tsBJ0ABlFNY73wMhSu7HMm2rB7mDl3LnVfv67HrWAzaB+c23rkUDki67a1Gtr3lV
mG05JMSG2nETBRPv+II3pG/q7GzJwlqzHNxy3mwtBRILlzLjEl5fK+HgZRtGN8zr
7620aNOKR3lA7XGih1/ztlbpVqgH0c6Ahnm3pCHoQJJjMrK8oWI=
=YKVY
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
More Qualcomm driver updates for v6.5
The detection of split/non-split firmware files in the MDT loader is
corrected. The Geni driver is updated to not enable unused interrupts,
in some configurations. The count unit for MSM8998 in BWMON is corrected.
RPM master stats driver is corrected to check for the right return value
of devm_ioremap().
Support for socinfo version 18 and 19 are aded, and IPQ5300 is added to
the list of platforms.
* tag 'qcom-drivers-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: geni-se: Do not bother about enable/disable of interrupts in secondary sequencer
dt-bindings: sram: qcom,imem: document qdu1000
soc: qcom: icc-bwmon: Fix MSM8998 count unit
dt-bindings: soc: qcom,rpmh-rsc: Require power-domains
soc: qcom: socinfo: Add Soc ID for IPQ5300
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5300
soc: qcom: Fix a IS_ERR() vs NULL bug in probe
soc: qcom: socinfo: Add support for new fields in revision 19
soc: qcom: socinfo: Add support for new fields in revision 18
dt-bindings: firmware: scm: Add compatible for SDX75
soc: qcom: mdt_loader: Fix split image detection
Link: https://lore.kernel.org/r/20230615163104.1461905-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Konrad Dybcio is promoted, from reviewer, to co-maintainer.
The mdt_loader gets a fix to the detection of split binaries, where the
previous logic sometimes concluded that the first segments was not
split, in a split image. The unconditional calling of
scm_pas_mem_setup() turns out to cause a regression and is reverted.
The altmode subfunction of pmic_glink is enabled for SM8450.
A new driver for exposing power statistics from the RPM, for debugging
purposes, is introduced.
OCMEM gets a debug prints of the hardware version, QMI helpers are
transitioned to alloc_ordered_workqueue() and an error message in
ramp_controller is improved.
An API is introduced to the SMEM driver to allow other drivers to query
the SoC id, rather than open-coding the parsing of the relevant SMEM
item. This is then used to clean up the Qualcomm NVMEM-based cpufreq
driver.
Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFHJsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FrtoQAMUN2gF5ZP3rlSEkQbKNMDhNHXVw
S8AexPk6Qw8BcEBOD4YPqrmfrMvNP7Bqh3QkfS/7m5vx0o8bUOw+Xz+C4+9LSUD7
/qW29GlQllwMuRNOdH3J/nYXwpV5WJyiSF/jXy0/GRbz+D/XYSNDC57z/lXTcKKq
dYJrKxms6EF4AgHe88V0bmk6/V4xfa5p6xW3pCG7GLqNHOvhZ16oUmoPiZGVpQMk
go/HsoIB00HktKflTLOUXJWD6qVOVNCaQQEarx+zY1txfmvpVGL+PO6Eaxt00Sa4
pHRvB0CIZPNvdDWELfsfRx6DbPBJRGBlneag04BI918fx4X+jn4uP+1jzw9am03U
M78k0LGBY23Psy6KhoMu5MM4Cntt3kTQ0SwHl/xayzTrAhK2xdmd1bo67ArRl+HX
OZrZ7Se3Cm16CAWqsW42so6MJeDllc8d/ahN/e2NwsNy1lhosK06jRJEdh3N238D
ouL56HoxrweYB0kbK4TkPLewrLZC7DYnr0KMVsPhsSraeJBaBPOVZDhuNSUXXMtf
WdyCRMMxKU3OweLcJiKuGFzNqr2963341Y6NlD+tf1Uy5IEnbIp4jFi9BsJBNVZt
NucOXJYm5OJeAHp8BcMFbnL8uA1NqEYQXwezodPSIGqHzxBtGf6f0hALsIpiUQnA
GLDp99yVujEN2dsE
=9Fv4
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTVmkACgkQYKtH/8kJ
Uid08g//b5kJZnsiWA43LrkblMSEdZoeijrn+x2NU95YQ4s/oz2RnUtgNCGDhM84
Fi60PzU5L1JVj6GVeL51J5jlBGKzGqe4FfPTN4aPlSV4Z0B3cuevgWmHnw4Mh/zj
t/1b5QVVZxbKKxb8MP+U2iAvyxVwIhIA4zehh0+XGagV3qquURO7QLtLUg42Yx51
HFLADq2JI8trm+CjjCNBv9mq7EipC/g0nbsCs98nxl/sPC7PqtNxL6BXCuz3a8BX
JvA1LVRP2JYkQfb6SMnTFiqkT6LdB7bt6oXZdnwnsNTI1nhFqbMJRMsToWb3HEvv
9lprraDpaufbzvB1b+x8Aar4OmbbWaY2ZpNJqqzCM5eVW2Zs/p5J+ZfOYVigtQYO
qIQvENv+eKETu4nVvdlf72FPAVe+GXnVAcl3LEwhMUxYcRMha4JT0i8mndnCzpT+
tZLdkBMp/t7rZPIa7D+07Xmorefw9e9rwynQg2C2yw3AV5v7j09dPJDFITFcF6Yl
7ADtoy7zHTTv6/0n04RfPC9jPMoi8RbPoVNMVAWW7t7S0984o3gqWXJPLWJdTzA/
ODOupqmvSpZld1rUklKKH/dY/Ha7iUTSci7rZrXSafXR8LBEn2FO6ehZqUvk7T/u
qM3rs5wacHP2OcNDtwHHJoyfHXpxaQ2JqVOcUNkcdcwhN9dbdxA=
=4/0b
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for v6.5
Konrad Dybcio is promoted, from reviewer, to co-maintainer.
The mdt_loader gets a fix to the detection of split binaries, where the
previous logic sometimes concluded that the first segments was not
split, in a split image. The unconditional calling of
scm_pas_mem_setup() turns out to cause a regression and is reverted.
The altmode subfunction of pmic_glink is enabled for SM8450.
A new driver for exposing power statistics from the RPM, for debugging
purposes, is introduced.
OCMEM gets a debug prints of the hardware version, QMI helpers are
transitioned to alloc_ordered_workqueue() and an error message in
ramp_controller is improved.
An API is introduced to the SMEM driver to allow other drivers to query
the SoC id, rather than open-coding the parsing of the relevant SMEM
item. This is then used to clean up the Qualcomm NVMEM-based cpufreq
driver.
Socinfo is extended with knowledge about IPQ5018, IPQ5312 and IPQ5302.
* tag 'qcom-drivers-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (23 commits)
soc: qcom: ocmem: Add OCMEM hardware version print
cpufreq: qcom-nvmem: use helper to get SMEM SoC ID
cpufreq: qcom-nvmem: use SoC ID-s from bindings
soc: qcom: smem: introduce qcom_smem_get_soc_id()
soc: qcom: smem: Switch to EXPORT_SYMBOL_GPL()
soc: qcom: socinfo: move SMEM item struct and defines to a header
soc: qcom: mdt_loader: Fix unconditional call to scm_pas_mem_setup
MAINTAINERS: Add Konrad Dybcio as linux-arm-msm co-maintainer
dt-bindings: sram: qcom,imem: Document MSM8226
soc: qcom: socinfo: Add Soc ID for IPQ5312 and IPQ5302
dt-bindings: arm: qcom,ids: add SoC ID for IPQ5312 and IPQ5302
soc: qcom: socinfo: Add IDs for IPQ5018 family
dt-bindings: arm: qcom,ids: Add IDs for IPQ5018 family
soc: qcom: Introduce RPM master stats driver
dt-bindings: soc: qcom: Add RPM Master stats
soc: qcom: qmi: Use alloc_ordered_workqueue() to create ordered workqueues
soc: qcom: ramp_controller: Improve error message for failure in .remove()
dt-bindings: soc: qcom: smd-rpm: allow MSM8226 over SMD
soc: qcom: rpmpd: use correct __le32 type
dt-bindings: soc: qcom: eud: Fix compatible string in the example
...
Link: https://lore.kernel.org/r/20230611010044.2481875-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces an interconnect provider for the memory controller and
external memory controller found on Tegra234 chips that will eventually
be used to dynamically scale the EMC frequency based on a device's
bandwidth needs.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmSDRTcTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoaKyD/4sjVTfnZ9YoXkcPFd6zr1I8pNMC2pk
yyDtSHN0EGcw5goSHF+Akqv5O0JEh8YAW0pQ+fxO3KdEGlZEYNBlC9rgjpz7TzHE
6zsajiIvLYOwSTbjVVlFn2U4H6ihFdawzag/vRDqu1b3wExus9VigWnEgHtj/RJT
q1ODZXkwZrOBR3Z034ji6jJIQXVg54sEvt/Zlq7iYXabLXg8u5NDEbSd4GVBNwPB
SwBUfc9ja/Y5xUKaXA/hqQ7gIfm4Hs5XVyCbLT75j259qVantbxtlURB3cme080m
rRdyScngYFxuyBzQtQzLq+6u5tYJN6q3WUlXWvxI/gMw2IezFH6p0jXfCByriSMD
6d7h6Jk2d6bub3RUWLsurruHYSPqqvM9tI5sN6ZY4nq4uo0MplFEcrQBFXIJAJhy
X/JaO9166K0mX73wNFoEmmay5ZTd8wLKvGdlfaHUdUKJcldhh3Ivhl2r0w9Ij6qE
w1+QjUxtgabSb/69+3o2m4iil2I5Scc8jr3Vu1riW1yemKSQX7xS0PZ4a6k5/78O
2NGaFZqvs7Uo1EYGz91f50Go1hGLZOH0MMMjd+NSj3pZQvpB+BZ8rlGG7umbjIUF
aTBj5hcXN3bBx4VQGnLFwUEbEd6GIog+d6COtpmQzixwdXxw8aUB/m7ouFSegz34
MMEoE0i11HMlyg==
=OJYg
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTVC0ACgkQYKtH/8kJ
UieyxRAAiJKwY9bILWnKTPIJ+AlTDzp5ramSVsjD7KzlH6/pgWydgzRRhP/9zz87
f1/wnmMJ2vgWWa1g1NfeX4P8vZyHYsGiuBvQrevzP6Ekc0q19j6CI5tu5zDTy1aF
dqZtkpOTqO5+ioTL5bTem2XISvWNnK1TyaWzSHnvbNgfvrWtMiqij9mJyeaF3hdm
yCN0XbO8UaChbUobjgjzwg09BvrsN2CtG/2DATIgHUWDrkW0vER0QZRCF0V9mg3O
5kszkfLAsm/7TcQiPAeHEc2IXNRnYl1f4Gkjg7e47Itxkv5+rm/liejdYMZfIQmc
Kj0eQerTB974qrcBsrwVE12lNwDK4+3FbAWOZjbXaLtYf27+pSjoG0YVduv8VUNi
H81ehi+pHma7Boekf2i9XMVC1+EBBlpPBjxCpaDN5ck7kIkO2bBMX9avTGE9qfn5
9lpU64z6xHv/3YEcnOty4Ggs0V3ZLz4iRkFfWUDtYYsXnFyes1K9ooaDzHojisk0
/vE0KqImlZdlBuBUYpgEBcM/s4V1PtpN3nQtVpUUb77M90GmTLGwLjM8+Y1+JuXV
N9eGiPR8YhuMzy4eQR4YEfIqPqwEstRqkOicctJaCDi3Hg4OXmUdUDS66vV9wm+V
ntfdphilxBp2EHG42IhKkVH5LdSm/17xbxd2t1RwZ7cMZ7Q5hpw=
=7PpG
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.5-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
memory: tegra: Changes for v6.5-rc1
This introduces an interconnect provider for the memory controller and
external memory controller found on Tegra234 chips that will eventually
be used to dynamically scale the EMC frequency based on a device's
bandwidth needs.
* tag 'tegra-for-6.5-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: tegra: Make CPU cluster BW request a multiple of MC channels
memory: tegra: Add software memory clients in Tegra234
memory: tegra: Add memory clients for Tegra234
memory: tegra: Add interconnect support for DRAM scaling in Tegra234
dt-bindings: tegra: Add ICC IDs for dummy memory clients
dt-bindings: tegra: Document compatible for IGX
Link: https://lore.kernel.org/r/20230609193620.2275240-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
CoreSight and hwtracing subsystem updates for v6.5 includes:
- Fixes to the CTI module reference leaks. This involves,
redesign of how the helper devices are tracked and CTI
devices have been converted to helper devices.
- Fix removal of the trctraceidr file from sysfs for ETMs.
- Match all ETMv4 instances based on the ETMv4 architected
registers and the CoreSight Component ID (CID), than having
to add individual PIDs for CPUs.
- Add support for Dummy CoreSight source and sink drivers.
- Add James Clark as Reviewer for the CoreSight kernel drivers
- Fixes to HiSilicon PCIe Tune and Trace Device driver
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEuFy0byloRoXZHaWBxcXRZPKyBqEFAmSS/goACgkQxcXRZPKy
BqFShQ//Z25Qnf0y2VdOBgZ1xWYeOTjkeQ2AVYE2hepV78N5rnI8BgcwlBNrF5IA
uTu2U+nSenkCurWk+wOrmXaQ2SXkEEp2Gsm866WzeL4OjWsqxpdoZ1l2u7/YqxMK
4QIP2ELS71KcQMIIJ31eYDSMro/gA8xDPh2QGhZKihUQAsoVQOghX7Y1eoT+4a/V
pvsngu71iM45jHR1eFkp9/rQCKhy9OA58Q8gtg21uotOja9jvHQpRZ4TGN7en0CP
RDVmIaxRDh3sPWoVpIPYs3nL8DX2NeSX5BVC/xq2P0UAHN6C9rp+Kom1XN7VZqS6
UdgyNw1iulwtGW0zF5jwZrj5ZGMY4CFQhS6R3/DF5ohzuSwtSOY32cYyLKrUjmpx
W0Nj7Pu/UaHU/kTu5+qItgTp0FP6du9p2VnZZuhroGLkGRSi2u392gKmPnKbErx5
8tLo2ucAw1Kasm7pef2rj9M9etcWJws+dD1qWg96fvuKvJQX9+milweyg0I4NTXy
p8GHpITZ65chWUJjqlxgnbvhB2V1eKP6bpG3sjzhCC2h9yXyzn4grOoSu/XNVQdx
W3ldxRMlsoIFBbUb42yJQROSVezaYVC+5sk+fufRVbNR3b5ZmJOGYiCUtM+MMvtj
q/1M/liPOYIf6Ix94EzxujdU12Ki5XLb5rWZqS3Gvebc8OG+o9E=
=XWfo
-----END PGP SIGNATURE-----
Merge tag 'coresight-next-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next
Suzuki writes:
coresight: Updates for v6.5
CoreSight and hwtracing subsystem updates for v6.5 includes:
- Fixes to the CTI module reference leaks. This involves,
redesign of how the helper devices are tracked and CTI
devices have been converted to helper devices.
- Fix removal of the trctraceidr file from sysfs for ETMs.
- Match all ETMv4 instances based on the ETMv4 architected
registers and the CoreSight Component ID (CID), than having
to add individual PIDs for CPUs.
- Add support for Dummy CoreSight source and sink drivers.
- Add James Clark as Reviewer for the CoreSight kernel drivers
- Fixes to HiSilicon PCIe Tune and Trace Device driver
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
* tag 'coresight-next-v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (27 commits)
hwtracing: hisi_ptt: Fix potential sleep in atomic context
hwtracing: hisi_ptt: Advertise PERF_PMU_CAP_NO_EXCLUDE for PTT PMU
hwtracing: hisi_ptt: Export available filters through sysfs
hwtracing: hisi_ptt: Add support for dynamically updating the filter list
hwtracing: hisi_ptt: Factor out filter allocation and release operation
coresight: dummy: Update type of mode parameter in dummy_{sink,source}_enable()
Documentation: trace: Add documentation for Coresight Dummy Trace
dt-bindings: arm: Add support for Coresight dummy trace
Coresight: Add coresight dummy driver
MAINTAINERS: coresight: Add James Clark as Reviewer
coresight: etm4x: Match all ETM4 instances based on DEVARCH and DEVTYPE
coresight: etm4x: Make etm4_remove_dev() return void
coresight: etm4x: Fix missing trctraceidr file in sysfs
coresight: Fix CTI module refcount leak by making it a helper device
coresight: Enable and disable helper devices adjacent to the path
coresight: Refactor out buffer allocation function for ETR
coresight: Make refcount a property of the connection
coresight: Store in-connections as well as out-connections
coresight: Simplify connection fixup mechanism
coresight: Store pointers to connections rather than an array of them
...
This pull request contains the interconnect changes for the 6.5-rc1 merge
window which is a mix of core and driver changes with the following highlights:
- Support for configuring QoS on the Qualcomm's RPM-based platforms, that
required special handling of some interface (non-scaling) clocks.
- Support for clock-based interconnect providers for cases when clock
corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth
scaling on MSM8996 platforms. One patch is touching a file in the clock
subsystem that has been acked by the maintainer.
Core changes:
interconnect: add clk-based icc provider support
interconnect: icc-clk: fix modular build
interconnect: drop unused icc_get() interface
Driver changes:
interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
interconnect: qcom: rpm: Drop unused parameters
interconnect: qcom: rpm: Set QoS registers only once
interconnect: qcom: rpm: Handle interface clocks
interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
interconnect: qcom: msm8996: Promote to core_initcall
interconnect: qcom: rpm: allocate enough data in probe()
dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes
Signed-off-by: Georgi Djakov <djakov@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJkkyQsAAoJEIDQzArG2BZj7GQQAMLrW2sZcxJhq5Fe2wKV4W5M
ItIE7xME1Vk9PvuulZIJ57tZIKfOTJpXwwbh6qWJOejYGePrmgtT89iS0fadO81f
yCKv2O2hD+Xukv+gFzyuX3AYEfur7myaCTfmRx93xVDYUz0d95Kj4BlYA84xkjXU
i+wte+nX/nw9W78s+Y9BHcs389a3HTre0WR1c0eOboPmt8D0U9cBOdiZMHkSUc+4
/8RDUYRdsTBR0AblpPExm2JjoSRKUGEw7N8ZFZhOXaejCjmGoeVXeTdnHO+tjXaq
HQ9290C9Pz0BZWdKXaFFfjc4Wqu3RYjdXJmHNo74a4sFHE+H/j33eRSgC24qMWg5
5hRsH8+gv0ZhoyLv6Ucd2MRQQvvUYCLNNeTlQ2/RkOFuqewLKqpXCiihbuKUpOi0
CLeWKTDjNlIM5murJURXX88+xjZ1UvpuBXe/U+i9jrhjSQ6IjnAppoDw7anrrxTE
ldLGFPzJoWL8VO1H0povS08/kd25+fgkjL/3pZHagSMLjDWNOXA+xDLkRYGBCNi7
rZpLT/4nBFTcrcYEsJ2EPAqHYK19kD76NVrz+Fj2gzF9Ych3q+2MSkLb132Qkyzf
qLn3SqWJQoPAhy0kQbOt3XBnYon8QjVEpcZIWf9J3Qr2au4SdHi7hr3ki86a5Pfz
ne03bJDC237hO6q4jY0b
=Smk9
-----END PGP SIGNATURE-----
Merge tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
Georgi writes:
interconnect changes for 6.5
This pull request contains the interconnect changes for the 6.5-rc1 merge
window which is a mix of core and driver changes with the following highlights:
- Support for configuring QoS on the Qualcomm's RPM-based platforms, that
required special handling of some interface (non-scaling) clocks.
- Support for clock-based interconnect providers for cases when clock
corresponds to bus bandwidth. This is used to enable CPU cluster bandwidth
scaling on MSM8996 platforms. One patch is touching a file in the clock
subsystem that has been acked by the maintainer.
Core changes:
interconnect: add clk-based icc provider support
interconnect: icc-clk: fix modular build
interconnect: drop unused icc_get() interface
Driver changes:
interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
interconnect: qcom: rpm: Drop unused parameters
interconnect: qcom: rpm: Set QoS registers only once
interconnect: qcom: rpm: Handle interface clocks
interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
interconnect: qcom: msm8996: Promote to core_initcall
interconnect: qcom: rpm: allocate enough data in probe()
dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes
Signed-off-by: Georgi Djakov <djakov@kernel.org>
* tag 'icc-6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
dt-bindings: interconnect: fsl,imx8m-noc: drop unneeded quotes
interconnect: icc-clk: fix modular build
clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq
interconnect: drop unused icc_get() interface
interconnect: qcom: rpm: allocate enough data in probe()
interconnect: qcom: msm8996: Promote to core_initcall
interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore
interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks
interconnect: qcom: rpm: Handle interface clocks
interconnect: add clk-based icc provider support
dt-bindings: interconnect/msm8996-cbf: add defines to be used by CBF
interconnect: qcom: rpm: Set QoS registers only once
interconnect: qcom: rpm: Drop unused parameters
interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks
interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks
With dt-schema v2021.02 these properties are added by default. Some SoC
(e.g. imx8mq) configure more than just one clock using these properties.
Fixes: f9b0593dd4 ("dt-bindings: phy: Convert mixel,mipi-dsi-phy to json-schema")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230609071538.149712-1-alexander.stein@ew.tq-group.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Make the pattern matching node names a bit stricter to improve DTS
consistency. The pattern is restricted to:
1. Only one unit address or one -N suffix,
2. -N suffixes to decimal numbers.
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230530144851.92059-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Mutually exclusive s5m8767,pmic-buck[234]-uses-gpio-dvs properties can
be written simpler, with half of the lines of code.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230619101424.25897-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>
Remove the unnecessary #address-cells and #size-cells nodes from
the fan-controller. These are not needed as the fan controller does not
have any children.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230612162444.3936302-1-tharvey@gateworks.com
Signed-off-by: Lee Jones <lee@kernel.org>
The arm64 documentation has move under Documentation/arch/ fix a reference
to match.
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Architecture-specific documentation is being moved into Documentation/arch/
as a way of cleaning up the top-level documentation directory and making
the docs hierarchy more closely match the source hierarchy. Move
Documentation/arm64 into arch/ (along with the Chinese equvalent
translations) and fix up documentation references.
Cc: Will Deacon <will@kernel.org>
Cc: Alex Shi <alexs@kernel.org>
Cc: Hu Haowen <src.res@email.cn>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Yantengsi <siyanteng@loongson.cn>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Similar to commit 41ebfc91f7 ("dt-bindings: riscv: explicitly mention
assumption of Zicsr & Zifencei support"), the Zicntr and Zihpm
extensions also used to be part of the base ISA but were removed after
the bindings were merged. Document the assumption of their presence in
the base ISA.
Suggested-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230607-rerun-retinal-5e8ba89e98f1@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Adds device tree binding documentation for system controller node present
in Mediatek MIPS and Ralink SOCs. This node is a clock and reset provider
for the rest of the world. This covers RT2880, RT3050, RT3052, RT3350,
RT3883, RT5350, MT7620, MT7628 and MT7688 SoCs.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add binding for WSA8840/WSA8845/WSA8845H smart speaker amplifiers used
in Qualcomm QRD8550 board with SM8550 SoC.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230616115751.392886-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The imx8ulp and imx8qm are compatible with imx8dxl. This will add such
compatible.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230613083445.1129137-2-xu.yang_2@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Convert the binding to DT schema format. Besides, this also add clocks,
'#phy-cells', phy-3p0-supply and power-domains properties which are not
contained in txt file due to txt file lack updates.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230613083445.1129137-1-xu.yang_2@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The PTT can only filter the traced TLP headers by the Root Ports or the
Requester ID of the Endpoint, which are located on the same PCIe core of
the PTT device. The filter value used is derived from the BDF number of
the supported Root Port or the Endpoint. It's not friendly enough for the
users since it requires the user to be familiar enough with the platform
and calculate the filter value manually.
This patch export the available filters through sysfs. Each available
filters is presented as an individual file with the name of the BDF
number of the related PCIe device. The files are created under
$(PTT PMU dir)/available_root_port_filters and
$(PTT PMU dir)/available_requester_filters respectively. The filter
value can be known by reading the related file.
Then the users can easily know the available filters for trace and get
the filter values without calculating.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230621092804.15120-4-yangyicong@huawei.com
The PCIe devices supported by the PTT trace can be removed/rescanned by
hotplug or through sysfs. Add support for dynamically updating the
available filter list by registering a PCI bus notifier block. Then user
can always get latest information about available tracing filters and
driver can block the invalid filters of which related devices no longer
exist in the system.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230621092804.15120-3-yangyicong@huawei.com
fsverity builtin signatures (CONFIG_FS_VERITY_BUILTIN_SIGNATURES) aren't
the only way to do signatures with fsverity, and they have some major
limitations. Yet, more users have tried to use them, e.g. recently by
https://github.com/ostreedev/ostree/pull/2640. In most cases this seems
to be because users aren't sufficiently familiar with the limitations of
this feature and what the alternatives are.
Therefore, make some updates to the documentation to try to clarify the
properties of this feature and nudge users in the right direction.
Note that the Integrity Policy Enforcement (IPE) LSM, which is not yet
upstream, is planned to use the builtin signatures. (This differs from
IMA, which uses its own signature mechanism.) For that reason, my
earlier patch "fsverity: mark builtin signatures as deprecated"
(https://lore.kernel.org/r/20221208033548.122704-1-ebiggers@kernel.org),
which marked builtin signatures as "deprecated", was controversial.
This patch therefore stops short of marking the feature as deprecated.
I've also revised the language to focus on better explaining the feature
and what its alternatives are.
Link: https://lore.kernel.org/r/20230620041937.5809-1-ebiggers@kernel.org
Reviewed-by: Colin Walters <walters@verbum.org>
Reviewed-by: Luca Boccassi <bluca@debian.org>
Signed-off-by: Eric Biggers <ebiggers@google.com>
For gapless playback it is possible that each track can have different
codec profile with same decoder, for example we have WMA album,
we may have different tracks as WMA v9, WMA v10 and so on
Or if DSP's like QDSP have abililty to switch decoders on single stream
for each track, then this call could be used to set new codec parameters.
Existing code does not allow to change this profile while doing gapless
playback.
Reuse existing SNDRV_COMPRESS_SET_PARAMS to set this new track params along
some additional checks to enforce proper state machine.
With this new changes now the user can call SNDRV_COMPRESS_SET_PARAMS
anytime after setting next track and additional check in write should
also ensure that params are set before writing new data.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20230619092805.21649-1-srinivas.kandagatla@linaro.org
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Add the compatible for the MAC controller on sa8775p platforms. This MAC
works with a single interrupt so add minItems to the interrupts property.
The fourth clock's name is different here so change it. Enable relevant
PHY properties. Add the relevant compatibles to the binding document for
snps,dwmac as well.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Add documentation for the two newly introduced options for the
function_graph tracer. The funcgraph-retval option is used to
control whether or not to display the return value, while the
funcgraph-retval-hex option is used to control the display
format of the return value.
Link: https://lkml.kernel.org/r/2b5635f05146161b54c9ea6307e25efe5ccebdad.1680954589.git.pengdonglin@sangfor.com.cn
Acked-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
Signed-off-by: Donglin Peng <pengdonglin@sangfor.com.cn>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
- Fix MAINTAINERS file to point to proper mailing list for rtla and rv
The mailing list pointed to linux-trace-devel instead of
linux-trace-kernel. The former is for the tracing libraries
and the latter is for anything in the Linux kernel tree.
The wrong mailing list was used because linux-trace-kernel did not
exist when rtla and rv were created.
- User events:
. Fix matching of dynamic events to their user events
When user writes to dynamic_events file, a lookup of the
registered dynamic events are made, but there were some cases
that a match could be incorrectly made.
. Add auto cleanup of user events
Have the user events automatically get removed when the last
reference (file descriptor) is closed. This was asked for to
prevent leaks of user events hanging around needing admins
to clean them up.
. Add persistent logic (but not let user space use it yet)
In some cases, having a persistent user event (one that does not
get cleaned up automatically) is useful. But there's still
debates about how to expose this to user space. The infrastructure
is added, but the API is not.
. Update the selftests
Update the user event selftests to reflect the above changes.
-----BEGIN PGP SIGNATURE-----
iIoEABYIADIWIQRRSw7ePDh/lE+zeZMp5XQQmuv6qgUCZJGrABQccm9zdGVkdEBn
b29kbWlzLm9yZwAKCRAp5XQQmuv6qgRDAQDvF8ktlcn+gqyUxt2OcTlbBh0jqS0b
FKXYdq6FTgfWYQD/ctunFbPdzn4D6Kc/lG8p4QxpMmtA19BUOPwEt3CkAwM=
=CDzr
-----END PGP SIGNATURE-----
Merge tag 'trace-v6.4-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace
Pull tracing fixes from Steven Rostedt:
- Fix MAINTAINERS file to point to proper mailing list for rtla and rv
The mailing list pointed to linux-trace-devel instead of
linux-trace-kernel. The former is for the tracing libraries and the
latter is for anything in the Linux kernel tree. The wrong mailing
list was used because linux-trace-kernel did not exist when rtla and
rv were created.
- User events:
- Fix matching of dynamic events to their user events
When user writes to dynamic_events file, a lookup of the
registered dynamic events is made, but there were some cases that
a match could be incorrectly made.
- Add auto cleanup of user events
Have the user events automatically get removed when the last
reference (file descriptor) is closed. This was asked for to
prevent leaks of user events hanging around needing admins to
clean them up.
- Add persistent logic (but not let user space use it yet)
In some cases, having a persistent user event (one that does not
get cleaned up automatically) is useful. But there's still debates
about how to expose this to user space. The infrastructure is
added, but the API is not.
- Update the selftests
Update the user event selftests to reflect the above changes"
* tag 'trace-v6.4-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace:
tracing/user_events: Document auto-cleanup and remove dyn_event refs
selftests/user_events: Adapt dyn_test to non-persist events
selftests/user_events: Ensure auto cleanup works as expected
tracing/user_events: Add auto cleanup and future persist flag
tracing/user_events: Track refcount consistently via put/get
tracing/user_events: Store register flags on events
tracing/user_events: Remove user_ns walk for groups
selftests/user_events: Add perf self-test for empty arguments events
selftests/user_events: Clear the events after perf self-test
selftests/user_events: Add ftrace self-test for empty arguments events
tracing/user_events: Fix the incorrect trace record for empty arguments events
tracing: Modify print_fields() for fields output order
tracing/user_events: Handle matching arguments that is null from dyn_events
tracing/user_events: Prevent same name but different args event
tracing/rv/rtla: Update MAINTAINERS file to point to proper mailing list
T-Head:
Add a basic dtsi, Kconfig bits & trivial binding additions for the T-Head
1520 SoC (codename "light"). This SoC can be found on the Lichee Pi 4a,
for which a minimal dts is added.
Misc:
Re-sort the dts Makefile to be in alphanumerical order by directory.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZJDOAwAKCRB4tDGHoIJi
0gAoAQCqGDPqdw5MdT/+tTJqkAIVFo3KyxSrMHvv3TE36Xp1HgEAxJQ+NoZ30nhx
pbaJaRcZDw7PKOVmMJ92R564EMdjngA=
=hJMo
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSFO4ACgkQYKtH/8kJ
UiekuA//UW0YV5dUVykYY7EAB9ERnRfnD8S9SaaRQ+rvlZLLfceqcsGqHeB1f5nA
cb4mRcS47PgTZLBpS7ZaURXFaQtJMEqFKwC/y7cjsssuXq+Vr2jf3apEL2F8IVA3
EQGTBPA9AA2+L+hSnVNCqjJP86H8y4+RuWiADUTHG9tmPrMMwHaUdL/og7Bk4zps
jmBfZ6oD7upRS9+elwIInB+YH4dEnbty4VgVjJzL2PtGIS2V0zkSG+lmCv4JJmz8
esD4PT+4nnMBCh5LrGNxTJgn9zQyMHZ/pr1mK5n0hE+SLeZZj7DnEWKkchOJPdlk
Hu31+dJMjcTdvJAATIqeiuUPJhhpRyLf+PenXUX48uc/nu5GZWFj/TL/fdSHoYG1
D0B1SNcJOtWm5Iy7fukMoV8e6Pz8EePTh7m/AtUaudCCDFwh/ju1TnbIzqs9DPtc
iHYfFti7qVVQFL6YJnjpHHIK7UKJi4MguyDfKdl8RsRzT1Yhrx1aw0WqSYiY+a/z
sdAzA85yZpU7TPmCw1DThE6uNp3YC5XqKmexwcZx3+cmpCF7HKxCieTqyVgsUkwg
9BxsQmReP1bego4oK7dGE914i0lkaGH/wDVlL0PPGPoCL8g9ZIfBGukN8sG62m9O
sGPs2j4do28BK11Ow0OoRvVTbnoqZg0iGFJbk6DuWXtK881PfUc=
=U5qO
-----END PGP SIGNATURE-----
Merge tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.5 Part 2
T-Head:
Add a basic dtsi, Kconfig bits & trivial binding additions for the T-Head
1520 SoC (codename "light"). This SoC can be found on the Lichee Pi 4a,
for which a minimal dts is added.
Misc:
Re-sort the dts Makefile to be in alphanumerical order by directory.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
dt-bindings: riscv: Add T-HEAD TH1520 board compatibles
dt-bindings: timer: Add T-HEAD TH1520 clint
dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC
Link: https://lore.kernel.org/r/20230620-fidelity-variety-60b47c889e31@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 6.5, please pull the following:
- Krzysztof adds missing cache properties for the BCM63xx DSL routers
- Rafal relicenses a number of the BCM5301X DTS files to the GPL 2.0+ / MIT license,
and he fixes a number of Device Tree nodes warnings, adds MAC address
for all Luxul routers and adds Netgear R8000 Wi-Fi regulatory
information to the DTS
- Stanislav updates the "BCM mobile" SoCs DTS files to fix various
warnings
- Aurelien enables the BCM283x DTS files to be built with relocation
information to make them usable with DT overlays
- Christian fixes the Meraki DTS to have correct NAND ECC properties,
correct partition numbers and fixed-link node(s) properties
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmSQRAMACgkQh9CWnEQH
BwS+rg//Zp1d2bP9Vq7VrcxPyP+tB2VfxjpyGwKip/6wVB6rT2pUxph3B2Iml5OS
W0i4oZbE1cYIgbJJYGXE3BmnTU9LI6aJlIhH0zQBoMKNjkBCxVSSr8QytG/NuYn7
w40zXCZmLZUBz10AZXW6lIMv3bJtuoCJiDXvP9wjwcfclrfs+VrshQLPUtYlrWxp
LmDobd1Z6cw9eob9FtZ5Jo/w8RsGatNjORtfJkA5loozx0wP7vL267DtzmRKYNEo
pZ3MtZe/La3HOOfSd+/bVqi5HgTAQzszwQL+3Oi30eybhMhrvDXhQkGTUGzJOtf3
ajd7LfhN+JhEjBd53IJMAnpy1jMs4cRqibTAbUldLOrbcgRbHikicSNPPKGT8t8S
CRmb+oV8zBrmT9K1R2BJMjRYT4a7mTRY3a02vNnBHXsMtXZ959WCviVEuT6eIivo
5UpnoeFPW7ke4GiyWCqb240PmQ8mpe4LB5MkwpEwqhwdN58pPaQ4IgdS/+PBNGYi
ksVAmOjyHDW4Z/Q/yn67tcDr9h1v8r5nk7/eJMLMC00EQ1LE3ysg18ZpUKowIL67
N+WVWt0ZjUo62tABPIh1zXFtuj90kDZ3VdrK9EBdT1zzHNU51+aZnbjPs59lhwNy
Y4ZX4yu4p5loXjn+St7glZwBzsprQQHd6VNsRnFcgKynQzHtc3U=
=t3sW
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSFGYACgkQYKtH/8kJ
UifFjw//ZfVrYuz/WiXRWW0CKqsVzoB7M4aJ+ZrKHaaWGEqroc/2Hom7PNjRP0kA
BWaXDEfdFOhY53m9ycS0EG4/eMVwdxEgYq3e2rkA4CAXfW35e0stmMWFqcmml3QI
fv8xZEZKLLQy7D5yT4ZUS9FUqQeyOMnyQyq1P7m+87hN7JjUxJBjClhiFm6Hvo5g
WBW7qVWGi7HWewpxflcNy0SJChiAyX04FezN863JPtZu3wD3q6fJlp44LripYXEu
ekUdPFCtNultZd7t6Th3p4/4cESgXi18eQ6Cg3pfRJaEkwXUsvYTs+/ojUGEiQVI
vSyFDeWdKd/2S4LUv2oXkbzb6Id5Bdio5rI5Wp1gZiHEzoWSLzAA1c13oV3/NXzo
ilEi1hZQV303MaqrMiBD1rxrM++lCtkGkrPz+E59tip47p4YlJ5/oQj5FtW4rXlP
HLjOXDWQENf1rXPrspEYEixGHyF4CzJJsl6ZaQnwwtheo4+hm73xBxhir/c3zQFO
V/ptJh1v5Ys/S1jZMuk/XJkw39Q7/fwuKNP8L+3n8zxzQXb06DBJ2bBMmDOFarxG
8bLIypxsHtpwKa4UNyBXRhwdDVWttZLXaJD/+BQQDQgnX1BjTpTCJm9x5wBF39Yl
vA4IUunfMlP+aV5rGR0GMjjXti/A7sPEZe2xrH4wv7XrpSb34Ok=
=AA1g
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-6.5/devicetree' of https://github.com/Broadcom/stblinux into soc/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.5, please pull the following:
- Krzysztof adds missing cache properties for the BCM63xx DSL routers
- Rafal relicenses a number of the BCM5301X DTS files to the GPL 2.0+ / MIT license,
and he fixes a number of Device Tree nodes warnings, adds MAC address
for all Luxul routers and adds Netgear R8000 Wi-Fi regulatory
information to the DTS
- Stanislav updates the "BCM mobile" SoCs DTS files to fix various
warnings
- Aurelien enables the BCM283x DTS files to be built with relocation
information to make them usable with DT overlays
- Christian fixes the Meraki DTS to have correct NAND ECC properties,
correct partition numbers and fixed-link node(s) properties
* tag 'arm-soc/for-6.5/devicetree' of https://github.com/Broadcom/stblinux: (33 commits)
ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
dt-bindings: firmware: brcm,kona-smc: convert to YAML
ARM: dts: BCM5301X: Add Netgear R8000 WiFi regulator mappings
dt-bindings: net: wireless: brcm,bcm4329-fmac: allow generic properties
dt-bindings: net: wireless: brcm,bcm4329-fmac: add BCM4366 binding
ARM: dts: BCM5301X: fix duplex-full => full-duplex
ARM: dts: BCM5301X: MR32: remove partition index numbers
ARM: dts: BCM5301X: MR26: MR32: remove bogus nand-ecc-algo property
dt-bindings: power: reset: bcm21664-resetmgr: convert to YAML
ARM: dts: bcm21664-garnet: use node labels
ARM: dts: bcm11351/21664: add UART, I2C node labels
ARM: dts: bcm-mobile: move status properties to the end of nodes
ARM: dts: bcm21664/23550: use CCU compatibles directly
ARM: dts: bcm-mobile: change "" includes to <> where applicable
ARM: dts: BCM5301X: Describe switch ports in the main DTS
ARM: dts: BCM5301X: Relicense Christian's code to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Drop invalid properties from Meraki MR32 keys
ARM: dts: BCM5301X: Drop invalid #usb-cells
dt-bindings: arm: bcm: Add bindings for Buffalo WZR-1166DHP(2)
ARM: dts: BCM5301X: Use updated "spi-gpio" binding properties
...
Link: https://lore.kernel.org/r/20230619134920.3384844-1-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces support for the Qualcomm SDX75 platform, with the IDP
reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the
RDP454 is introduced.
On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added.
For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added
to the CPU cluster power-domain to flush sleep & wake votes as the
cluster goes down.
On IPQ5332 additional reserved-memory regions to improve post mortem
debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the
RDP474 is added.
On IPQ8074 critical thermal trip points are defined.
As with IPQ5332 additional reserved-memory regions are used to improve
post mortem debugging. Thermal sensors (tsens) are added and zones
defined. The crypto engine is added, and support for the RDP454 board is
added.
Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and
the purpose of msm8939-pm8916 is documented. MSM8939 has regulator
definitions cleaned up, following to the previous effort on MSM8916.
CPU Bus Fabric scaling support is added to MSM8996 Pro.
On QCM2290 CPU idle states are added.
For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC
support. IMEM and PIL information regions are defined for improved post
mortem debugging.
The Qualcomm Robotics RB2 kit gets its on-board buttons described.
A few fixes are introduced for the newly merged SC8180X, in particluar
the DisplayPort blocks are moved to the MMCX power domain to avoid power
being reduced prematurely during boot.
The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s,
and resets for the soundwire controllers are added. The OUI is
specified for ethernet phys on SA8540P Ride platform, to avoid reset
issues.
Charger description is added to the PMI8998 PMIC and enabled across
OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1.
On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU
clock controller and IOMMU definitions.
The Fairphone FP4 gains Bluetooth support.
SM8150 is transitioned to use 2 interconnect-cells, and the USB
interconnect path is described to ensure buses are adequately voted for.
The same changes are done for SM8250, and the resolution of the
static framebuffer on Sony Xperia 1 II and 5 II are corrected.
The USB bus paths are also added to SM8350, SM8450 and SM8550.
On SM8550 DisplayPort nodes are added, as is the PWM controller for
driving the notification LED and the RTC is enabled. For the MTP and QRD
boards, the soundcard and audio codecs are defined.
A Tegra change, related to LP855X binding changes, was accidentally
picked up and dropped again later.
A number of DeviceTree fixes identified through validation was
introduced as well. Additionally a few nodes got their default status
changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu
node).
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSLOjsVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FlyUP/0PZFIRutqnwwr/daOZAhDgw6pQW
jseUFIUb9yKan8KJZcHOf38xxqfj/bllQQNIQeM8qw03e7LJf/Mcteg3FYNgxD9m
vAWdQby2ZBcAYy3Qxjc3H+cb2fPV8yEJZ4JX/yOuLPfx9zE8HMoT8M9JBHZlZc8T
0fzgVxqRz1wt5Qjzv+BsWg4GUiTARtRbYxDVzdFZFDF6f7Xcpdsq+HaImJdYisXh
m/2lQ34rDBTVOMN6Og5U7lGjfCyk6hn3k0OoSpObLRBNV34JH6ViDVhmNbFWKNNS
QGFDAEa+jjQDrEo2cUHiHfnlKzcQpheLoco7MNkzDwy/8Rd3/k3ndj/+oCpgGea5
VFTb0LygJPQnHfggzpxc+v2pBfoocEUvKrI+sluXeNnLua+jvlLz6Z8Wm6mVaBZv
hzw4NqaXHRtzqgjo/37t7Hwns+uyd+rg/gjh8xfdu65/kVZiTstK1BGVCoKMs1LD
J0UcQGaevfBH9+EYNcKly5qjEMhsUxwn4i7oyjerdQ7Wt4nwzPqfs7zv513Ns5bO
eLG49FsCZjzvAn4AC3R1POPVrP2RBg/zeBzL/34gkgBLr/TR1k1zyPWxovb6Tuq9
8R3T4XBA1kwh1c7R5av1033dyvW4N8y6vp9z+kExuPz4qQ+SsWKoXAeM2budkTQ/
c3oBU6U+BH9oCvSV
=Fga/
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEgoACgkQYKtH/8kJ
UifYRg//Uu6CMkGFJCfMVNS8Z0lykAW3FtEupzi+lWVP+2i+QsR8FXTZ3EumyBA6
QoRX1FtEKtRdJatMUgWlCbv8newKiII9fwKrV/EK7u/CTC79zX9ak3DonxXu7Z2i
a6dzH5GVnHfVe7BTQdJuOylxKneMNNECmnkYYUWry1LES1zLhUZy67GsdbDSCxpF
evzT8ly6NLSSJOJKXlcmwzcGMXhi7HrCdvsZhPdJZ1cN8c/tfrj+S8kmHxs5Qw3B
TOjFi14w2CA/duvwQLV+0KIuHc/Vn8oYI0NnD96aahlZA+QFMk1hsdeETtXL6guf
S4FKB+PNVtFnMCMq25xsTOaqEKjse8+xBgTN9TAvB67TJUQ3J2zibn1jjaGjtej7
w2ry8FC/pgSFbs9KftAL7mDFCICo7qyOhpfuuG+s+ti1m7h5Fon2a+UKc0T0m80w
qR1YXohi6rzXTlcV92m2CRZIvSBPf1UQAnFqyjZBIvePpD8/TqYs2M+IIM0dmaBC
Xs+n+3ORIte7hws5BodXaWwsi0NTFm8rQaeK94Cj100kWMxrKZS5JIIdZ/Dy0rRk
LXWKj1W4h6rrwM34r5oeyc0k9pYoc7coDItEqu8VyKz7pj9rjcG8B+lqdp6QjNK+
+gNnVF4UmEbRpG6EZm9uC9IshiIQp/8DhO/lRZMb37v1YEB6/mg=
=ThxV
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
More Qualcomm ARM64 DTS changes for v6.5
This introduces support for the Qualcomm SDX75 platform, with the IDP
reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the
RDP454 is introduced.
On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added.
For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added
to the CPU cluster power-domain to flush sleep & wake votes as the
cluster goes down.
On IPQ5332 additional reserved-memory regions to improve post mortem
debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the
RDP474 is added.
On IPQ8074 critical thermal trip points are defined.
As with IPQ5332 additional reserved-memory regions are used to improve
post mortem debugging. Thermal sensors (tsens) are added and zones
defined. The crypto engine is added, and support for the RDP454 board is
added.
Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and
the purpose of msm8939-pm8916 is documented. MSM8939 has regulator
definitions cleaned up, following to the previous effort on MSM8916.
CPU Bus Fabric scaling support is added to MSM8996 Pro.
On QCM2290 CPU idle states are added.
For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC
support. IMEM and PIL information regions are defined for improved post
mortem debugging.
The Qualcomm Robotics RB2 kit gets its on-board buttons described.
A few fixes are introduced for the newly merged SC8180X, in particluar
the DisplayPort blocks are moved to the MMCX power domain to avoid power
being reduced prematurely during boot.
The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s,
and resets for the soundwire controllers are added. The OUI is
specified for ethernet phys on SA8540P Ride platform, to avoid reset
issues.
Charger description is added to the PMI8998 PMIC and enabled across
OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1.
On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU
clock controller and IOMMU definitions.
The Fairphone FP4 gains Bluetooth support.
SM8150 is transitioned to use 2 interconnect-cells, and the USB
interconnect path is described to ensure buses are adequately voted for.
The same changes are done for SM8250, and the resolution of the
static framebuffer on Sony Xperia 1 II and 5 II are corrected.
The USB bus paths are also added to SM8350, SM8450 and SM8550.
On SM8550 DisplayPort nodes are added, as is the PWM controller for
driving the notification LED and the RTC is enabled. For the MTP and QRD
boards, the soundcard and audio codecs are defined.
A Tegra change, related to LP855X binding changes, was accidentally
picked up and dropped again later.
A number of DeviceTree fixes identified through validation was
introduced as well. Additionally a few nodes got their default status
changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu
node).
* tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (94 commits)
Revert "arm64: dts: adapt to LP855X bindings changes"
arm64: dts: qcom: sc8280xp: Enable GPU related nodes
arm64: dts: qcom: sc8280xp: Add GPU related nodes
arm64: dts: qcom: msm8939-pm8916: Mark always-on regulators
arm64: dts: qcom: msm8939: Define regulator constraints next to usage
arm64: dts: qcom: msm8939-pm8916: Clarify purpose
arm64: dts: qcom: msm8939: Fix regulator constraints
arm64: dts: qcom: msm8939-sony-tulip: Allow disabling pm8916_l6
arm64: dts: qcom: msm8939-sony-tulip: Fix l10-l12 regulator voltages
arm64: dts: qcom: msm8939: Disable lpass_codec by default
arm64: dts: qcom: msm8939-pm8916: Add missing pm8916_codec supplies
arm64: dts: qcom: qrb4210-rb2: Enable on-board buttons
arm64: dts: qcom: msm8916: Drop msm8916-pins.dtsi
arm64: dts: qcom: msm8916/39: Rename wcnss pinctrl
arm64: dts: qcom: msm8916/39: Cleanup audio pinctrl
arm64: dts: qcom: apq8016-sbc: Drop unneeded MCLK pinctrl
arm64: dts: qcom: msm8916/39: Consolidate SDC pinctrl
arm64: dts: qcom: msm8916/39: Fix SD card detect pinctrl
arm64: dts: qcom: msm8996: rename labels for HDMI nodes
arm64: dts: qcom: sm8250: rename labels for DSI nodes
...
Link: https://lore.kernel.org/r/20230615162043.1461624-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
New Boards:
phyBOARD-Lyra-AM625 Board support
Toradex Verdin AM62 COM, carrier and dev boards
New features:
Across K3 SoCs:
- Error Signaling Module(ESM) and Secproxy IPC modules
- On board I2C EEPROM
- Voltage Temp Monitoring (VTM) module
- DM timers (GP Timers)
J784s4:
- R5 and C7x DSP remoteproc, ADC, QSPI
AM69:
- Addition of more peripherals: CPSW, eMMC, UARTs, I2C et al
J721s2:
- USB, Serdes, OSPI, PCIe
AM62a:
- Watchdog
J721e:
- HyperFlash/HyperBus
AM62:
- Type-C USB0 port
Cleanups and non-urgent fixes
Particularly large set of cleanups to get rid of dtbs_check errors and
dtc warnings:
- Addition of missing pinmux and uart nodes for AM64, AM62x, AM62A,
J721e, J7200 that are used by bootloader
- Split Pinmux regions/range to avoid holes for J721s2, J7200, J784s4
- Drop bootargs and unneeded aliases across all K3 SoCs
- Move aliases to board dts files from SoC dtsi files
- Move to generic node name for can, rtc nodes on am65
- s/-pins-default/default-pins/ to match upcoming pinctrl.yaml update
- Fix pinctrl phandle references to use <> as separator where multiple
entries are present
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmSLMAwQHHZpZ25lc2hy
QHRpLmNvbQAKCRDERh5FfJEW46tOCACQt9vBouxA7pmH+oerqdf8VDqJbjDsgnTx
kU3BUBLZn5qIJkeLqkoH5MueuE/H74mKKNBtRooAcRyUD9aZuxh/QC1/g2ITajWt
ndeHQzE6Hh4rNRtDrhp8CCU1FJdr8Ay3bqzPOOxwQKivFST2/i7+SbK0y8LnUN1B
QRoawzm0kaGH5tG41e5lbVsrIvG24MSoGq7PXrcCDMqD02cGOV0PBghZbUbmGMKG
sLPdbrh0uOHK8X6HNxUtOH3wKlQHHNU4RXGq8hoXlWQaf0Rdfd2fPPAioZVNJO+s
hPhSKCJIVkP7BhB1CpAVH1BKhWGaL7pEsBnUoDTeP7pFpxZF7qcD
=2tWW
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEXUACgkQYKtH/8kJ
UicDIQ//WG9FtWtd+6icdB4hLnDm/aUjrP9VHeKE1p7AZp1J5+sSB8utbR6YcNKq
IvR8Tr58te59L5iUlcR+IA06iv3ny/AswXylhtvP2jITdlmQDpXS+pp5RwIlltiu
JOCk+3jhfH8HO9gp3Ubk1loIyOmaDkz7EIszyxLceKo1kmvzWt708wMUtST/uOJU
eF2hgBF1T3I0JSUFtiaW5RXdERIlV9Q0cTf9nPRAV8uwqJ7iExNt6O8pyf01ZZd5
rHBP4jNw/OEFvPin+gnkzXi91hNTpQj+Y+hdIZiTIOI3EuCwUU9WMBJ/rz+TrK/E
YEGicGpiM2rN+u8VucqnkZc+dGjIBpD8a6XBUObnSeHx34AyTMKeVIK5w88zbliR
SnLMl+hSh5DYOIx8tpD0ACG3aeaZk/42Fe3lWbnT6i4d4YI7C4+XDJAdWneaAXtF
BkNGxaHI4pgrzauNi1vAk7eSAiiiEKId4C2Lnh1tgD9T3ay23yRzVF3oPcxm7mqg
L13WJDysOo+0auc3zY0CcnzPOHNf0YB1jdBVEfl7K2HMcQBxjxSvv0rCnZ55m784
6k4eAR/6CPKiqYLBdESrgnAF74xse+odjanVYHtQrDoc68iNeWUg9i/csyl08L+2
BKvlQdTHIgOkoZcx45EEPVtVAbJceoumC6H09BYVGtVmWaxk8Fk=
=fJ6G
-----END PGP SIGNATURE-----
Merge tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.5
New Boards:
phyBOARD-Lyra-AM625 Board support
Toradex Verdin AM62 COM, carrier and dev boards
New features:
Across K3 SoCs:
- Error Signaling Module(ESM) and Secproxy IPC modules
- On board I2C EEPROM
- Voltage Temp Monitoring (VTM) module
- DM timers (GP Timers)
J784s4:
- R5 and C7x DSP remoteproc, ADC, QSPI
AM69:
- Addition of more peripherals: CPSW, eMMC, UARTs, I2C et al
J721s2:
- USB, Serdes, OSPI, PCIe
AM62a:
- Watchdog
J721e:
- HyperFlash/HyperBus
AM62:
- Type-C USB0 port
Cleanups and non-urgent fixes
Particularly large set of cleanups to get rid of dtbs_check errors and
dtc warnings:
- Addition of missing pinmux and uart nodes for AM64, AM62x, AM62A,
J721e, J7200 that are used by bootloader
- Split Pinmux regions/range to avoid holes for J721s2, J7200, J784s4
- Drop bootargs and unneeded aliases across all K3 SoCs
- Move aliases to board dts files from SoC dtsi files
- Move to generic node name for can, rtc nodes on am65
- s/-pins-default/default-pins/ to match upcoming pinctrl.yaml update
- Fix pinctrl phandle references to use <> as separator where multiple
entries are present
* tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (153 commits)
arm64: dts: ti: Unify pin group node names for make dtbs checks
arm64: dts: ti: add verdin am62 yavia
arm64: dts: ti: add verdin am62 dahlia
arm64: dts: ti: add verdin am62
dt-bindings: arm: ti: add toradex,verdin-am62 et al.
arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM625
dt-bindings: arm: ti: Add bindings for PHYTEC AM62x based hardware
arm64: dts: ti: k3-j7200-mcu-wakeup: Remove 0x unit address prefix from nodename
arm64: dts: ti: k3-j721e-som-p0: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-am64: Add ESM support
arm64: dts: ti: k3-am62: Add ESM support
arm64: dts: ti: k3-j7200: Add ESM support
arm64: dts: ti: k3-j721e: Add ESM support
dt-bindings: misc: esm: Add ESM support for TI K3 devices
arm64: dts: ti: k3-j721s2-som-p0: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-j721s2-common-proc-board: Add uart pinmux
arm64: dts: ti: k3-am68-sk-som: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-am68-sk-base-board: Add uart pinmux
arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header
arm64: dts: ti: k3-j721s2: Fix wkup pinmux range
...
Link: https://lore.kernel.org/r/7fe0c6de-cb99-9c89-8583-b3855fde16f8@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Various small fixes and cleanups to be aligned with the latest dt-schema.
Other major changes are:
- Wire mali-400 gpu
- Change board name for zcu1275
- Use ethernet-phy-id to handle ETH phy reset properly
- Switch to amd.com emails
- Update people in DT bindings
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZIHGHgAKCRDKSWXLKUoM
IQW2AJ0eRZ5g7SYEg1y/zir6/j5s4RyaiACeO9EQJQ8nKkez73w4uoTBdmmOmlY=
=R8F0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEQgACgkQYKtH/8kJ
UidFLBAAyqGoiZH0Oh33f6R2nU1+NtH6pTiv4P1z1v8WmIMEvShHk+WhpGllqryC
rQKFwMdTIM3L2+zqYvUM5ksysBnbxePVVTV15qZaDpkbV1/Oz/G70EWF0VtGQYxk
/OLiMc84WMfaR772Htlb1mmos+9TtSlIwi5f0vkWRCOComPh+vc3u+GedUVBA3M/
9J0VuymgBeE9H4pGOruTNn1aUxD70hTXiP6Qz7Sv7Eksew80GfGlpNf5EqFM6Lrc
/Np03tHVN1lMLDmSbeHRM9ONDQDSEDM2IT0tvN9XH/p1vzKCBpRxHh7/7DVnJdae
G/NUGzw9uxZkmvKkXpjTRjYO08GQu6DxwO4G6qBOA9Rr77ibohVdLEvtfpfkwLxO
D9oFmi2NZjtyWii5G0xZkfnuB6aU9x2BsPRQduLTfTEYTWoJuoFnmBM/Zhinj0vO
2h0+2PqoT0LpwzcorsbCsk3mHPz0kqc3tNGOd2hGtRvmm2fLxoNbj0OqhLgFLYht
OUetwTNqWogKUEzjES526v6ulkAKWkSc0OrXOZkDVyWHCDdEQCMR121GlC6Qo5LK
5OLa2rR5iQ6Er6+N1lzg4AjB5s2k/C40K/pNQIm65uTB4D4YcCvcUABRuRMeR+Nn
FlgXDPPyytnZdNhRPt7AhFk10r+AbT8ad3LwjHEQlUT1Mxm+eck=
=jqDa
-----END PGP SIGNATURE-----
Merge tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx into soc/dt
arm64: ZynqMP DT changes for v6.5
Various small fixes and cleanups to be aligned with the latest dt-schema.
Other major changes are:
- Wire mali-400 gpu
- Change board name for zcu1275
- Use ethernet-phy-id to handle ETH phy reset properly
- Switch to amd.com emails
- Update people in DT bindings
* tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx: (33 commits)
dt-bindings: usb: xilinx: Replace Manish by Piyush
dt-bindings: xilinx: Remove Rajan, Jolly and Manish
arm64: zynqmp: Used fixed-partitions for QSPI in k26
arm64: zynqmp: Add pmu interrupt-affinity
arm64: zynqmp: Set qspi tx-buswidth to 4
arm64: zynqmp: Fix usb node drive strength and slew rate
arm64: zynqmp: Describe TI phy as ethernet-phy-id
arm64: zynqmp: Switch to amd.com emails
arm64: zynqmp: Convert kv260-revA overlay to ASCII text
dt-bindings: xilinx: Switch xilinx.com emails to amd.com
arm64: xilinx: Use zynqmp prefix for SOM dt overlays
arm64: zynqmp: Add phase tags marking
arm64: zynqmp: Describe bus-width for SD card on KV260
arm64: zynqmp: Enable AMS on SOM and other zcu10x boards
arm64: zynqmp: Enable DP driver for SOMs
arm64: zynqmp: Setup clock for DP and DPDMA
arm64: zynqmp: Switch to ethernet-phy-id in kv260
arm64: zynqmp: Disable USB3.0 for zc1751-xm016-dc2
arm64: zynqmp: Add pinctrl emmc description to SM-K26
arm64: zynqmp: Add gpio labels for modepin gpio
...
Link: https://lore.kernel.org/r/CAHTX3d+2s_KmCnd=x5hydGb+LYoznAzYGTizvqqN2NFmrBurfw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
StarFive:
Watchdog nodes for both the JH7110 & its forerunner, the JH7100. PMU, P
being power, support for the JH7110. PMIC and frequency scaling support
for the JH7110 equipped VisionFive 2.
Most of the DT bits for the JH7110, and the SBCs using it, are pending
support for one of the clock controllers, so it's a smaller set of
changes than I would have hoped for.
Misc:
Pick up some dt-binding cleanup that Palmer assigned to me & had no
uptake from the respective maintainers. My powers of estimation failed
me again, with part of my motivation for picking them up being the
addition of new platforms that ended up not making it. Hopefully next
window for those, as they were relatively close.
Exclude the Allwinner and Renesas subdirectories from the Misc.
MAINTAINERS entry, since I do not take care of those.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZIdfVAAKCRB4tDGHoIJi
0mspAP4m1zrOWojsDmwpodCajBTW6PEtMAztxRUj/qeA4IEsYgEA+NI1DhrUkwZ6
K1vw1VzP56auVkdS3X7ZBhEpjfnkCg4=
=JA/v
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEN8ACgkQYKtH/8kJ
UifaixAAmMZlmAkDRhrLELP1z4yAikRFqtS/T12sMw6uMz4CNaMPpT6EPKmsIktv
v8VS9MwwDsx3pYkO8jLzA5spXbaL8WFByykH4e1i8PrQjfWsLyVdjvLd4YzSxBic
RF10/HRrf2bcIAPIJj6G4pOo4FdWen3BPSheVL7VMxaRXpGnWTBvwCuhLlvNMdm2
NOz9KqW95o8U9zmskO21Gd7Y25dQAjdv4QP7G8w1hteW801zxVnFep5gMzra5fY0
q3226qcgmqBBa4RT5o23V6/3tLDcyCbnEwmPjXVo/Xspj+USRopOugdOOyTkXogE
M8JTkj874oTWojQaUcsqJBFIohruqXxYbA8VYitya7IALoIQJ5NOdGUtkqv6Tl/i
Y/VqP6Gh4Vi6ETtGnTLWl03eZ9wJBWvysJ/03FyabkKpDDYo1ABn9a4wDdwrPoXk
4okvCXDNDTYY19yxWlPOEIf3P/lVst5Cr2MPm0YGJDx4biTh0peg23GwncjvGnXk
FcRifMjshzU0N15WtXM5fwR02p6pM0j+PNFMuHRIUewqqWTFaKqIsdkbV3S3eM+l
TkN5G0Gklrx7VJbDqDS+ASsNCXWwR4AVHhoIZ99ldxAribiPOqAB0+20npn+Nchq
T4gFybdFEOuYB1aawEbk2LTh7hV7HJhTwpcYlNX1VNbyrXA6Yjs=
=NR4f
-----END PGP SIGNATURE-----
Merge tag 'riscv-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.5
StarFive:
Watchdog nodes for both the JH7110 & its forerunner, the JH7100. PMU, P
being power, support for the JH7110. PMIC and frequency scaling support
for the JH7110 equipped VisionFive 2.
Most of the DT bits for the JH7110, and the SBCs using it, are pending
support for one of the clock controllers, so it's a smaller set of
changes than I would have hoped for.
Misc:
Pick up some dt-binding cleanup that Palmer assigned to me & had no
uptake from the respective maintainers. My powers of estimation failed
me again, with part of my motivation for picking them up being the
addition of new platforms that ended up not making it. Hopefully next
window for those, as they were relatively close.
Exclude the Allwinner and Renesas subdirectories from the Misc.
MAINTAINERS entry, since I do not take care of those.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: Add cpu scaling for JH7110 SoC
riscv: dts: starfive: Enable axp15060 pmic for cpufreq
dt-bindings: interrupt-controller: sifive,plic: Sort compatible values
dt-bindings: timer: sifive,clint: Clean up compatible value section
riscv: dts: starfive: jh7110: Add watchdog node
riscv: dts: starfive: jh7100: Add watchdog node
riscv: dts: starfive: Add PMU controller node
MAINTAINERS: exclude maintained subdirs in RISC-V misc DT entry
Link: https://lore.kernel.org/r/20230612-fasting-floss-0bc05a08bc7a@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Indiedroid Nova (rk3588)
- Add Edgeble Neural Compute Module 6B (rk3588)
- FriendlyARM NanoPi R2C Plus (rk3328)
- Anbernic RG353PS (rk3566)
- Lunzn Fastrhino R66S / R68S (rk3568)
The rk3588 got a lot of attention and gained support for the GIC ITS
(needed an errata from Rockchip), timers, otp memory, saradc and sdio.
The rk356x got support for its RGA block
With all the core improvements to rk3588 support, the Rock5b got a lot
improvements from that too, namely support for its PMIC, sd-card and
saradc, as well as a clock-rate fix for its es8316 codec.
Similarly the rk3588-evb1 also got support for its PMIC.
The Anberic RGxx3 series got a better bluetooth compatible and updates
to its LEDs to make them use the PWM blocks they're connected to.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmSGNgkQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgZKNCACYvQvOTfXL9HMlYQ2Fftzm3GEa9IVUVAr2
qgKiGj+cUm9y2O7eQBl/GF+6KyCnBxjh+697lAsZtEz7M6onEi9WVjsISl2dLq7Y
4FOMWRTbzjzdMrEfg3mUUgcoMkvGkuAV8gwMTV6VKBDEegZm2/SFGQv76NpJy8Zy
7HewtUKNggQ2OO1z6/umsreKS5qxqcRsw37fAq+dUGtJb2v71kmvYL8aiGHpy5sK
+fNxE1znXqcNu60btk+6iltXQ9tGlqH/lEH/gsCQ3uEgCLX9BId3vXyHPBVm9NiZ
qfMO7DJWioTjybZ0rHWh8eSkQ/DCAd+2ZQmoLtC4s/f1EkeK7jve
=V9LX
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSEDYACgkQYKtH/8kJ
UifxHRAAw5jJdUvdZc1YkRJ3KvO4eu5fCzUaWFobM7YhztQ+mt4v8KZ1fDsN/oME
V9Y1tGhjqL5NSRIhTyPvMzx4+jGor9PtiXMWVd35oqPY2lEeni94p8pXMipuZ6SE
7ifY+bioB5QX4QtmXrzrRNcD/s1mANGZCUaPcUOPyjkIc5qAVq5Eb1n/H2OuP56m
V0gWXZB8gMibdq3tkG4shuwFTgbRd3pBNDiI1YR1M42BSOBUoIZoxg/IwP1MPgE0
tpeG9SqANTu6pBIrlgTLozRJdyV29EeCZ+Cp+qbRKtqd4SWLf/+FyxuAEAP7wPi+
r0ty3KaAMpFK+5zIlptDCCfTOnrgO5tweJHWfbem24nL73kFaQicT+l4b4WLh3oW
1YPhxWktsFhzkO+2IcnBUpb2GSHvasObxvzoMep1rZzy9D0W2OfiUroUJjcAEl6b
NJuOUSDZaGo0XLv5EuJ8A6S3/4HQIS3HkJS47bD3TxMfj8jejCTF/Q79KCDqe3ub
EsWfjKDxBFMoTlanZy2iLnudkKIAiD/mcjHfZAHCpmSq2y0z1JC70YEICDHcp9iT
PRmDM0A9j0+csPUQ7YKZGpLHU/+/FNsJlVxAb2GWQ82HHrIULdqyXtbMJGjlv4j9
qCmDnhxOeMeTQcG270CAuf5LRYI9Fp5YlcIXAnk5V4+N8vCNbko=
=QogT
-----END PGP SIGNATURE-----
Merge tag 'v6.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards are
- Indiedroid Nova (rk3588)
- Add Edgeble Neural Compute Module 6B (rk3588)
- FriendlyARM NanoPi R2C Plus (rk3328)
- Anbernic RG353PS (rk3566)
- Lunzn Fastrhino R66S / R68S (rk3568)
The rk3588 got a lot of attention and gained support for the GIC ITS
(needed an errata from Rockchip), timers, otp memory, saradc and sdio.
The rk356x got support for its RGA block
With all the core improvements to rk3588 support, the Rock5b got a lot
improvements from that too, namely support for its PMIC, sd-card and
saradc, as well as a clock-rate fix for its es8316 codec.
Similarly the rk3588-evb1 also got support for its PMIC.
The Anberic RGxx3 series got a better bluetooth compatible and updates
to its LEDs to make them use the PWM blocks they're connected to.
* tag 'v6.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits)
arm64: dts: rockchip: Add saradc node to rock5b
arm64: dts: rockchip: Fix compatible for Bluetooth on rk3566-anbernic
arm64: dts: rockchip: Add SD card support to rock-5b
arm64: dts: rockchip: add PMIC to rock-5b
arm64: dts: rockchip: Assign ES8316 MCLK rate on rk3588-rock-5b
arm64: dts: rockchip: Add Indiedroid Nova board
dt-bindings: arm: rockchip: Add Indiedroid Nova
dt-bindings: vendor-prefixes: add Indiedroid
arm64: dts: rockchip: Add sdio node to rk3588
arm64: dts: rockchip: add default pinctrl for rk3588 emmc
arm64: dts: rockchip: Add DT node for ADC support in RK3588
arm64: dts: rockchip: add PMIC to rk3588-evb1
arm64: dts: rockchip: Add rk3588 Edgeble Neu6 Model B IO
arm64: dts: rockchip: Add rk3588 Edgeble Neu6 Model B SoM
arm64: dts: rockchip: Add Rockchip RK3588J
dt-bindings: arm: rockchip: Add Edgeble Neural Compute Module 6B
arm64: dts: rockchip: Add RGA2 support to rk356x
media: dt-bindings: media: rockchip-rga: add rockchip,rk3568-rga
arm64: dts: rockchip: Add rk3588 OTP node
arm64: dts: rockchip: Add FriendlyARM NanoPi R2C Plus
...
Link: https://lore.kernel.org/r/3239799.44csPzL39Z@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces the RDP442 and RDP433 reference devices on IPQ5332 and
IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574
are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is
added. Support for Acer Apire 1, built on the Snapdragon 7c platform is
introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating
support for SC8180X and the Lenovo Flex 5G, and the Primus reference
device, has been added.
On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described
above the RDP442 board on the prior. Download mode support and various
reserved-memory regions are also introduced on IPQ6018.
IPQ8074 gains another SPI controller.
On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog,
qfprom, SMEM and RPM are introduced. As are support for four new board,
mentioned above.
MSM8916 gains a range of structural improvements, to better suite the
various boards supported. Regulator constraints are corrected and their
states are adjusted to match reality (e.g. always-on regulators marked
as always-on). BQ Aquaris X5 gains support for front flash LED.
As mentioned above, MSM8939 support is introduced with support for
boards from Sony and Square.
MSM8953 gains DMA support in I2C masters.
MSM8996-based Sony Xperia boards gains description of their RGB
notification LED.
On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU,
AOSS, watchdog and missing low-speed controllers are added. On the Ride
platform UFS, USB and an i2c bus are enabled.
iommu properties are added to QSPI on both SC7180 and SC7280. LPASS
clocks are adjusted and MDP node cleaned up slightly, on SC7180. As
mentioned above, support for Acer Aspire 1 is introduced.
Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the
Primus reference device has been merged.
On SC8280XP ethernet is added and enabled on the automotive ride
platform. An SDC controller is introduced and enabled on the SC8280XP
CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB
SuperSpeed phy is added to the Type-C graph, to enable support for
orientation switching.
Fairphone 3 gains support for its notification LED.
On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains
support for flash LED and the RB3 (DB845c) board gains support for
bonded/dual DSI-mode, to allow 4k output.
On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY
are introduced. As mentioned above Fxtec Pro1X is introduced. On the
QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display,
CAN-bus and GPIO LEDs are introduced, fixed regulators are described and
the SD-card description is corrected.
Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5
gains SD-card support, camera regulators and GPIO line names sorted out.
SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5
II gains support for hardware video accelerator.
Crypto engine is introduced for SM8350 as well. The HDK gets the USB
Type-C graph described for Superspeed orientation switching and
DisplayPort output.
On SM8450 video clock controller and crypto engine are added, missing
opp levels are introduced and the USB Type-C graph is defined for
orientation switching and altmode.
SM8550 gains GPU and video clock controllers and missing opp levels are
added. The WCD9385 audio codec is added for the SM8550 MTP and on the
QRD PCIe, USB, audio display and flash LED are added.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmSFGfkVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FeKoP/RFCA0hnqP0TGgzQq7TV1//WbVuZ
5fxpWhSKYeb6e+oOJZdu/Xi7VwSWesZwQQkMRaEOXUpMGhtWBfLQEHc6FQiAzGkv
h3GrOLQ1qqmfYEqDxYv4CgKjpO+w5Zx2uNOZkbRDRumT0EQ45T0hypYmRefBPq8s
bOxNmRgY6goNZalZBb0HWvdZtfYB1tlrjVn5+rpEZb031KGhCSOH8SWx8wUdUHrj
7EYR4EeQQsJZETiinU3F8l69eNUBwAi8TAW350A3nJj+FPZqwVhIhQKCR/bCZqXC
U9vwcaqgYKi8rY5FR+bwJsiX4hY8W9bjq7pzrJyNvXsLtIeJ3jRnbF8z4SvNitOF
UMOkQ9f6WrToRNSrwFhLB/ipV/TbnnE/MNzIxCwQ5W1BRYn7Tri1Ws61I/Kl1/ML
eOWl6CSWzNW5lfkHumdOzydd4T43ECqqgNLEBTCpNRo7d/4XN/TCUK4tWJqb+4ou
1aOG6/ujy6uhlocd0mZ1xPMDBrFNCrC4/BRj2hCmbuBE3Qs/AHHrF5LLMTkZBKHd
Mip2gUKwqi2p4l0/KJxSSj0snrifUqU5V1QCchwcMFmt62mrfRU2u7Xoy9s7vlyP
pbQEF/Pu91Yr5nUiBQEU77L5a9tTm0eI1iFl8GwBzZP7R46ahnAu3BQc/MXaPax/
Z9hrTrB9y610Iuzy
=OvdD
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSD3wACgkQYKtH/8kJ
UidMjQ//YH19+b3UZ3O4r3sIoGTNB1rajNHCX72wwzQAdaHSMOTOUdkXradtstyp
EPNyChMERvBGq2i16B0mEk9IiQ4y4CVwR9l3FZcaasV25RhfcGX3K1Wqxuepc1Hu
OELo8W9Ih7rSg7paNj6YfJq1ka+AldZWPvtQG000czq59ZnUn7JvEeW7hd5BOdCJ
O5RloIxHhLIOSyyc+sK0d3hXLjcZ8Od0Pnu/QYMzslmtc7YLaRgs0F5pxwz51k/P
Uc+eOscCGcSHilmW7IE/IlevElg0GssyRn/BZ5121tMMKEYjEeR0EUy7I8zPaG45
osKJQ5R7NBd2h185ZXprskd9drvQ8uwv8kxRs5GFF+cK+3PE3TtoipmBycEQROcH
7WkQg7ffiPXT7Na+yTWqUXwnwzr/nhir7HTVx7VgBqmdUIzJKdqAbVLw/PTm0B6M
QXUZfIS8gZFLePYwzkYqhYcTgtT6ZfEY5aN2/vpI0xyZsU0Z6nbFzPxlI+4rlDXm
eZ7nD42RzifEqJUm7yKwGPkyY1U8rbwh4kNdaxZPk4ouB1puEYbF+Neo95MKlpRY
ODEz0u6oVvJ2Ddg/RxFDtwB3hUXupc2qZcE92Smq4Two9wjgTkuSb3A3+8CEjXqH
VFhBY65NxnwVEaabxE4wK9+wnLUnswza988BkkY7YrI+G8EZJL4=
=jxMR
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DeviceTree updates for v6.5
This introduces the RDP442 and RDP433 reference devices on IPQ5332 and
IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574
are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is
added. Support for Acer Apire 1, built on the Snapdragon 7c platform is
introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating
support for SC8180X and the Lenovo Flex 5G, and the Primus reference
device, has been added.
On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described
above the RDP442 board on the prior. Download mode support and various
reserved-memory regions are also introduced on IPQ6018.
IPQ8074 gains another SPI controller.
On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog,
qfprom, SMEM and RPM are introduced. As are support for four new board,
mentioned above.
MSM8916 gains a range of structural improvements, to better suite the
various boards supported. Regulator constraints are corrected and their
states are adjusted to match reality (e.g. always-on regulators marked
as always-on). BQ Aquaris X5 gains support for front flash LED.
As mentioned above, MSM8939 support is introduced with support for
boards from Sony and Square.
MSM8953 gains DMA support in I2C masters.
MSM8996-based Sony Xperia boards gains description of their RGB
notification LED.
On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU,
AOSS, watchdog and missing low-speed controllers are added. On the Ride
platform UFS, USB and an i2c bus are enabled.
iommu properties are added to QSPI on both SC7180 and SC7280. LPASS
clocks are adjusted and MDP node cleaned up slightly, on SC7180. As
mentioned above, support for Acer Aspire 1 is introduced.
Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the
Primus reference device has been merged.
On SC8280XP ethernet is added and enabled on the automotive ride
platform. An SDC controller is introduced and enabled on the SC8280XP
CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB
SuperSpeed phy is added to the Type-C graph, to enable support for
orientation switching.
Fairphone 3 gains support for its notification LED.
On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains
support for flash LED and the RB3 (DB845c) board gains support for
bonded/dual DSI-mode, to allow 4k output.
On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY
are introduced. As mentioned above Fxtec Pro1X is introduced. On the
QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display,
CAN-bus and GPIO LEDs are introduced, fixed regulators are described and
the SD-card description is corrected.
Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5
gains SD-card support, camera regulators and GPIO line names sorted out.
SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5
II gains support for hardware video accelerator.
Crypto engine is introduced for SM8350 as well. The HDK gets the USB
Type-C graph described for Superspeed orientation switching and
DisplayPort output.
On SM8450 video clock controller and crypto engine are added, missing
opp levels are introduced and the USB Type-C graph is defined for
orientation switching and altmode.
SM8550 gains GPU and video clock controllers and missing opp levels are
added. The WCD9385 audio codec is added for the SM8550 MTP and on the
QRD PCIe, USB, audio display and flash LED are added.
* tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (195 commits)
arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
arm64: dts: qcom: sc8180x: Introduce Primus
arm64: dts: qcom: sc8180x: Add pmics
arm64: dts: qcom: sc8180x: Add display and gpu nodes
arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes
arm64: dts: qcom: sc8180x: Add PCIe instances
arm64: dts: qcom: sc8180x: Add QUPs
arm64: dts: qcom: sc8180x: Add thermal zones
arm64: dts: qcom: sc8180x: Add interconnects and lmh
arm64: dts: qcom: Introduce the SC8180x platform
arm64: dts: qcom: msm8916: Move aliases to boards
arm64: dts: qcom: pm8916: Rename &wcd_codec -> &pm8916_codec
arm64: dts: qcom: msm8916/39: Clean up MDSS labels
arm64: dts: qcom: msm8916/39: Use consistent name for I2C/SPI pinctrl
arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN
arm64: dts: qcom: msm8916: Rename &msmgpio -> &tlmm
arm64: dts: qcom: qrb4210-rb2: Enable USB node
arm64: dts: qcom: sm6115: Add USB SS qmp phy node
arm64: dts: qcom: ipq5332: add support for the RDP442 variant
dt-bindings: arm: qcom: document MI01.3 board based on IPQ5332 family
...
Link: https://lore.kernel.org/r/20230611004944.2481596-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Several new modules and devices are documented and fixes incorporated
for the Tegra234 GPIO controller pin mappings as well as the possible
Tegra XUDC PHY connections.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmSDRNITHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSt4D/9EUOG7X/XQwI8kFjA7FzOtUP+5ARzz
svsnZ3SgeURmu5UskHkpZcN/9sFRTP2McsuTnsonA3n0gRX50abJwERorT2tLBBh
uLCiNR+8fArPzjul4k+xlAzOfm9EVbkxhS3sv9zBpae8C1aLKaxZPkEeHqDB+HFS
G1mmKMVeH/ucxjEBexMsUYTyB5So9qTyChvm1IMXeSujcHo9LA6K2EleiHygTZ2H
ZhNA1PZJUc7PxB72Q9K3TjAno/BZi2EAieuMqxbpiLWmFEalelAr8ZD2V29rNtDg
6fssP466SvOj1IO2yQdy8YH1l1aaJ6vzN0eJedDxqNeY5h+wzOA32LfPt98E2Vkh
WdqOW9Lyzp7CXm+V/Q34ZYpfHEw6oYg3VAUuolEaHWi/CdRMxG5bbPAa/znr/4jp
CsvZR4GHq4JfUbXch3oej8Pe3EjMb7Ewfh6zZDifFqz0wSMaTCVZ1c1QC5RNbnO7
iaCQkm5L13qOfCBBrw0EEree8emA5Aurid3ZouMgm4ITHl4vZfjinyiZyKOFcLNJ
TCVqWndsNRY8HXUw7IfJr2Liztnr69T4EJJV5T9olOaNfIA1LvKieieedFMcL8ew
7nPOiYoD0PV7MQPJHLY+4PUCbPWY500beqq5DvjurWBlxqud0m++xDg7SGERNmLQ
42NZY7asp5GCeA==
=vCMx
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDSkACgkQYKtH/8kJ
UieToQ/+MfEiT/Zi5DI5aky65/B47dU6eGFoMtmvMlRoYY5CFwDHbmw56AqGz8sc
M5PKncJq2cdeK9LRHE1aMBeYkmRXXJw4UTpxDh75THlFYtKBwRLxnyTZLNNK/1j0
XrIDXWQmcpZE12J4LWUb3Z+me3lyk11EcaZ5kEFZipxo0c1zBiinj0HPQoQUddyX
+f49SJYDxmzd1RBigAO4JzcU6vbQTlqHZ/M8HUez81+N4xGRVgpQ/1P7Sdv+u65m
I8e/B/aC6WFo2GtmNKXsNzFHTxDmxEjxF6mjMqdkJgSoD0t0Y91IMi8rUsoJhpjF
2nRlrSUbQW9RCJjhk06jNhaon7HwN3JsYwr9M2fQG40fWWs9Ss10miup+eR6iCIg
RVI4ZrLmDhgrZdCvoBgwUPrxUXsTxw8Ke1sQFrxNNaBnx+5GpQn6wSv+uioOMXoM
MM36UpJ4GfLcbcoGs365cItWVjr0ZWj5DLC+i0qLFpDz79gBQOF+dF8e+a1HlVBZ
CMn3CtWamSBgMm1KpdXFG6cpRfgFIlCTP7FgEUTtLMA1VVFKzybcVDG+Gf2FRVLk
zA0LgGpRJLMVwu0s7EKs7PLqKfqB96eDfn3LnkQ+W6I4hxVH3INSEeAA//MgNADy
qZzTj4ABp3M7iVEwa/XC1SrC+DGd8ij8P9aTjN6o+1zWRf9CgtA=
=Nf/9
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.5-rc1
Several new modules and devices are documented and fixes incorporated
for the Tegra234 GPIO controller pin mappings as well as the possible
Tegra XUDC PHY connections.
* tag 'tegra-for-6.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: tegra: Document Jetson Orin Nano Developer Kit
dt-bindings: tegra: Document Jetson Orin Nano
dt-bindings: gpio: Remove FSI domain ports on Tegra234
dt-bindings: usb: tegra-xudc: Remove extraneous PHYs
dt-bindings: tegra: Add ICC IDs for dummy memory clients
dt-bindings: tegra: Document compatible for IGX
Link: https://lore.kernel.org/r/20230609193620.2275240-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
- MCU/MPU:
- Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
- Fix LTDC/DSI warnings.
- MPU:
- STMP32MP15:
- Add OTP part number and Vrefint calibration in bsec.
- M4 hold management updated. As SMC call is deprecated,
the service is moved on a SCMI service.
- Add ADC internal channels (VREFINT/VDDCORE).
- ST:
- Enable ADC1&2 on STM32MP15 DKx boards.
- Adopt generic IIO bindings on STM32MP157C ED1
- Add supplies for OV5640 in STM32MP157C EV1
to fix yaml validation.
- Fix i2s bindings to match with the YAML validation (DKx boards).
- DH:
- Rearrange MAC EEPROM.
- Rename AV96 sound card.
- Adopt generic IIo bindings.
- Fix audio routing.
-PHYTEC:
- Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
up to 16 MB QSPI and up to 128 GB NAND flash.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmSG4vUdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIU4oQ/8CUQbDKstyUVvvyyh
LuXYukVD8GMCoP5yJrpZm3kWBxQvG6LIDpALpo4C5wcuRGCUUcighYh/4cqSyMjR
OHg27YeeasaXQG271aLlJ9/FjzZagJNW682uhwIhL14FB7sbJfh630wHdj/YOph8
lR99AFxYomd4aVKbV8LLLk5Eb6hS9ZKRxhb8Hn1J2GlWjg1S2oHJm8WInc4QR4Xh
J6gCvnYvN9facvQvzUu5mpWhkBF5kMT4kGhj2HWgBurZSVuxfLklcyfXETr7gSoo
oEyHzTI1Oq9YC0nU7r+sCmWMHpVxDY02eLsDwXpEC1ww66ZNYpkB7V1C2GDsnJKV
OFcLe9phs3yNrONia1pyyySCUV+VZIovuOl6iVh2g2ADfP4CPtq+RkAS9qPwT5j9
SAvyfCIiYaYEVT8k+jZOP/HajLpJuWl6SOgGtk8NpP2vWCjIEJuUj5XHj5K0iei9
8Lp2tIy1kVNHT97gG9YKEbtd2wrluE/1mff1iZIPArG0alwGNgiGTwGzesbXXjk6
zuvDlQIwL1b8P3Pg+zKR8sawZcSS2uXZsFWO9wNVsWfQM5JUAiy52KLoygvOdgpO
/qKyOl+QfVXJPRwQgNOMEcquzL+CHqXs2IaN3i9B3TAQ5g3il8xIY36swX2aN30P
lxTR/D+/yQ1Cw/L+55DPKCXn2WU=
=kf1Q
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSDJoACgkQYKtH/8kJ
Uif9qxAAnrSnL55CNXoWGiGjhyZxw4Vscm1cBYlSHINoH4wdumRteV3Ux74SCsyy
rlny5kIi2g5Le/EXYA0cH4GbEtXUzm+xyrPGUM7M67AStIE3es51OCoOS4JBYw34
jv82s+rzuXUTogruS5EhkZ6NDve2Oo+sPIjdJWKhf/kV90uocrsQt7AwYs9MSs0t
cr46LaTUqXIHYyig8TbW7bNYqZTKn+0xCLo5DSeToru1dhBNraNkATapGglv7P1q
tcVexjf0SpsST8K7AW0R796urxrSCLBw3bFLqGodArs5N76RObcBLWasVqZPEC8q
Uy2JAyiNGWzSPjAznUBnllCndxOd+0wqSKYkffR8jjSpYvcL0aoqi8F+Lqa+C/Dv
I2SHA2JhAwYdKj5Zc9SGFuVcwb7ABNBi4uimjm9rwlYmKHeHzFrIh5pcROpPi3qe
4/8YNjyx5LyvZ7su+GFGhLAi7XmhtJ7j07BuRfMJJcOdw6AxOvzvNxIZvmNN8evV
U9r6/NXJaLw4SmhhlXTTatWnU/oxx8GvXja/tFfReotFuefBjwYYhhsjRcebtaXr
RFEtCjtauVHdQRxsJbeuCZ56l5Sjliqg4EJ5AuOEpXf4s4Z98ZEoO5KPWWTFlwjp
Th2zLU3pbJPqbQcp9lxN+ETBemuYhr97XrNmFpitec7kTjl/hTM=
=kRKO
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.5, round 1
Highlights:
----------
- MCU/MPU:
- Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
- Fix LTDC/DSI warnings.
- MPU:
- STMP32MP15:
- Add OTP part number and Vrefint calibration in bsec.
- M4 hold management updated. As SMC call is deprecated,
the service is moved on a SCMI service.
- Add ADC internal channels (VREFINT/VDDCORE).
- ST:
- Enable ADC1&2 on STM32MP15 DKx boards.
- Adopt generic IIO bindings on STM32MP157C ED1
- Add supplies for OV5640 in STM32MP157C EV1
to fix yaml validation.
- Fix i2s bindings to match with the YAML validation (DKx boards).
- DH:
- Rearrange MAC EEPROM.
- Rename AV96 sound card.
- Adopt generic IIo bindings.
- Fix audio routing.
-PHYTEC:
- Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
up to 16 MB QSPI and up to 128 GB NAND flash.
* tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
ARM: dts: stm32: add vrefint calibration on stm32mp15
ARM: dts: stm32: add adc internal channels to stm32mp15
ARM: dts: stm32: fix ltdc warnings in stm32mp15 boards
ARM: dts: stm32: fix dsi warnings on stm32mp15 boards
dt-bindings: display: st,stm32-dsi: Remove unnecessary fields
ARM: dts: stm32: fix warnings on stm32f469-disco board
ARM: dts: stm32: Shorten the AV96 HDMI sound card name
ARM: dts: stm32: fix m4_rproc references to use SCMI for stm32mp15
ARM: dts: stm32: Update Cortex-M4 reset declarations on stm32mp15
ARM: dts: stm32: add STM32MP1-based Phytec board
...
Link: https://lore.kernel.org/r/08d711de-bb6d-a976-735b-5e18b19818ea@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
-----BEGIN PGP SIGNATURE-----
iQJQBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmSG5+AdHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIUXEA/4mb17fH6BUDc1wGHb
kl7XJh8s9A98Wbjlei+fgZ6VfDRU1KuEkna/TJ+8QwBadb450RSPxCozWyaT94kq
EeVHw2pyQELBA7T4Cu/3OzyD2dQj/hELbWKlUT5UedMibguxYb+IyxMqOrw29Ghb
t5G1cfJknkbXQDKrEVDynUHoRcDIb3vLXhvL3Z8ExSDBaaVdhrpXyJow4fRBUgtY
gqEnVJHOVHsu5k+Ah2/2SaMUpxfQIUduxFMsk7pAFiZU+nRQI03Cn6EKADCIgmS0
1LZVhjfO15Tm5X2bDN+gHqC+3ASZGZqe4KkUF5RfIN+2K1Jo8CMCoezHga0y03Lb
EN6PEoHhriqNs/2azFLTQbua0RzkdJxXNNWAG5I+I0qim6hicTV9YCkkxIQlhNxu
K67BdvBEJrDNBYlkk4DDaiGRuPFSoitwYMnZqCrvLGtxtTbjrMjppCCvdJPrCGBr
aY/1hLePnnxdBvCFKODKkiAT48gPjZoEhLrbegIY2XMqseciX4o9JZbXmnMVdpqD
2l1M2xsyVe5Jxv8JRfnr6GfUj0FVIgxB8tUII7OpXxTGZN9MaOt/92DKTbvLdvma
MwIOIMKB5QYFytCNwjFMI2LJopfiFJNUKk2Yd+WNWGaEG1LmdhTSIIROQBMDM5Zg
xTR+DvbdtbgyTSSsuBDGw1UWnA==
=WkNC
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSC/wACgkQYKtH/8kJ
UidpWhAAn9bQwdIJdetMmMiJuvFJIqPg48K9OmvEpEYCxAwVFuKTV+ddGDM2kLwB
rinJ5R92FsCUBN54mPpfq75atuhZA8S3Od4N8jbjK7Geqq0MIUv6yaGYNyKJfDrx
NO3+UzIpF17eqiXDTY4ZEdw+FfWJ1fr1rKN2DNyqIQDIibvOR8smuAE9suIdNsht
0k0LOCk+PXRaNws6wIeXM71v42trb8S5UG02qQzet1qwsK7OXUc7xouTr6vQ7xMR
H4NiuEL0XfkhsxsSLhbFSpWzRoVcKhhyZzibNu4l5npBvL0VZPyYrJOU7MAODy5D
IWIS07/BNWrKx/XhCyz7w0ID2SsMGxAgGeOMx1eG3WT5953z5tWOqBgZGWrObQMO
QR4F2h+f9InLblHEdLa+n1Nfm6SAgGEA+JnDDHSbuiH1t/g01wazxCAi6Awoxur6
jv7iINiy2UauRs7/Fns0z1J0gag/8afxTYiEzBQSMdrE4zgaKKGtryoflUOXZe9W
foXtU4+mRAExrZN/3gxYQyvvLxQF7vllCYtuzeUyJzpXuYwE5clpjjEn93txXtPr
EjIS+fg3cgABaD26607ueGomQIdKxjWj/1tZSaut1yWs/zeuRjS15dT68IzzI0mK
Qk1v6mLx+gdnOQv8mn5JfzOC8MTDBrAE53B6M+mI9nZrV3VhhhE=
=fxHg
-----END PGP SIGNATURE-----
Merge tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/newsoc
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
* tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (44 commits)
MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
arm64: dts: st: add stm32mp257f-ev1 board support
dt-bindings: stm32: document stm32mp257f-ev1 board
arm64: dts: st: introduce stm32mp25 pinctrl files
arm64: dts: st: introduce stm32mp25 SoCs family
arm64: introduce STM32 family on Armv8 architecture
dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
pinctrl: stm32: add stm32mp257 pinctrl support
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
...
Link: https://lore.kernel.org/r/080fc303-45c1-6cc0-4c5e-694e730896a6@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint. Also absolute path
starting with /schemas is preferred.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230609140754.65158-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint. Also absolute path
starting with /schemas is preferred.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230609140749.65102-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230609140655.64529-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
The hibernation feature enabled for Xilinx Versal NET SoC in DWC3 IP.
As the DWC3 IP supports the hibernation feature, to handle the wakeup
or hibernation interrupt, add host mode "wakeup" interrupt-names
optional property in the binding schema to capture remote-wakeup and
connect/ disconnect event in the hibernation state and increased maxItems
to 4 for the interrupts and interrupt-names property.
We have a dedicated IRQ line specifically for the hibernation feature.
When the "wakeup" IRQ line is triggered, it initiates a hibernation
interrupt, causing the system to wake up from the hibernation state.
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230619105032.2888128-1-piyush.mehta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
For STM32MP25, we'll need to distinguish how is managed the delay block.
This is done through a new comptible dedicated for this SoC, as the
delay block registers are located in SYSCFG peripheral.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230619115120.64474-2-yann.gautier@foss.st.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The mlx5_core driver has implemented ptp clock driver functionality but
lacked documentation about the PTP devices. This patch adds information
about the Mellanox device family.
Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
.adjphase expects a PHC to use an internal servo algorithm to correct the
provided phase offset target in the callback. Implementation of the
internal servo algorithm are defined by the individual devices.
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The recommended ways for getting DAMON monitoring results are using
tried_regions sysfs directory for partial snapshot of the results, and
DAMON tracepoint for full record of the results. However, the
tried_regions sysfs directory usage has not sufficiently updated on some
sections of the DAMON usage document. Update those.
Link: https://lkml.kernel.org/r/20230616191742.87531-8-sj@kernel.org
Signed-off-by: SeongJae Park <sj@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Explanation of DAMOS quotas and watermarks are not clearly explaining the
meaning and expectation of each file. Add more clarification for those.
Link: https://lkml.kernel.org/r/20230616191742.87531-7-sj@kernel.org
Signed-off-by: SeongJae Park <sj@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
The background and concept of DAMOS is redundantly documented, in the
design document and the usage document. Replace the duplicated ones in
usage document with links to the design document.
Link: https://lkml.kernel.org/r/20230616191742.87531-6-sj@kernel.org
Signed-off-by: SeongJae Park <sj@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Brief explanation of DAMON user space tool and sysfs interface are
unnecessarily and repeatedly mentioning the list of address spaces that
DAMON is supporting. Remove those.
Link: https://lkml.kernel.org/r/20230616191742.87531-5-sj@kernel.org
Signed-off-by: SeongJae Park <sj@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Fix typos including a unnecessary comma and incomplete ':ref:' keywords.
Link: https://lkml.kernel.org/r/20230616191742.87531-4-sj@kernel.org
Signed-off-by: SeongJae Park <sj@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
DAMON user-space tool, damo, has deprecated[1] its old DAMOS schemes
specification format. However, an example of DAMON documentation is still
using it. Update the example to use one of the alternative options.
[1] https://github.com/awslabs/damo/commit/e9950ae68f6c
Link: https://lkml.kernel.org/r/20230616191742.87531-3-sj@kernel.org
Signed-off-by: SeongJae Park <sj@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Patch series "Docs/{mm,admin-guide}damon: update design and usage docs".
Update DAMON design and usage documents for outdated and unnecessarily
duplicated parts.
This patch (of 7):
The 'age' of each region in DAMON monitoring results is an important
concept for both monitoring part and DAMOS. And DAMOS section of the
design document is mentioning it. However, the age itself is not
explained in the document. Add a section for that.
Link: https://lkml.kernel.org/r/20230616191742.87531-1-sj@kernel.org
Link: https://lkml.kernel.org/r/20230616191742.87531-2-sj@kernel.org
Signed-off-by: SeongJae Park <sj@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
KASAN's boot time kernel parameter 'kasan.fault=' currently supports
'report' and 'panic', which results in either only reporting bugs or also
panicking on reports.
However, some users may wish to have more control over when KASAN reports
result in a kernel panic: in particular, KASAN reported invalid _writes_
are of special interest, because they have greater potential to corrupt
random kernel memory or be more easily exploited.
To panic on invalid writes only, introduce 'kasan.fault=panic_on_write',
which allows users to choose to continue running on invalid reads, but
panic only on invalid writes.
Link: https://lkml.kernel.org/r/20230614095158.1133673-1-elver@google.com
Signed-off-by: Marco Elver <elver@google.com>
Reviewed-by: Alexander Potapenko <glider@google.com>
Cc: Aleksandr Nogikh <nogikh@google.com>
Cc: Andrey Konovalov <andreyknvl@gmail.com>
Cc: Andrey Ryabinin <ryabinin.a.a@gmail.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Taras Madan <tarasmadan@google.com>
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Since commit c7c3dec1c9 ("mm: rmap: remove lock_page_memcg()"),
no more user, kill lock_page_memcg() and unlock_page_memcg().
Link: https://lkml.kernel.org/r/20230614143612.62575-1-wangkefeng.wang@huawei.com
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Reviewed-by: Matthew Wilcox (Oracle) <willy@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Make pte_offset_map() a wrapper for __pte_offset_map() (optionally outputs
pmdval), pte_offset_map_lock() a sparse __cond_lock wrapper for
__pte_offset_map_lock(): those __funcs added in mm/pgtable-generic.c.
__pte_offset_map() do pmdval validation (including pmd_clear_bad() when
pmd_bad()), returning NULL if pmdval is not for a page table.
__pte_offset_map_lock() verify pmdval unchanged after getting the lock,
trying again if it changed.
No #ifdef CONFIG_TRANSPARENT_HUGEPAGE around them: that could be done to
cover the imminent case, but we expect to generalize it later, and it
makes a mess of where to do the pmd_bad() clearing.
Add pte_offset_map_nolock(): outputs ptl like pte_offset_map_lock(),
without actually taking the lock. This will be preferred to open uses of
pte_lockptr(), because (when split ptlock is in page table's struct page)
it points to the right lock for the returned pte pointer, even if *pmd
gets changed racily afterwards.
Update corresponding Documentation.
Do not add the anticipated rcu_read_lock() and rcu_read_unlock()s yet:
they have to wait until all architectures are balancing pte_offset_map()s
with pte_unmap()s (as in the arch series posted earlier). But comment
where they will go, so that it's easy to add them for experiments. And
only when those are in place can transient racy failure cases be enabled.
Add more safety for the PAE mismatched pmd_low pmd_high case at that time.
Link: https://lkml.kernel.org/r/2929bfd-9893-a374-e463-4c3127ff9b9d@google.com
Signed-off-by: Hugh Dickins <hughd@google.com>
Cc: Alistair Popple <apopple@nvidia.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Axel Rasmussen <axelrasmussen@google.com>
Cc: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Christoph Hellwig <hch@infradead.org>
Cc: David Hildenbrand <david@redhat.com>
Cc: "Huang, Ying" <ying.huang@intel.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Lorenzo Stoakes <lstoakes@gmail.com>
Cc: Matthew Wilcox <willy@infradead.org>
Cc: Mel Gorman <mgorman@techsingularity.net>
Cc: Miaohe Lin <linmiaohe@huawei.com>
Cc: Mike Kravetz <mike.kravetz@oracle.com>
Cc: Mike Rapoport (IBM) <rppt@kernel.org>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Naoya Horiguchi <naoya.horiguchi@nec.com>
Cc: Pavel Tatashin <pasha.tatashin@soleen.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qi Zheng <zhengqi.arch@bytedance.com>
Cc: Ralph Campbell <rcampbell@nvidia.com>
Cc: Ryan Roberts <ryan.roberts@arm.com>
Cc: SeongJae Park <sj@kernel.org>
Cc: Song Liu <song@kernel.org>
Cc: Steven Price <steven.price@arm.com>
Cc: Suren Baghdasaryan <surenb@google.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Will Deacon <will@kernel.org>
Cc: Yang Shi <shy828301@gmail.com>
Cc: Yu Zhao <yuzhao@google.com>
Cc: Zack Rusin <zackr@vmware.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
As per a discussion with Muhammad Usama Anjum [1], the following is how
one is supposed to build selftests:
make headers && make -C tools/testing/selftests/mm
However, that's not yet documented anywhere. So add it to
Documentation/dev-tools/kselftest.rst .
[1] https://lore.kernel.org/all/bf910fa5-0c96-3707-cce4-5bcc656b6274@collabora.com/
Link: https://lkml.kernel.org/r/20230606071637.267103-11-jhubbard@nvidia.com
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Tested-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Shuah Khan <shuah@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Convert Microchip AT91 SAMA5D2 shutdown controller to YAML. SAMA7G5 SHDWC
DT node (available in arch/arm/boot/dts/sama7g5.dtsi) has syscon along with
its compatible. There is no usage of this syscon in the current code but it
may be necessary in future as some registers of SHDWC are accessed in
different drivers (at91-sama5d2_shdwc.c and arch/arm/mach-at91/pm.c).
Thus update the YAML with it to make DT checkers happy.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Evan Green <evan@rivosinc.com> says:
This change detects the presence of Zba, Zbb, and Zbs extensions and exports
them per-hart to userspace via the hwprobe mechanism. Glibc can then use
these in setting up hwcaps-based library search paths.
There's a little bit of extra housekeeping here: the first change adds
Zba and Zbs to the set of extensions the kernel recognizes, and the second
change starts tracking ISA features per-hart (in addition to the ANDed
mask of features across all harts which the kernel uses to make
decisions). Now that we track the ISA information per-hart, we could
even fix up /proc/cpuinfo to accurately report extension per-hart,
though I've left that out of this series for now.
* b4-shazam-merge:
RISC-V: hwprobe: Expose Zba, Zbb, and Zbs
RISC-V: Track ISA extensions per hart
RISC-V: Add Zba, Zbs extension probing
Link: https://lore.kernel.org/r/20230509182504.2997252-1-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Add two new bits to the IMA_EXT_0 key for ZBA, ZBB, and ZBS extensions.
These are accurately reported per CPU.
Signed-off-by: Evan Green <evan@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Link: https://lore.kernel.org/r/20230509182504.2997252-4-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230609140706.64623-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Detailed description for this pull request:
1. Clean-up extcon core without any behavior changes
- Add extcon_alloc_cables/muex/groups to improve the readability
of extcon_dev_register.
- Fix kernel doc of property and property capability fields to aovid warnings
and add missing description of struct extcon_dev.
- Use DECLARE_BITMAP macro and sysfs_emit instead of sprintf
- Use device_match_of_node helper instead of accessing the .of_node
- Use ida_alloc/free to get the unique id for extcon device
2. Update extcon-usbc-tusb320.c to support usb_role_switch and accessory detection
- Add usb_role_switch support on extcon-usbsc-tusb320.
- Add additional accessory detection for audio/debug accessory
and then pass the deteced accessory information to typec subsystem
on extcon-usbsc-tusb320.c.
- Add the support of unregistration of typec port on both error handling
and driver removal step on
3. Update extcon provider drivers (apx288/qcom-spmi-misc/palmas)
- Replace put_device with acpi_dev_put on extcon-axp288.c
- Use platform_get_irq_byname_optional for getting irq of
usb_id and usb_vbus on extcon-qcom-spmi-misc.c.
- Remove unused of_gpio.h on extcon-palmas.c.
4. Fix the devicetree binding document
- Rename misc node name to 'usb-dect@900' on pm8941-misc.yam
- Fix usb-id and usb_vbus defintion on pm8941-misc.yaml
- Drop unneeded quotes from extcon-arizona.c devicetree documentation
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAmSQYzMACgkQnM3fLN7r
z1MEmQ/+PQYDL5XBYEAunp1jURWHFVC+ee9DMq0L9gx2OSZ32nNslCAXrtElGQYF
FG/bh+frPVRUSrYklDUBT1aQ87acE3aGIElfwf+GTjUksvi/tTwY/JaA58Y5IthF
ZF86WBd1vDhTtMs0MCzfTZimfGWpckuBUEYr9yj0HJNc9ECh6tIdrJfReUF9SOtV
wZ6HGC/13jr31cGiMW11sH5kImz7y4AAe7Q1ZYlEGaut1mfmcDxLjeW9GqQLxqme
bHFThcXP+NESuB+7kLEEGtoCp3Tyyt5Je15onmVine7Vznwr0blUVv+d1NtdWNPX
85mtqCSASiRSqXaUccqabjs2fKXP7gOFE+3t0cMaBRMfn3+Zd6mscBEMVOFXskA3
WbvhFSX5UiY1pgGRW6sDMujrpItgS9KioJuFxOf3uRgZNy7tyJYQRaEp+5Dh7bBN
LksNfE5vXdMJKgMw/g/b7WalPj8REsiiYGCignCCEs1MB2gjUryrqT0WzLu/LKSC
OpH+xd08D7H7xu4jqWiD0ZkQs7OTACpj5GT1Xg7CsLwOhlthzHSs+sypi9h8+wVw
tToQXqSyfjrLgk0O6Ry+vKfzfgQoZqM4m4JjF8Pce1NctU3MWwhBU6hwRjeEj3lv
f5BppEk2VYDr6ofy1+OucrF/njR6QrTDlWdU8G+1g8PStWNrl4U=
=3D98
-----END PGP SIGNATURE-----
Merge tag 'extcon-next-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-next
Chanwoo writes:
Update extcon next for v6.5
Detailed description for this pull request:
1. Clean-up extcon core without any behavior changes
- Add extcon_alloc_cables/muex/groups to improve the readability
of extcon_dev_register.
- Fix kernel doc of property and property capability fields to aovid warnings
and add missing description of struct extcon_dev.
- Use DECLARE_BITMAP macro and sysfs_emit instead of sprintf
- Use device_match_of_node helper instead of accessing the .of_node
- Use ida_alloc/free to get the unique id for extcon device
2. Update extcon-usbc-tusb320.c to support usb_role_switch and accessory detection
- Add usb_role_switch support on extcon-usbsc-tusb320.
- Add additional accessory detection for audio/debug accessory
and then pass the deteced accessory information to typec subsystem
on extcon-usbsc-tusb320.c.
- Add the support of unregistration of typec port on both error handling
and driver removal step on
3. Update extcon provider drivers (apx288/qcom-spmi-misc/palmas)
- Replace put_device with acpi_dev_put on extcon-axp288.c
- Use platform_get_irq_byname_optional for getting irq of
usb_id and usb_vbus on extcon-qcom-spmi-misc.c.
- Remove unused of_gpio.h on extcon-palmas.c.
4. Fix the devicetree binding document
- Rename misc node name to 'usb-dect@900' on pm8941-misc.yam
- Fix usb-id and usb_vbus defintion on pm8941-misc.yaml
- Drop unneeded quotes from extcon-arizona.c devicetree documentation
* tag 'extcon-next-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon: (26 commits)
dt-bindings: extcon: wlf,arizona: drop unneeded quotes
extcon: Switch i2c drivers back to use .probe()
extcon: Drop unneeded assignments
extcon: Use sizeof(*pointer) instead of sizeof(type)
extcon: Use unique number for the extcon device ID
extcon: Remove dup device name in the message and unneeded error check
extcon: Use dev_of_node(dev) instead of dev->of_node
extcon: Use device_match_of_node() helper
extcon: Amend kernel documentation of struct extcon_dev
extcon: Use sysfs_emit() to instead of sprintf()
extcon: Use DECLARE_BITMAP() to declare bit arrays
extcon: Fix kernel doc of property capability fields to avoid warnings
extcon: Fix kernel doc of property fields to avoid warnings
extcon: usbc-tusb320: add USB_ROLE_SWITCH dependency
extcon: usbc-tusb320: add usb_role_switch support
extcon: usbc-tusb320: add accessory detection support
extcon: Add extcon_alloc_groups to simplify extcon register function
extcon: Add extcon_alloc_muex to simplify extcon register function
extcon: Add extcon_alloc_cables to simplify extcon register function
extcon: Remove redundant null checking for class
...
StarFive JH7110 platforms USB have a wrapper module around
the Cadence USBSS-DRD controller. Add binding information doc
for that.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Peter Chen <peter.chen@kernel.org>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230518112750.57924-6-minda.chen@starfivetech.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Create tas2781.yaml for tas2781 driver.
Signed-off-by: Shenghao Ding <13916275206@139.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230618122819.23143-4-13916275206@139.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Convert Broadcom Kona family Secure Monitor bounce buffer bindings
to DT schema.
Changes during conversion:
- move from misc to firmware subdirectory
- add used, but previously undocumented SoC-specific compatibles
- drop deprecated compatibles (they've been deprecated for ~10 years)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Link: https://lore.kernel.org/r/20230618151308.GA23586@standask-GA-A55M-S2HP
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Do all the logic to set the mode during mount options parsing and
do not keep the option string around.
Use a constant_table to translate from enum redirect mode to string
in preperation for new mount api option parsing.
The mount option "off" is translated to either "follow" or "nofollow",
depending on the "redirect_always_follow" build/module config, so
in effect, there are only three possible redirect modes.
This results in a minor change to the string that is displayed
in show_options() - when redirect_dir is enabled by default and the user
mounts with the option "redirect_dir=off", instead of displaying the mode
"redirect_dir=off" in show_options(), the displayed mode will be either
"redirect_dir=follow" or "redirect_dir=nofollow", depending on the value
of "redirect_always_follow" build/module config.
The displayed mode reflects the effective mode, so mounting overlayfs
again with the dispalyed redirect_dir option will result with the same
effective and displayed mode.
Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Introduce the format lowerdir=lower1:lower2::lowerdata1::lowerdata2
where the lower layers on the right of the :: separators are not merged
into the overlayfs merge dirs.
Data-only lower layers are only allowed at the bottom of the stack.
The files in those layers are only meant to be accessible via absolute
redirect from metacopy files in lower layers. Following changes will
implement lookup in the data layers.
This feature was requested for composefs ostree use case, where the
lower data layer should only be accessiable via absolute redirects
from metacopy inodes.
The lower data layers are not required to a have a unique uuid or any
uuid at all, because they are never used to compose the overlayfs inode
st_ino/st_dev.
Reviewed-by: Alexander Larsson <alexl@redhat.com>
Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
Clarify language. Clean up grammar. Hyphenate some words.
Change "low-ops" to "low-level" since "low-ops" isn't defined or even
mentioned anywhere else in the kernel source tree.
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Juergen Gross <jgross@suse.com>
Link: https://lore.kernel.org/r/20230610054310.6242-1-rdunlap@infradead.org
Building the 'htmldocs' target results in the following warning when
processing 'hisi-pmu.rst':
| Documentation/admin-guide/perf/hisi-pmu.rst:107: ERROR: Unexpected indentation.
Fix the warning by converting all of the register bitfield lists into
proper bulleted lists and adjusting the indentation of the wrapping line
accordingly. At the same time, use an enumerated list to describe the
new PMUv2 functions.
Fixes: ea8d1c062a ("docs: perf: Add new description for HiSilicon UC PMU")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Will Deacon <will@kernel.org>
DTS and driver already support pcie_clkreq function for a pin. Add it
to fix dtbs_check warning:
qcom-sdx65-mtp.dtb: pinctrl@f100000: pcie-ep-clkreq-default-state: 'oneOf' conditional failed, one must be fixed:
'bias-disable', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
'pcie_clkreq' is not one of ['blsp_uart1', 'blsp_spi1', ... 'gpio']
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230617111809.129232-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Updates for v6.5.. this includes a backmerg of drm-next tree to be able
to use new DRM DSC helpers.
Core:
+ Add Marijn Suijten as drm/msm reviewer
+ Adreno A660 bindings
+ SM8350 MDSS bindings fix
+ Fix adreno_is_a690() warnings
+ More generic (DRM) and MSM-specific DSC helpers
DP:
+ Removed obsolete USB-PD remains
+ Documented DP compatible string for sm8550 platform
DPU:
+ Enable missing features (DSPP, DSC, split display) on sc8180x,
sc8280xp, sm8450
+ Enabled writeback on sc7280
+ Implemented tearcheck support to support vsync on SM150 and
newer platforms
+ Native HDMI output support
+ Dropped unused features: regdma, GC, IGC
+ Fixed the DSC flush operations
+ Simplified QoS handling, removing obsolete and unused features
and merging SSPP and WB code paths
+ Reworked dpu_encoder initialisation path
+ Enabled DSPP support on sdm845
+ Disabled color-management if DSPP blocks are not available
+ Added support for DSC 1.2 blocks found on sm8350 and later
+ Added .fb_dirty to fix CMD panels
DSI:
+ Drop powerup quirks in favour of using pre_enable_prev_first for
downstream bridges
+ Fixed 14nm DSI PHY programming
+ Added support for DSI and 28nm DSI PHY on MSM8226 platform
+ Make use of DRM and MSM DSC helpers
MDP5:
+ Added support for display controller on MSM8226 platform
GPU:
+ A690 support
+ Don't set IO_PGTABLE_QUIRK_ARM_OUTER_WBWA on devices with coherent SMMU
(like A690)
+ Move cmdstream dumping out of fence signaling path
+ Cleanups
+ Support for a6xx devices without GMU (aka "GMU wrapper"
+ a610 support
+ a619_holi support (a619 variant without GMU)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsUB=tRB4nR6ZCJMuLhro5zN3BQWUSywVYbaipqqDZ_cQ@mail.gmail.com
-----BEGIN PGP SIGNATURE-----
iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmSPcdMeHHRvcnZhbGRz
QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGWrQH/3KmuvZsWMC4PpJY
VcF9VfF9i+Zv7DoG8sjD5VpNh47e87RsR6WNOFnKol5SUrM6vsBAb5i2rfQahNIv
NSj0fPCE4/Nj9LMecKVC9WD8CitxYdbR+CF9Is21AQj1VihUl9eHXGcAWxuaMyhk
TjPUwmbOOsRVMXXdGJzjX78cvLsxqpSv8A/5OTh16IBimbh7p+YjKJFkbfj/PMWf
aF1quFkIEXgzJcHCpP6KDZHr2KbpY+jIN9hUENnGKJxHYNso5u+KrIW1kAm8meP1
x26ETSquM0T70OAzovOWg+BeVkLDac/3Rh30ztLAI4AtajrlSzycvFsU9UNEJCc2
BnM2IZI=
=ANT5
-----END PGP SIGNATURE-----
Backmerge tag 'v6.4-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next
Linux 6.4-rc7
Need this to pull in the msm work.
Signed-off-by: Dave Airlie <airlied@redhat.com>
The "GMU Wrapper" is Qualcomm's name for "let's treat the GPU blocks
we'd normally assign to the GMU as if they were a part of the GMU, even
though they are not". It's a (good) software representation of the GMU_CX
and GMU_GX register spaces within the GPUSS that helps us programatically
treat these de-facto GMU-less parts in a way that's very similar to their
GMU-equipped cousins, massively saving up on code duplication.
The "wrapper" register space was specifically designed to mimic the layout
of a real GMU, though it rather obviously does not have the M3 core et al.
To sum it all up, the GMU wrapper is essentially a register space within
the GPU, which Linux sees as a dumbed-down regular GMU: there's no clocks,
interrupts, multiple reg spaces, iommus and OPP. Document it.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542750/
Signed-off-by: Rob Clark <robdclark@chromium.org>
The "GMU Wrapper" is Qualcomm's name for "let's treat the GPU blocks
we'd normally assign to the GMU as if they were a part of the GMU, even
though they are not". It's a (good) software representation of the GMU_CX
and GMU_GX register spaces within the GPUSS that helps us programatically
treat these de-facto GMU-less parts in a way that's very similar to their
GMU-equipped cousins, massively saving up on code duplication.
The "wrapper" register space was specifically designed to mimic the layout
of a real GMU, though it rather obviously does not have the M3 core et al.
GMU wrapper-equipped A6xx GPUs require clocks and clock-names to be
specified under the GPU node, just like their older cousins. Account
for that.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542748/
Signed-off-by: Rob Clark <robdclark@chromium.org>
1) Added a new event handler to firmware sync reset, which is used to
support firmware sync reset flow on smart NIC. Adding this new stage to
the flow enables the firmware to ensure host PFs unload before ECPFs
unload, to avoid race of PFs recovery.
2) Debugfs for mlx5 eswitch bridge offloads
3) Added two new counters for vport stats
4) Minor Fixups and cleanups for net-next branch
-----BEGIN PGP SIGNATURE-----
iQEzBAABCAAdFiEEGhZs6bAKwk/OTgTpSD+KveBX+j4FAmSMsbEACgkQSD+KveBX
+j6BAwgAyiZWqA8VEabjJtJNh30Ghfi5OkheAvJmPkd9UlM04EPw4x1dZ/z/jBnU
piBixrs0ou92ZF//Ph1vlf0Jae/YdfKdNcm/FEydspHZC0C2QqeNpDDWl0z3STqB
leBiFPjjBgqYWZWGwgaVlGOyzglTTu5DilkKVy1Ohf7j50P0FppViOsvQle3pAqO
UUXITN8si2AK/03JBJQNIulyyVP+EN9/+d8ZVZagKgurB9Qim9lUbZCerXacEUGV
M/XxYd+pwSAMh3TYlt2x1jv1aSpVwPzIolidJTjUd4gaImi40dw36kNP5BcoSMfr
QEaB1NMv4zfAwiZ7XaXY6/l5wqTjOg==
=vYKY
-----END PGP SIGNATURE-----
Merge tag 'mlx5-updates-2023-06-16' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
mlx5-updates-2023-06-16
1) Added a new event handler to firmware sync reset, which is used to
support firmware sync reset flow on smart NIC. Adding this new stage to
the flow enables the firmware to ensure host PFs unload before ECPFs
unload, to avoid race of PFs recovery.
2) Debugfs for mlx5 eswitch bridge offloads
3) Added two new counters for vport stats
4) Minor Fixups and cleanups for net-next branch
Signed-off-by: David S. Miller <davem@davemloft.net>
Mention that the interrupt line is just asserted for a random period of
time, not the entire time.
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>