The mstar SoCs have an arch timer but HAVE_ARM_ARCH_TIMER wasn't
selected. If MSC313E_TIMER isn't selected then the kernel gets
stuck at boot because there are no timers available.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20220301104349.3040422-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
All 3 miniPCIe slots in Turris Omnia are designed for 10 W.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The Qualcomm Snapdragon 8916 devices come in both 32- or 64-bit form,
and even though the typical case so far has been to 64-bit, it's
possible to run the Dragonboard 410c in either mode.
Enable the relevant drivers in multi_v7_defconfig to enable this, and
other Snapdragon 8916 devices to run the 32-bit kernel.
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Merge tag 'qcom-defconfig-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig
Qualcomm defconfig updates for v5.18
The Qualcomm Snapdragon 8916 devices come in both 32- or 64-bit form,
and even though the typical case so far has been to 64-bit, it's
possible to run the Dragonboard 410c in either mode.
Enable the relevant drivers in multi_v7_defconfig to enable this, and
other Snapdragon 8916 devices to run the 32-bit kernel.
* tag 'qcom-defconfig-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: multi_v7_defconfig: Enable drivers for DragonBoard 410c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The earlier removal of two boards caused a build regression,
fix it by removing the extraneous '||'.
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 28f74201e3 ("ARM: pxa: remove Intel Imote2 and Stargate 2 boards")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This enables basic bootup support for the Airoha EN7523 SoC.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220130145116.88406-5-nbd@nbd.name
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32
GPIOs
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220130145116.88406-14-nbd@nbd.name
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
EN7523 is an armv8 based silicon used inside broadband access type devices
such as xPON and xDSL. It shares various silicon blocks with MediaTek
silicon such as the MT7622.
Add basic support for Airoha EN7523, enough for booting to console.
The UART is basically 8250-compatible, except for the clock selection.
A clock-frequency value is synthesized to get this to run at 115200 bps.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Link: https://lore.kernel.org/r/20220130145116.88406-4-nbd@nbd.name
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Luxul XWR-3150 stores MAC as NVRAM variable. Add NVMEM cell for it and
reference it in the Ethernet interface node.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
With this change legacy INTA, INTB, INTC and INTD interrupts are reported
separately and not mixed into one Linux virq source anymore.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Luis Mendes <luis.p.mendes@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The changes in this set are cleanups and fixes for 32-bit Tegra device
tree files. With these, some json-schema validation errors are fixed.
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Merge tag 'tegra-for-5.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.18-rc1
The changes in this set are cleanups and fixes for 32-bit Tegra device
tree files. With these, some json-schema validation errors are fixed.
* tag 'tegra-for-5.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: tamonten: Fix I2C3 pad setting
ARM: tegra: Fix ethernet node names
ARM: tegra: paz00: Add MMC aliases
ARM: tegra: tf700t: Rename DSI node
ARM: tegra: transformer: Drop reg-shift for Tegra HS UART
ARM: tegra: asus-tf101: Enable S/PDIF and HDMI audio
ARM: tegra: Update jedec,lpddr2 revision-id binding
Link: https://lore.kernel.org/r/20220225164741.1064416-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Fix hang of secondary CPU bring-up on some of Exynos5420-based
devices (Secure Monitor Call SMC_CMD_CPU1BOOT should be skipped for
all Exynos5 devices).
2. Extend Universal Serial Interface DT schema to precisely describe
children nodes.
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Merge tag 'samsung-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc
Samsung mach/soc changes for v5.18
1. Fix hang of secondary CPU bring-up on some of Exynos5420-based
devices (Secure Monitor Call SMC_CMD_CPU1BOOT should be skipped for
all Exynos5 devices).
2. Extend Universal Serial Interface DT schema to precisely describe
children nodes.
* tag 'samsung-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: soc: samsung: usi: refer to dtschema for children
ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4
Link: https://lore.kernel.org/r/20220226220116.13452-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
I have no reason to believe these boards have any more users and I
haven't tested them for several years. Removing them may simplify
other changes to the various PXA boards people still care about.
The recent conversion of pxa2xx_spi to GPIO descriptors for example
had to update this board despite no one caring or testing.
Great boards that got me started in kernel development, RIP!
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Daniel Mack <daniel@zonque.org>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: soc@kernel.org
Link: https://lore.kernel.org/r/20220227134431.908998-1-jic23@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The -nostdlib option requests the compiler to not use the standard
system startup files or libraries when linking. It is effective only
when $(CC) is used as a linker driver.
Since commit fe00e50b2d ("ARM: 8858/1: vdso: use $(LD) instead of
$(CC) to link VDSO"), $(LD) is directly used, hence -nostdlib is
unneeded.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Covert to the generic reserve_initrd_mem() function.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
early_param() handlers should return 0 on success.
__setup() handlers should return 1 on success, i.e., the parameter
has been handled. A return of 0 would cause the "option=value" string
to be added to init's environment strings, polluting it.
../arch/arm/mm/mmu.c: In function 'test_early_cachepolicy':
../arch/arm/mm/mmu.c:215:1: error: no return statement in function returning non-void [-Werror=return-type]
../arch/arm/mm/mmu.c: In function 'test_noalign_setup':
../arch/arm/mm/mmu.c:221:1: error: no return statement in function returning non-void [-Werror=return-type]
Fixes: b849a60e09 ("ARM: make cr_alignment read-only #ifndef CONFIG_CPU_CP15")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Igor Zhbanov <i.zhbanov@omprussia.ru>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: patches@armlinux.org.uk
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Increase the size of the buffer and set the ftrace-size property in order
to collect event tracing during a crash.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20211202224525.29178-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is a half-width, single-socket Epyc server board with an AST2500
BMC. This device tree is sufficient for basic OpenBMC functionality,
but we'll need to add a few more devices (as driver support becomes
available) before it's fully usable.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220105101719.7093-1-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Early Rainier builds had SPI NOR as a fallback boot device when eMMC
was not programmed. Most systems don't have the NOR populated, so remove
it from the device tree as it is not used.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220120063307.63898-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
Move adc14 and adc15 (battery sensor) into single iio-hwmon node to
correct label to be read by single application for all adc sensors.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220228000242.1884-6-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to
the DT schema. Rename the node to pass dtbs_check.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220228000242.1884-5-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Enable the secondary flash of the Ampere's Mt. Jade's BMC.
Signed-off-by: Quan Nguyen <quan@os.amperecomputing.com>
Signed-off-by: Thang Q. Nguyen <thang@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220228000242.1884-2-quan@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
One of the things that CONFIG_HARDENED_USERCOPY sanity-checks is whether
an object that is about to be copied to/from userspace is overlapping
the stack at all. If it is, it performs a number of inexpensive
bounds checks. One of the finer-grained checks is whether an object
crosses stack frames within the stack region. Doing this on x86 with
CONFIG_FRAME_POINTER was cheap/easy. Doing it with ORC was deemed too
heavy, and was left out (a while ago), leaving the courser whole-stack
check.
The LKDTM tests USERCOPY_STACK_FRAME_TO and USERCOPY_STACK_FRAME_FROM
try to exercise these cross-frame cases to validate the defense is
working. They have been failing ever since ORC was added (which was
expected). While Muhammad was investigating various LKDTM failures[1],
he asked me for additional details on them, and I realized that when
exact stack frame boundary checking is not available (i.e. everything
except x86 with FRAME_POINTER), it could check if a stack object is at
least "current depth valid", in the sense that any object within the
stack region but not between start-of-stack and current_stack_pointer
should be considered unavailable (i.e. its lifetime is from a call no
longer present on the stack).
Introduce ARCH_HAS_CURRENT_STACK_POINTER to track which architectures
have actually implemented the common global register alias.
Additionally report usercopy bounds checking failures with an offset
from current_stack_pointer, which may assist with diagnosing failures.
The LKDTM USERCOPY_STACK_FRAME_TO and USERCOPY_STACK_FRAME_FROM tests
(once slightly adjusted in a separate patch) pass again with this fixed.
[1] https://github.com/kernelci/kernelci-project/issues/84
Cc: Matthew Wilcox (Oracle) <willy@infradead.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: linux-mm@kvack.org
Reported-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
---
v1: https://lore.kernel.org/lkml/20220216201449.2087956-1-keescook@chromium.org
v2: https://lore.kernel.org/lkml/20220224060342.1855457-1-keescook@chromium.org
v3: https://lore.kernel.org/lkml/20220225173345.3358109-1-keescook@chromium.org
v4: - improve commit log (akpm)
Enable the BCM23550 and BCM53573 SoCs to have all of the ARM 32-bit SoCs
enabled.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable CONFIG_PHY_USB_BRCM (USB PHY driver) and CONFIG_USB_BRCMSTB which
allows us to enable the Broadcom STB USB drivers (OHCI, EHCI and XHCI).
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Enable the new Audio Graph Card2 driver which can handle sound cards
more flexibly in the arm64 defconfig,
- Disable unneeded 8250 serial options in shmobile_defconfig,
- Enable additional support for Renesas platforms in the arm64
defconfig.
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Merge tag 'renesas-arm-defconfig-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/defconfig
Renesas ARM defconfig updates for v5.18
- Enable the new Audio Graph Card2 driver which can handle sound cards
more flexibly in the arm64 defconfig,
- Disable unneeded 8250 serial options in shmobile_defconfig,
- Enable additional support for Renesas platforms in the arm64
defconfig.
* tag 'renesas-arm-defconfig-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: defconfig: Enable additional support for Renesas platforms
ARM: shmobile: defconfig: Disable unneeded 8250 serial options
arm64: defconfig: Enable Audio Graph Card2 driver
Link: https://lore.kernel.org/r/cover.1644587198.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add a new defconfig for Cortex-M based i.MXRT family.
- A series from Marcel Ziswiler to rebuild arm64 defconfig with
'savedefconfig', and then enable various relevant options needed by
Toradex verdin-imx8mm device.
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Merge tag 'imx-defconfig-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig
i.MX defconfig change for 5.18:
- Add a new defconfig for Cortex-M based i.MXRT family.
- A series from Marcel Ziswiler to rebuild arm64 defconfig with
'savedefconfig', and then enable various relevant options needed by
Toradex verdin-imx8mm device.
* tag 'imx-defconfig-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: defconfig: enable verdin-imx8mm relevant drivers as modules
arm64: defconfig: build r8169 as a module
arm64: defconfig: build imx-sdma as a module
arm64: defconfig: enable imx8m pcie phy driver
arm64: defconfig: enable bpf/cgroup firewalling
arm64: defconfig: rebuild default configuration
arm64: defconfig: re-order default configuration
arm64: defconfig: enable pcieaer configuration
arm64: defconfig: enable taskstats configuration
ARM: imxrt_defconfig: Add i.MXRT family defconfig
Link: https://lore.kernel.org/r/20220222075226.160187-6-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
-MCU:
-Fix W=1 warnings for timers (duplicate unit-address) for F4 and F7 series.
-Enable DMA2D on f469 disco.
- MPU:
-General:
- Add new board support: emSBS-Argon.
- Add dma configuration for all U(S)ART nodes and disable them in board files
when they are not needed in stm32mp15.
- Correct GIC PPI interrupts on stm32mp15 and stm32mp13.
- ST boards:
- Add EXTI support on stm32mp13
- Add DMA, MDMA and DMAmux support to stm32mp13 (iso feature than MP15)
- Update SDMMC1/2 support on stm32mp13: sleep config, update version to v2.2,
update the max frequency to 130 MHz.
- DH boards:
- Enable rproc to control the CM4 and IPCC mailbox to interact with it.
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Merge tag 'stm32-dt-for-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.18, round 1
Highlights:
----------
-MCU:
-Fix W=1 warnings for timers (duplicate unit-address) for F4 and F7 series.
-Enable DMA2D on f469 disco.
- MPU:
-General:
- Add new board support: emSBS-Argon.
- Add dma configuration for all U(S)ART nodes and disable them in board files
when they are not needed in stm32mp15.
- Correct GIC PPI interrupts on stm32mp15 and stm32mp13.
- ST boards:
- Add EXTI support on stm32mp13
- Add DMA, MDMA and DMAmux support to stm32mp13 (iso feature than MP15)
- Update SDMMC1/2 support on stm32mp13: sleep config, update version to v2.2,
update the max frequency to 130 MHz.
- DH boards:
- Enable rproc to control the CM4 and IPCC mailbox to interact with it.
* tag 'stm32-dt-for-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (43 commits)
ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp15
ARM: dts: stm32: Correct masks for GIC PPI interrupts on stm32mp13
ARM: dts: stm32: remove timer5 duplicate unit-address on stm32f7 series
ARM: dts: stm32: remove some timer duplicate unit-address on stm32f7 series
ARM: dts: stm32: Enable EXTI on stm32mp13
ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcor-avenger96
ARM: dts: stm32: keep uart4 behavior on stm32mp15xx-dhcom-som
ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-picoitx
ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-pdk2
ARM: dts: stm32: keep uart nodes behavior on stm32mp15xx-dhcom-drc02
ARM: dts: stm32: keep uart4 behavior on stm32mp157c-odyssey
ARM: dts: stm32: keep uart4 behavior on stm32mp157c-lxa-mc1
ARM: dts: stm32: keep uart nodes behavior on stm32mp157a-stinger96
ARM: dts: stm32: keep uart nodes behavior on stm32mp1-microdev2.0
ARM: dts: stm32: keep uart nodes behavior on stm32mp1-microdev2.0-of7
ARM: dts: stm32: keep uart4 behavior on stm32mp157a-iot-box
ARM: dts: stm32: keep uart4 behavior on icore-stm32mp1-edimm2.2
ARM: dts: stm32: keep uart4 behavior on icore-stm32mp1-ctouch2
ARM: dts: stm32: keep uart4 and uart7 behavior on stm32mp15xx-dkx
ARM: dts: stm32: keep uart4 behavior on stm32mp157c-ed1
...
Link: https://lore.kernel.org/r/893924a9-bcc4-9fa9-4f8e-7f56e77f6854@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Make sure in .probe() to set driver data before the function is left to
make it possible in .remove() to undo the actions done.
This fixes a potential memory leak and stops returning an error code in
.remove() that is ignored by the driver core anyhow.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- sama7g5: CPU idle support with CPUFreq operating points defined in DT
- polarfire: addition of the soc system controller
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Merge tag 'at91-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc
AT91 & POLARFIRE SoC #1 for 5.18:
- sama7g5: CPU idle support with CPUFreq operating points defined in DT
- polarfire: addition of the soc system controller
* tag 'at91-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
soc: add microchip polarfire soc system controller
ARM: at91: Kconfig: select PM_OPP
ARM: at91: PM: add cpu idle support for sama7g5
ARM: at91: ddr: fix typo to align with datasheet naming
ARM: at91: ddr: align macro definitions
ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency
Link: https://lore.kernel.org/r/20220225121943.71494-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
All of the SoCs that are supported so far are Cortex A7 r0p5.
So it seems like this errata is present.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Link: https://lore.kernel.org/r/20220223064807.261878-1-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add initial support for i.MXRT10xx family which features NXP's
implementation of the Arm Cortex-M7 core and in some case the
Arm Cortex-M4 core too.
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Merge tag 'imx-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc
i.MX SoC update for 5.18:
- Add initial support for i.MXRT10xx family which features NXP's
implementation of the Arm Cortex-M7 core and in some case the
Arm Cortex-M4 core too.
* tag 'imx-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Add initial support for i.MXRT10xx family
Link: https://lore.kernel.org/r/20220222075226.160187-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
makes it an exclusive device tree subarchitecture without any
special weirdness in arch/arm/mach-ixp4xx.
The biggest noticeable change is the removal of the old PCI
driver and along with that the removal of the special DMA
coherency code and defines and the DMA bouncing.
I tried to convert the IXP4xx to multiplatform on top of
this but it didn't work because IXP4xx wants to be big
endian and multiplatform config creates a problem like
this:
../arch/arm/kernel/head.S: Assembler messages:
../arch/arm/kernel/head.S:94: Error: selected processor does not support `setend be' in ARM mode
I think this is because MULTI_V5 turns on CPUs that cannot
do big endian, and IXP4xx turn on big endian. (It crashes if
I try to boot in little endian mode, sorry. It really wants
to run big endian.)
But before fixing multiplatform we can fix all of this!
The networking patches are dependencies so I am requesting
ACKs from the network maintainers on these.
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Merge tag 'ixp4xx-cleanup-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/soc
This cleans out the remaining board files from IXP4xx and
makes it an exclusive device tree subarchitecture without any
special weirdness in arch/arm/mach-ixp4xx.
The biggest noticeable change is the removal of the old PCI
driver and along with that the removal of the special DMA
coherency code and defines and the DMA bouncing.
I tried to convert the IXP4xx to multiplatform on top of
this but it didn't work because IXP4xx wants to be big
endian and multiplatform config creates a problem like
this:
../arch/arm/kernel/head.S: Assembler messages:
../arch/arm/kernel/head.S:94: Error: selected processor does not support `setend be' in ARM mode
I think this is because MULTI_V5 turns on CPUs that cannot
do big endian, and IXP4xx turn on big endian. (It crashes if
I try to boot in little endian mode, sorry. It really wants
to run big endian.)
But before fixing multiplatform we can fix all of this!
The networking patches are dependencies so I am requesting
ACKs from the network maintainers on these.
* tag 'ixp4xx-cleanup-for-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: ixp4xx: Convert to SPARSE_IRQ and P2V
ARM: ixp4xx: Drop all common code
ARM: ixp4xx: Drop custom DMA coherency and bouncing
ARM: ixp4xx: Remove feature bit accessors
net: ixp4xx_hss: Check features using syscon
net: ixp4xx_eth: Drop platform data support
soc: ixp4xx-npe: Access syscon regs using regmap
soc: ixp4xx: Add features from regmap helper
ARM: ixp4xx: Drop UDC info setting function
ARM: ixp4xx: Drop stale Kconfig entry
ARM: ixp4xx: Delete old PCI driver
ARM: ixp4xx: Delete the Goramo MLR boardfile
ARM: ixp4xx: Delete Gateway 7001 boardfiles
Link: https://lore.kernel.org/r/CACRpkdahK-jaHFqLCpSqiXwAtkSKbhWQZ9jaSo6rRzHfSiECkA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- lan966x basic DT and associated evaluation board pcb8291 (2-ports)
- documentation for an upcoming Kontron switch board featuring a LAN9668
- one fix for an old bug we have with PMECC on sama5d2 in some corner
cases
- sama7g5 and its EK: crypto, CAN and DVFS operating points
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Merge tag 'at91-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 & LAN966 DT #1 for 5.18:
- lan966x basic DT and associated evaluation board pcb8291 (2-ports)
- documentation for an upcoming Kontron switch board featuring a LAN9668
- one fix for an old bug we have with PMECC on sama5d2 in some corner
cases
- sama7g5 and its EK: crypto, CAN and DVFS operating points
* tag 'at91-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: at91: sama7g5: add opps
ARM: dts: at91: sama7g5ek: set regulator voltages for standby state
ARM: dts: at91: fix low limit for CPU regulator
ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek
ARM: dts: at91: sama7g5: Add can controllers of sama7g5
ARM: dts: at91: sama7g5: Add crypto nodes
ARM: dts: at91: Use the generic "crypto" node name for the crypto IPs
ARM: dts: at91: remove status = "okay" from soc specific dtsi
ARM: dts: at91: sama5d2: Fix PMERRLOC resource size
dt-bindings: arm: at91: add Kontron's new KSwitches
ARM: dts: add DT for lan966 SoC and 2-port board pcb8291
Link: https://lore.kernel.org/r/20220225110735.18080-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Document the use of the renesas-soc IRC channel,
- Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18 (take two)
- Document the use of the renesas-soc IRC channel,
- Watchdog support for the R-Car S4-8, RZ/N1D, and RZ/G2LC SoCs on the
Spider, RZN1D-DB, and RZ/G2LC SMARC EVK development boards,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: Align GPIO hog names with dtschema
arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
ARM: dts: r9a06g032: Add the watchdog nodes
dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
arm64: dts: renesas: spider-cpu: Enable watchdog timer
arm64: dts: renesas: r8a779f0: Add RWDT node
MAINTAINERS: Specify IRC channel for Renesas ARM64 port
MAINTAINERS: Specify IRC channel for Renesas ARM32 port
arm64: dts: renesas: ulcb-kf: fix wrong comment
Link: https://lore.kernel.org/r/cover.1645784466.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Alexander Stein to update imx6qdl based TQMA6 and MBA6
devices, adding I2C bus recovery, marking GPIO buttons as wakeup
source etc.
- A set of maintenance patches from Oleksij Rempel adding display,
CAN termination and thermal support for i.MX6 based boards from
Plymovent, Protonic and from Kverneland.
- A couple of patches from Thierry Reding to correct i.MX28 RTC
compatbile, and rename RTC device nodes for i.MX SoCs.
- Update i.MX7 device tree to use audio_mclk_post_div clock instead of
audio_mclk_root_clk, and move PCIe out of AIPS3 bus.
- A couple of patches on imx6qdl-phytec to support PMIC MFD subdevices.
- Add pinctrl header support for i.MXRT1050 SoC.
- Other small and random changes.
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Merge tag 'imx-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm device tree change for 5.18:
- A series from Alexander Stein to update imx6qdl based TQMA6 and MBA6
devices, adding I2C bus recovery, marking GPIO buttons as wakeup
source etc.
- A set of maintenance patches from Oleksij Rempel adding display,
CAN termination and thermal support for i.MX6 based boards from
Plymovent, Protonic and from Kverneland.
- A couple of patches from Thierry Reding to correct i.MX28 RTC
compatbile, and rename RTC device nodes for i.MX SoCs.
- Update i.MX7 device tree to use audio_mclk_post_div clock instead of
audio_mclk_root_clk, and move PCIe out of AIPS3 bus.
- A couple of patches on imx6qdl-phytec to support PMIC MFD subdevices.
- Add pinctrl header support for i.MXRT1050 SoC.
- Other small and random changes.
* tag 'imx-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (22 commits)
ARM: dts: imx6qp-sabresd: Enable PCIe support
ARM: dts: imx6dl: plym2m, prtvt7, victgo: add thermal zones and hwmon
ARM: dts: imx6dl: plym2m, prtvt7, victgo: make use of new resistive-adc-touch driver
ARM: dts: imx6qdl-vicut1: add CAN termination support
ARM: dts: imx6dl-prtvt7: Add missing tvp5150 video decoder node
ARM: dts: imx6dl-prtvt7: Add display and panel nodes
ARM: dts: imx6qdl-mba6: Move pinmux to regulator node
ARM: dts: imx6qdl: tqma6: Remove obsolete comment
ARM: dts: imx6qdl: tqma6: Mark gpio-buttons as wakeup-source
ARM: dts: imx6qdl: tqma6: Add i2c bus recovery
ARM: dts: imx6qdl-mba6: Move rtc alias to common location
ARM: dts: imx7: Move PCIe out of AIPS3
ARM: dts: imx: Add missing LVDS decoder on M53Menlo
ARM: dts: imx6qdl-phytec: handle unneeded MFD-subdevices correctly
ARM: dts: imx6qdl-phytec: add missing pmic MFD subdevices
ARM: dts: imx7: Use audio_mclk_post_div instead audio_mclk_root_clk
ARM: dts: imx28: reparent gpmi clock to ref_gpmi
ARM: dts: imxrt1050-pinfunc: Add pinctrl binding header
ARM: dts: imx6sx-udoo-neo: Add HDMI support
ARM: dts: imx6qdl-dhcom-pdk2: Include missing headers
...
Link: https://lore.kernel.org/r/20220222075226.160187-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Additions to wpcm450 following the upstremaing of the pinctrl/gpio
driver for this platform
* Match more of the platform in MAINTAINERS
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Merge tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
Nuvoton device tree updates for 5.18
* Additions to wpcm450 following the upstremaing of the pinctrl/gpio
driver for this platform
* Match more of the platform in MAINTAINERS
* tag 'nuvoton-5.18-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
MAINTAINERS: ARM/WPCM450: Add 'W:' line with wiki
ARM: dts: wpcm450: Add pinmux information to UART0
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons
ARM: dts: wpcm450: Add pin functions
ARM: dts: wpcm450: Add pinctrl and GPIO nodes
ARM: dts: wpcm450: Add global control registers (GCR) node
MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture
dt-bindings: arm/npcm: Add binding for global control registers (GCR)
Link: https://lore.kernel.org/r/CACPK8XdjF6dG04hR+iMpUP8=LSJi5x-hRivgCGDaY7o_461eJw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* 'mstar-dt-next' of https://github.com/linux-chenxing/linux:
ARM: mstar: Extend opp_table for infinity2m
ARM: mstar: Add OPP table for infinity3
ARM: mstar: Add OPP table for infinity
ARM: mstar: Link cpupll to second core
ARM: mstar: Link cpupll to cpu
ARM: mstar: Add cpupll to base dtsi
dt-bindings: clk: mstar msc313 cpupll binding description
ARM: dts: mstar: Add board for 100ask DongShanPiOne
dt-bindings: arm: mstar: Add compatible for 100ask DongShanPiOne
dt-bindings: vendor-prefixes: Add prefix for 100ask
ARM: dts: mstar: Add a dts for Miyoo Mini
dt-bindings: arm: mstar: Add compatible for Miyoo Mini
dt-bindings: vendor-prefixes: Add prefix for Miyoo
ARM: dts: mstar: Add the Wireless Tag IDO-SBC2D06-V1B-22W
dt-bindings: add vendor prefix for Wireless Tag
ARM: dts: mstar: Set gpio compatible for ssd20xd
Link: https://lore.kernel.org/r/20220216193131.59794-1-romain.perier@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix up the WG302 to support the v1 version (also tested)
- Fix up the syscon size
- Drop the alias for UART1 in GW7001
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Merge tag 'ixp4xx-dts-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
IXP4xx patches for the v5.18 kernel cycle:
- Fix up the WG302 to support the v1 version (also tested)
- Fix up the syscon size
- Drop the alias for UART1 in GW7001
* tag 'ixp4xx-dts-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Drop serial 1 alias on GW7001
ARM: dts: ixp42x: Expand syscon register range
ARM: dts: ixp4xx: Fix up the Netgear WG302 device tree
Link: https://lore.kernel.org/r/CACRpkdaMk+XECwhXJYeiF8SMU6cQsj_dk8gGMoPE3zAURAPqTw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add battery thermal zones so we can monitor the battery temperature
- Enable charging options on AB8505
- Fix up all the AB8500 and AB8505 nodes in accordance with the new
schema.
- Fix the mounting matrix for the Janice phone.
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Merge tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates for the v5.18 kernel cycle:
- Add battery thermal zones so we can monitor the battery temperature
- Enable charging options on AB8505
- Fix up all the AB8500 and AB8505 nodes in accordance with the new
schema.
- Fix the mounting matrix for the Janice phone.
* tag 'ux500-dts-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Correct Janice accel mount matrix
ARM: dts: ux500: Update AB850[05] nodes
ARM: dts: AB8505: Enable charging options
ARM: dts: ux500: Add battery thermal zones and NTCs
Link: https://lore.kernel.org/r/CACRpkdaDcEqtSnWzRBnBHVweh2n=Dj3meHG9LND+K0Czb9ORGg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
- Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
RZ/V2L SMARC EVK development boards,
- Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
and Condor development boards,
- NAND support for the RZ/N1D SoC,
- DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
- LVDS support for the R-Car M3-W+ SoC,
- HDMI output and 9-axis sensor support for the Kingfisher (ULCB
extension) board,
- MAX96712 GMSL serializer support for the Falcon development board,
- MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
SoCs,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.18
- External interrupt (INTC-EX) support for the R-Car V3U SoC,
- Initial support for the RZ/G2LC and RZ/V2L SoCs, and the RZ/G2LC and
RZ/V2L SMARC EVK development boards,
- Support for MAX9286 GMSL deserializers and GSML cameras on the Eagle
and Condor development boards,
- NAND support for the RZ/N1D SoC,
- DMA engine (SYS-DMAC) support for the R-Car S4-8 SoC,
- LVDS support for the R-Car M3-W+ SoC,
- HDMI output and 9-axis sensor support for the Kingfisher (ULCB
extension) board,
- MAX96712 GMSL serializer support for the Falcon development board,
- MOST network support for the R-Car H3, M3-W, M3-W+, M3-N, E3, and D3
SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (27 commits)
arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
arm64: dts: renesas: rcar-gen3: Add MOST devices
arm64: dts: renesas: Miscellaneous whitespace fixes
arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
arm64: dts: renesas: ulcb-kf: Add KF HDMI output
arm64: dts: renesas: r8a77961: Add lvds0 device node
arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
ARM: dts: r9a06g032: Describe the NAND controller
arm64: dts: renesas: Add GMSL cameras .dtsi
...
Link: https://lore.kernel.org/r/cover.1644587200.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conversion of Samsung pinctrl bindings to dtschema followed up with
alignment of DTS files to the dtschema.
The entire work consists of three parts but everything should be merged
at once to avoid dtschema check errors:
1. Samsung pinctrl driver change necessary to accept new DTS (driver
depends on node names and this has to be adjusted because of dtschema).
2. Conversion to dtschema which brings requirement of different naming
of the GPIO nodes.
3. DTS commits depending on driver (1) above, which convert all GPIO pin
bank names to new naming, required by dtschema.
This also includes few cleanups around DTS which are here to avoid
any merge conflicts.
The Samsung pinctrl driver changes are backwards compatible. However
the DTS changes (renaming nodes) could cause problems in out-of-tree or
other project implementations of the driver.
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Merge tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung pinctrl DTS and driver changes for v5.18
Conversion of Samsung pinctrl bindings to dtschema followed up with
alignment of DTS files to the dtschema.
The entire work consists of three parts but everything should be merged
at once to avoid dtschema check errors:
1. Samsung pinctrl driver change necessary to accept new DTS (driver
depends on node names and this has to be adjusted because of dtschema).
2. Conversion to dtschema which brings requirement of different naming
of the GPIO nodes.
3. DTS commits depending on driver (1) above, which convert all GPIO pin
bank names to new naming, required by dtschema.
This also includes few cleanups around DTS which are here to avoid
any merge conflicts.
The Samsung pinctrl driver changes are backwards compatible. However
the DTS changes (renaming nodes) could cause problems in out-of-tree or
other project implementations of the driver.
* tag 'samsung-dt-pinctrl-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9
ARM: dts: s5pv210: align pinctrl with dtschema
ARM: dts: s3c64xx: align pinctrl with dtschema
ARM: dts: s3c24xx: align pinctrl with dtschema
arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9
arm64: dts: exynos: align pinctrl with dtschema in Exynos7
arm64: dts: exynos: align pinctrl with dtschema in Exynos5433
ARM: dts: exynos: align pinctrl with dtschema in Exynos542x/5800
ARM: dts: exynos: align pinctrl with dtschema in Exynos5410
ARM: dts: exynos: align pinctrl with dtschema in Exynos5260
ARM: dts: exynos: align pinctrl with dtschema in Exynos5250
ARM: dts: exynos: align pinctrl with dtschema in Exynos4412
ARM: dts: exynos: align pinctrl with dtschema in Exynos4210
ARM: dts: exynos: align pinctrl with dtschema in Exynos3250
ARM: dts: s3c64xx: drop unneeded pinctrl wake-up interrupt mapping
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi
ARM: dts: exynos: override pins by label in Peach Pi
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pit
ARM: dts: exynos: override pins by label in Peach Pit
ARM: dts: exynos: simplify PMIC DVS pin configuration in Odroid XU
...
Link: https://lore.kernel.org/r/20220129115352.13274-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
- Add necessary clock controller inputs on Exynos5260.
- Drop unsupported regulators on Odroid XU.
- Add USB DWC3 supplies.
- Drop old thermal properties from Exynos4210.
3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
Tab S 8.4").
4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
10.1).
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Merge tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.18
1. Minor improvements and dtschema fixes (node names, properties).
2. Fix issues pointed out by DT schema checks:
- Add necessary clock controller inputs on Exynos5260.
- Drop unsupported regulators on Odroid XU.
- Add USB DWC3 supplies.
- Drop old thermal properties from Exynos4210.
3. Add support for Samsung Chagall WiFi (Exynos5420, Samsung Galaxy Tab
S 10.5", SM-T800 ) and a similar Samsung Klimt WiFi (Samsung Galaxy
Tab S 8.4").
4. Add battery to Samsung P4Nnote (Exynos4412, Samsung Galaxy Note
10.1).
* tag 'samsung-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (22 commits)
ARM: dts: exynos: use generic node name for LPDDR3 timings in Odroid
ARM: dts: exynos: add charger and battery to p4note
ARM: dts: exynos: update dma node name with dtschema
ARM: dts: exynos: use define for TMU clock on Exynos4412
ARM: dts: exynos: drop old thermal properties from Exynos4210
ARM: dts: exynos: add fake USB DWC3 supplies to SMDK5410
ARM: dts: exynos: add USB DWC3 supplies to SMDK5420
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pi
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pit
ARM: dts: exynos: add USB DWC3 supplies to ArndaleOcta
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Spring
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Snow
ARM: dts: exynos: add USB DWC3 supplies to SMDK5250
ARM: dts: exynos: add USB DWC3 supplies to Arndale
ARM: dts: exynos: Add support for Samsung Klimt WiFi
dt-bindings: arm: samsung: document Klimt WiFi board binding
ARM: dts: exynos: Add support for Samsung Chagall WiFi
dt-bindings: arm: samsung: document Chagall WiFi board binding
ARM: dts: exynos: drop unsupported MAX77802 regulators on Odroid XU
ARM: dts: exynos: add necessary clock controller inputs in Exynos5260
...
Link: https://lore.kernel.org/r/20220209145226.184375-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch fixes the tristate configuration for i2c3 function assigned
to the dtf pins on the Tamonten Tegra20 SoM.
Signed-off-by: Richard Leitner <richard.leitner@skidata.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add CPU idle support for SAMA7G5. Support will make use of PMC_CPU_RATIO
register to divide the CPU clock by 16 before switching it to idle and
use automatic self-refresh option of DDR controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-5-claudiu.beznea@microchip.com
Add config flags for CPUFreq. This includes enabling CPUFreq support,
CPUFreq DT driver and governors, default one being the conservative
governor.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-11-claudiu.beznea@microchip.com
Set regulator voltages for standby state to avoid wrong behavior of
system while in standby. The CPU voltage has been chosen as being the
one corresponding to OPP=600MHz. Next commit will set the 600MHz OPP
as the suspend OPP.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-8-claudiu.beznea@microchip.com
Fix low limit for CPU regulator. Otherwise setting voltages lower than
1.125V will not be allowed (CPUFreq will not be allowed to set proper
voltages on proper frequencies).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220113144900.906370-7-claudiu.beznea@microchip.com
Add support for all the six CAN controllers of sama7g5.The internal SRAM of 128KB
is split among the CAN controllers for the message RAM elements leaving a small
portion reserved for power management. The SRAM split up is as below.
Lower 64K:
PM 13K
can-0 17K
can-1 17K
can-2 17K
Higher 64K:
can-3 17K
can-4 17K
can-5 17K
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220222113924.25799-2-Hari.PrasathGE@microchip.com
Describe and enable the AES, SHA and TDES crypto IPs. Tested with the
extra run-time self tests of the registered crypto algorithms.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220208105646.226623-1-tudor.ambarus@microchip.com
Christoph Hellwig and a few others spent a huge effort on removing
set_fs() from most of the important architectures, but about half the
other architectures were never completed even though most of them don't
actually use set_fs() at all.
I did a patch for microblaze at some point, which turned out to be fairly
generic, and now ported it to most other architectures, using new generic
implementations of access_ok() and __{get,put}_kernel_nocheck().
Three architectures (sparc64, ia64, and sh) needed some extra work,
which I also completed.
* 'set_fs-4' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
uaccess: remove CONFIG_SET_FS
ia64: remove CONFIG_SET_FS support
sh: remove CONFIG_SET_FS support
sparc64: remove CONFIG_SET_FS support
lib/test_lockup: fix kernel pointer check for separate address spaces
uaccess: generalize access_ok()
uaccess: fix type mismatch warnings from access_ok()
arm64: simplify access_ok()
m68k: fix access_ok for coldfire
MIPS: use simpler access_ok()
MIPS: Handle address errors for accesses above CPU max virtual user address
uaccess: add generic __{get,put}_kernel_nofault
nios2: drop access_ok() check from __put_user()
x86: use more conventional access_ok() definition
x86: remove __range_not_ok()
sparc64: add __{get,put}_kernel_nofault()
nds32: fix access_ok() checks in get/put_user
uaccess: fix nios2 and microblaze get_user_8()
uaccess: fix integer overflow on access_ok()
Fixes for devkit8000 timer regression. Similar to the earlier beagleboard
fixes, we must not configure the clocksource drivers to use an alternative
timer configuration. It causes unnecessary issues with power management.
Only some old designs based on early beagleboard revisions with a miswired
timer need to use the alternative timer.
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Merge tag 'omap-for-v5.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps
Fixes for devkit8000 timer regression. Similar to the earlier beagleboard
fixes, we must not configure the clocksource drivers to use an alternative
timer configuration. It causes unnecessary issues with power management.
Only some old designs based on early beagleboard revisions with a miswired
timer need to use the alternative timer.
* tag 'omap-for-v5.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Use 32KiHz oscillator on devkit8000
ARM: dts: switch timer config to common devkit8000 devicetree
Link: https://lore.kernel.org/r/pull-1645606483-876944@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP151 is a single A7.
STM32MP153/157 is a dual A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP13 is a single core A7.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Remove the following warnings seen when building with W=1.
Warning (unique_unit_address): /soc/timer@40000c00: duplicate unit-address
(also used in node /soc/timers@40000c00)
This approach is based on some discussions[1], to restructure the dtsi
and dts files.
Timer5 is enabled by default on stm32f7 series, to act as clockevent. In
order to get rid of the W=1 warning, and be compliant with dt-schemas
(e.g. dtbs_check):
- In stm32f746.dtsi:
. Keep the more complete timers5 description
. Remove the most simple timer5 node that is duplicate
- In each board:
. adopt "st,stm32-timer" compatible for timers5, also add the interrupt
. use /delete-property/ and /delete-node/ so the it matches the
clockevent bindings
Note: all this is done in one shot (e.g. not split) to keep clockevent
functionality.
[1] https://lore.kernel.org/linux-arm-kernel/Yaf4jiZIp8+ndaXs@robh.at.kernel.org/
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Several unused "timer" are duplicate nodes of "timers" nodes.
There are two dt-schemas:
- timer/st,stm32-timer.yaml: A timer is needed on STM32F7 series, on all
boards, to act as clockevent.
- mfd/st,stm32-timers.yaml: Timers can be used for other purpose.
By default, timer5 is left enabled to be used as clockevent. Remove all
other timer clockevent nodes that are currently unused and duplicated.
This removes several messages: Warning (unique_unit_address): /soc/timer@..
duplicate unit-address (also used in node /soc/timers@...)
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
As EXTI/GIC mapping has changed between STM32MP15 and STM32MP13, a new
compatible is needed to choose mp13 mapping table in stm32-exti driver.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dhcor-avenger96 board device
tree to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Delete also usart2 and uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dhcom-som board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 nodes DMA property in stm32mp15xx-dhcom-picoitx
board device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 DMA property in stm32mp15xx-dhcom-pdk2 board
device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete usart3 and uart8 nodes DMA property in stm32mp15xx-dhcom-drc02
board device tree to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-odyssey board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-lxa-mc1 board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157a-stinger96 board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Delete also usart2 and uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp1-microdev2.0 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Delete also uart8 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp1-microdev2.0-of7 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Delete also uart8 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157a-iot-box board device tree to
keep console in irq mode, as DMA support for console has been removed
from the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in icore-stm32mp1-edimm2.2 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in icore-stm32mp1-ctouch2 board device tree
to keep console in irq mode, as DMA support for console has been
removed from the driver by commit e359b4411c ("serial: stm32: fix
threaded interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp15xx-dkx board device tree to keep
console in irq mode, as DMA support for console has been removed from
the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Delete also uart7 DMA property to keep current behavior.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA configuration is added to uart nodes in stm32mp15x device tree.
Delete uart4 DMA property in stm32mp157c-ed1 board device tree to keep
console in irq mode, as DMA support for console has been removed from
the driver by commit e359b4411c ("serial: stm32: fix threaded
interrupt handling").
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add DMA configuration in stm32mp15x uart nodes by selecting dma direct
mode and alternate REQ/ACK dma protocol for uart.
DMA direct mode allows to bypass DMA FIFO. Each DMA request immediately
initiates a transfer from/to the memory. This allows USART to get data
transferred, even when the transfer ends before the DMA FIFO completion.
Default REQ/ACK DMA protocol consists in maintaining ACK signal up to the
removal of REQuest and the transfer completion.
In case of alternative REQ/ACK protocol, ACK de-assertion does not wait the
removal of the REQuest, but only the transfer completion.
Due to a possible DMA stream lock when transferring data to/from STM32
USART/UART, select this alternative protocol in STM32 USART/UART nodes.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Link between GIC and exti line is now done inside EXTI driver. So in order
to be wake up source exti irqchip has to be used.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add reserved memory nodes for CortexM4 on the STM32MP1 DHCOR SoM, enable
rproc to control the CM4 and IPCC mailbox to interact with it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
MDMA on STM32MP13x SoCs is the same than on STM32MP15x SoCs: it offers up
to 32 channels and supports 48 requests.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
DMA1 and DMA2 on STM32MP13x SoCs are the same than on STM32MP15x SoCs: they
offer up to 8 channels and request lines are routed through DMAMUX1.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
There are no remaining callers of set_fs(), so CONFIG_SET_FS
can be removed globally, along with the thread_info field and
any references to it.
This turns access_ok() into a cheaper check against TASK_SIZE_MAX.
As CONFIG_SET_FS is now gone, drop all remaining references to
set_fs()/get_fs(), mm_segment_t, user_addr_max() and uaccess_kernel().
Acked-by: Sam Ravnborg <sam@ravnborg.org> # for sparc32 changes
Acked-by: "Eric W. Biederman" <ebiederm@xmission.com>
Tested-by: Sergey Matyukevich <sergey.matyukevich@synopsys.com> # for arc changes
Acked-by: Stafford Horne <shorne@gmail.com> # [openrisc, asm-generic]
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are many different ways that access_ok() is defined across
architectures, but in the end, they all just compare against the
user_addr_max() value or they accept anything.
Provide one definition that works for most architectures, checking
against TASK_SIZE_MAX for user processes or skipping the check inside
of uaccess_kernel() sections.
For architectures without CONFIG_SET_FS(), this should be the fastest
check, as it comes down to a single comparison of a pointer against a
compile-time constant, while the architecture specific versions tend to
do something more complex for historic reasons or get something wrong.
Type checking for __user annotations is handled inconsistently across
architectures, but this is easily simplified as well by using an inline
function that takes a 'const void __user *' argument. A handful of
callers need an extra __user annotation for this.
Some architectures had trick to use 33-bit or 65-bit arithmetic on the
addresses to calculate the overflow, however this simpler version uses
fewer registers, which means it can produce better object code in the
end despite needing a second (statically predicted) branch.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Acked-by: Mark Rutland <mark.rutland@arm.com> [arm64, asm-generic]
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Stafford Horne <shorne@gmail.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
On some architectures, access_ok() does not do any argument type
checking, so replacing the definition with a generic one causes
a few warnings for harmless issues that were never caught before.
Fix the ones that I found either through my own test builds or
that were reported by the 0-day bot.
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Nine architectures are still missing __{get,put}_kernel_nofault:
alpha, ia64, microblaze, nds32, nios2, openrisc, sh, sparc32, xtensa.
Add a generic version that lets everything use the normal
copy_{from,to}_kernel_nofault() code based on these, removing the last
use of get_fs()/set_fs() from architecture-independent code.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Currently, the amber LED will remain always on. This is due to a
misinterpretation of the LED sub-node properties, where-by "default-state"
was used to indicate the initial state when powering on the device. When in
use, however, this resulted in the amber LED always being on. Instead change
this to only indicate a fault state.
Assign LED_FUNCTION_POWER to the green PWM LED.
These changes bring the MX64/65 in line with the MR32's devicetree.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This contains fixes for the eDP panel found on the Venice 2 and Nyan
boards.
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Merge tag 'tegra-for-5.17-arm-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/fixes
ARM: tegra: Device tree fixes for v5.17-rc6
This contains fixes for the eDP panel found on the Venice 2 and Nyan
boards.
* tag 'tegra-for-5.17-arm-dt-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Move panels to AUX bus
Link: https://lore.kernel.org/r/20220223162209.293722-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
board, fix emmc signal-integrity and usb OTG mode on rk3399-puma as well
as a number of dtschema fixes to make the reduce the number of errors.
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Merge tag 'v5.17-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Fix the display-port-sound on Gru devices, DDR voltage on the Quartz-A
board, fix emmc signal-integrity and usb OTG mode on rk3399-puma as well
as a number of dtschema fixes to make the reduce the number of errors.
* tag 'v5.17-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: fix a typo on rk3288 crypto-controller
ARM: dts: rockchip: reorder rk322x hmdi clocks
arm64: dts: rockchip: reorder rk3399 hdmi clocks
arm64: dts: rockchip: align pl330 node name with dtschema
arm64: dts: rockchip: fix rk3399-puma eMMC HS400 signal integrity
arm64: dts: rockchip: fix Quartz64-A ddr regulator voltage
arm64: dts: rockchip: Switch RK3399-Gru DP to SPDIF output
arm64: dts: rockchip: fix rk3399-puma-haikou USB OTG mode
arm64: dts: rockchip: drop pclk_xpcs from gmac0 on rk3568
arm64: dts: rockchip: fix dma-controller node names on rk356x
Link: https://lore.kernel.org/r/1973741.CViHJPHrxy@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a node for the power domain controller found in MSM8226.
At the same time remove any existing usages of pm8226_s1 as this
regulator is now handled by power domains.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220220223004.507739-3-luca@z3ntu.xyz
Similar to sama5_defconfig, enable hardware acceleration for the
sama7 crypto IPs, enable crypto software implementations in case
the crypto IPs need a fallback to them, and enable the hash and
skcipher user interfaces in case one wants to offload the crypto
algs to the sama7 crypto IPs.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220204135905.512013-1-tudor.ambarus@microchip.com
sama7g5 contains a Static Memory Controller that can communicate with
NAND flashes. Enable UBIFS_FS in case one wants to put an ubifs rootfs
on a NAND flash. CONFIG_CRYPTO_LZO and CONFIG_CRYPTO_DEFLATE appear as
removed because they are selected by CONFIG_UBIFS_FS.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220202070244.150022-1-tudor.ambarus@microchip.com
Enable the Static Memory Controller. Tested with Micron MT29F4G08ABAEAWP
NAND flash. Software error correction is not needed, as the SMC includes
a PMECC error correction hardware module.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220111125641.903624-1-tudor.ambarus@microchip.com
The node name of Ethernet controller should be "ethernet" instead of
"asix" or "smsc" as required by Ethernet controller devicetree schema:
Documentation/devicetree/bindings/net/ethernet-controller.yaml
This patch can potentially affect boot loaders patching against full
node path instead of using device aliases.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The DT specification recommeds that:
"The name of a node should be somewhat generic, reflecting the function of
the device and not its precise programming model. If appropriate, the name
should be one of the following choices:"
"crypto" being the recommendation for the crypto nodes. Follow the DT
recommendation and use the generic "crypto" node name for the at91 crypto
IPs. While at this, add labels to the crypto nodes where they missed, for
easier reference purposes.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220208111225.234685-1-tudor.ambarus@microchip.com
Remove status = "okay" from SoC specific dtsi as this is the default
state.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220207111523.575474-1-claudiu.beznea@microchip.com
PMERRLOC resource size was set to 0x100, which resulted in HSMC_ERRLOCx
register being truncated to offset x = 21, causing error correction to
fail if more than 22 bit errors and if 24 or 32 bit error correction
was supported.
Fixes: d9c41bf30c ("ARM: dts: at91: Declare EBI/NAND controllers")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Cc: <stable@vger.kernel.org> # 4.13.x
Acked-by: Alexander Dahl <ada@thorsis.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220111132301.906712-1-tudor.ambarus@microchip.com
Add MMC aliases to ensure that the /dev/mmcblk IDs won't change depending
on the probe order of the MMC drivers.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename DSI bridge node to match the requirement of the DSI DT schema.
This silences DTB-check warning about the incorrect name.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When the Tegra High-Speed UART is used instead of the regular UART, the
reg-shift property is implied from the compatible string and should not
be explicitly listed.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Enable S/PDIF controller to enable HDMI audio support on ASUS TF101.
Use nvidia,fixed-parent-rate property that prevents audio rate conflict
between S/PDIF and I2S.
Tested-by: Robert Eckelmann <longnoserob@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch updates the tegra20-asus-tf101 device tree to replace the
deprecated `revision-id1` binding with the new `revision-id` binding in
its "jedec,lpddr2"-compatible node. This was the only DTS in the tree
using this binding.
The revision-id2 (mode register 7) of this memory chip was not given in
the existing device tree, so let's assume 0 for now until it becomes
relevant.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Also remove the pinctrl from qcom-apq8026-lg-lenok as it is the same
value as the generic pinctrl.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220216212433.1373903-4-luca@z3ntu.xyz
While the HVS has the same context memory size in the BCM2711 than in
the previous SoCs, the range allocated to the registers doubled and it
now takes 16k + 16k, compared to 8k + 16k before.
The KMS driver will use the whole context RAM though, eventually
resulting in a pointer dereference error when we access the higher half
of the context memory since it hasn't been mapped.
Fixes: 4564363351 ("ARM: dts: bcm2711: Enable the display pipeline")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Move the eDP panel on Venice 2 and Nyan boards into the corresponding
AUX bus device tree node. This allows us to avoid a nasty circular
dependency that would otherwise be created between the DPAUX and panel
nodes via the DDC/I2C phandle.
Fixes: eb481f9ac9 ("ARM: tegra: add Acer Chromebook 13 device tree")
Fixes: 59fe02cb07 ("ARM: tegra: Add DTS for the nyan-blaze board")
Fixes: 40e231c770 ("ARM: tegra: Enable eDP for Venice2")
Signed-off-by: Thierry Reding <treding@nvidia.com>
In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
is powered up by vgen3 and used as the PCIe reference clock source by
the endpoint device.
If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
has to be in bypass mode, and ENET clocks would be messed up.
To keep things simple, let RC use the internal PLL as reference clock
and set vgen3 always on to enable the external oscillator for endpoint
device on i.MX6QP sabresd board.
NOTE: This reference clock setup is used to pass the GEN2 TX compliance
tests, and isn't recommended as a setup in the end-user design.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The kgdb code needs to register an undef hook for the Thumb UDF
instruction that will fault in order to be functional on Thumb2
platforms.
Reported-by: Johannes Stezenbach <js@sig21.net>
Tested-by: Johannes Stezenbach <js@sig21.net>
Fixes: 5cbad0ebf4 ("kgdb: support for ARCH=arm")
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
witherspoon hardware and p9 chips have very sensitive requirements for
the cfam-reset. We're seeing power faults with the kernel based cfam
reset due to this.
Could adapt the power application to use the new kernel based cfam reset
interface but there's not a lot to be gained there since the power
application is going away with p10 and this limitation is not present in
p10.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20210308225419.46530-17-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
The Quanta S6Q is a server platform with AST2600 BMC SoC
Signed-off-by: George Hung <george.hung@quantatw.com>
Reviewed-by: Alan Kuo <Alan_Kuo@quantatw.com>
Reviewed-by: P.K. Lee <p.k.lee@quantatw.com>
Link: https://lore.kernel.org/r/20220217031355.46102-1-george.hung@quantatw.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Use hyphen instead of underscore and align the PPMU event node name with
dtschema. The event-name property must match the node name, by the
design of devfreq events and PPMU driver.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20210920071753.38560-3-krzysztof.kozlowski@canonical.com
Add support for the SanCloud BBE Extended WiFi board which shares common
hardware with other BBE varients. Compared to the vanilla BBE, this
particular model:
* adds a WiFi+Bluetooth module connected via SDIO and UART.
* drops the HDMI encoder, barometer and accelerometer.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The baseboard has an ISP1763 USB controller acting as a host.
Since the pinmuxing for the corresponding IRQ is different
between OMAP35 and DM37, the pinmux has been placed in the
kit-level files, while the common code is placed into the
baseboard file.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
RTC devices should be named "rtc" according to the standard RTC device
tree schema.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Devkit8000 board seems to always used 32k_counter as clocksource.
Restore this behavior.
If clocksource is back to 32k_counter, timer12 is now the clockevent
source (as before) and timer2 is not longer needed here.
This commit fixes the same issue observed with commit 23885389db
("ARM: dts: Fix timer regression for beagleboard revision c") when sleep
is blocked until hitting keys over serial console.
Fixes: aba1ad05da ("clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support")
Fixes: e428e250fd ("ARM: dts: Configure system timers for omap3")
Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch allow lcd43 and lcd70 flavors to benefit from timer
evolution.
Fixes: e428e250fd ("ARM: dts: Configure system timers for omap3")
Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
linux/signal.h and asm/signal.h are currently excluded from the UAPI
compile-test because of the errors like follows:
HDRTEST usr/include/asm/signal.h
In file included from <command-line>:
./usr/include/asm/signal.h:103:9: error: unknown type name ‘size_t’
103 | size_t ss_size;
| ^~~~~~
The errors can be fixed by replacing size_t with __kernel_size_t.
Then, remove the no-header-test entries from user/include/Makefile.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
infinity2m are running up to 1.2Ghz, this extends opp_table with the
corresponding frequencies and enable operating-points table for cpu1
Signed-off-by: Romain Perier <romain.perier@gmail.com>
The infinity3 has a slightly higher max frequency
compared to the infinity so extend the OPP table.
Co-authored-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Add an OPP table for the inifinity chips so
that cpu frequency scaling can happen.
Co-authored-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
The second core also sources it's clock from the CPU PLL.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
The CPU clock is sourced from the CPU PLL.
Link cpupll to the cpu so that frequency scaling can happen.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Arnd Bergmann