Commit Graph

42104 Commits

Author SHA1 Message Date
Olof Johansson bd90f11589 Reset controller changes for v4.3
- moved the DT reset binding includes from
   include/dt-bindings/reset-controller to include/dt-bindings/reset
 - new driver for LPC18xx Reset Generation Unit (RGU)
 - of_device_id array in the STi driver changed to const.
 - extend SoCFPGA reset driver to support Arria10
 - new ath79 reset controller driver for AR71XX/AR9XXX
 - new driver for Xilinx Zynq reset controller
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV0Km0AAoJEFDCiBxwnmDrOUgQAMkd/AF+Kl2cLpU0am/7yDZE
 eO4UgnlQ50L3+bXjOdgX0Ge24S6yQRpe66Nj1vpK0lfxzPM+K2/sTfXso0iAhtGd
 7OqapeQv+/hlBq2mmPT1smEbDucOFffFmQAq9sV3PbAYgGRn2CD8GYvSoS//0EMm
 39KbocTEsuZErf0hmNlhtIwa6vg+Q9H1eWN0A3CZrGOy3zMMGEypyKOyJznIpBZv
 HccpVN4y3D3BTf2HIWa5p9dHueWv5BdmudM2IypO3EVXOULhu4Jzqt1Fizu9F+yR
 jvxbB96W8gNDRT5c49vFshkVWfNJAkYnKcXISjWUb0bM9V1l5V62R8f4OJWj24rh
 GXgT8spdqjze38YYT8VQx7SWXjm6H2aMnrYNMLQsHunJbEbboqCb/JHTTCOrzMSZ
 FgHWCp0uodNYo/VGWx8GgMKPwrfYpY8iMtm16WSucPZA/ppx21oD8VLzIY1Bd0CW
 JM5oHG4uYB90EFxQS5XJoAxa9HbIlV6UbHdt44bVPcaQGw9ID+j978Djsjalqqf7
 uhA+8wVYGcopOcUWJ8ISsMerQqCiJfMwczhwDh0yEd9NshGv76NbycgsVP/4De6f
 c8xCEkuADYtWPtaQQakU+l8TfctmrsakNmD5DbkUgoLut+FnkfN1cmHHGnFlI36d
 DTaKtOAddWkrWebdpXW1
 =GBec
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-4.3' of git://git.pengutronix.de/git/pza/linux into next/drivers

Reset controller changes for v4.3

- moved the DT reset binding includes from
  include/dt-bindings/reset-controller to include/dt-bindings/reset
- new driver for LPC18xx Reset Generation Unit (RGU)
- of_device_id array in the STi driver changed to const.
- extend SoCFPGA reset driver to support Arria10
- new ath79 reset controller driver for AR71XX/AR9XXX
- new driver for Xilinx Zynq reset controller

* tag 'reset-for-4.3' of git://git.pengutronix.de/git/pza/linux:
  reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
  docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
  MIPS: ath79: Add the reset controller to the AR9132 dtsi
  reset: Add a driver for the reset controller on the AR71XX/AR9XXX
  devicetree: Add bindings for the ATH79 reset controller
  reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property
  doc: dt: add documentation for lpc1850-rgu reset driver
  reset: add driver for lpc18xx rgu
  reset: sti: constify of_device_id array
  ARM: STi: DT: Move reset controller constants into common location
  MAINTAINERS: add include/dt-bindings/reset path to reset controller entry

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-20 18:30:09 -07:00
Masahiro Yamada f2032f24c0 ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes
This SoC is integrated with 4 Cortex-A9 cores.  The GIC bindings
document says that the bits[15:8] of the 3rd cell of the interrupts
property represents PPI interrupt CPU mask.  Because the timer
interrupts are wired to all of the 4 cores, bits[15:8] should be set
to 0xf.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-20 18:28:39 -07:00
Brian Norris 467fb18a8d ARM: dts: rockchip: correct regulator power states for suspend
When getting translated from a downstream device tree that used slightly
different DT bindings, these regulators got labeled with the
"on-in-suspend" state, when they were actually supposed to be turned off
for S3 suspend. This was harmless, but not intentional, AFAICT.

Let's turn them off to get the optimal power state.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-08-21 01:40:35 +02:00
Brian Norris 6a414e462a ARM: dts: rockchip: correct regulator PM properties
This DTS file was submitted with non-upstream bindings. I happened
across this while reviewing the jaq DTS.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-08-21 01:40:28 +02:00
Lorenzo Pieralisi b5e5e8a13e ARM/PCI: Remove msi_controller from struct pci_sys_data
ARM now uses pci_bus->msi to store the msi_controller pointer, so we don't
need to save it in struct pci_sys_data, and we don't need to implement
pcibios_msi_controller() to get it out of pci_sys_data.

Remove msi_controller from struct pci_sys_data and
pcibios_msi_controller().

[bhelgaas: changelog, split into separate patch]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jingoo Han <jingoohan1@gmail.com>
2015-08-20 12:02:50 -05:00
Lorenzo Pieralisi 8953aab1e8 ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi()
ARM previously stored the msi_controller pointer in its sysdata, struct
pci_sys_data, and implemented pcibios_msi_controller() to retrieve it.
That made PCI host controller drivers specific to ARM because they had to
put the msi_controller pointer in the ARM-specific pci_sys_data.

There is now a generic mechanism, pci_scan_root_bus_msi(), for giving the
msi_controller pointer to the PCI core.  Use this for all ARM systems and
for the DesignWare and Xilinx PCI host controller drivers.

This removes an ARM dependency from the DesignWare, DRA7xx, EXYNOS, i.MX6,
Keystone, Layerscape, SPEAr13xx, and Xilinx drivers.

[bhelgaas: changelog, split into separate patch]
Suggested-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
CC: Pratyush Anand <pratyush.anand@gmail.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Simon Horman <horms@verge.net.au>
CC: Russell King <linux@arm.linux.org.uk>
CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Michal Simek <michal.simek@xilinx.com>
CC: Marc Zyngier <marc.zyngier@arm.com>
2015-08-20 12:02:50 -05:00
Lorenzo Pieralisi ada8b675b7 ARM/PCI: Replace panic with WARN messages on failures
In the ARM PCI bios32 layer, failures to dynamically allocate pci_sys_data
for a PCI bus, or a PCI bus scan failure have to be considered serious
warnings but they should not trigger a system panic so that at least the
system is given a chance to be debugged.

This patch replaces the panic statements with WARN() messages to improve
error reporting in the ARM PCI bios32 layer.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jingoo Han <jingoohan1@gmail.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
CC: Russell King <linux@arm.linux.org.uk>
CC: Marc Zyngier <marc.zyngier@arm.com>
2015-08-20 12:02:49 -05:00
Julien Grall 724afaea20 arm/xen: Remove helpers which are PV specific
ARM guests are always HVM. The current implementation is assuming a 1:1
mapping which is only true for DOM0 and may not be at all in the future.

Furthermore, all the helpers but arbitrary_virt_to_machine are used in
x86 specific code (or only compiled for).

The helper arbitrary_virt_to_machine is only used in PV specific code.
Therefore we should never call the function.

Add a BUG() in this helper and drop all the others.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
2015-08-20 12:25:27 +01:00
Julien Grall 7ed208ef4e arm/xen: Drop the definition of xen_pci_platform_unplug
The commit 6f6c15ef91 "xen/pvhvm: Remove
the xen_platform_pci int." makes the x86 version of
xen_pci_platform_unplug static.

Therefore we don't need anymore to define a dummy xen_pci_platform_unplug
for ARM.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2015-08-20 12:24:16 +01:00
Julien Grall 4a5b69464e xen/events: Support event channel rebind on ARM
Currently, the event channel rebind code is gated with the presence of
the vector callback.

The virtual interrupt controller on ARM has the concept of per-CPU
interrupt (PPI) which allow us to support per-VCPU event channel.
Therefore there is no need of vector callback for ARM.

Xen is already using a free PPI to notify the guest VCPU of an event.
Furthermore, the xen code initialization in Linux (see
arch/arm/xen/enlighten.c) is requesting correctly a per-CPU IRQ.

Introduce new helper xen_support_evtchn_rebind to allow architecture
decide whether rebind an event is support or not. It will always return
true on ARM and keep the same behavior on x86.

This is also allow us to drop the usage of xen_have_vector_callback
entirely in the ARM code.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
2015-08-20 12:24:15 +01:00
Grygorii Strashko 63059a2723 ARM: OMAP: wakeupgen: Restore the irq_set_type() mechanism
The conversion of the wakeupgen irqchip to hierarchical irq domains
failed to provide a mechanism to properly set the trigger type of an
interrupt.

The wakeupgen irq chip itself has no mechanism and therefor no
irq_set_type() callback. The code before the conversion relayed the
trigger configuration directly to the underlying GIC.

Restore the correct behaviour by setting the wakeupgen irq_set_type
callback to irq_chip_set_type_parent(). This propagates the
set_trigger() call to the underlying GIC irqchip.

[ tglx: Massaged changelog ]

Fixes: 7136d457f3 ('ARM: omap: convert wakeupgen to stacked domains')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: <linux@arm.linux.org.uk>
Cc: <nsekhar@ti.com>
Cc: <jason@lakedaemon.net>
Cc: <balbi@ti.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: <marc.zyngier@arm.com>
Cc: stable@vger.kernel.org # 4.1
Link: http://lkml.kernel.org/r/1439554830-19502-5-git-send-email-grygorii.strashko@ti.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-08-20 00:25:25 +02:00
Mario Smarduch 054167b3d5 arm: KVM: keep arm vfp/simd exit handling consistent with arm64
After enhancing arm64 FP/SIMD exit handling, ARMv7 VFP exit branch is moved
to guest trap handling. This allows us to keep exit handling flow between both
architectures consistent.

Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-08-19 22:27:58 +01:00
Nicolas Pitre ff2d920664 ARM: add TC2 PM support to multi_v7_defconfig
Without this, the multi_v7_defconfig kernel cannot boot all CPUs
nor do deep cpuidle power saving on a TC2 board.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 14:44:36 -07:00
Olof Johansson 62060a3548 Fix up bogus RTC compatible change for am4372 and add missing
DPLL for am4372 cpsw Ethernet driver. Also add ARM global and
 local timers for am4372.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVzFS9AAoJEBvUPslcq6VzJWMP/irEBMaf+UXSSC6L52kwIYEv
 SABK4S2vYMVnW8dRpkc/o2ZWA/dc4CcMxUh8g0BQtAg/BwB/1BUBGTkHPKPfo4bA
 rja6i9PtTwRKPgmZtLdEpNbEbPm7fDwoBVvFjre9Yn6XRItoLprVadClZnPJuXxX
 R4D/Xupjxr4XFoMPYfKaVFlWmwdfOWnVfU2vloewF4PCKkMZWh+OzHLep6Of1lqJ
 BJcv7xHTb1OFLYeVAWYCDQDKSw5i7zKgkSdq2FzSafBPpB8ScsDiLFay7Nn79OoB
 HZfNTiyvwhJAeYjwEE560atD4ZSAO6Etyn1E02ynG4WkXQGpSwVoeH8NeTOquVta
 4oZvQbAPvWEtMIzCXjI088QUKS4dg/h6b9RYwgevQEllUQIUDwBiGvTiKby57f3t
 LHs/xuBKvZKll6KJWSIqmsn7ujXuXA6RAiBekzANg8Dzv7hL/S9krEoLgfqG4pbx
 0HRMrsfogBj4CYuCnPK3ZpvMXImhHW7QVb+7FOBtQ7LYjiI9p2gnbsoT0pkUAa+3
 +5CGwYAwKV4aiFBYhJ44dn7TI8CISUakc7Unhk6IvydkUaj9KSVtNryTUNdFcVLB
 QxJ7hiBEhQbJDZf5n3g/XeGTw1UMCWfUBFCQctS2PP4y2Bqm2U9yNX5IHfytcX+i
 cgSCwWSJfaWXt8JusUAT
 =4z1B
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.3/dt-pt4-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Fix up bogus RTC compatible change for am4372 and add missing
DPLL for am4372 cpsw Ethernet driver. Also add ARM global and
local timers for am4372.

* tag 'omap-for-v4.3/dt-pt4-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  arm: boot: dts: am4372: add ARM timers and SCU nodes
  ARM: dts: AM4372: Add the am4372-rtc compatible string
  ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock
  ARM: dts: AM437X: add dpll_clksel_mac_clk node

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:33:48 -07:00
Olof Johansson 443d7920a5 Fix omap PM regression in Linux next and kill set_irq_flags usage
for GPMC.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVzE/7AAoJEBvUPslcq6VzMOAQAKC6tFYngR2OwBKrHpcTt58s
 LD2XBo+fPcQjNUR0woPxQAD2wIoR8OHwAu37hhHuN83SnYm2rYjMQv5lwXZHwY2y
 5XPFzKYeoVpM4lLbgu1Z4KIqEBwQgwofZRGZuJaekcmSloeAbNr5iqXWwk5dMHzE
 NIbpJA8Lz1/af93dB0YZm8AoSr4kyyGD4EFAeo6XbiEsbjIgwHyAod2rzXb7PqxZ
 EDqDkv74eqrCpCf6O1IISNYp9PAif80b04ZpyxREO4WiVNe62K4oWgY0oWPERm2C
 8lJBwEa9174dg2q0oOxckeguqNrOGvz6TbK4zlXfeSqHijJrYfdTYbXGuN+LxbiT
 ZbN4uIETysIJJ282HpENJyrY/yon1q9D9u/pYTwZjxIx3HLeRjy5kdL5UwdfRIH7
 qg9fZEx5emUtEJhpyu1YxuGYyI9i0ElfI1k57w6NYpElvbyENMwhZf+fBwAFhnQu
 MaUGk6NQq+h8Z4h4siH+ejTvp1B0gnW/AU/nTGOxWZVIPkget8V+ytU8o4lkGFwm
 MBWSI7FxI632NbkmsT6rnU3YSi+JpZtDBJkzTWEyFZo9pNVAjCp3EcGCDZPhqAGw
 dRrJIybx5RCBGMwgtY/V4Eidgk25DAiZxnQpAUyVd+FXgItr5g+lsuloddU42K1n
 yok4gw6EvB7dY/ltkmHX
 =ok+S
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.3/soc-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Fix omap PM regression in Linux next and kill set_irq_flags usage
for GPMC.

* tag 'omap-for-v4.3/soc-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  memory: kill off set_irq_flags usage
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:33:09 -07:00
Olof Johansson 582271a3d0 Fourth Round of Renesas ARM Based SoC DT Updates for v4.3
* Enable Clock Domain support of the Clock Pulse Generator (CPG)
   Module Stop (MSTP) Clocks driver.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVyvxYAAoJENfPZGlqN0++T74P/Ri9gvMcOgGFZPIntCJX8D4j
 ymoJdxilpA6c590F6++Zr/hFMXURhXE0viAYebO8iOPKkCArTYTpZ+UWMA1zgfPT
 J6aPkcRwVAT4DoAWDe1M+YJ+134l9hT+a9x5frbDmG5hP1Asw3ysc5b71e4gQcpX
 TDl8c+MkBbdXAKBJALOQhTZZsqvO/Ke4IhoS8Ud0PEmREWO/H/PoJjabw2Fd2j4O
 FYMmqLa4D5zU4QPr8p6UfvXmqVBIlToGxYgTLZ8itsfqb3wR/KtyNbOCqlM3DJjz
 VtrifAK2Ok0JxaKCRFd5Z6J1walBSeqDfPN5f9gn1FTg+0yTpBLaOWp7pE4/CvWX
 A2A91tC3+vYpZ0dDNN3FRrYn59xp/6NxXJd9qzTXQMjm0vzS60WdFTSkXhDxqDBi
 gwXGns/W10JEanrN0H3udLZhmQhA1n6G9sMc6Z9BpeiJCp6dgH/WBPd7Ppqa4U0n
 kazgchOZiTYXYwBYmA97HiaXL3kZ5rsv56+zuTog5eTW+xdC2s+SkIoj/Irrqt3v
 BiCsKqpQxTUpJhRvMcYl3MdMOl+1qojAUWLt0fHIC6sbpjz1Qx7msIEuJNw/qUa/
 dbvIZIXULmjXhBmWVZNU6pgI3XpIGkEe+KHoqfuQzys2vfyaEtJgNHAPhQ95Alax
 V/VdcS8VJCaz0RcchKDA
 =e8Do
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt4-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Fourth Round of Renesas ARM Based SoC DT Updates for v4.3

* Enable Clock Domain support of the Clock Pulse Generator (CPG)
  Module Stop (MSTP) Clocks driver.

* tag 'renesas-dt4-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7791 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7790 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7779 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7778 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r7s72100 dtsi: Add CPG/MSTP Clock Domain
  clk: shmobile: rz: Add CPG/MSTP Clock Domain support
  clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
  clk: shmobile: Add CPG/MSTP Clock Domain support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:31:26 -07:00
Olof Johansson a005bc6f69 Renesas ARM Based SoC CPG/MSTP Clock Driver Updates for v4.3
* Add Clock Domain support to the Clock Pulse Generator
   (CPG) Module Stop (MSTP) Clocks driver using the generic PM Domain.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVyvpGAAoJENfPZGlqN0++ApEP/Ru+WbvvB34nejzOTz1CazOu
 +n91jOBCOikDnGACc7W0QvYZrQmQCgq+M5SOcRsVNa3dc6Ng+wtQvRMA+MZDBGfU
 5Vn0slbopaxvfOcNKN8RZiNPVtltDMluhXZXRLnkf2LWZGMDqW9LBH34uemgyjBq
 D/gOk5tIpko1DjnEEvU1tCU0VZX+HZg81IlBjgOYvsgMDki1sg7C3fDBUmd26VkP
 Xt4Jk4N1uFzCNGntQPW+b2UVMQ50M932xB8Xb4Ek7Gi00G6tLFNBRioXJ4+QvQdi
 K7+eMhLBP/hLiZrKJ4K5kaIul9dq1I6fKRpQioohtC3NZp0GM97TE9JD2x9Jtvn6
 OP2BMbK5P7zsbHDk+lw42xHrvKcVsQkJbzbOJb24CaOD0e/FYUrsPE6+xzSfks3H
 Vi4oJEXMUqdDEzQbxuEeRfRZ4+S7pdR5VfoEkwHpZlKHA9DzaIY+WGcRFXeVzZUd
 7BmaeZSyA7f0LJnkWjjjzCLFfrm7mBdlwyfaevBbpbOkKDHXrGqfJ6h0yv0u3Ve7
 rl2K0VZv78IBQavQWB1UYX1ILum0Zr7pMe+8TmVRiey93l49wXg4aNSeORKvfNHO
 D8kYV+nLlg4oJBhKMPFetehRGDroOa/qngbzor2sYv5eXacj9FblDEL+mSbVHXYn
 4saANS8vX70MvWqcfsmV
 =bxOe
 -----END PGP SIGNATURE-----

Merge tag 'renesas-clk-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Renesas ARM Based SoC CPG/MSTP Clock Driver Updates for v4.3

* Add Clock Domain support to the Clock Pulse Generator
  (CPG) Module Stop (MSTP) Clocks driver using the generic PM Domain.

* tag 'renesas-clk-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  clk: shmobile: rz: Add CPG/MSTP Clock Domain support
  clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
  clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
  clk: shmobile: Add CPG/MSTP Clock Domain support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:30:18 -07:00
Stephen Boyd 3cf6a06799 ARM: dts: vexpress: Use assigned-clock-parents for sp810
The sp810 clk driver is calling the clk consumer APIs from
clk_prepare ops to change the parent to a 1 MHz fixed rate clock
for each of the clocks that the driver provides. Use
assigned-clock-parents for this instead of doing it in the driver
to avoid using the consumer API in provider code. This also
allows us to remove the usage of clk provider APIs that take a
struct clk as an argument from the sp810 driver.

Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:17:27 -07:00
Olof Johansson 5446584eeb The i.MX defconfig updates for 4.3:
- Enable i.MX6UL SoC build
  - Enable powerkey and syscon poweroff support
  - Build in multi-channel audio support, including i.MX ASRC and CS42xx8
    codec drivers.
  - Enable kexec build, HCIUART_H4 and IKCONFIG_PROC support.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVyhs5AAoJEFBXWFqHsHzOAl4IALHRw8AJ0JreDiXB+SxrHbLH
 9heG8kWEpbSwYAXWEZhBWsZF+B97xcGH2WJJVzDx6foU1mQ7e4GFaXzfbsq5CQjD
 rdgMbZFmm7jlHOMne8d7Ru5HF1wAtNBZcyIpB2BWMd8qgedZRrut+jdacYlafSsz
 Dz7tAib7wpSo5hkkkax+MUPSA50wOE/3PksJz2AZ0lDYtkRgFl3Orpu/0EC4rmcw
 utTUPWe13ZNyNKvEH+ZYpwnR7VvGj8oKQTCVmDcBGxWmqapMRpArUmhnKtXX//K2
 Tuo2CR654IKdLXXBEgT+PwBUd+ZImVbwXdVT9kQKNauBB/2Nd1KDvnMomfWNNro=
 =v2e3
 -----END PGP SIGNATURE-----

Merge tag 'imx-defconfig-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig

The i.MX defconfig updates for 4.3:
 - Enable i.MX6UL SoC build
 - Enable powerkey and syscon poweroff support
 - Build in multi-channel audio support, including i.MX ASRC and CS42xx8
   codec drivers.
 - Enable kexec build, HCIUART_H4 and IKCONFIG_PROC support.

* tag 'imx-defconfig-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx_v6_v7_defconfig: Select CONFIG_IKCONFIG_PROC
  ARM: imx: imx_v6_v7_defconfig enable imx6ul support
  ARM: imx_v6_v7_defconfig: enable powerkey and syscon power off
  ARM: imx_v6_v7_defconfig: Select HCIUART_H4
  ARM: imx_v6_v7_defconfig: build in audio driver
  ARM: imx_v6_v7_defconfig: Enable kexec support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:15:57 -07:00
Olof Johansson b12c082086 The i.MX device tree updates for 4.3:
- Add audio and eTSEC device support and update dspi node for LS1021A.
  - Add initial i.MX6UL and imx6ul-14x14-evk board support, and enable
    a bunch of device support for i.MX6UL, including RTC, power key, USB,
    QSPI, and dual FEC.
  - Enable HDMI and LVDS dual display support for a few imx6qdl boards.
  - Support of imx6sl-warp board rev1.12, the version which will be
    publicly available for the customers.
  - A few i.MX7D device additions, watchdog, cortex-a7 coresight
    components, RTC, power key, power off.
  - Some Vybrid updates: add device support for I2C, QSPI, eSDHC etc.,
    update ADC node, and define stdout-path property.
  - A few random updates for i.MX27 and i.MX53 devices.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVyhktAAoJEFBXWFqHsHzOjQwH/0CXyzRUCJjHqxAHsnvHzOZG
 AvjYWqaimxP5PD6TRG1bRxfWWXNL7zZGqj9Jd/l5HIWdWfUxnOLeMy40yfcs+AsH
 9CHUunu0rahIDY6YF4gA7F5jyfnSIzxwE8Bkva7nmXvf0XmazTwhCXxYPzdBjMSG
 Cf39datyTj9ZS3DD/DAKzRN//zebQCJmPuAdmIlRZljBkoLVPeEZrVxkSN0trRin
 vKPQIpamM2DXIMmdiPK52J0j8Vwq4qbiGvvAwUKsaRCUVYfpunpVcZSYgMqm8iEa
 7PKuurbVeuvZLzS0Bdq05tCkwVXt0upk0ayf0i8DkHFExX79TNTbONOLJwmigjo=
 =iAvA
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

The i.MX device tree updates for 4.3:
 - Add audio and eTSEC device support and update dspi node for LS1021A.
 - Add initial i.MX6UL and imx6ul-14x14-evk board support, and enable
   a bunch of device support for i.MX6UL, including RTC, power key, USB,
   QSPI, and dual FEC.
 - Enable HDMI and LVDS dual display support for a few imx6qdl boards.
 - Support of imx6sl-warp board rev1.12, the version which will be
   publicly available for the customers.
 - A few i.MX7D device additions, watchdog, cortex-a7 coresight
   components, RTC, power key, power off.
 - Some Vybrid updates: add device support for I2C, QSPI, eSDHC etc.,
   update ADC node, and define stdout-path property.
 - A few random updates for i.MX27 and i.MX53 devices.

* tag 'imx-dt-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (44 commits)
  ARM: dts: imx6ul: add snvs power key support
  ARM: dts: imx6ul: add RTC support
  ARM: dts: imx6ul: enable GPC as extended interrupt controller
  ARM: dts: imx6sx: correct property name for wakeup source
  ARM: dts: add property for maximum ADC clock frequencies
  ARM: dts: imx7d: enable snvs rtc, onoffkey and power off
  ARM: dts: imx6ul-14x14-evk: add fec1 and fec2 support
  ARM: dts: imx: add fec1 and fec2 nodes for SOC i.MX6UL
  ARM: dts: imx27: add support of internal rtc
  ARM: dts: vf-colibri: define stdout-path property
  ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR
  ARM: dts: ls1021a: Add the eTSEC controller nodes
  ARM: dts: imx6ul: add qspi support
  ARM: dts: imx6ul: fix low case define in imx6ul-pinfunc.h
  ARM: dts: imx6ul: add usb host and function support
  ARM: dts: vfxxx: Add io-channel-cells property for ADC node
  ARM: dts: ls1021a: Add dts nodes for audio on LS1021A
  ARM: imx6qdl-sabreauto.dtsi: enable USB support
  ARM: dts: imx: update snvs to use syscon access register
  ARM: dts: imx: add imx6ul and imx6ul evk board support
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:14:39 -07:00
Olof Johansson 207b504a63 The i.MX SoC changes for 4.3:
- Add i.MX6 Ultralite SoC support, which is the newest addition to
    i.MX6 family.  It integrates a single Cortex-A7 core and a power
    management module that reduces the complexity of external power
    supply and simplifies power sequencing.
  - Change SNVS RTC driver to use syscon interface for register access,
    and add SNVS power key driver support.
  - Add a second clock for mxc rtc driver, and support device tree probe
    for the driver.
  - Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
    platform.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVyg8nAAoJEFBXWFqHsHzOQC8H/iY+cdNfAWIxYmt2CeF607su
 fLaycUSUPqPAERUTcHpjKyiKkRg2NWV7vFVWCkKaQ3RZ+IW6xNntkqMxzocS1sh2
 +70Ckp+B0orGuo96PkEXua9fNPf8/yaGiDhuJpK966VRRSSXRD15uOuqHAJ2Jz/v
 HEnEm3KANSSYS1heEJRqiiCsqhADRWl2RzgfV327aXtScP9zXlbJGlEc/jUVAY65
 wbqjsXdySeS3rECNMAYXnPU7IlK4NkRqrOi1JmTJCBlXqV2b6dBfjgIu9jOa91UG
 yRj7IEBJemqT4Ap1ee2NR3H1lDngt2JKg9XqRDL3j9alYvhAWGvhSY2UH2iPrFg=
 =emep
 -----END PGP SIGNATURE-----

Merge tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

The i.MX SoC changes for 4.3:
 - Add i.MX6 Ultralite SoC support, which is the newest addition to
   i.MX6 family.  It integrates a single Cortex-A7 core and a power
   management module that reduces the complexity of external power
   supply and simplifies power sequencing.
 - Change SNVS RTC driver to use syscon interface for register access,
   and add SNVS power key driver support.
 - Add a second clock for mxc rtc driver, and support device tree probe
   for the driver.
 - Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
   platform.

* tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  rtc: snvs: select option REGMAP_MMIO
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  input: snvs_pwrkey: use "wakeup-source" as deivce tree property name
  Document: devicetree: input: imx: i.mx snvs power device tree bindings
  input: keyboard: imx: add snvs power key driver
  Document: dt: fsl: snvs: change support syscon
  rtc: snvs: use syscon to access register
  ARM: imx: add low-level debug support for i.mx6ul
  ARM: imx: add i.mx6ul msl support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:10:05 -07:00
Marek Szyprowski 96231b2686 ARM: 8419/1: dma-mapping: harmonize definition of DMA_ERROR_CODE
All architectures except arm that define DMA_ERROR_CODE are casting it
to (dma_addr_t) - as it is always compared to dma_addr_t in arm as well
this could be harmonized.

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-18 14:00:30 +01:00
Masahiro Yamada 8901925d32 ARM: 8417/1: refactor bitops functions with BIT_MASK() and BIT_WORD()
Use BIT_MASK() and BIT_WORD() rather than hard-coding the size
of the "long" type.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-18 14:00:30 +01:00
Masahiro Yamada da4f295b4a ARM: 8416/1: Feroceon: use of_iomap() to map register base
The chain of of_address_to_resource() and ioremap() can be replaced
with of_iomap().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-18 14:00:30 +01:00
Stefan Agner a5f4c561b3 ARM: 8415/1: early fixmap support for earlycon
Add early fixmap support, initially to support permanent, fixed
mapping support for early console. A temporary, early pte is
created which is migrated to a permanent mapping in paging_init.
This is also needed since the attributes may change as the memory
types are initialized. The 3MiB range of fixmap spans two pte
tables, but currently only one pte is created for early fixmap
support.

Re-add FIX_KMAP_BEGIN to the index calculation in highmem.c since
the index for kmap does not start at zero anymore. This reverts
4221e2e6b3 ("ARM: 8031/1: fixmap: remove FIX_KMAP_BEGIN and
FIX_KMAP_END") to some extent.

Cc: Mark Salter <msalter@redhat.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Laura Abbott <lauraa@codeaurora.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-18 14:00:29 +01:00
Masahiro Yamada 3939f33450 ARM: 8418/1: add boot image dependencies to not generate invalid images
U-Boot is often used to boot the kernel on ARM boards, but uImage
is not built by "make all", so we are often inclined to do
"make all uImage" to generate DTBs, modules and uImage in a single
command, but we should notice a pitfall behind it.  In fact,
"make all uImage" could generate an invalid uImage if it is run with
the parallel option (-j).

You can reproduce this problem with the following procedure:

[1] First, build "all" and "uImage" separately.
    You will get a valid uImage

  $ git clean -f -x -d
  $ export CROSS_COMPILE=<your-tools-prefix>
  $ make -s -j8 ARCH=arm multi_v7_defconfig
  $ make -s -j8 ARCH=arm all
  $ make -j8 ARCH=arm UIMAGE_LOADADDR=0x80208000 uImage
    CHK     include/config/kernel.release
    CHK     include/generated/uapi/linux/version.h
    CHK     include/generated/utsrelease.h
  make[1]: `include/generated/mach-types.h' is up to date.
    CHK     include/generated/timeconst.h
    CHK     include/generated/bounds.h
    CHK     include/generated/asm-offsets.h
    CALL    scripts/checksyscalls.sh
    CHK     include/generated/compile.h
    Kernel: arch/arm/boot/Image is ready
    Kernel: arch/arm/boot/zImage is ready
    UIMAGE  arch/arm/boot/uImage
  Image Name:   Linux-4.2.0-rc5-00156-gdd2384a-d
  Created:      Sat Aug  8 23:21:35 2015
  Image Type:   ARM Linux Kernel Image (uncompressed)
  Data Size:    6138648 Bytes = 5994.77 kB = 5.85 MB
  Load Address: 80208000
  Entry Point:  80208000
    Image arch/arm/boot/uImage is ready
  $ ls -l arch/arm/boot/*Image
  -rwxrwxr-x 1 masahiro masahiro 13766656 Aug  8 23:20 arch/arm/boot/Image
  -rw-rw-r-- 1 masahiro masahiro  6138712 Aug  8 23:21 arch/arm/boot/uImage
  -rwxrwxr-x 1 masahiro masahiro  6138648 Aug  8 23:20 arch/arm/boot/zImage

[2] Update some source file(s)

  $ touch init/main.c

[3] Then, re-build "all" and "uImage" simultaneously.
    You will get an invalid uImage at random.

  $ make -j8 ARCH=arm UIMAGE_LOADADDR=0x80208000 all uImage
    CHK     include/config/kernel.release
    CHK     include/generated/uapi/linux/version.h
    CHK     include/generated/utsrelease.h
  make[1]: `include/generated/mach-types.h' is up to date.
    CHK     include/generated/timeconst.h
    CHK     include/generated/bounds.h
    CHK     include/generated/asm-offsets.h
    CALL    scripts/checksyscalls.sh
    CC      init/main.o
    CHK     include/generated/compile.h
    LD      init/built-in.o
    LINK    vmlinux
    LD      vmlinux.o
    MODPOST vmlinux.o
    GEN     .version
    CHK     include/generated/compile.h
    UPD     include/generated/compile.h
    CC      init/version.o
    LD      init/built-in.o
    KSYM    .tmp_kallsyms1.o
    KSYM    .tmp_kallsyms2.o
    LD      vmlinux
    SORTEX  vmlinux
    SYSMAP  System.map
    OBJCOPY arch/arm/boot/Image
    Building modules, stage 2.
    Kernel: arch/arm/boot/Image is ready
    GZIP    arch/arm/boot/compressed/piggy.gzip
    AS      arch/arm/boot/compressed/piggy.gzip.o
    Kernel: arch/arm/boot/Image is ready
    LD      arch/arm/boot/compressed/vmlinux
    GZIP    arch/arm/boot/compressed/piggy.gzip
    OBJCOPY arch/arm/boot/zImage
    Kernel: arch/arm/boot/zImage is ready
    UIMAGE  arch/arm/boot/uImage
  Image Name:   Linux-4.2.0-rc5-00156-gdd2384a-d
  Created:      Sat Aug  8 23:23:14 2015
  Image Type:   ARM Linux Kernel Image (uncompressed)
  Data Size:    26472 Bytes = 25.85 kB = 0.03 MB
  Load Address: 80208000
  Entry Point:  80208000
    Image arch/arm/boot/uImage is ready
    MODPOST 192 modules
    AS      arch/arm/boot/compressed/piggy.gzip.o
    LD      arch/arm/boot/compressed/vmlinux
    OBJCOPY arch/arm/boot/zImage
    Kernel: arch/arm/boot/zImage is ready
  $ ls -l arch/arm/boot/*Image
  -rwxrwxr-x 1 masahiro masahiro 13766656 Aug  8 23:23 arch/arm/boot/Image
  -rw-rw-r-- 1 masahiro masahiro    26536 Aug  8 23:23 arch/arm/boot/uImage
  -rwxrwxr-x 1 masahiro masahiro  6138648 Aug  8 23:23 arch/arm/boot/zImage

Please notice the uImage is extremely small when this issue is
encountered.  Besides, "Kernel: arch/arm/boot/zImage is ready" is
displayed twice, before and after the uImage log.

The root cause of this is the race condition between zImage and
uImage.  Actually, uImage depends on zImage, but the dependency
between the two is only described in arch/arm/boot/Makefile.
Because arch/arm/boot/Makefile is not included from the top-level
Makefile, it cannot know the dependency between zImage and uImage.

Consequently, when we run make with the parallel option, Kbuild
updates vmlinux first, and then two different threads descends into
the arch/arm/boot/Makefile almost at the same time, one for updating
zImage and the other for uImage.  While one thread is re-generating
zImage, the other also tries to update zImage before creating uImage
on top of that.  zImage is overwritten by the slower thread and then
uImage is created based on the half-written zImage.

This is the reason why "Kernel: arch/arm/boot/zImage is ready" is
displayed twice, and a broken uImage is created.

The same problem could happen on bootpImage.

This commit adds dependencies among Image, zImage, uImage, and
bootpImage to arch/arm/Makefile, which is included from the
top-level Makefile.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-18 13:59:59 +01:00
Nicolas Pitre 0f64b247e6 ARM: 8414/1: __copy_to_user_memcpy: fix mmap semaphore usage
The mmap semaphore should not be taken when page faults are disabled.
Since pagefault_disable() no longer disables preemption, we now need
to use faulthandler_disabled() in place of in_atomic().

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-18 13:59:59 +01:00
Dan Williams db0fa0cb01 scatterlist: use sg_phys()
Coccinelle cleanup to replace open coded sg to physical address
translations.  This is in preparation for introducing scatterlists that
reference __pfn_t.

// sg_phys.cocci: convert usage page_to_phys(sg_page(sg)) to sg_phys(sg)
// usage: make coccicheck COCCI=sg_phys.cocci MODE=patch

virtual patch

@@
struct scatterlist *sg;
@@

- page_to_phys(sg_page(sg)) + sg->offset
+ sg_phys(sg)

@@
struct scatterlist *sg;
@@

- page_to_phys(sg_page(sg))
+ sg_phys(sg) & PAGE_MASK

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
2015-08-17 08:13:26 -06:00
Dave Airlie 6406e45cc6 drm/panel: Changes for v4.3-rc1
This introduces support for a couple of new panels and also contains
 some work to restructure the directories to get more consistency, to
 deal better with more panel and bridge drivers getting added.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJVzkSDAAoJEN0jrNd/PrOhdS4P/18WQMe+AzVXNjZXjBDv5v4s
 TtgHv4q0j93pZ0etBfeNCkYQpRAZUIv8bUPc7hr9tkWoz5GZRO4IjRmiWT+VaTib
 tQq+tU4mTjaHgsSY1NkxDWouBk6chQTIQWIgoh1hI9cu2koZc1lxu1I25hO+jOUD
 PBTsQca1uSSKppL5o9KHuy0IQSV6B7tWIrM0euNCmE+EG5b8dhbRZSakASF2KlUs
 +Xk8itX2E2DzBrCXGjM7kpEglHx9/1c1FsJQhgu7r8o952oLVPPn3M/OKRLyHoEz
 jdQyB8rODl6CEgoPOZCCw7HLAmBqf97ngxGcVf6XDOqqVv/B6FKDV0KsnvtKy4h4
 DQarImGOlBiSxLah0nLPnUG7+a6a62Ji1Gr5JP+xPJgbpxZvhgQzbRQPhM6KiTiR
 9+gG0qr/H2rm09C3PnixfL3D/QpZt2GWMDlX7qXWMzIrJRbrpsn2q7VdY+dBx0wx
 llKhY8aZod0CMYGFftZNr3beHJU05YcVDWftF8JfGEZmWWIhGesB6r3lE8k/t5c5
 6CJlq3Uzrh+nf+7zUq+lUzPpQmahPHcGp1eiSOzk1GQ+RAY/ZscUQYrUxqpY1a2R
 889Ip9cPUZiZdQFRkcpCRy5MUdX3/GNCluCINrDXK0j1xnzUzZOo81jhCG0xwVOF
 JuhSi/Zka7UoHQ1/jSwA
 =Dee7
 -----END PGP SIGNATURE-----

Merge tag 'drm/panel/for-4.3-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/panel: Changes for v4.3-rc1

This introduces support for a couple of new panels and also contains
some work to restructure the directories to get more consistency, to
deal better with more panel and bridge drivers getting added.

* tag 'drm/panel/for-4.3-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/bridge: Put Kconfig entries in a separate menu
  drm/panel: Add support for LG LG4573 480x800 4.3" panel
  drm/panel: Add display timing for Okaya RS800480T-7X0GP
  of: Add Okaya Electric America vendor prefix
  drm/panel: simple: Add support for NEC NL4827HC19-05B 480x272 panel
  drm/panel: simple: Add support for AUO B080UAN01
  drm/panel: simple: Correct minimum hsync length of the HannStar HSD070PWW1 panel
  drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
  drm/bridge: Add vendor prefixes
  drm/panel: Add Samsung prefix to panel drivers
  drm/exynos: Remove PTN3460 dependency
2015-08-17 15:53:05 +10:00
Linus Torvalds 8916e0b03e ARM: SoC fixes
A smallish batch of fixes, a little more than expected this late, but
 all fixes are contained to their platforms and seem reasonably low risk:
 
 - A somewhat large SMP fix for ux500 that still seemed warranted to include here
 - OMAP DT fixes for pbias regulator specification that broke due to some DT
   reshuffling
 - PCIe IRQ routing bugfix for i.MX
 - Networking fixes for keystone
 - Runtime PM for OMAP GPMC
 - A couple of error path bug fixes for exynos
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV0OYvAAoJEIwa5zzehBx3KjMP/iqazSkZERCSIQ/SQYsy+tdr
 xBKjHlz4mUuEMHtRx5Ro+IZRhTxZRsD6FR5Kiy435ipDFRAk+cObRhJMsPyfCybA
 40UN6WyZP0CKvlvYuxoeEWfDw+G1gRIDunfpz+d9E5JjDESyPbGvnoNiuZT1LmEC
 zo80U5DorU5Dmu/wWkzF+7UN8YRCC7oEykujltZ73UXH4BnYfcyRvav3HGkx2gV8
 gB1j30geoOAHGOasNBFMHGMtTf8lv/6g6KtR5tVVJ+jkT1dmz6D1z45cMVbCZtal
 uwbyX0cr2FhIY6U9Wb2yXVX9YOhJbnmyyafE+SQmFi6cebsmP4aZeqK2r98Tx1JD
 xWqrzJbMkD+qKRCrsK2D3Jbt6pmxRr90c+yemR0Cfntp6ybby/qPdJiNDLuEVorf
 LD1yuOLn4Jiejkf5bLxgYIjGbPWMtiN0OfmkEKmz8QuJx95M1pQkr/k7WeoyNEYi
 2ymh7n76doF8NVyXH9TWSMyaFivDVxCtyC7/as4Ob17w2fst7LrJq3JlXNfdFjkD
 cuq5SPp5Zpe/UVS/iivDTnFV/yGDkwERT9zO6Zqorfkb0A52OyhbMDZyZ75n5iHs
 /OSJbxMmPWyiN03CP4JBYmDlSF3ITvb0QTYZfpt5/eiQlPfgt91Ig7vj0lievkvo
 P/xww2UdUKEM9GEkYxpz
 =Auuc
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A smallish batch of fixes, a little more than expected this late, but
  all fixes are contained to their platforms and seem reasonably low
  risk:

   - a somewhat large SMP fix for ux500 that still seemed warranted to
     include here
   - OMAP DT fixes for pbias regulator specification that broke due to
     some DT reshuffling
   - PCIe IRQ routing bugfix for i.MX
   - networking fixes for keystone
   - runtime PM for OMAP GPMC
   - a couple of error path bug fixes for exynos"

* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: dts: keystone: Fix the mdio bindings by moving it to soc specific file
  ARM: dts: keystone: fix the clock node for mdio
  memory: omap-gpmc: Don't try to save uninitialized GPMC context
  ARM: imx6: correct i.MX6 PCIe interrupt routing
  ARM: ux500: add an SMP enablement type and move cpu nodes
  ARM: dts: dra7: Fix broken pbias device creation
  ARM: dts: OMAP5: Fix broken pbias device creation
  ARM: dts: OMAP4: Fix broken pbias device creation
  ARM: dts: omap243x: Fix broken pbias device creation
  ARM: EXYNOS: fix double of_node_put() on error path
  ARM: EXYNOS: Fix potentian kfree() of ro memory
2015-08-16 15:44:33 -07:00
Olof Johansson 02149517ac ARM: Couple of Keysyone MDIO DTS fixes for 4.2-rc6+
These are necessary to get the NIC card working on all Keystone
 EVMs. Couple of boards are nroken without these two fixes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVzNC6AAoJEHJsHOdBp5c/kKcQAMAJppV27q/LJ/raMqBQ8spe
 dbUAiOidAXa62Qv8ZYj4N5IOb3coBhRb5OF2i8XGGCIQdaLWDogTeQZegYJkfQEm
 RVx+1O8HAHpiuHwyrHPR0RosjQZ1CN+9u5ldR1hD8SBny843iXGkKlBlkyZrJDi0
 NQdOCp348CQsqykMXprk11aVgkcNcWE+b4M21D9AGogWhwKsPX/hUwlioxrdRips
 I2lD16rmQVEVhzuYfD+a3iDjf23t9Ppk2/OCpjxx2+rV0dZW0PKDzygX6fIpgql1
 e2Qr46c6f8OIXbDgSZZFlYJHjUiWhJCmeEa1T/v87gpxQsvQzb5Pi3HobkgKcA91
 BmnH6k5o2XHyN348F60ovXul+W15y1/EwAVAHfhiJS7Md3k7gqzDk9IcKm+pDEGg
 otD2ftyTTeSxQsTptz153y0pPMb2bJMzOOCiyUs5qQ4aw/tYuUGG/gxQvw+AWDCF
 2f3iQf5BNEBj43MBbrRaZGMHlgwudaIHsR8BHuC/4yaUqoYl5bvQL+PJ7cJavTSQ
 Sl/I8NFgDJdb0c50cUeLNo+gGVYooe2jIsnepLNXSZf1FYhM8em/QnCsrs+cBfZ9
 O8+TXmClJfKiuEnxppvyDAPndgI8FcIsJ6R6qPeih+pS2y4qtkU0f3QYtzOpcf7X
 c553a1ijJMz26NalRSkg
 =R5Tu
 -----END PGP SIGNATURE-----

Merge tag 'keystone-dts-late-fixes-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into fixes

ARM: Couple of Keysyone MDIO DTS fixes for 4.2-rc6+

These are necessary to get the NIC card working on all Keystone
EVMs. Couple of boards are broken without these two fixes.

* tag 'keystone-dts-late-fixes-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: dts: keystone: Fix the mdio bindings by moving it to soc specific file
  ARM: dts: keystone: fix the clock node for mdio

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-16 21:29:57 +02:00
Eduardo Valentin 189550b864 serial: imx: introduce serial_imx_enable_wakeup()
This change is a code reorganization. Here we introduce
serial_imx_enable_wakeup() helper function to do
the job of configuring and preparing wakeup sources
on imx serial device. The idea is to allow other
parts of the code to call this function whenever
the device is known to go to idle.

Cc: Fabio Estevam <festevam@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.com>
Cc: linux-serial@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-14 17:23:25 -07:00
Franklin S Cooper Jr 1b0838b5a7 ARM: davinci: Set proper SPI prescale limit value
SPI Davinci driver has been updated to allow SOCs to specify their minimum
prescale value. Update the various SOCs board files that use this driver with
their proper prescaler limit.

Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-14 20:34:47 +01:00
Thierry Reding 330b48bd70 drm/bridge: Add vendor prefixes
Use vendor prefixes for Kconfig symbols and filenames. This should make
it easier to identify the various bridge drivers and to organize the
directory.

v2: fix object name for dw-hdmi (Fabio Estevam)

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-14 21:34:24 +02:00
Thierry Reding 258d9bc5e7 ARM: tegra: Update multi_v7_defconfig
Add Tegra-specific configuration options to multi_v7_defconfig:

  * HDA controller and codec support
  * Watchdog support
  * Nouveau (for GK20A GPU) support

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-14 16:26:00 +02:00
Tuomas Tynkkynen 461cfe4e2f ARM: tegra: Update default configuration
* CPU frequency scaling for Tegra124
  * Nouveau (for GK20A GPU) support

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-14 16:25:59 +02:00
Mugunthan V N 21696f717b ARM: dts: am33xx: update cpsw compatible
CPSW driver has been updated with compatibles for enabling errata
workarounds. So updating cpsw compatibles.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-13 16:51:00 -07:00
Mugunthan V N e2095318af ARM: dts: dra7: update cpsw compatible
CPSW driver has been updated with compatibles for enabling errata
workarounds. So updating cpsw compatibles.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-13 16:51:00 -07:00
Linus Torvalds 7ddab73346 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
 "Another few small ARM fixes, mostly addressing some VDSO issues"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8410/1: VDSO: fix coarse clock monotonicity regression
  ARM: 8409/1: Mark ret_fast_syscall as a function
  ARM: 8408/1: Fix the secondary_startup function in Big Endian case
  ARM: 8405/1: VDSO: fix regression with toolchains lacking ld.bfd executable
2015-08-13 16:34:56 -07:00
David S. Miller 182ad468e7 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
	drivers/net/ethernet/cavium/Kconfig

The cavium conflict was overlapping dependency
changes.

Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-13 16:23:11 -07:00
Bartlomiej Zolnierkiewicz bdd2648e50 ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12
The new CPU clock type allows the use of generic CPUfreq driver.
Switch Exynos4x12 to using generic cpufreq driver.

Previously (when exynos-cpufreq driver was used with boost
functionality) ARM_EXYNOS_CPU_FREQ_BOOST_SW config option
(which enabled boost functionality) selected EXYNOS_THERMAL
one. After switching Exynos4x12 platforms to use cpufreq-dt
driver boost support is enabled in the cpufreq-dt driver
itself (because there are turbo OPPs defined in the board's
DTS file). However we still would like to allow enabling
boost support only if thermal support is also enabled for
Exynos platforms. To achieve this make ARCH_EXYNOS config
option select THERMAL and EXYNOS_THERMAL ones.

Please also note that the switch to use the generic cpufreq-dt
driver fixes the minor issue present with the old code (support
for 'boost' mode in the exynos-cpufreq driver was enabled for
all supported SoCs even though 'boost' frequency was provided
only for Exynos4x12 ones).

Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 03:07:10 +09:00
Marek Szyprowski ba03279546 ARM: dts: add iommu property to JPEG device for exynos4
JPEG codec node has been added in parallel to the patch, which
added support for IOMMU to Exynos platform, so JPEG device for
Exynos4 SoCs lacked IOMMU property. This patch fixes this issue.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:30:58 +09:00
Alexis Ballier c8b34e36ca ARM: dts: enable SPI1 for exynos4412-odroidu3
SPI1 is available on IO Port #2 (as depicted on their website)
in PCB Revision 0.5 of Hardkernel Odroid U3 board.
The shield connects a 256KiB spi-nor flash on that bus.

Signed-off-by: Alexis Ballier <aballier@gentoo.org>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:30:58 +09:00
Michal Suchanek e0b12512b4 ARM: dts: Add SPI CS on exynos5250-snow
Although there is only one choice of chipselect it is necessary to
specify it. The driver cannot claim the gpio otherwise.

Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:09:05 +09:00
Chanwoo Choi 5600f8cc8a ARM: dts: Add CPU cooling binding for exynos3250 boards
This patch add the cooling device to control the overheating issue on
Exynos3250-based Rinato/Monk board.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:08:56 +09:00
Chanho Park df09df6f9a ARM: dts: add exynos5422-cpus.dtsi to correct cpu order
The odroid-xu3 board which is based on exynos5422 not exynos5800
is booted from cortex-a7 core unlike exynos5800. The odroid-xu3's
cpu order is quite strange. cpu0 and cpu5-7 are cortex-a7 cores and
cpu1-4 are cortex-a15 cores. To correct this mis-odering, I added
exynos5422-cpus.dtsi and reversing cpu orders from exynos5420.
Now, cpu0-3 are cortex-a7 and cpu4-7 are cortex-a15.

Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Chanho Park <parkch98@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:08:24 +09:00
Bartlomiej Zolnierkiewicz f44997412e ARM: dts: add CPU OPP and regulator supply property for exynos4x12
For Exynos4x12 platforms, add CPU operating points (using
opp-v2 bindings) and CPU regulator supply properties for
migrating from Exynos specific cpufreq driver to using
generic cpufreq driver.

Based on the earlier work by Thomas Abraham.

Cc: Doug Anderson <dianders@chromium.org>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:06:15 +09:00
Chanwoo Choi 48816affd9 ARM: dts: Add CPU OPP and regulator supply property for exynos3250
This patch add CPU operating points which include CPU frequency and
regulator voltage to use generic cpufreq drivers.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:06:09 +09:00
Thomas Abraham 846c530091 ARM: dts: add CPU OPP and regulator supply property for exynos5250
For Exynos5250 platforms, add CPU operating points and CPU regulator
supply properties for migrating from Exynos specific cpufreq driver
to using generic cpufreq driver.

Cc: Doug Anderson <dianders@chromium.org>
Cc: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[b.zolnierkie: split Exynos5250 support from the original patch]
[b.zolnierkie: added CPU regulator supply property for Spring boards]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:06:02 +09:00
Chanwoo Choi 58c036a7ac ARM: EXYNOS: Add exynos3250 compatible to use generic cpufreq driver
This patch add exynos3250 compatible string to exynos_cpufreq_matches
for supporting generic cpufreq driver on Exynos3250.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:02:23 +09:00
Thomas Abraham c913f022da ARM: EXYNOS: switch to using generic cpufreq driver for exynos5250
The new CPU clock type allows the use of generic CPUfreq driver.
Switch Exynos5250 to using generic cpufreq driver.

Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[b.zolnierkie: split Exynos5250 support from the original patch]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-14 02:02:16 +09:00
Murali Karicheri 85ad3deea4 ARM: dts: keystone: Fix the mdio bindings by moving it to soc specific file
Currently mdio bindings are defined in keystone.dtsi and this results
in incorrect unit address for the node on K2E and K2L SoCs. Fix this
by moving them to SoC specific DTS file.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-08-13 10:01:29 -07:00
Murali Karicheri e61eee7cf8 ARM: dts: keystone: fix the clock node for mdio
Currently the MDIO clock is pointing to clkpa instead of clkcpgmac.
MDIO is part of the ethss and the clock should be clkcpgmac.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-08-13 10:01:29 -07:00
Tomeu Vizoso 1ec0e115f8 ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
This callback is expected to do the same as enter() but it has to
guarantee that interrupts aren't enabled at any point in its execution,
as the tick is frozen.

It will be called when the system goes to suspend-to-idle and will
reduce power usage because CPUs won't be awaken for unnecessary IRQs.

By setting the CPUIDLE_FLAG_TIMER_STOP flag, we can reuse the same code
for both the enter() and enter_freeze() callbacks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 16:53:38 +02:00
Thierry Reding fc0cf17734 ARM: tegra: Disable cpuidle if PSCI is available
This is only relevant on Tegra114 and Tegra124, because earlier Tegra
generations used Cortex-A9 without secure extensions.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 16:51:28 +02:00
Thierry Reding 9ef7e25ff6 drm/panel: Add Samsung prefix to panel drivers
The likelihood of getting a large number of panel drivers from different
vendors is quite high. Add a prefix to the two existing Samsung panel
drivers to set a guideline for future patch submissions. Using vendor
prefixes consistently should allow a cleaner organization of the tree.

Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 14:33:52 +02:00
Olof Johansson e789546159 - New Firmware node and accompanying binding document
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVyhu3AAoJEFGvii+H/HdhMvEP/1pl8uPwbfb0QgAdNiBREGnj
 jElsbARl2ohv5p8SEx15+wdoLn1S16XmGkOHrpBRSHFB0qpv2yIXN6eme3bnUXy8
 Sd9h2m2rcmaRCYpKuWcr6f595a6yrn8PLnm8c4roOr/rwPiK/Gxp+FHdTL03xPMm
 z3mB6gUyoU2WonkMBmGMDP0qkjoRIxYB+Wjnj2Y3B24tNOw+plFhq27fRKxPG2na
 XkTqbiP4b3q03AGwcUlOyERfDeCdBynpMzgMsZywCulxaAc933RI3ReiVcnGFDzi
 rXoSzPhYcDWBplaklilnUDNiknGZKiYscyBcNcxbRRbEv/z28qMHYoRNIOp1ID9D
 CmBD2PQBe6ouAs6lPTZ1RECR03PdKBaW+CcSBc0RZGQGBdOoeo/RhrvFMCyOuUmR
 esXz9EtOg0LtcTwCCxMJmD6hBTqydhb6XghlfMAYgHS7AtjYFK/EbXt5XWmKGMXI
 e+5AjAac0q9ghNcjl1Es91GtY/QN97Qtmh7iF0BLDO3AvzsKB87miBMZ6NXiPY/l
 lp5vCpkZ7xwjvIqRmVcUd95VpiqTgzBFVVcZLi1NLF/ukN8VlEE8hxSQhtSuTJEj
 AKR7QPRs/s+Zgn4Lw1OBV0ruVHsC8HjWERVjtxOxR+TWB1feFfxBlLRMi5nW+SbN
 1C5YUu5GeHgFpMwzISea
 =E1kF
 -----END PGP SIGNATURE-----

Merge tag 'rpi-dt-for-armsoc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi into next/dt

 - New Firmware node and accompanying binding document

* tag 'rpi-dt-for-armsoc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi:
  dt/bindings: Add binding for the Raspberry Pi firmware driver
  ARM: bcm2835: Add the firmware driver information to the RPi DT

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:26:29 +02:00
Linus Walleij 16478b61f0 ARM/fb: ep93xx: switch framebuffer to use modedb only
All the EP93xx boards exclusively use modedb to look up video
modes from the command line. Root out the parametrization of
custom video modes from the platform data and board files
and simplify the driver.

Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:25:44 +02:00
Olof Johansson db55350599 The i.MX fixes for 4.2, 3rd round:
- Fix i.MX6 PCIe interrupt routing which gets missed from stacked IRQ
    domain conversion.  The PCIe wakeup support is currently broken
    because of this.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJVyL2qAAoJEFBXWFqHsHzOGHgH/jgyCg6QVHgxgAoCjySZUbtT
 OwYFKxR3697GGVyUMa0r47TQxL5PusCUzJrNJTg6AhhgatKsGfiB45NRZy5bt8k5
 8M4tShc1n/fV7N2T1h1QbpXZiPhofhFtMq9Yq1lPDrQvOLOymWWZhGwBqbFy0bJT
 4IzqUS7uTE/pvrbFf+iqlwxshSzbbMOOHPqAavyinAKQU5S93v7D4iKJ0q2EmTqh
 hypAL1lZ0/BwBKWSeVVzJoVUFHZFmSzhlbE6ZzcY7S/4Dn2oTwiZQPb+eWj8kQHn
 CALj6KFSnhQ4XKfcBFTH1Z/apSWs6SDWDOig2jzQ/X+JFo9ahnh4fp91NqLML+o=
 =lUqF
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-4.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

The i.MX fixes for 4.2, 3rd round:
 - Fix i.MX6 PCIe interrupt routing which gets missed from stacked IRQ
   domain conversion.  The PCIe wakeup support is currently broken
   because of this.

* tag 'imx-fixes-4.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx6: correct i.MX6 PCIe interrupt routing

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:24:55 +02:00
Olof Johansson 93621d7037 SoCFPGA DTS updates for v4.3, take 2
- Add DTS property "altr,modrst-offset" for reset driver to
   use
 - Add updated reset defines for the reset driver
 - Add reset property for EMACs on Arria10
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVyBZjAAoJEBmUBAuBoyj0IWEP/jlmY2g+/lloIRI7Yu49wncy
 xOnFX5+1N6NoKaPvSiNO9w2i4QMMw9nCs/+UccQqbjiOS2ggFuU12ODxSw91PadI
 FbDuMgsjXzeCcUK4p9sv+S3YK0FnajLuuB4EI9UhCn1nOnGi8Qs6QKKLnwwCvF+X
 1JB5cWcEz48SRl9p1K7ZmxvBJIjrhghl16sIBfNPWNzin+yjDBCvf2qtLJyzMz+z
 bG+Q3aztrr0vtt7EgEUNaeEZHmseuKtFVLFzL+d4L/HtpnczcNNmbhZDjZZuZjmc
 1jLMHZO7/W28njkmU4rYlQPeA4skKn1/a0BQ6S/UEC/RBNsFgkRGBgfsloslofuO
 kSaTW02g1ekxRPnZZNU+iqFZ3zHTbq609aCF/x48vbl5Ti6xB+RH5g7XGJSxFeRC
 4aEIMaLxyrCTkqN2bh6I4ABLAJnzD4+IcofnLioLiDJOlo0BqEI0mh9KMBHDBoKM
 uvltqwaVuWdMxzJue7SITAobsThkp3IS7ZU05JqKM/y1Qpu7DofplYTSQVN/oaWP
 3XS8M+ZMgAz9o8E67hv/54NX3PM8zw1fbBW1brCKeXdFqGhcww75aLlcfwBTLVaU
 hYDBRMMj2YkRCGjc2mFqlPozy4ovuqQ2ILKAh6/cqWiww1dV0hIw7mP50On7sLU8
 Ip/H2H5Q5OCk1but68iq
 =dKt6
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_dts_for_v4.3_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

SoCFPGA DTS updates for v4.3, take 2
- Add DTS property "altr,modrst-offset" for reset driver to
  use
- Add updated reset defines for the reset driver
- Add reset property for EMACs on Arria10

* tag 'socfpga_dts_for_v4.3_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: dts: Add resets for EMACs on Arria10
  ARM: socfpga: dts: add "altr,modrst-offset" property
  dt-bindings: Add reset manager offsets for Arria10

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:19:38 +02:00
Olof Johansson 07616f013b Two fixes for bugs in Exynos power domain error exit path:
1. kfree() of read-only memory (name of power domain returned
    by kstrdup_const()),
 2. Doubled of_node_put() leading to invalid ref count for OF node.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVyAH+AAoJEME3ZuaGi4PX7iQP/RzGdVZqf90Ub6stLrKib8x3
 NsAWNfZau8BVyJdVIrdFfwGM/muVFKmtFJ8cUcbHd5OKT4S/oyArOqIkPF0kh3Tk
 nXg0OBXRTUJAdqwsQ13lKNYI7tuxQpma2KKqlDisnzVRCTThrs7GNQJScBYJyXtu
 t1Vwd38uc1O+XWFuWvS9muZMIh2lQmGWvM8G30qqiGI+F06r1Ovg8rJWyoFoWhSl
 pyYBD4guPRyZ+fYpIu5x1Tafj0DZNpwu+GHXUq1vZga83hL45klpX2n5RusYi7RG
 AXdJhF0DSaQ4PW3dM5sNyvIGl/nKNjcSANFi/D1OIPFMzIDKDC4AAl2c0J3F9yRM
 lcpO+pwT3EErCbTWhfDq8RRb7GC4oGrPBPFI9+FD0h+fhqaTnOmirA2vXtSS5oMK
 PA39dTbq3LJEmhxM9+4pC7NZFz4zALSX4g8n0/SLhqShQM/lxKAlvhZnPB2izB1X
 PUI8IgtIsFtVE+A+vrVl5NuDdhrLY48Ksg6L2aOs1oeMqob8hJY2V+v+JjCWMBmZ
 cgVWCMy43vBfzOYpe32ykkw4Om2MkLrWv65EJaWNkG/Mjueu8C9pzjInXVMmZgNe
 llYGOSjupPMwmiyDxF3xHuPLxJl12G5HK38AfaV5FKstVTp31XoXNSiWhqAfb5Af
 Q4jA7Jch5l45vGmwgPZZ
 =qAfT
 -----END PGP SIGNATURE-----

Merge tag 'samsung-mach-fixes-4.2' of https://github.com/krzk/linux into fixes

Two fixes for bugs in Exynos power domain error exit path:
1. kfree() of read-only memory (name of power domain returned
   by kstrdup_const()),
2. Doubled of_node_put() leading to invalid ref count for OF node.

* tag 'samsung-mach-fixes-4.2' of https://github.com/krzk/linux:
  ARM: EXYNOS: fix double of_node_put() on error path
  ARM: EXYNOS: Fix potentian kfree() of ro memory

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:18:45 +02:00
Olof Johansson 6d511a26ce Some more devicetree changes, including usbphy support for the
Cortex-A9 SoCs and actually enabling usb on the rk3066-marsboard,
 Two more veyron-devices - namely Speedy and Minnie and a fix for
 the tsadc.
 One slightly more interesting fix is the blocking of the last
 16MB of memory on 4GB rk3288 devices. The rk3288 cannot use this
 area for dma operations, so things like the mmc or usb controllers
 regularly fail when trying to read data. This solution mimicks the
 solution from the ChromeOS kernel, who also do not seem to have
 found a better solution yet. Here it only moves to the devicetree.
 As this issue is also present on the arm64 rk3368, any future
 better solution to this problem would need to describe this in
 the devicetree as well and could then remove this block.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJVxnMhAAoJEPOmecmc0R2BGXAH/03qzTWzHaLJH73zNj2+r7cm
 GwlwxntSDb4e6lq5hKT1+biqBrin+IrzA1sCcyeiFlg3wOWP5AuuEyiKgVKHZ//c
 9dKAVsmtX5TMliFPA+U6SvEyURPk5RSU30cTgYEEBVhwWhDduDnJOBmOpLhHyQUC
 36FMlfNBpNQQHYQUNziXEgnWZNtvdiYnmt4FPkdQWT08kZKJvyky+gbqOkya4RzH
 Pi70IzQyh3F0UiQR4f34q+C0+KStF9LdZSeYgnnY++Sg+5Wz9FAWcdoo2qwi2C8t
 qVPEF2B1vW87+9z3WtGRk2CE48uy6QS7WQL3l/wHp6RxMCPXu9QjOAHOl2rBHSs=
 =2Rte
 -----END PGP SIGNATURE-----

Merge tag 'v4.3-rockchip32-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Some more devicetree changes, including usbphy support for the
Cortex-A9 SoCs and actually enabling usb on the rk3066-marsboard,
Two more veyron-devices - namely Speedy and Minnie and a fix for
the tsadc.
One slightly more interesting fix is the blocking of the last
16MB of memory on 4GB rk3288 devices. The rk3288 cannot use this
area for dma operations, so things like the mmc or usb controllers
regularly fail when trying to read data. This solution mimicks the
solution from the ChromeOS kernel, who also do not seem to have
found a better solution yet. Here it only moves to the devicetree.
As this issue is also present on the arm64 rk3368, any future
better solution to this problem would need to describe this in
the devicetree as well and could then remove this block.

* tag 'v4.3-rockchip32-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add veyron-minnie board
  ARM: dts: rockchip: reserve unusable memory region on rk3288
  ARM: dts: rockchip: enable usb controller on marsboard
  ARM: dts: rockchip: add usb phys to Cortex-A9 socs
  ARM: dts: rockchip: set correct dwc2 params for cortex-a9 socs
  ARM: dts: rockchip: Add veyron-speedy board
  ARM: dts: rockchip: Use correct dts properties for tsadc node on veyron

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:14:29 +02:00
Olof Johansson 8943835e24 Improve reliability of resume on rk3288 boards. For whatever
reason resuming from suspend worked sucessfully on the rk3288-evb
 but not on other boards, like veyron-devices. Two problems seem
 to have existed. For one the stabilization delays for pmic and
 oscillator may have been to short and secondly the shallow
 suspend seems to need GPIO wakups enabled. Normally this should
 be covered by the more generic ARMINT wakeups already and
 the reason for this is still investigated at Rockchip, but
 meanwhile this makes boards actually resume.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABCAAGBQJVxnDGAAoJEPOmecmc0R2BeAAH/0b/X33+HKzp+uSnKfxpRtoW
 PiSLKVlKEsbrJzQhVntBfE7PBg/vQkGtcKU6V89QC2kXbOqWRG2OTjMBXD9wPcA2
 XDBw3VeFX5PSV2f2054FfEHVz+tSY4ZTchgvU2I19kTF5HpJ5E5rTO/9W4a1kqoj
 w6wnGvXwpJ7LO1RKR3JRwWbUAUsYsn7rynhB5Ndmg9LUixs46EysqIyFbsxsWNGg
 8tSnzC8b8F2QEvEq/+mYLpvno65I1dMXy5Bdh8VR9nWkJcGVcDdDfojU/6WXYHCX
 jk1LT5dNtf1y+3owDQUcqlgNYGyeQrawnWlFD+R6IgZOdb1rSY5/qTF8etwSMa4=
 =SFTV
 -----END PGP SIGNATURE-----

Merge tag 'v4.3-rockchip32-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc

Improve reliability of resume on rk3288 boards. For whatever
reason resuming from suspend worked sucessfully on the rk3288-evb
but not on other boards, like veyron-devices. Two problems seem
to have existed. For one the stabilization delays for pmic and
oscillator may have been to short and secondly the shallow
suspend seems to need GPIO wakups enabled. Normally this should
be covered by the more generic ARMINT wakeups already and
the reason for this is still investigated at Rockchip, but
meanwhile this makes boards actually resume.

* tag 'v4.3-rockchip32-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:13:54 +02:00
Masahiro Yamada fb3c442676 ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
This is unnecessary since commit 02b4e2756e ("ARM: v7 setup
function should invalidate L1 cache").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:12:10 +02:00
Alexandre Belloni 80d352de65 ARM: at91/defconfig: at91_dt: remove ARM_AT91_ETHER
CONFIG_ARM_AT91_ETHER doesn't exist anymore, both drivers have been merged
in the macb driver.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:06:57 +02:00
Josh Wu 5bfb1e4113 ARM: at91/defconfig: at91_dt: enable DRM hlcdc support
This patch adds drm atmel lcdc, simple panel and backlight options.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:06:44 +02:00
Olof Johansson 3d3cacc0b8 mvebu soc changes for v4.3 (part #2)
SoC part of the Dove PMU series
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlXE0fgACgkQCwYYjhRyO9XUKwCeIOTx172942DUMzGwO3feDGZn
 zCgAn2yxrZaFqUo/EfVqgieeTGBmY6gh
 =gfKo
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-soc-4.3-2' of git://git.infradead.org/linux-mvebu into next/drivers

mvebu soc changes for v4.3 (part #2)

SoC part of the Dove PMU series

* tag 'mvebu-soc-4.3-2' of git://git.infradead.org/linux-mvebu:
  ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:02:07 +02:00
Olof Johansson 85ef6b26d1 mvebu dt changes for v4.3 (part #3)
- device tree part of the Dove PMU series
 - converting a new orion5x based platform to dt: Linkstation Mini
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlXE1doACgkQCwYYjhRyO9VyywCghy4yCyXWjfJ+rIE9uZ0JZwg7
 TYcAmgKPY3lgL1cXdRTTo82iXRwRM3Ht
 =ndrR
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt-4.3-3' of git://git.infradead.org/linux-mvebu into next/dt

mvebu dt changes for v4.3 (part #3)

- device tree part of the Dove PMU series
- converting a new orion5x based platform to dt: Linkstation Mini

* tag 'mvebu-dt-4.3-3' of git://git.infradead.org/linux-mvebu:
  ARM: dts: Convert Linkstation Mini to Device Tree
  ARM: dt: dove: add GPU power domain description
  ARM: dt: dove: add video decoder power domain description
  ARM: dt: dove: wire up RTC interrupt
  ARM: dt: Add PMU node, making PMU child devices childs of this node

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 11:59:56 +02:00
Olof Johansson eb2b508436 Second batch of DT changes for 4.3:
- Add the slow clock to the nodes that will use it
 - Add hlcd to the at91sam9x5 and at91sam9n12
 - Add touchscreen and touch button support to the at91sam9x5ek
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJVxNBCAAoJEKbNnwlvZCyzHHkP/2FG9V3BMVv1a3eNcoufGLY8
 NFrXBOac+0+ECfJDaGinsDR12g0YAXWcs6SyTRnDS2Oo4gwjqm/844ndWWYXMnUH
 8A9kFcswK9SZxLewWimtPEtOHXgQLhdyfGQCLt9o9+O09Pfk99bgC3ZRzj4O7Gkj
 gIBRxUqlTkpmEn4/OQAj0Qb0qyGhbiZ2MKmctFcOrJiNt33OKmSJcgDS8vIsRazp
 dUjDNaHC0vuDDmJq3nnVapHMyZGE7Um8YkWzFpOmEDOJ7s5zwON/Fu74N3rj1ryj
 6K/rwwWpDTZJ6ZgMQ1e7U3b4S2QmadC+AJdRlNV0l9LZ86qqVJgLupKlFT5P/Zl0
 pw9S/1jjxmKkeZZPwDBPjk66Augio2kudsFzowHo2NreogyknPvcMeQbfMAtZJOX
 yVnywU8T1VAuIZ778kgeXXT2+tWuPmC91LuFKUxbcJYQyDd275UGrMjGdM6dv7aw
 3Y2146DZheRGpJkQaWnLY8o0ZXAZCYUVekXkL1UD/NwYUpvg2PeMuDAMKwKeiDSC
 DWbEf8FPmqrnPdyvEUpfG479Qsr2Q4x/mH0rkbAMlFbkhwb/RKcosc/0o99AJPUB
 S4Kck0oKDG0RF5bqKjvwgfKPy05b8nddMU+ZZJFa4BRMYx1wZp5hSYnrffx6RhdX
 XjahO62JKqq2uptXAhDq
 =u5hT
 -----END PGP SIGNATURE-----

Merge tag 'at91-ab-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt

Second batch of DT changes for 4.3:
- Add the slow clock to the nodes that will use it
- Add hlcd to the at91sam9x5 and at91sam9n12
- Add touchscreen and touch button support to the at91sam9x5ek

* tag 'at91-ab-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (22 commits)
  ARM: at91/dt: sama5d2: use slow clock where necessary
  ARM: at91/dt: at91sam9x5dm: add QT1070 touch button controller
  ARM: at91/dt: at91sam9x5dm: add support for the touschscreen
  ARM: at91/dt: add drm support for at91sam9n12ek
  ARM: at91/dt: enable lcd support for at91sam9x5 SoCs
  ARM: at91/dt: add at91sam9x5-ek Display Module dtsi
  ARM: at91/dt: include lcd dtsi in at91sam9x5 dtsis
  ARM: at91/dt: define hlcdc node in at91sam9x5_lcd.dtsi
  ARM: at91/dt: sama5d4: use slow clock where necessary
  ARM: at91/dt: sama5d3: use slow clock where necessary
  ARM: at91/dt: at91sam9x5: use slow clock where necessary
  ARM: at91/dt: at91sam9rl: use slow clock where necessary
  ARM: at91/dt: at91sam9n12: use slow clock where necessary
  ARM: at91/dt: at91sam9g45: use slow clock where necessary
  ARM: at91/dt: at91sam9263: use slow clock where necessary
  ARM: at91/dt: at91sam9261: use slow clock where necessary
  ARM: at91/dt: at91sam9260: use slow clock where necessary
  ARM: at91/dt: at91rm9200: use slow clock where necessary
  Documentation: dt: rtc: at91rm9200: add clocks property
  Documentation: watchdog: at91sam9_wdt: add clocks property
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 11:58:22 +02:00
Hans Ulli Kroll d330615b90 ARM: gemini: Setup timer3 as free running timer
In the original driver it is missed to setup a free running driver.
This timer is needed for the scheduler.
So setup it.

Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 11:41:52 +02:00
Hans Ulli Kroll 5dc9073988 ARM: gemini: Use timer1 for clockevent
Use timer1 as clockevent timer.
The old driver uses timer2, which has some issues to setup

Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 11:41:34 +02:00
Hans Ulli Kroll 570ceed4e2 ARM: gemini: Add missing register definitions for gemini timer
Add missing register defintions for the gemini clocksource
Also do some #define' cleanup to make the code more readable.

Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 11:41:16 +02:00
Viresh Kumar a54868b460 ARM: ep93xx/timer: Migrate to new 'set-state' interface
Migrate EP93xx driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 11:23:27 +02:00
Felipe Balbi 8cbd4c2f6a arm: boot: dts: am4372: add ARM timers and SCU nodes
AM437x devices sport SCU, TWD and Global timers,
let's add them to DTS so they have a chance to
probe and be used by Linux.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-13 01:25:11 -07:00
Chen-Yu Tsai 14fee74ca8 ARM: dts: sun6i: Add security system crypto engine clock and device nodes
A31/A31s have the same "Security System" crypto engine as A10/A20,
but with a separate reset control.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-13 15:13:27 +08:00
Marc Zyngier f120cd6533 KVM: arm/arm64: timer: Allow the timer to control the active state
In order to remove the crude hack where we sneak the masked bit
into the timer's control register, make use of the phys_irq_map
API control the active state of the interrupt.

This causes some limited changes to allow for potential error
propagation.

Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-08-12 11:28:26 +01:00
Marc Zyngier 6c3d63c9a2 KVM: arm/arm64: vgic: Allow dynamic mapping of physical/virtual interrupts
In order to be able to feed physical interrupts to a guest, we need
to be able to establish the virtual-physical mapping between the two
worlds.

The mappings are kept in a set of RCU lists, indexed by virtual interrupts.

Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-08-12 11:28:25 +01:00
Marc Zyngier abdf584383 arm/arm64: KVM: Move vgic handling to a non-preemptible section
As we're about to introduce some serious GIC-poking to the vgic code,
it is important to make sure that we're going to poke the part of
the GIC that belongs to the CPU we're about to run on (otherwise,
we'd end up with some unexpected interrupts firing)...

Introducing a non-preemptible section in kvm_arch_vcpu_ioctl_run
prevents the problem from occuring.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-08-12 11:28:23 +01:00
Marc Zyngier 9a99d05070 arm/arm64: KVM: Fix ordering of timer/GIC on guest entry
As we now inject the timer interrupt when we're about to enter
the guest, it makes a lot more sense to make sure this happens
before the vgic code queues the pending interrupts.

Otherwise, we get the interrupt on the following exit, which is
not great for latency (and leads to all kind of bizarre issues
when using with active interrupts at the HW level).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-08-12 11:28:23 +01:00
Will Deacon 0ca326de7a locking, ARM, atomics: Define our SMP atomics in terms of _relaxed() operations
By defining our SMP atomics in terms of relaxed operations, we gain
a small reduction in code size and have acquire/release/fence variants
generated automatically by the core code.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Waiman.Long@hp.com
Cc: paulmck@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/1438880084-18856-9-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-08-12 11:59:10 +02:00
Ingo Molnar f52609fdab Merge branch 'locking/arch-atomic' into locking/core, because it's ready for upstream
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-08-12 11:44:30 +02:00
Keerthy 05743b3a09 ARM: dts: AM4372: Add the am4372-rtc compatible string
am4372-rtc string was already part of dts, introduced to identify
the rtc specific to am4372 family of SoCs. It was removed in one of the
previous patches. Adding back the same with appropriate documentation.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-12 01:49:02 -07:00
Tony Lindgren aced048432 Merge branch 'for-4.3/ti-clk-dt' of https://github.com/t-kristo/linux-pm into omap-for-v4.3/dt-v2 2015-08-12 01:38:08 -07:00
Maxime Ripard 06f282757a ARM: sun9i: Wrap the clock-indices
Wrap the clock-indices to match the wrapping of the clock-output-names in
order to make it easier to match indices to names.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-12 00:59:13 -07:00
Maxime Ripard c0a6e360a4 ARM: sun8i: Add clock indices
The A23 and A33 gates have a non continuous set of clock IDs that are
valid. Add the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-12 00:59:11 -07:00
Maxime Ripard 6bfe30b2fd ARM: sun7i: Add clock indices
The A20 gates have a non continuous set of clock IDs that are valid. Add
the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-12 00:59:09 -07:00
Maxime Ripard dbbb69223c ARM: sun6i: Add clock indices
The A31 gates have a non continuous set of clock IDs that are valid. Add
the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-12 00:59:07 -07:00
Maxime Ripard dd4de433aa ARM: sun5i: Add clock indices
The A10s and A13 gates have a non continuous set of clock IDs that are
valid. Add the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-12 00:59:04 -07:00
Maxime Ripard a38540068f ARM: sun4i: Add clock indices
The A10 gates have a non continuous set of clock IDs that are valid. Add
the clock-indices property to the DT to express this.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-12 00:59:02 -07:00
Geert Uytterhoeven 60c0745a80 ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
Add an appropriate "#power-domain-cells" property to the cpg_clocks
device node, to create the CPG/MSTP Clock Domain.

Add "power-domains" properties to all device nodes for devices that are
part of the CPG/MSTP Clock Domain and can be power-managed through an
MSTP clock.  This applies to most on-SoC devices, which have a
one-to-one mapping from SoC device to DT device node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 11:15:28 +09:00
Geert Uytterhoeven 4b31bad51f ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
Add an appropriate "#power-domain-cells" property to the cpg_clocks
device node, to create the CPG/MSTP Clock Domain.

Add "power-domains" properties to all device nodes for devices that are
part of the CPG/MSTP Clock Domain and can be power-managed through an
MSTP clock.  This applies to most on-SoC devices, which have a
one-to-one mapping from SoC device to DT device node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 11:15:27 +09:00
Geert Uytterhoeven 797a0626e0 ARM: shmobile: r8a7791 dtsi: Add CPG/MSTP Clock Domain
Add an appropriate "#power-domain-cells" property to the cpg_clocks
device node, to create the CPG/MSTP Clock Domain.

Add "power-domains" properties to all device nodes for devices that are
part of the CPG/MSTP Clock Domain and can be power-managed through an
MSTP clock.  This applies to most on-SoC devices, which have a
one-to-one mapping from SoC device to DT device node.  Notable
exceptions are the "display" and "sound" nodes, which represent multiple
SoC devices, each having their own MSTP clocks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 11:15:27 +09:00
Geert Uytterhoeven 484adb0058 ARM: shmobile: r8a7790 dtsi: Add CPG/MSTP Clock Domain
Add an appropriate "#power-domain-cells" property to the cpg_clocks
device node, to create the CPG/MSTP Clock Domain.

Add "power-domains" properties to all device nodes for devices that are
part of the CPG/MSTP Clock Domain and can be power-managed through an
MSTP clock.  This applies to most on-SoC devices, which have a
one-to-one mapping from SoC device to DT device node.  Notable
exceptions are the "display" and "sound" nodes, which represent multiple
SoC devices, each having their own MSTP clocks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 11:15:27 +09:00
Geert Uytterhoeven 33c3632a3f ARM: shmobile: r8a7779 dtsi: Add CPG/MSTP Clock Domain
Add an appropriate "#power-domain-cells" property to the cpg_clocks
device node, to create the CPG/MSTP Clock Domain.

Add "power-domains" properties to all device nodes for devices that are
part of the CPG/MSTP Clock Domain and can be power-managed through an
MSTP clock.  This applies to most on-SoC devices, which have a
one-to-one mapping from SoC device to DT device node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 11:15:26 +09:00
Geert Uytterhoeven a670f3667a ARM: shmobile: r8a7778 dtsi: Add CPG/MSTP Clock Domain
Add an appropriate "#power-domain-cells" property to the cpg_clocks
device node, to create the CPG/MSTP Clock Domain.

Add "power-domains" properties to all device nodes for devices that are
part of the CPG/MSTP Clock Domain and can be power-managed through an
MSTP clock.  This applies to most on-SoC devices, which have a
one-to-one mapping from SoC device to DT device node.  A notable
exception is the "sound" node, which represents multiple SoC devices,
each having their own MSTP clocks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 11:15:26 +09:00
Geert Uytterhoeven cbe1f83818 ARM: shmobile: r7s72100 dtsi: Add CPG/MSTP Clock Domain
Add an appropriate "#power-domain-cells" property to the cpg_clocks
device node, to create the CPG/MSTP Clock Domain.

Add "power-domains" properties to all device nodes for devices that are
part of the CPG/MSTP Clock Domain and can be power-managed through an
MSTP clock.  This applies to most on-SoC devices, which have a
one-to-one mapping from SoC device to DT device node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 11:15:26 +09:00
Simon Horman 3f3f0ea0af Merge branch 'clk-for-v4.3' into dt-for-v4.3 2015-08-12 11:15:19 +09:00
Geert Uytterhoeven f04b486d34 clk: shmobile: rz: Add CPG/MSTP Clock Domain support
Add Clock Domain support to the RZ Clock Pulse Generator (CPG) driver
using the generic PM Domain.  This allows to power-manage the module
clocks of SoC devices that are part of the CPG/MSTP Clock Domain using
Runtime PM, or for system suspend/resume.

SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a proper
"power-domains" property.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 10:31:28 +09:00
Geert Uytterhoeven 8bc964aa25 clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
Add Clock Domain support to the R-Car M1A Clock Pulse Generator (CPG)
driver using the generic PM Domain.  This allows to power-manage the
module clocks of SoC devices that are part of the CPG/MSTP Clock Domain
using Runtime PM, or for system suspend/resume.

SoC devices that are part of the CPG/MSTP Clock Domain and can be
power-managed through an MSTP clock should be tagged in DT with a proper
"power-domains" property.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-12 10:31:27 +09:00
Krzysztof Kozlowski 2b347c6494 ARM: exynos_defconfig: Enable cpufreq-dt driver
With the latest patches the cpufreq-dt can be used on multiple
Exynos SoCs: 3250, 4210, 4212, 4412 and 5250.

Enable it along with default ondemand governor to conserve the energy,
reduce temperature while maintaining acceptable performance.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-12 08:17:31 +09:00
Javier Martinez Canillas c3e71f4b5f ARM: multi_v7_defconfig: Enable max77802 regulator
The Exynos5420 based Peach Pit and Exynos5800 based Peach Pi Chromebooks
use the Maxim max77802 Power Management IC (PMIC). This PMIC has besides
other devices, a set of regulators that can be controller over I2C.

Commit f3caa529c6 ("ARM: multi_v7_defconfig: Enable max77802 regulator,
rtc and clock drivers") was supposed to enable the config option for the
regulator driver as a module but the final version that landed did not
include this. The commit was modified and the REGULATOR_MAX77802 removed
since it was thought to be useless.

Unfortunately that's not the case for the mentioned reason above so this
patch enables the needed Kconfig option.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[kgene@kernel.org: fixed ordering according to make savedefconfig]
Signed-off-by: Kukjin Kim <kgene@kernel.org>
2015-08-12 08:15:02 +09:00
Kishon Vijay Abraham I 73c8f0cbb0 ARM: dts: am57xx-evm: Add 'gpios' property with gpio2_8
gpio2_8 is connected to the PCIe_RESETn line and it has to be driven low to
reset the PCIe cards.  Add gpios property to PCIe DT node.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2015-08-11 15:59:16 -05:00
Russell King efaa6e266b firmware: qcom_scm-32: replace open-coded call to __cpuc_flush_dcache_area()
Rathe rthan directly accessing architecture internal functions, provide
an "method"-centric wrapper for qcom_scm-32 to do what's necessary to
ensure that the secure monitor can see the data.  This is called
"secure_flush_area" and ensures that the specified memory area is
coherent across the secure boundary.

Acked-by: Andy Gross <agross@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-11 18:45:00 +01:00
Eric Anholt b35ef52672 ARM: bcm2835: Add the firmware driver information to the RPi DT
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-08-11 16:56:32 +01:00
Anson Huang 3603257553 ARM: dts: imx6ul: add snvs power key support
Add i.MX6UL SNVS power key support.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:27 +08:00
Anson Huang 5b032872c9 ARM: dts: imx6ul: add RTC support
Add RTC support for i.MX6UL.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:27 +08:00
Anson Huang 18619ff55d ARM: dts: imx6ul: enable GPC as extended interrupt controller
Enable GPC as extended interrupt controller of
GIC, as GPC needs to manage wakeup source for
low power modes.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:26 +08:00
Anson Huang 461aa6d723 ARM: dts: imx6sx: correct property name for wakeup source
Commit(def56bb input: snvs_pwrkey: use "wakeup-source"
as deivce tree property name) replaces the property name
of "wakeup" with "wakeup-source", update this change
in i.MX6SX dtsi accordingly.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:26 +08:00
Stefan Agner def0641e2f ARM: dts: add property for maximum ADC clock frequencies
The ADC clock frequency is limited depending on modes used. Add
device tree property which allow to set the mode used and the
maximum frequency ratings for the instance. These allows to
set the ADC clock to a frequency which is within specification
according to the actual mode used.

Acked-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:25 +08:00
Frank Li abb9f253cd ARM: dts: imx7d: enable snvs rtc, onoffkey and power off
Change SNVS rtc to syscon interface.
Enable onoff key and power off function.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:25 +08:00
Fugang Duan 5e8cdb0139 ARM: dts: imx6ul-14x14-evk: add fec1 and fec2 support
Add ethernet fec1 and fec2 support for i.MX6ul 14x14 evk board.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:24 +08:00
Fugang Duan 01f3dc7de3 ARM: dts: imx: add fec1 and fec2 nodes for SOC i.MX6UL
SOC i.MX6UL has two ethernet MACs, add fec1 and fec2 support for i.MX6UL.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:24 +08:00
Philippe Reynes 91eca8d57c ARM: dts: imx27: add support of internal rtc
Add support of internal rtc on imx27.

Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:23 +08:00
Stefan Agner 4f182ff7d4 ARM: dts: vf-colibri: define stdout-path property
Define Vybrid's UART0, connected to the Colibri pinout UART_A, as
standard output.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:22 +08:00
Claudiu Manoil 055223d4d2 ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR
This enables the available eTSEC ethernet ports for the
ls1021aqds and ls1021atwr boards.
For the QDS, SGMII connections (via riser cards) are assumed
for the eTSEC0 and eTSEC1 ports as default configuration.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:22 +08:00
Claudiu Manoil d69cb5d7ea ARM: dts: ls1021a: Add the eTSEC controller nodes
Add basic support for all the eTSEC controllers on the
ls1021a SoC.  Second interrupt group register blocks
and their corresponding Rx/Tx/Err interrupt sources are
included as well for each eTSEC node.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:21 +08:00
Frank Li 5ff807a567 ARM: dts: imx6ul: add qspi support
enable qspi support

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:21 +08:00
Frank Li 4e06dfabe8 ARM: dts: imx6ul: fix low case define in imx6ul-pinfunc.h
some pin name should be capital "_B" instead of "_b"

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:20 +08:00
Frank Li cad2cb69f5 ARM: dts: imx6ul: add usb host and function support
Enable usb host and function driver

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:20 +08:00
Sanchayan Maity 9b1793afef ARM: dts: vfxxx: Add io-channel-cells property for ADC node
This commit adds io-channel-cells property to the ADC node. This
property is required in order for an IIO consumer driver to work.
Especially required for Colibri VF50, as the touchscreen driver
uses ADC channels with the ADC driver based on IIO framework.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:19 +08:00
Alison Wang 50897cb6fa ARM: dts: ls1021a: Add dts nodes for audio on LS1021A
This patch adds dts nodes for audio on LS1021A.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:19 +08:00
Peter Chen 0f92fd49ff ARM: imx6qdl-sabreauto.dtsi: enable USB support
Add USBOTG and USB host 1 support

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:18 +08:00
Frank Li 95d739b5ca ARM: dts: imx: update snvs to use syscon access register
snvs is MFP device. Change dts to use syscon to allocate register resource.
snvs power off also switch to common syscon-poweroff

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:17 +08:00
Frank Li a5fcccbc6e ARM: dts: imx: add imx6ul and imx6ul evk board support
Add new SOC i.MX6UL dtb file support, including evk board
support

i.MX6 Ultralite processor include one ARM cortext-A7 core.
Offer high perfomance and lowest power consumption.

Main included:
- 4 MMC/SD/SDIO
- 2 USB 2.0 OTG
- 3 I2S/SAI/AC97
- 4 eCSPI
- 4 I2C
- 2 ENET
- 2 CAN
- 3 wdog
- ASRC
- 8 uart
- LCDIF
- PXP

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:17 +08:00
Frank Li 7eeb662ad2 ARM: dts: add i.mx6ul pin function include file
add pin mux define file

Signed-off-by: Bai Ping <b51503@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:16 +08:00
Cory Tusar 3b7816bade ARM: dts: vfxxx: Include support for esdhc0 functionality.
Extend the existing Vybrid eSDHC devicetree implementation to also
describe the esdhc0 functional block.

Tested on a custom VF610-based board with a Toshiba THGBM1G5D2EBAI7 eMMC
module attached to esdhc0.

Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:15 +08:00
Fabio Estevam ed339363de ARM: dts: imx6qdl-sabreauto: Allow HDMI and LVDS to work simultaneously
Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.

Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.

With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the HSD100PXN1 LVDS panel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:15 +08:00
Cory Tusar 6f5e69672e ARM: dts: vfxxx: Include support for qspi1 functionality.
This commit extends the existing Vybrid QSPI devicetree implementation
to also describe the qspi1 functional block.

Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:14 +08:00
Cory Tusar f4b89232f2 ARM: dts: vf610: Add missing QuadSPI register mapping and names.
Both 'reg' and 'reg-names' are required properties according to binding
documentation, and both should contain two items.

Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:14 +08:00
Haikun Wang c47d6e380b ARM: dts: ls1021a: Update 'dspi' device node compatible string
Freescale DSPI driver has been updated and supports TCF interrupt type now.
In the new driver we choose the interrupt type according the compatible
string of the device node.
This patch update the compatible string of DSPI device node of LS1021A in
order to use the correct interrupt type.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:13 +08:00
Frank Li 3adab7c796 ARM: dts: imx7d: add cortex-a7 coresight component
Added etm, etb, funnel and replicator

usage example:

    echo 1 >/sys/bus/coresight/devices/30086000.etr/enable_sink
    echo 1 >/sys/bus/coresight/devices/3007c000.etm/enable_source

        coresight-tmc 30086000.etr: TMC enabled
        coresight-replicator replicator.1: REPLICATOR enabled
        coresight-tmc 30084000.tmc: TMC enabled
        coresight-funnel 30083000.funnel: FUNNEL inport 0 enabled
        coresight-funnel 30041000.funnel: FUNNEL inport 0 enabled
        coresight-etm3x 3007c000.etm: ETM tracing enabled

    etm enable here.
    trace data save at /dev/30086000.etr

    cat /dev/30086000.etr > trace.data

        coresight-tmc 30086000.etr: TMC read start
        coresight-tmc 30086000.etr: TMC read end

    use ptm2human(https://github.com/hwangcc23/ptm2human) to show trace data

    ptm2human -i trace.data

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:12 +08:00
Fabio Estevam 7804fbcfe5 ARM: dts: imx6qdl-nitrogen6x: Allow HDMI and LVDS to work simultaneously
Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.

Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.

With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the HSD100PXN1 LVDS panel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:12 +08:00
Fabio Estevam b6db3097db ARM: dts: imx6qdl-sabrelite: Allow HDMI and LVDS to work simultaneously
Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.

Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.

With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the HSD100PXN1 LVDS panel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:11 +08:00
Fabio Estevam d23dfefaf0 ARM: dts: imx6sl-warp: Add changes for rev1.12
Warp board rev1.12 is the version of the hardware that will be publicly
available for the customers.

It uses UART5 as the Bluetooth serial port as well as some
additional signals for HOSTWAKE on Wifi and Bluetooth.

Make the changes to support the rev1.12 hardware.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:11 +08:00
Fabio Estevam d28be499c4 ARM: dts: imx6qdl-sabresd: Allow HDMI and LVDS to work simultaneously
Currently it is not possible to have HDMI and LVDS working simultaneously,
because both ports try to use PLL5.

Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be
driven from independent sources.

With this change the LDB pixel clock goes to 68.57 MHz, which is still
within the valid range for the HSD100PXN1 LVDS panel.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:10 +08:00
Olof Johansson 1a08a84cc6 Third Round of Renesas ARM Based SoC DT Updates for v4.3
* Add JPU support: r8a7791 and r8a7790 SoCs
 * Add MMCIF and PFC support: r8a7794 SoC
 * Add initial support for r8a7794/silk
 * Add missing "gpio-ranges" to gpio nodes: sh73a0, r8a7740 and r8a73a4 SoCs
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVxAtfAAoJENfPZGlqN0++WpMP/R11KWxqa77Z4PDUk1IBUZgl
 JA9d0qK9K3s8YXIgDpPUa3fZzjqOen3LAzFx/GH+hqOGfNEvqnyj1P4LfdjmyM3u
 SHkNkMedEI3ioULYUwISNcvYl343llYcOoICFQhZQe+OCfpPMlCAMC9rUcBV18rE
 ZwkxyWH8+sP3Fj8Lbom8woIu6Y20UZjpUBEzbKLgOcaH71wV9rwK4SBlbPIbeFgn
 0A0tQQZh2bFUj9hRoK2hEm4yq812s4bOUxp3zolVJDNA1KG1xV+Ix+X7WK8b5WhH
 yJpH0tcVrR7OA520wEysYdMS3jcLXV1SUDLNThCVCYMYTAsR7B+EhuLV9Rt5x+jw
 BcIptJuCfYnkkO8BVTOBbmvAjOohG70yZxr577+9TKh59c6K6b0Qypm7mvLH/1GA
 SCaTSiZM8od0Foal1mIULoLRhimXxUUppxrVcbWcRZSgxcJSXiBqJRrY6ESXVW3F
 6Pv7M384fOw4MRsA6nSHQcjF3a0jCW5VdcgXZ5wXGrp6QJYC0wr50vufnhzkiKez
 aV0Fo+XwBjngwIVyITslSWhiOIqU9l9YRg22cwjgOV6EVqRBq39NOnCjhaQMX4LI
 EErm0bn+8Jb578y6kpygTfeMXXI0+gUMeOzYoXd7PdSinS1XuCLw1osqdGs0yEas
 Na5FU+luGEiyPoUH2chq
 =SkD5
 -----END PGP SIGNATURE-----

Merge tag 'renesas-dt3-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Third Round of Renesas ARM Based SoC DT Updates for v4.3

* Add JPU support: r8a7791 and r8a7790 SoCs
* Add MMCIF and PFC support: r8a7794 SoC
* Add initial support for r8a7794/silk
* Add missing "gpio-ranges" to gpio nodes: sh73a0, r8a7740 and r8a73a4 SoCs

* tag 'renesas-dt3-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: sh73a0 dtsi: Add missing "gpio-ranges" to gpio node
  ARM: shmobile: r8a7740 dtsi: Add missing "gpio-ranges" to gpio node
  ARM: shmobile: r8a73a4 dtsi: Add missing "gpio-ranges" to gpio node
  ARM: shmobile: silk: add eMMC DT support
  ARM: shmobile: r8a7794: add MMCIF DT support
  ARM: shmobile: silk: add Ether DT support
  ARM: shmobile: silk: initial device tree
  ARM: shmobile: r8a7794: add PFC DT support
  ARM: shmobile: r8a7791: Add JPU device node.
  ARM: shmobile: r8a7790: Add JPU device node.

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:31:53 +02:00
Linus Walleij 4f2f1f76dc ARM: nomadik: push accelerometer down to boards
The two Nomadik variants have the accelerometer mounted on
different I2C lines. Push the definition down to the top-level
board DTS files to get things right.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:29:59 +02:00
Linus Walleij 98badfd31c ARM: nomadik: move l2x0 setup to device tree
The cache setup magic value in the Nomadik machine is plain wrong,
the correct settings can be done using device tree in accordance
with the settings from ST's own port.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:29:59 +02:00
Linus Walleij 1cb3375bb5 ARM: nomadik: selectively enable UART0 on boards
The S8815 board is using RX/TX on UART0, and the NHK8815 is
using RX/TX and CTS/RTS (the latter connected to a Bluetooth
chip). Activate the right groups with the u0 UART0 function
on each board and undisable it. Get rid of the old erroneous
default definition from the SoC file.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:29:58 +02:00
Linus Walleij 4cec8cd790 ARM: nomadik: move hog code to use DT hogs
Instead of introducing a board-specific DT node for biasing the
MMC/SD and SATA ports, use the new device tree hogs.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:29:57 +02:00
Olof Johansson 1e86355adc Omap device tree changes for v4.3 merge window. Pretty much all
just trivial additions to configure devices for various SoCs and
 boards:
 
 - Updates for omap3-devkit8000 board support
 
 - M3 coprosessor, regulator, mux, RTC and eMMC updates for am437x
 
 - MMC, regmap, mux and dwc3 updates for dra7 and omap5
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVwyzeAAoJEBvUPslcq6Vz4qYP/iDxLzTEcamYNGgzlV6ANvu1
 rwjyI23u1h6HI7d2ndUOuYWCvkMk4NQITPSKrYrMARMagkQZq38Koqx0rxF0U8GA
 9IoETnCqTn7SrmhtTFr0PsciJ9n8g8vLoq9k8EfrohvcQl2Xui07dYcz3l+tK8RG
 gXTys6eij9Gyg3blUcDqqZOSl1xjZu7mNou/jc8zlpXrQX9WCjYrVM+U0xCkigA8
 OT3NTC+dldTNhgAj0x6JmRJqjfmJZdb2ZnWpqjfiktzKRm1mkqDubGUAlAOIayTq
 3edt5WHXnDC2M+lfLi/bf83wrXDqXPHTuYO6JNHZapVLJKP+m+vAbwfT2CRLrTIr
 UetBhlYupAPHBo8pqEBAZvvBM4fkLOtXaDaoF1kW6el5MmobN+lU1BnUrSWs1kFz
 cv2tniUVKzy6S0UGvJXSp2LOLX1j0VsMsnajbzwkL6rrUujD4qwze3K+GL0rYKSS
 eV3LItXXukAIpBIgg6AkH4DzHWMHtOKvHyHmvR8j58UFWPHm1tMJC4CSA+31pVL2
 WQqy698hWvphyYn6UDDJ9lLfgmshokAdVNYwY7Br7CSa3vg2jixStt4lXFQzC8XA
 6/pvApBLpcEs0iYPcCldyql08dZpyFaxHElziEl3zXG0spsljV6zPHflIYDrnp2B
 B8DvwHBjCkr9jvHwH9Wd
 =S0dj
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.3/dt-pt3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Omap device tree changes for v4.3 merge window. Pretty much all
just trivial additions to configure devices for various SoCs and
boards:

- Updates for omap3-devkit8000 board support

- M3 coprosessor, regulator, mux, RTC and eMMC updates for am437x

- MMC, regmap, mux and dwc3 updates for dra7 and omap5

* tag 'omap-for-v4.3/dt-pt3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (27 commits)
  ARM: dts: omap3-devkit8000: Add ADS7846 Touchscreen support
  ARM: dts: omap3-devkit8000: add LCD panels
  ARM: dts: omap3-devkit8000: Add DSS' DVI support
  ARM: dts: omap3-devkit8000: Add S-video output support
  ARM: dts: omap3-devkit8000: Add keymap support
  ARM: dts: omap3-devkit8000: Add PMU stat support
  ARM: dts: omap3-devkit8000: Add user button support
  ARM: dts: am437x-gp-evm: Add regulator-always-on and regulator-boot-on for RTC DCDCs
  ARM: dts: AM4372: Reorder the rtc compatible string
  ARM: dts: am437x-gp-evm: Add eMMC support
  ARM: dts: am437x-gp-evm: Add gpio-hog for configuring eMMC/NAND driver
  ARM: dts: am43xx: Introduce MUX_MODE9 for pinctrl
  ARM: dts: dra72-evm: Fix spurious card insert/removal interrupt
  ARM: dts: dra7-evm: Fix spurious card insert/removal interrupt
  ARM: dts: am57xx-beagle-x15: mmc1: remove redundant pbias-supply property
  ARM: dts: dra7-evm: Add MMCSD card removal GPIO
  ARM: dts: dra72-evm: Set max clock frequency of MMC1 and MMC2
  ARM: dts: dra7-evm: add evm_3v3_sd regulator
  ARM: dts: dra72-evm: add evm_3v3_sd regulator
  ARM: dts: AM4372: Add the wkup_m3_ipc node
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:23:24 +02:00
Olof Johansson e2e927c823 Few trivial omap MMC regression fixes for card voltages where
the syscon areas for PBIAS regulator were missing "simple-bus"
 that prevents probing of the children in the mapped region.
 
 This probably was not noticed earlier as the bootloader has
 already configured the regulator for the card in the slot.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVwympAAoJEBvUPslcq6VzeCUQAOBLq8Rq4DOe+VhbzPT9GRAw
 GoKAsJr1lBscj+WRQO5+pOeHE/vCXtQ/UrE+Y+9QXCjAV5IcSYYpNh7mHs5KnZzy
 B9EN5edlMp3Tt4U4Rej1PQLwCMa0TYHsj80lDH8yyMRLilts4SsFsWgdQ5PPYf4E
 O0T5RZR8cZgxsQWD6YyEg8FjCbsyTDOeiOJ0hnXX4qUPzS+AYcCsWpTFFrHfDrDB
 kH+mjEmFZCpxELeO8NFCBFz/HbLLzSRHafCmHFPfMn/kTeFhFnM4oHucTxyDpeMb
 9KXuehg9VsWjsZuCx34k7gf4emoxHDk9C/oHjVXJYBqR7RqOqYthB4cw4yijE9Ey
 KYEJGx9QlG76O2pU0EDlqVgUOQPV67q2fz2he6tIWbRulS8UHf6bcwiu412RifM8
 dXd4xctbrIprhbXjTt8pbuwx88z/1haO3H1Ir4yb++W7UBX6Bh1vfcjyzIzpyDbW
 /bRtq9MtM8Jx30mZDHyvE3LUKoIQo3oRWjm8ZqqjDulFd02CzyoGDs+hfCRt/ia4
 Tz+gCRJbF9g25XTbMxET8+7tzaztwW28jKKS6E9GM6jEDglG1avxku0yjx44yK6+
 iLgIeesXGbtKzPM9dWfXqzy7f6HfVvonvPPZlh1zygerr03G5Z3GY02ToiaEheEg
 aSe76i5wbpuhe6C+vWYy
 =qK3L
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.2/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Few trivial omap MMC regression fixes for card voltages where
the syscon areas for PBIAS regulator were missing "simple-bus"
that prevents probing of the children in the mapped region.

This probably was not noticed earlier as the bootloader has
already configured the regulator for the card in the slot.

* tag 'omap-for-v4.2/fixes-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: dra7: Fix broken pbias device creation
  ARM: dts: OMAP5: Fix broken pbias device creation
  ARM: dts: OMAP4: Fix broken pbias device creation
  ARM: dts: omap243x: Fix broken pbias device creation

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:22:10 +02:00
Masahiro Yamada 63ef577d9a ARM: dts: UniPhier: add reference daughter board
This is used as a base board for reference core modules.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:20:56 +02:00
Gregory Fong b78bda5fd8 ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
Broadcom STB (BRCMSTB) has some 64-bit capable DMA and therefore needs
dma_addr_t to be a 64-bit size.  One user is the Broadcom SATA3 AHCI
controller driver.

Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:18:29 +02:00
Gregory Fong aeaeba1b6f ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
Commit 04fcab32d3 ("ARM: 8111/1: Enable
erratum 798181 for Broadcom Brahma-B15") enables this erratum for
affected Broadcom Brahma-B15 CPUs when CONFIG_ARM_ERRATA_798181=y.
Let's make sure that config option is actually set.

Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:18:28 +02:00
Gregory Fong e73ff4d29a ARM: dts: brcmstb: add BCM7445 GPIO nodes
Need the aon_pm_l2_intc and irq0_aon_intc descriptions, so included
those as well.

Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:17:24 +02:00
Felix Fietkau 1ff8036352 ARM: BCM5301X: Add profiling support
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:17:24 +02:00
Hauke Mehrtens db44f1342d ARM: BCM5301X: activate some additional options in pl310 cache controller
In the default Broadcom SDK the shared override is activated for this
cache controller, do the same in the upstream code. Data and
instruction prefetching is not activated by default for this cache
controller on the bcm53xx SoC, do it manually like it is done in the
vendor SDK.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:17:23 +02:00
Olof Johansson 42d0a99fd6 ARM: sirf: dts update for 4.3
some missed dt nodes or props for sirf dts for 4.3.
 Among them:
 - G2D
 - PWM
 - JPEG
 - Multimedia
 - PMU(performance monitor unit)
 - GMAC
 - SDR(software digital radio) and its DMA
 - pinmux for NAND
 - GPIO key
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJVwiPfAAoJEDIv4aC191Rh1KsP+QHIpercYn+mUMS1+0eUE+y5
 2iTlZWmExRRFdCL6Hbp6apDmqDrEutcldCPg7dOXJLwjMjxljebpySTv3foQyMzG
 /VZYsxv0A4etjMEcJIiqUZByxR78BKWiPNVmc1cMLQCzWKg1DTcV5CLDquHetP7V
 uypSaVs1SWenO413Am4bEAkPHL8r84mRJm/40yXiq7+4YGRNtYR8tRN3AjtW969f
 jywDuttNuhYlDtKIubjKm3M3cvV/32UqTQrajvyapAoAoO9Xz3FdPZ3ABDO14AZM
 kuRBTr47D0pTxX/mxSGgSJLQZYp2CaxWsz+/TXSSjc1DR9yNp88JiRtTyHhtmDiT
 HUJE+JHj5u6QdJxngDQHVSVnUaxkX9CqrHBQG9m0r1ZBFs/vAanZ9ddcZht1CUS1
 wnem2IVbdDQm9qqrzISTUg1B6QbDKBOo25poyYw4nwabNE81luMwbVOb+BBirnvV
 JChaNjWrd/Qzv9YosfjRDv0Gzt8U7EnJ8u3WIX++PL8lVo7ubzqfKkzOI13WM1yR
 dZ9otI7Bej8Ps+D8BxQYHgL+st1qZ0oCkhndN8193VQRWxbG2Q/Hw0mzQdNJv5MS
 mNvdhCdZCY1kcx/oz3afVGks5PZ23CIkoCepHvsY5L5qdVPxfERfA0Y9Vy0CQ0xY
 vcNqMjxxgqK9TMsshQVy
 =VNaC
 -----END PGP SIGNATURE-----

Merge tag 'sirf-dts-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt

ARM: sirf: dts update for 4.3

some missed dt nodes or props for sirf dts for 4.3.
Among them:
- G2D
- PWM
- JPEG
- Multimedia
- PMU(performance monitor unit)
- GMAC
- SDR(software digital radio) and its DMA
- pinmux for NAND
- GPIO key

* tag 'sirf-dts-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
  ARM: dts: atlas7: add a GPIO key for rearview button
  ARM: dts: atlas7: put pinctl property to get pinmux for NAND
  ARM: dts: atlas7: add software digital radio nodes and its DMA channels
  ARM: dts: atlas7: add lost PWM node
  ARM: dts: atlas7: add lost G2D node
  ARM: dts: atlas7: add multimedia codec node
  ARM: dts: atlas7: add alias name for spi device
  ARM: dts: atlas7: add lost gmac node
  ARM: dts: atlas7: add performance monitor unit node
  ARM: dts: atlas7: add lost jpeg node

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:10:01 +02:00
Masahiro Yamada a5e921b477 ARM: dts: uniphier: add ProXstream2 and PH1-LD6b SoC/board support
Initial version of DTSI for ProXstream2 and PH1-LD6b and DTS for
PH1-LD6b reference board.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[olof: sort Makefile entries]
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:09:32 +02:00
Masahiro Yamada 474e5ac624 ARM: dts: uniphier: add PH1-Pro5 SoC support
Initial version of UniPhier PH1-Pro5 device tree.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:09:27 +02:00
Masahiro Yamada 68f46897ea ARM: dts: uniphier: add I2C controller device nodes
Add I2C controller device nodes for PH1-sLD3, PH1-LD4, PH1-sLD8
(FIFO-less I2C) and PH1-Pro4 (FIFO-builtin I2C).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:09:21 +02:00
Olof Johansson b9efb8e30e Samsung 1st DT updates for v4.3
- for exynos3250
   : update video-phy node with syscon phandle
 - for exynos4210
   : add CPU OPP and regulator supply property
   : use labels for overriding nodes for exynos4210-universal_c210
 - for exynos4412-trats2
   : set max17047 over heat and voltage thresholds
 - for exynos5250 and 5420
   : extend exynos5250/5420-pinctrl nodes using labels
   : include exynos5250/5420-pinctrl after the nodes definitions
 - for exynos5410-smdk5410
   : clean up indentation
 - for exynos5422-odroidxu3
   : define default thermal-zones for exynos5422
   : enable USB3 regulators, TMU and thermal-zones
   : add pwm-fan node
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJVwGFHAAoJEA0Cl+kVi2xqavgP/jo+jCcIZbXUGWT+zASqwhZ2
 Up0V2gKRBmjnCgxcy4+dkzDsMg2ey7jW/0ueunKNtru5zKa6BUxIWvm+eE7DCI2u
 5OpFkQZsmYt37xZEQsallzEKFIRhkxn7Czr11FPbt/lti5CbPc7V9bjX5XZvLXv5
 prt3NyRUsTl141g/wU6Hd0giiFvK9ql+dmWrCZNTUB7XVJHOjDvnGBIkSVkIVbsc
 GMMbCz/TGdurvl59oQB2DkSZVjx4A3jZ91RPlyVNBrOfEQJTNfD9/BsYy4/D9aIR
 koG/jaN+nCDE3I224k90WW0CjFXEGid/83cqBKWQTtk80Tfs1lnJkW6K6krfo9WK
 3oYVkRo22vCKVtEJxb4qXku4ZlPqxofbpEKGg0KIx+h69l7pSPYJTyr29P+W3zzI
 b7bS2JGxGQONNQvn0RKHzpCJTaLppnEmVechra+o76t6mb4aFfoDrfQP+rmphj2q
 bi4bnqnJ9mzA4+S1ASZKcIP8YwevCVANPOL3m36bEvcklKZ3e/ks7V1maNNjJ9Es
 51tWsG2XcbTpLBiCw1d1X8q36YnitpWzIfJbWy8mIYqDXdeCw0+lqCEjuPxBhqee
 XPvRh03tojPGyRsky0Q0RZ4BltZ824+Z71P/+SKv2TMO1SjOJsfGFwxvwlwxjQZx
 83K5MVVSXkDQJRymOsWF
 =gIS8
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

Samsung 1st DT updates for v4.3

- for exynos3250
  : update video-phy node with syscon phandle
- for exynos4210
  : add CPU OPP and regulator supply property
  : use labels for overriding nodes for exynos4210-universal_c210
- for exynos4412-trats2
  : set max17047 over heat and voltage thresholds
- for exynos5250 and 5420
  : extend exynos5250/5420-pinctrl nodes using labels
  : include exynos5250/5420-pinctrl after the nodes definitions
- for exynos5410-smdk5410
  : clean up indentation
- for exynos5422-odroidxu3
  : define default thermal-zones for exynos5422
  : enable USB3 regulators, TMU and thermal-zones
  : add pwm-fan node

* tag 'samsung-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: dts: Extend exynos5420-pinctrl nodes using labels instead of paths
  ARM: dts: Include exynos5420-pinctrl after the nodes were defined for exynos5420
  ARM: dts: Extend exynos5250-pinctrl nodes using labels instead of paths
  ARM: dts: Include exynos5250-pinctrl after the nodes were defined for exynos5250
  ARM: dts: Enable thermal-zones for exynos5422-odroidxu3
  ARM: dts: Define default thermal-zones for exynos5422
  ARM: dts: Enable TMU for exynos5422-odroidxu3
  ARM: dts: Add pwm-fan node for exynos5422-odroidxu3
  ARM: dts: Use labels for overriding nodes for exynos4210-universal_c210
  ARM: dts: Set max17047 over heat and voltage thresholds for exynos4412-trats2
  ARM: dts: Enable USB3 regulators for exynos5422-odroidxu3
  ARM: dts: Clean up indentation for exynos5410-smdk5410
  ARM: dts: add CPU OPP and regulator supply property for exynos4210
  ARM: dts: Update video-phy node with syscon phandle for exynos3250

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:01:26 +02:00
Olof Johansson 28d250c4ed Samsung cleanup for v4.3
- make the following headers local
   watchdog-reset, onenand-core, irq-uart, backlight,
   ata-core, regs-usb-hsotg-phy, spi-core, nand-core,
   fb-core and regs-srom headers
 - make the following c file local
   s5p-dev-mfc, dev-backlight and setup-camif c file
 - remove keypad-core.h file
 - drop owner assignment in pmu.c
 - remove duplicated define of SLEEP_MAGIC
 - make exynos5420_powerdown_conf() staic
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJVwGDrAAoJEA0Cl+kVi2xqLOEP/3MN29FaxLisByvFmv5eS6v5
 NtRuULG1hXKA4h7RNVjcT7Ml2Dg6CFILmOxtHrKR8FY+rR5xx69+8QGBVMYSwcVu
 J/hdpwm5vay0X6wqNL3ZLnOu8W9wYPzQP32vTZE6yQbLA125VflQlDJ/muqnR0dj
 4ropnfX/Jkl6Kav02QuOKVmL0wO62/TV2JcBGT+sv9XPTzzXcB1ljer7XRywFKYG
 SSBsN1mu8IycncBASPxp+qEV3Z2HK5cLbMZJVXtAJOR0dOgO1ScHcPJ0dk25q4Ek
 VD3br5C4ptvoie9HuA6EoBv9Pr7VqX7DETe7zGgDh9Q+Wnn40/aTLwymMP8DwZuf
 1yKx36pdkNStt9COqJYb9ofI5CRqjyepUIkfN8kH4F2+izETKvbq3hCVcuDatPCy
 fhP9YH0b/EDsSwvEWxbIEWXHjLYhiCPtbIcqptepInjOWo8cKStAJl8nySq6foVr
 swqBKKdUJgT6xQiFRPdHkyopXl7lLKm7RPFGR7K8V5Yz3VAlKVcNpcsasjsdMJR8
 r5/u3XWSfmq/4imXfUixX3vCmUmkkKX1LljY8yzdakrh+CXAww9xAA0kS4FgLhlt
 3/acoTXjO6cO/zYxLGGzEBEo5Tmz+NwIT/Tu6L/8zSQOxYNH8CQpYPb2ttScvJ/o
 C87t3IG/8MbdkDi+03qU
 =95P4
 -----END PGP SIGNATURE-----

Merge tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup

Samsung cleanup for v4.3

- make the following headers local
  watchdog-reset, onenand-core, irq-uart, backlight,
  ata-core, regs-usb-hsotg-phy, spi-core, nand-core,
  fb-core and regs-srom headers
- make the following c file local
  s5p-dev-mfc, dev-backlight and setup-camif c file
- remove keypad-core.h file
- drop owner assignment in pmu.c
- remove duplicated define of SLEEP_MAGIC
- make exynos5420_powerdown_conf() staic

* tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: SAMSUNG: remove keypad-core header in plat-samsung
  ARM: SAMSUNG: local watchdog-reset header in mach-s3c64xx
  ARM: SAMSUNG: local onenand-core header in mach-s3c64xx
  ARM: SAMSUNG: local irq-uart header in mach-s3c64xx
  ARM: SAMSUNG: local backlight header in mach-s3c64xx
  ARM: SAMSUNG: local ata-core header in mach-s3c64xx
  ARM: SAMSUNG: local regs-usb-hsotg-phy header in mach-s3c64xx
  ARM: SAMSUNG: local spi-core header in mach-s3c24xx
  ARM: SAMSUNG: local nand-core header in mach-s3c24xx
  ARM: SAMSUNG: local fb-core header in mach-s3c24xx
  ARM: SAMSUNG: local regs-srom header in mach-exynos
  ARM: SAMSUNG: make local s5p-dev-mfc in mach-exynos
  ARM: SAMSUNG: make local dev-backlight in mach-s3c64xx
  ARM: SAMSUNG: make local setup-camif in mach-s3c24xx
  ARM: EXYNOS: Drop owner assignment in pmu.c
  ARM: EXYNOS: Remove duplicated define of SLEEP_MAGIC
  ARM: EXYNOS: Make local function static

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 14:59:02 +02:00
Olof Johansson fc293f5f2a ARM: shmobile: Fix mismerges
Turns out I fumbled a couple of the merge resolutions for marzen board removal.

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 14:43:09 +02:00
Nathan Lynch 09edea4f8f ARM: 8410/1: VDSO: fix coarse clock monotonicity regression
Since 906c55579a ("timekeeping: Copy the shadow-timekeeper over the
real timekeeper last") it has become possible on ARM to:

- Obtain a CLOCK_MONOTONIC_COARSE or CLOCK_REALTIME_COARSE timestamp
  via syscall.
- Subsequently obtain a timestamp for the same clock ID via VDSO which
  predates the first timestamp (by one jiffy).

This is because ARM's update_vsyscall is deriving the coarse time
using the __current_kernel_time interface, when it should really be
using the timekeeper object provided to it by the timekeeping core.
It happened to work before only because __current_kernel_time would
access the same timekeeper object which had been passed to
update_vsyscall.  This is no longer the case.

Cc: stable@vger.kernel.org
Fixes: 906c55579a ("timekeeping: Copy the shadow-timekeeper over the real timekeeper last")
Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-11 13:42:44 +01:00
Olof Johansson 7776f8e3f8 Samsung non-critical fixes for v4.3
- fix sparse warning for returning iomem
 - fix clock-frequency of display timing0 for exynos3250-rinato
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJVwGDEAAoJEA0Cl+kVi2xqAbQP/0Hn7gQX0l2nHMYO3xgf8jrE
 EtGiwRAx/InxfmBtJYtZf6KH/F/FJPrXrJBa3co9RHgIPK9bEpX9EBLmKdGHEf9w
 d7IDhECyAlFSFII35NX+IzAW9+9AuRx80/5PcJyPikwHyswdVVQAe00/L4rqwLuu
 ajUk5s6FsLnk6vuUZDGLz5+u8OezdJIYdWHeaNigH9IbvkczKkJKhWOdcYbH8hux
 mKN+5rCwqk2zdz6lFcZ8yPH1FlkVFfDGSi/97p4iqzz5S9Oy477tCgKYFnPqYcHP
 gIFcK6FqlTGMeTuqHC1ISrXp+ZIEzKUAlHhaTRG5G9umvjRj8qS0TAEUqCr5dx50
 nQupX4EUL+LFasE1oztHf4WQodkH3Q8polNWPT95jtcvCO37UGMPdEJIKbv9vdD/
 aT3OcvDbr+TqwsepXkVmkbLqLsjwmeO3WjK0VfTmElPc4qekgXxNRr6Zr8oSj4GN
 DeWXDrf1uj0fpY0/VlIkrAD6w6AtMRGERBkmSIIyCI6JWapIlM3EBgtIc4FQSIxC
 1dswY0v0Nt/WB8NQ0uJeN/r8GcEcSj61gSo/1acH3H3QHLP2ZzeiCOCdDrGKM7d9
 u4HOYZ1im8rBnXFFGKp3HIokd/nn73a8u6GGD6ror8+Q2ods+lPHVQ8HP0gGrzJH
 JVJl1UALMvogxtC2mGiE
 =7m5l
 -----END PGP SIGNATURE-----

Merge tag 'samsung-non-critical-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/fixes-non-critical

Samsung non-critical fixes for v4.3

- fix sparse warning for returning iomem
- fix clock-frequency of display timing0 for exynos3250-rinato

* tag 'samsung-non-critical-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Use IOMEM_ERR_PTR when function returns iomem
  ARM: dts: fix clock-frequency of display timing0 for exynos3250-rinato

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 14:38:36 +02:00
Dan Williams 92b19ff50e cleanup IORESOURCE_CACHEABLE vs ioremap()
Quoting Arnd:
    I was thinking the opposite approach and basically removing all uses
    of IORESOURCE_CACHEABLE from the kernel. There are only a handful of
    them.and we can probably replace them all with hardcoded
    ioremap_cached() calls in the cases they are actually useful.

All existing usages of IORESOURCE_CACHEABLE call ioremap() instead of
ioremap_nocache() if the resource is cacheable, however ioremap() is
uncached by default. Clearly none of the existing usages care about the
cacheability. Particularly devm_ioremap_resource() never worked as
advertised since it always fell back to plain ioremap().

Clean this up as the new direction we want is to convert
ioremap_<type>() usages to memremap(..., flags).

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2015-08-10 23:07:06 -04:00
Dan Williams 2584cf8357 arch, drivers: don't include <asm/io.h> directly, use <linux/io.h> instead
Preparation for uniform definition of ioremap, ioremap_wc, ioremap_wt,
and ioremap_cache, tree-wide.

Acked-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2015-08-10 23:07:05 -04:00
Victoria Milhoan ab86ca0755 ARM: imx_v6_v7_defconfig: Select CAAM
Select CAAM for i.MX6 devices.

Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-10 23:19:05 +08:00
Victoria Milhoan b15e9ea583 ARM: dts: mx6sx: Add CAAM device node
Add CAAM device node to the i.MX6SX device tree.

Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-10 23:19:03 +08:00
Victoria Milhoan d462ce996a ARM: dts: mx6qdl: Add CAAM device node
Add CAAM device node to the i.MX6 device tree.

Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-08-10 23:19:02 +08:00
Russell King 81497953e3 Merge branch 'psci/for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux into devel-stable 2015-08-10 15:57:44 +01:00
Dinh Nguyen 6855e5b709 ARM: socfpga: dts: Add resets for EMACs on Arria10
Add the reset property for the EMAC controllers on Arria10.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-09 21:58:58 -05:00
Dinh Nguyen 1a94acf858 ARM: socfpga: dts: add "altr,modrst-offset" property
The "altr,modrst-offset" property represents the offset into the reset manager
that is the first register to be used by the driver to bring peripherals out
of reset.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-09 21:58:46 -05:00
Greg Kroah-Hartman 5d44f4b348 Merge 4.2-rc6 into char-misc-next
We want the fixes in Linus's tree in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-09 16:28:09 -07:00
Alexandru M Stan 378abcdf32 ARM: dts: rockchip: add veyron-minnie board
Also known as the Asus Chromebook Flip.

Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-08 12:31:27 +02:00
Heiko Stuebner b21bcfc9fd ARM: dts: rockchip: reserve unusable memory region on rk3288
The all current Rockchip SoCs supporting 4GB of ram have problems accessing
the memory region 0xfe000000~0xff000000. This also seems to includes the
rk3368 arm64 soc.

All current code handling dma memory oddities I could find, seem to involve
soc-specific code (zone-dma or so) while this issue is shared between arm32
and arm64 socs from Rockchip, which would need to have this described in
the soc devicetree on both socs.

Limiting the dma-zone alone also does not solve the issue and as the
dma-masks need to be a power-of-two in the kernel, the next lower dma-mask
brings memory usable for dma down to 2GB.

So as a stop-gap block off the affected region to prevent its use by
devices with 4GB of memory, like some recent Chromebooks.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-08 12:28:54 +02:00
Heiko Stuebner 67867fc338 ARM: dts: rockchip: enable usb controller on marsboard
This enables the previously disabled usb controllers on the marsboard
and makes it possible to for example mount usb mass storage devices.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-08-08 12:25:38 +02:00
Heiko Stuebner 760bb9773f ARM: dts: rockchip: add usb phys to Cortex-A9 socs
This adds the usbphy nodes to rk3066 and rk3188, which share the usb hosts
in rk3xxx.dtsi and also enables it on boards based around these socs.

The usb-phy itself is the same as used on the rk3288 already.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-08-08 12:25:35 +02:00
Heiko Stuebner ec32bd9fca ARM: dts: rockchip: set correct dwc2 params for cortex-a9 socs
According to the manual, the fifo sizes are the same as on later socs
like the rk3288 and this also fixes an error about "insufficient fifo
memory", as it seems the values read from the ip are wrong.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-08-08 12:25:32 +02:00
Linus Torvalds d5a8ab400b USB fixes for 4.2-rc6
Here are some USB and PHY fixes for 4.2-rc6 that resolve some reported
 issues.
 
 All of these have been in the linux-next tree for a while, full details
 on the patches are in the shortlog below.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iEYEABECAAYFAlXFMe4ACgkQMUfUDdst+ykcxgCfbv91Efs37AUe7LDiIpaperpJ
 wIMAn3xwaOsw8qrpcg3YGOaSggMhuuMC
 =vwz8
 -----END PGP SIGNATURE-----

Merge tag 'usb-4.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB fixes from Greg KH:
 "Here are some USB and PHY fixes for 4.2-rc6 that resolve some reported
  issues.

  All of these have been in the linux-next tree for a while, full
  details on the patches are in the shortlog below"

* tag 'usb-4.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
  ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY
  drivers/usb: Delete XHCI command timer if necessary
  xhci: fix off by one error in TRB DMA address boundary check
  usb: udc: core: add device_del() call to error pathway
  phy: ti-pipe3: i783 workaround for SATA lockup after dpll unlock/relock
  phy-sun4i-usb: Add missing EXPORT_SYMBOL_GPL for sun4i_usb_phy_set_squelch_detect
  USB: sierra: add 1199:68AB device ID
  usb: gadget: f_printer: actually limit the number of instances
  usb: gadget: f_hid: actually limit the number of instances
  usb: gadget: f_uac2: fix calculation of uac2->p_interval
  usb: gadget: bdc: fix a driver crash on disconnect
  usb: chipidea: ehci_init_driver is intended to call one time
  USB: qcserial: Add support for Dell Wireless 5809e 4G Modem
  USB: qcserial/option: make AT URCs work for Sierra Wireless MC7305/MC7355
2015-08-08 04:27:51 +03:00
Drew Richardson e83dd37700 ARM: 8409/1: Mark ret_fast_syscall as a function
ret_fast_syscall runs when user space makes a syscall. However it
needs to be marked as such so the ELF information is correct. Before
it was:

   101: 8000f300     0 NOTYPE  LOCAL  DEFAULT    2 ret_fast_syscall

But with this change it correctly shows as:

   101: 8000f300    96 FUNC    LOCAL  DEFAULT    2 ret_fast_syscall

I see this function when using perf to unwind call stacks from kernel
space to user space. Without this change I would need to add some
special case logic when using the vmlinux ELF information.

Signed-off-by: Drew Richardson <drew.richardson@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-07 19:57:02 +01:00
Gregory CLEMENT 998ef5d81c ARM: 8408/1: Fix the secondary_startup function in Big Endian case
Since the commit "b2c3e38a5471 ARM: redo TTBR setup code for LPAE",
the setup code had been reworked. As a result the secondary CPUs
failed to come online in Big Endian.

As explained by Russell, the new code expected the value in r4/r5 to
be the least significant 32bits in r4 and the most significant 32bits
in r5. However, in the secondary code, we load this using ldrd, which
on BE reverses that.

This patch swap r4/r5 after the ldrd. It is done using the xor
instructions in order to not use a temporary register.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-08-07 19:57:02 +01:00
Alexandre Belloni 761c5867ef ARM: at91/dt: sama5d2: use slow clock where necessary
The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it to the currently
defined nodes.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 17:33:54 +02:00
Nicolas Ferre 921f9a6ca5 ARM: at91/dt: at91sam9x5dm: add QT1070 touch button controller
The display module for at91sam9x5-ek has a few touch buttons, add support
for those.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 17:33:54 +02:00
Alexandre Belloni 8cf5938713 ARM: at91/dt: at91sam9x5dm: add support for the touschscreen
The display module on the at91sam9x5-ek has a resistive touchscreen, add
it.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 17:33:53 +02:00
Bo Shen a437fc59e8 ARM: at91/dt: add drm support for at91sam9n12ek
Add drm support for at91sam9n12ek board.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 17:33:53 +02:00
Boris Brezillon 432a4a82d0 ARM: at91/dt: enable lcd support for at91sam9x5 SoCs
Use the at91sam9x5 display module dtsi in the relevant board dts.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 17:33:47 +02:00
Boris Brezillon 0171d1d8cf ARM: at91/dt: add at91sam9x5-ek Display Module dtsi
All the at91sam9x5-ek share the share display module, add a dtsi to
describe it.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 17:33:24 +02:00
Boris Brezillon c052a72ade ARM: at91/dt: include lcd dtsi in at91sam9x5 dtsis
Actually make use of at91sam9x5_lcd.dtsi in the relevant SoC dtsis.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 17:33:06 +02:00
Boris Brezillon eeff040ab2 ARM: at91/dt: define hlcdc node in at91sam9x5_lcd.dtsi
Define at91sam9x5 hlcdc node for the SoCs with an LCD controller.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 17:32:45 +02:00
Alexandre Belloni 16fd6572e4 ARM: at91/dt: sama5d4: use slow clock where necessary
The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it where necessary.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:58:48 +02:00
Alexandre Belloni 288fb7ff8e ARM: at91/dt: sama5d3: use slow clock where necessary
The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it where necessary.

[boris.brezillon@free-electrons.com: add tcb clocks]
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:58:45 +02:00
Alexandre Belloni 39c6491505 ARM: at91/dt: at91sam9x5: use slow clock where necessary
The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it where necessary,
The LCD PWM will be handled later.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:58:40 +02:00
Alexandre Belloni 8c945b7e4e ARM: at91/dt: at91sam9rl: use slow clock where necessary
The watchdog, the reset controller, the RTC, the real-time timer, the
shutdown controller and the timer counter need the slow clock, add it where
necessary.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:58:35 +02:00
Alexandre Belloni 67451069d4 ARM: at91/dt: at91sam9n12: use slow clock where necessary
The watchdog, the reset controller, the RTC, the shutdown controller, the
timer counters and the LCD PWM need the slow clock, add it where necessary.
The LCD PWM will be handled later.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:58:31 +02:00
Alexandre Belloni 6b2717928c ARM: at91/dt: at91sam9g45: use slow clock where necessary
The watchdog, the reset controller, the RTC, the real-time timer, the
shutdown controller and the timer counters need the slow clock, add it
where necessary.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:58:26 +02:00
Alexandre Belloni 53b0b37852 ARM: at91/dt: at91sam9263: use slow clock where necessary
The watchdog, the reset controller, the two real-time timers, the shutdown
controller and the timer counter need the slow clock, add it where
necessary.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:58:21 +02:00
Alexandre Belloni 547eab90f9 ARM: at91/dt: at91sam9261: use slow clock where necessary
The watchdog, the reset controller, the real-time timer, the shutdown
controller and the timer counter need the slow clock, add it where
necessary.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:58:16 +02:00
Alexandre Belloni d0c7faba1f ARM: at91/dt: at91sam9260: use slow clock where necessary
The watchdog, the reset controller, the real-time timer, the shutdown
controller, the timer counters need the slow clock, add it where necessary.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:57:47 +02:00
Alexandre Belloni 07e15f2155 ARM: at91/dt: at91rm9200: use slow clock where necessary
The system timer, the RTC and the timer counters need the slow clock, add
it.

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-07 11:57:41 +02:00
Tony Lindgren 9610c8abd2 ARM: OMAP2+: Fix power domain operations regression caused by 81xx
I managed to mess up omap3 power domain operations with commit
7c80a3f89c ("ARM: OMAP2+: Add custom prwdm_operations for 81xx
to support dm814x"), by default we should keep on using the
omap3_pwrdm_operations, only 81xx needs custom handling.

This causes omap3 PM to break so we won't hit off mode any longer
causing idle power consumption go up from less than 10mW to over
50 mW.

Fixs: 7c80a3f89c ("ARM: OMAP2+: Add custom prwdm_operations for
81xx to support dm814x")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 22:09:40 -07:00
Benjamin Cama 15979aeeb5 ARM: dts: Convert Linkstation Mini to Device Tree
The title says it all. The name of the dts file as been changed to
better reflect the manufacturer's device name (LS-WSGL), rather than
the original "lsmini", which exists in a kirkwood version too.

[gregory.clement@free-electrons.com]: use tab instead of space to
indent dts at line 185. Reslove merge conflict with patch "ARM: dts:
orion5x: add buffalo linkstation ls-wtgl" in the file
arch/arm/boot/dts/Makefile.

Signed-off-by: Benjamin Cama <benoar@dolka.fr>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Alexey Kopytko <alexey@kopytko.ru>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-08-06 18:51:29 +02:00
Heiko Stuebner 9bb91ae970 ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
PMU_GPIOINT_WAKEUP_EN seems needed when entering the shallow suspend
(with logic staying on) but does not seem to be needed for the deep
suspend for unknown reasons.
Testing revealed that this setting really is necessary to reliably
resume the veyron devices from suspend.

Reported-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-06 13:05:14 +02:00
Heiko Stuebner d1d3a1a1d7 ARM: rockchip: set correct stabilization thresholds in suspend
Currently the stabilization thresholds for the oscillator and external pmu
are statically set to 30ms based on a 32kHz clock rate. This leaves out the
case when we don't switch to the 32kHz clock when only entering the shallow
suspend mode where the logic keeps running.

So, set the correct threshold after we have determined if we switch to the
32kHz clock or stay with the 24MHz one. Also set the oscillator-
stabilization to 0 if it is kept running during suspend, as it of course
does not need to stabilize then.

Reported-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-06 13:05:12 +02:00
Heiko Stuebner 41fe6a0172 ARM: rockchip: rename osc_switch_to_32k variable
The variable name is misleading, as the deep suspend mode always switches
the main supplying clock to the 32kHz source. Additionally the main
oscillator remains running in some cases, which this var indicates.

So rename it to osc_disable to clarity.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-06 13:05:09 +02:00
Anthoine Bourgeois ed05637c30 ARM: dts: omap3-devkit8000: Add ADS7846 Touchscreen support
This patch is the touchscreen part for LCD screens sold with devkit8000
board.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 02:43:09 -07:00
Lucas Stach 1a9fa19095 ARM: imx6: correct i.MX6 PCIe interrupt routing
The PCIe interrupts are also routed through the GPC. This has been
missed from the conversion to stacked IRQ domains as the PCIe
controller uses an explicit interrupt map and thus doesn't inherit
the SoC global interrupt parent.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Cc: <stable@vger.kernel.org> # 4.1
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-06 16:30:18 +08:00
Olof Johansson d304f99c9c Allwinner defconfig changes for 4.3
Two patches that enable various Allwinner related drivers drivers both in
 sunxi_defconfig and in multi_v7_defconfig
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVvdfTAAoJEBx+YmzsjxAgzisQAIOaRrW9+/m+u10n9vRXttt/
 cgcSMfWyII2AZlYobH8EKaRS3HYcN4Dv5iinShJuMB9O6ScX6/rp3Oc+cy67vpOT
 N++B9Fyg17k0LVMnnfBhiVncLvJje33Ducucxyiw1sGZjlY15HBFI99PkQo+SCMa
 xYjbqoyIf/r0jIFyV4EkN+O0gzaIeXFm6KcqwVRkBDSeK7aItFrWg/g/8O45W3t+
 eK2OZwXALny1puB6VUgSGilTaCl+DXdagsDuXYjgSV1VfA1iohfNx0Y9nu3o3Ed+
 buxLaZtmdTejS6bNbfyDFd6LJxLZpRQ2T8XXnNXw8sohaglchkMsobuuqITaQX5g
 IF1RiYXzIdzFiH/JPFiL9OPYa4nGtxD4ntr0HBK41EK5PqRGNE+u7MOT+Uw+8Ouq
 AJJWTnSc18sDep7Y23zgFLk7r4d1Lproino531sokJiJpbG9uFd0dnWxEGtofPMG
 lhXQvIwzveEQvrOgQM+wCgnSSbmfuDI4jnsmYfLqMtRSCazwv64Pa1ESZtvXV1Au
 WfDjecL0/V7FwFf1BsEW3MOfE3TdyY8vW9urfY3ewZKsmwwlimv82QdMrua6p4nA
 ou67eVlkdnkZ7/Nxx2/MBqP+VqmOjm/6ovfm/Udih+AwWX7TFQGKFLFQFSujn6Wi
 AxJ5RxBRlhNbGCgNPkH0
 =SkuD
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-defconfig-for-4.3' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/defconfig

Allwinner defconfig changes for 4.3

Two patches that enable various Allwinner related drivers drivers both in
sunxi_defconfig and in multi_v7_defconfig

* tag 'sunxi-defconfig-for-4.3' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  ARM: multi_v7_defconfig: Enable Allwinner P2WI, PWM, DMA_SUN6I, cryptodev
  ARM: sunxi_defconfig: Enable DMA_SUN6I, P2WI, PWM, cryptodev, EXTCON, FHANDLE

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-06 10:12:52 +02:00
Olof Johansson da5df64408 Allwinner Device Tree changes for 4.3
A bunch of device tree patches that:
   - Enable the OTG controller on some boards
   - Various additions to the existing boards
   - New boards: A33 Ippo Q8H, Iteaduino Plus,
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVvdvyAAoJEBx+YmzsjxAghkoP/juCUozcmMZ8msZxg8Wp/Vlc
 NO/8jCjktcysoagQT0iOS8AlhzWlms4dxvEKb7iMXo3LI/mkkI1HR4eb79nw15/k
 ZjzKUAzqQV1qKTtP5yuxJ1wMDUkFtNaAOQVlieAzdtSNxkbtwvCw4jJe3U0vxm2t
 P58Uf5hrDTZ8QjD4ta4bdwC1Vfr1AsOz7CEiVaPvdHqu0o6Z7eA6eDnGl5H2czB4
 Co7FCo6SanvCsIEbPl7nr02lgAcaKC7xv84sfiPnw272KrSs4Wg8OC5DLTmJBCgh
 8fobYbWtTETMYmPIgJaIX1tYRWrrtBKj93P3pgZj0o5rW4wh7e14g9uwdZSWLx9v
 1mcIAtS6PKvChA5sLZgBJRarDZSX5anPIbIgkn92rnQ3oNnnulFeH9of9vk8eO6h
 lZnSldn4vdgTbc/EthsluRHcBhntCxTyUJ384cNzz+MsC3JASinvoYKg8Nz4XV8L
 ztdBMExepn5N3C94IuSQ06WCilaq6++6JSvFrIFNipF8TcSkF4ox0raEzmZP6VFR
 lLgXoWX88/RZUNa0I4eRhdDm4LwCXBFarE8eFPNktXSZ66ikL99j3mtVff57kdzu
 YOd7eIBZlvtytl48iPOfL90pPWxPhW7Q74ZgktJuL1Zkj12bjibJIRhepaKg1eYP
 Dq75e+ceW+5ZLptod7uK
 =ebRO
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-dt-for-4.3' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt

Allwinner Device Tree changes for 4.3

A bunch of device tree patches that:
  - Enable the OTG controller on some boards
  - Various additions to the existing boards
  - New boards: A33 Ippo Q8H, Iteaduino Plus,

* tag 'sunxi-dt-for-4.3' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (35 commits)
  ARM: dts: sun7i: Change cubietruck wifi enable pin to use mmc-pwrseq
  ARM: dts: sun5i: hsg-h702: Enable USB OTG controller
  ARM: dts: sun5i: hsg-h702: Enable side volume buttons with LRADC
  ARM: dts: sun8i: Enable USB DRC on Ippo Q8H-A33 tablet
  ARM: dts: sun5i: Enable USB DRC on A13 OLinuxIno
  ARM: dts: sun5i: Enable USB DRC on A10s OLinuxIno Micro
  ARM: dts: sun4i: Enable USB DRC on A10 OLinuxIno Lime
  ARM: sunxi: dt: Convert users to the PIO interrupts binding
  ARM: dts: sun4i: Add Iteaduino Plus A10
  ARM: dts: A10s-OLinuxIno: Add a node for axp152 pmic
  ARM: dts: axp152: Add a dtsi file for the axp152 pmic
  ARM: dts: sun6i: Enable otg controller on the cs908
  ARM: dts: sun4i: Enable otg controller on the mini-x
  ARM: dts: sun4i: Enable otg controller on the ba10-tvbox
  ARM: dts: sunxi: Add regulator-boot-on to usb host port regulator nodes
  devicetree: Add msi to the vendor-prefix list
  ARM: sun8i: dts: Add Ippo-q8h v1.2 with A33
  ARM: dts: sun8i: sina33: Enable USB hosts
  ARM: dts: sun8i: Enable USB host on GA10H-A33 tablets
  ARM: dts: sun8i: Enable USB DRC on GA10H-A33 tablets
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-06 10:12:13 +02:00
Linus Walleij c00def71ef ARM: ux500: simplify secondary CPU boot
This removes a lot of ancient cruft from the Ux500 SMP boot.
Instead of the pen grab/release, just point the ROM to
secondary_boot() and start the second CPU there, then send
the IPI.

Use our own SMP enable method. This enables us to remove the
last static mapping and get both CPUs booting properly.

Tested this and it just works.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-06 10:11:44 +02:00
Olof Johansson 58e00a6c92 Merge branch 'fixes' into next/cleanup
* fixes: (28 commits)
  ARM: ux500: add an SMP enablement type and move cpu nodes
  ARM: dts: keystone: fix dt bindings to use post div register for mainpll
  ARM: nomadik: disable UART0 on Nomadik boards
  ARM: dts: i.MX35: Fix can support.
  ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
  ARM: dts: add CPU OPP and regulator supply property for exynos4210
  ARM: dts: Update video-phy node with syscon phandle for exynos3250
  ARM: keystone: dts: rename pcie nodes to help override status
  ARM: keystone: dts: fix dt bindings for PCIe
  ARM: pxa: fix dm9000 platform data regression
  ARM: DRA7: hwmod: fix gpmc hwmod
  ARM: dts: Correct audio input route & set mic bias for am335x-pepper
  ARM: OMAP2+: Add HAVE_ARM_SCU for AM43XX
  MAINTAINERS: digicolor: add dts files
  ARM: ux500: fix MMC/SD card regression
  ARM: ux500: define serial port aliases
  ARM: dts: OMAP5: Add #iommu-cells property to IOMMUs
  ARM: dts: OMAP4: Add #iommu-cells property to IOMMUs
  ARM: dts: Fix frequency scaling on Gumstix Pepper
  ARM: dts: configure regulators for Gumstix Pepper
  ...
2015-08-06 10:11:36 +02:00
Linus Walleij bf64dd262e ARM: ux500: add an SMP enablement type and move cpu nodes
The "cpus" node cannot be inside the "soc" node, while this
works for the CoreSight blocks, the early boot code will look
for "cpus" directly under the root node, so this is a hard
convention. So move the CPU nodes.

Augment the "reg" property to match what is actually in the
hardware: 0x300 and 0x301 respectively.

Then add an SMP enablement type to be used by the SMP init
code, "ste,dbx500-smp".

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-06 10:10:34 +02:00
Olof Johansson ff20775d18 Renesas ARM Based SoC Marzen Board Removal for v4.3
* Remove legacy r8a7779 SoC code
 * Remove legacy marzen board code
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJVvwN/AAoJENfPZGlqN0++xRUP/1lVK2q2ixR2B/7jqPyvcrai
 6RwXT99cwGSpUe7X7AcpWRW39EhRmt89ZPlQvkLF/Ylx9+XUBG3lsyIoaa40YW6x
 mNvbiKTJCFILh7K4YshibFtJPzj7sL+Vhy8xV6zVIBn5oA9rSBfEteTUt5JWik0b
 2QZYZix8STU52k/djQ4vUbAwJfFNwmO4PDqY9B/XXE5a9ETUeEPecBB94xaJCyv+
 ULFmPEHxfvdUug2tLJUTazdtDgQlxRczZ7vYMKpmUeQTPTvx/2L3scz36JpjTFx9
 +U1KSPUzUKwonhS9/TEAeqbU1hDkOvIx7d9lJgd2zxnMrwCyTuJuvmaFV8dZlftu
 8v5cTbdr8InLVdqDM4GzjrL5RhPl1F3MYtfUdT50duzcRTiwyOkKCbjQakV2rgKZ
 aQp4RdDxl1DBlqxyYW16o9Q5figecfqsxzNvAmveM+GOA19a2h9hLNTotZUvDGCC
 AXFrdXMCwzxpIy/LeWcIDs5ycHE0hrD1y68vH4vJp3pWr+dJ0p+QUgjtK5poXvLe
 9RJnYtqJ0cXaYZj0DR64X3TUB2VpCbnK2pNv1/O1TJysiRUGlffRohaGv/UC5am2
 y/kRYOX3qay0a60wWkGQzm/cMB4Zg8fa0ktXj5W/PIhGBLYXTPIQHkSfdFjpkyR6
 WVXodsZdANGIlwQSCeLa
 =VPyl
 -----END PGP SIGNATURE-----

Merge tag 'renesas-marzen-board-removal-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup

Renesas ARM Based SoC Marzen Board Removal for v4.3

* Remove legacy r8a7779 SoC code
* Remove legacy marzen board code

* tag 'renesas-marzen-board-removal-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7779: Remove legacy SoC code
  ARM: shmobile: marzen: Remove legacy board code
  ARM: shmobile: r8a7779: Cleanup header file
  ARM: shmobile: marzen-reference: Remove C board code
  ARM: shmobile: r8a7779: Generic SMP ops
  ARM: shmobile: r8a7779: Generic CCF and timer support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-06 10:09:08 +02:00
Anthoine Bourgeois 98c6d5552d ARM: dts: omap3-devkit8000: add LCD panels
Devkit8000 was sold with a 4.3" LCD or 7.0" or without. This patch
creates one dts file per bundle.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 00:37:41 -07:00
Anthoine Bourgeois b02f46b9e0 ARM: dts: omap3-devkit8000: Add DSS' DVI support
This commit adds the support of DVI output on the devkit8000 board.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
[tony@atomide.com: added missing sign as noted by Anthoine]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 00:36:55 -07:00
Anthoine Bourgeois f1022b9ce1 ARM: dts: omap3-devkit8000: Add S-video output support
This commit adds the support of TV output on the devkit8000 board.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
[tony@atomide.com: added missing sign as noted by Anthoine]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 00:35:08 -07:00
Anthoine Bourgeois 26fa892392 ARM: dts: omap3-devkit8000: Add keymap support
The keymap is convert in devicetree from the legacy board file.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
[tony@atomide.com: added missing sign as noted by Anthoine]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 00:33:43 -07:00
Anthoine Bourgeois f67879078f ARM: dts: omap3-devkit8000: Add PMU stat support
This patch declares the LEDB usage to the PMU stat monitor.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
[tony@atomide.com: added missing sign as noted by Anthoine]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 00:32:58 -07:00
Anthoine Bourgeois ab00639e77 ARM: dts: omap3-devkit8000: Add user button support
This patch links the user button to the BTN_EXTRA action.

Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
[tony@atomide.com: added missing sign as noted by Anthoine]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 00:27:27 -07:00
Dave Gerlach 1e9f747400 ARM: dts: am437x-gp-evm: Add regulator-always-on and regulator-boot-on for RTC DCDCs
DCDC5 and DCDC6 supply rtc and need to be on for accessing the module.

On A1 revision of the TPS65218, FSEAL bit would be undefined without
coin-cell present which in many cases led to it being set, causing DCDC5
and DCDC6 to stay active, but also leading to unexplained failures when
it was not. On B1 revision, FSEAL is always 0 when no coin-cell is present
so this patch is required on boards with B1 revision to ever work. This
implementation works on boards with either A1 or B1 revision and makes
sure that DCDC5 and DCDC6 always stay active.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 00:27:27 -07:00
Keerthy 5d9ef0cf28 ARM: dts: AM4372: Reorder the rtc compatible string
Compared to da830-rtc compatibility am3352-rtc is more compatible to
the one in am437x. Hence adding the am3352-rtc compatible to cover the
entire feature set.

The ti,am4372-rtc has no Documentation and not used even in the driver
hence removing it.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 00:27:20 -07:00
Joachim Eastwood 027b4a6d6a ARM: dts: lpc4350-hitex-eval: add emc pins and static memory devices
Setup the emc pins used by external memory devices and add
configuration for the devices found on the Hitex eval board.

The Hitex eval board has a NOR Flash attached to chip select 0
and 512 kB of SRAM on chip select 2.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:33 +02:00
Ariel D'Alessandro aceacfa6ac ARM: dts: lpc4350-hitex-eval: add ethernet
Enable Ethernet and add pin muxing and set the correct
frequency on the enet tx clock input.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:30 +02:00
Ariel D'Alessandro 5e6472001e ARM: dts: lpc4350-hitex-eval: add pinctrl and uart0 muxing
Setup pin muxing and properties for the debug console on uart0.

Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:26 +02:00
Joachim Eastwood 41a0dec916 ARM: dts: lpc4357-ea4357: add mmio-gpio leds
Hook up LEDs on the outputs from the D-type flip-flop found on
the address/data bus.

Note that the LEDx label in the schematics is reversed in regard
to the bits on the data bus. Hence the reverse ordering used here.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:24 +02:00
Joachim Eastwood 3c6abb97f3 ARM: dts: lpc4357-ea4357: add emc pins and static memory devices
Setup the emc pins used by external memory devices and add
configuration for the devices found on the EA4357 devkit.

The EA4357 devkit has a NOR Flash attached to chip select 0
and a D-type flip-flop used for LEDs on chip select 2.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:20 +02:00
Joachim Eastwood fd0cb235df ARM: dts: lpc4357-ea4357: add usb0
Enable USB0 on the EA4357 devkit and setup the required USB0
control pins.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:18 +02:00
Joachim Eastwood 50016385c2 ARM: dts: lpc18xx: add pl172 memory-controller node
All devices in the LPC18xx/43xx familiy contain a ARM PL172
MultiPort Memory Controller (MPMC).

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:16 +02:00
Joachim Eastwood 9cf6267d16 ARM: dts: lpc18xx: add pl111 lcd controller node
NXP LPC185x and LPC435x/70 devices contain a ARM PL111 lcd controller.

Signed-off-by: Joachim Eastwood <joachim.eastwood@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:13 +02:00
Joachim Eastwood 6d6d6b559f ARM: dts: lpc18xx: add usb otg phy node
Add the USB OTG phy under the CREG syscon node and attach it to
the USB0 EHCI controller.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 19:30:11 +02:00
Greg Kroah-Hartman 0a1b6f6319 phy: for 4.2-rc6
*) Fix compiler error when sun4i usb phy driver is built as module
 *) Fix SATA Lockup issue in dra7 SoC
 
 Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJVwOpCAAoJEA5ceFyATYLZTikP/17trNhiyCOL8s0ok1pbBR+B
 9ilzq7dOuVPrQUdvJycpH6DdajsuUN0GzzftjkN2h96v2ck2yVb8RgnhPB2aGKJm
 Nb/UTPgX1GUaRNQ/iZaKvDtSUjxQm3JWIaf06hC8rvd0D0k4WOvMxYJpHbGliBOf
 EPps3LZtnZn89htJniOUSDByrigTvfeWpKzU2guafoIEURNf6wGEYcCxOlYw9ST6
 W8LnSA5kkc3beRaGkNSzoQfq3zFJKF+8mPDARoiX6hBg+3oe9RmodIBKpD2Vl08k
 Y0eXtXhICxxqlGqRL71gfRXWDqNY9aMhXS0A/dyNvX2tDnXXNQF/Rjsxs+EPR0Td
 tFrwU/IzySmlCj4hrCEvImZnk1whe/kvsoHSXY7HSSVlXVQ/Nv5DulfxC8A8Nwx6
 v6fj3+3jwJRJnQgs1/PwYGpYFDh4L7dJRWKULjiilXeyhT9UJlH1IknjK1lhNdxg
 lIEEgckNTnBoU0cnW/7FEdbqnt562DLiZYSmXwKHffPrY4nCaaOMKz+Y0WAs+StW
 A+tDe+myPElGmJ01N8MF3QRpXFSdH8/06OJl5W4KhBXKMZXikMq2yZ4SpVdTiYfp
 4Nyiv1lblqwslESl3ru6KbcjUGkamnTXKA5p6u5/D5l+ACXgYkKsNZFN4gRwXpKi
 J/VGHy/PTOBo0W1saBuS
 =j6wu
 -----END PGP SIGNATURE-----

Merge tag 'phy-for-4.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-linus

Kishon writes:

phy: for 4.2-rc6

*) Fix compiler error when sun4i usb phy driver is built as module
*) Fix SATA Lockup issue in dra7 SoC

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-08-05 10:12:23 -07:00
Russell King 44e259ac90 ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets
The PMU device contains an interrupt controller, power control and
resets.  The interrupt controller is a little sub-standard in that
there is no race free way to clear down pending interrupts, so we try
to avoid problems by reducing the window as much as possible, and
clearing as infrequently as possible.

The interrupt support is implemented using an IRQ domain, and the
parent interrupt referenced in the standard DT way.

The power domains and reset support is closely related - there is a
defined sequence for powering down a domain which is tightly coupled
with asserting the reset.  Hence, it makes sense to group these two
together, and in order to avoid any locking contention disrupting this
sequence, we avoid the use of syscon or regmap.

This patch adds the core PMU driver: power domains must be defined in
the DT file in order to make use of them.  The reset controller can
be referenced in the standard way for reset controllers.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-08-05 18:36:49 +02:00
Russell King cba3bbcba4 ARM: dt: dove: add GPU power domain description
Add the description of the GPU power domain to the PMU DT entry.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-08-05 18:34:30 +02:00
Russell King 7c2293f523 ARM: dt: dove: add video decoder power domain description
Add the description of the video decoder power domain to the PMU DT
entry.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-08-05 18:33:27 +02:00
Russell King 71296a39c5 ARM: dt: dove: wire up RTC interrupt
Now that we have a PMU driver, we can wire up the RTC interrupt in the
DT description for Dove.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-08-05 18:32:55 +02:00
Russell King 8e7c6a3269 ARM: dt: Add PMU node, making PMU child devices childs of this node
Add the PMU node, and move the child devices of the PMU node beneath
this new node, giving it a "simple-bus" so that the OF platform
device creator will create these child devices.  No functional change
from this is expected.

The PMU provides multiple features, including an interrupt, reset,
power and isolation controller.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-08-05 18:31:17 +02:00
Olof Johansson 39aa437e18 Merge branch 'queue/irq/arm' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into next/cleanup
Merge "ARM: Interrupt cleanups and API change preparation" from Thomas
Gleixner:

The following patch series contains the following changes:

    - Consolidation of chained interrupt handler setup/removal

    - Switch to functions which avoid a redundant interrupt
      descriptor lookup

    - Preparation of interrupt flow handlers for the 'irq' argument
      removal

* 'queue/irq/arm' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  ARM/orion/gpio: Prepare gpio_irq_handler for irq argument removal
  ARM/pxa: Prepare balloon3_irq_handler for irq argument removal
  ARM/pxa: Prepare *_irq_handler for irq argument removal
  ARM/dove: Prepare pmu_irq_handler for irq argument removal
  ARM/sa1111: Prepare sa1111_irq_handler for irq argument removal
  ARM/locomo: Prepare locomo_handler for irq argument removal
  ARM, irq: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc
  ARM/LPC32xx: Use irq_set_handler_locked()
  ARM/irq: Use access helper irq_data_get_affinity_mask()
  ARM/locomo: Consolidate chained IRQ handler install/remove
  ARM/orion: Consolidate chained IRQ handler install/remove

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 17:24:11 +02:00
Andy Sun 2cd212427f ARM: dts: atlas7: add a GPIO key for rearview button
Touching this key will trigger a camera event for rearview.

Signed-off-by: Andy Sun <Andy.Sun@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:21 +08:00
Huayi Li 627830756d ARM: dts: atlas7: put pinctl property to get pinmux for NAND
Nand controller often share some pins with sd/mmc controller on
atlas and prima series, nand node can be disabled if the pins are
used by sd/mmc controller.

Signed-off-by: Huayi Li <huayi.li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:21 +08:00
Yonghui Zhang 4e881aa890 ARM: dts: atlas7: add software digital radio nodes and its DMA channels
this patch adds SDR(software digital raio) nodes and the DMA channels
for it.

Signed-off-by: Yonghui Zhang <yonghui.zhang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:20 +08:00
Guo Zeng 5e3773b2b8 ARM: dts: atlas7: add lost PWM node
this patch adds lost PWM node, and also fixes the ranges of its
parent node.

Signed-off-by: Guo Zeng <guo.zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:20 +08:00
Dongli Li d9615f8bf5 ARM: dts: atlas7: add lost G2D node
this patch adds lost G2D node, and also fixes the range of its
parent node.

Signed-off-by: Dongli Li <Kasin.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:20 +08:00
Xiaofeng Fei f3a19caa52 ARM: dts: atlas7: add multimedia codec node
this patch adds multimedia video codec node, and also fixes the
ranges of its parent node.

Signed-off-by: Xiaofeng Fei <xiaofeng.fei@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:19 +08:00
Qipan Li d015642e12 ARM: dts: atlas7: add alias name for spi device
spi framework can use alias name of spi device to retrieve the bus id,
so bus id will not be dynamical but statical and it will be easier for
test for a specified spi device with a fixed name like use spidev.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:19 +08:00
Ye He 153645b3e0 ARM: dts: atlas7: add lost gmac node
this patch adds lost ethernet gmac node, and also fix the ranges of
its parent node.

Signed-off-by: Ye He <ye.he@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:18 +08:00
Ye He c95c621157 ARM: dts: atlas7: add performance monitor unit node
Signed-off-by: Ye He <ye.he@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:18 +08:00
Lily.Li 81a85f9ebc ARM: dts: atlas7: add lost jpeg node
this patch adds lost jpeg node, and also fix the ranges of its
parent node.

Signed-off-by: Lily.Li <Lily.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2015-08-05 22:44:18 +08:00
Fugang Duan 709bc0657f ARM: imx6ul: add fec MAC refrence clock and phy fixup init
Add FEC MAC refrence clock init.
Add phy fixup init for i.MX6ul 14x14 evk board that installs KSZ8081 phy.
For the phy, there needs extra phy fixup for MII and RMII mode.

Signed-off-by: Fugang Duan <b38611@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-05 20:52:11 +08:00
Roger Quadros eb157c81d0 ARM: dts: am437x-gp-evm: Add eMMC support
Add eMMC pinmux and mmc2 related bits. We keep the mmc2
controller disabled as it conflits with gpmc/NAND.

To enable emmc, simply set mmc2 controller node to "okay"
and set the gpmc node to "disabled" and change the
SelEMMCorNAND gpio-hog to output-high.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:58:27 -07:00
Roger Quadros 50336f5127 ARM: dts: am437x-gp-evm: Add gpio-hog for configuring eMMC/NAND driver
On this board either eMMC or NAND can work based on the level of
spi2_cs0.gpio0_23. Add a gpio-hog to enable configuration of this
pin in the device tree.

Move pinmux for spi2_cs0 (SEL_eMMCorNANDn) out of
NAND node into gpio0 so it is initialized with gpio0.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:58:27 -07:00
Kishon Vijay Abraham I d62ce9ffd8 ARM: dts: dra72-evm: Fix spurious card insert/removal interrupt
ldo1_reg in addition to being connected to the io lines is also
connected to the card detect line. On card removal, omap_hsmmc
driver does a regulator_disable causing card detect line to be
pulled down. This raises a card insertion interrupt and once the
MMC core detects there is no card inserted, it does a
regulator disable which again raises a card insertion interrupt.
This happens in a loop causing infinite MMC interrupts.

Fix it by making ldo1_reg as always_on.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:53:19 -07:00
Kishon Vijay Abraham I 9f04ceebe2 ARM: dts: dra7-evm: Fix spurious card insert/removal interrupt
ldo1_reg in addition to being connected to the io lines is also
connected to the card detect line. On card removal, omap_hsmmc
driver does a regulator_disable causing card detect line to be
pulled down. This raises a card insertion interrupt and once the
MMC core detects there is no card inserted, it does a
regulator disable which again raises a card insertion interrupt.
This happens in a loop causing infinite MMC interrupts.

Fix it by making ldo1_reg as always_on.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:53:19 -07:00
Kishon Vijay Abraham I 29d632c8bb ARM: dts: am57xx-beagle-x15: mmc1: remove redundant pbias-supply property
pbias-supply is initialized in dra7.dtsi. Remove redundant initialization
of pbias-supply from MMC1 dt node in am57xx-beagle-x15.dts

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:52:51 -07:00
Nishanth Menon f4eaf9e048 ARM: dts: dra7-evm: Add MMCSD card removal GPIO
SDMMC Card Detect can be used over default GPIO map.

Reported-by: Yan Liu <yan-liu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:50:43 -07:00
Kishon Vijay Abraham I e23b27dbf8 ARM: dts: dra72-evm: Set max clock frequency of MMC1 and MMC2
MMC1 supports SDR104 and MMC2 supports HS200 both of which requires
192MHz clock. Set the maximum operating clock frequency to 192 MHz.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:50:43 -07:00
Balaji T K 4b93521587 ARM: dts: dra7-evm: add evm_3v3_sd regulator
Add a node for evm_3v3_sd using onboard pcf GPIO expander which feeds
on to mmc vdd.

Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o lines.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:50:42 -07:00
Kishon Vijay Abraham I a238707d98 ARM: dts: dra72-evm: add evm_3v3_sd regulator
Add a node for evm_3v3_sd using pcf which feeds on to mmc vdd.
Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o lines.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:50:42 -07:00
Suman Anna c9ab94dfd2 ARM: dts: AM4372: Add the wkup_m3_ipc node
Add the Wakeup M3 IPC device node for the wkup_m3_ipc driver on
AM4372 SoC. This node uses the IPC registers, part of the Control
Module, and is therefore added as a child of the scm node.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-05 03:29:51 -07:00