Commit Graph

2884 Commits

Author SHA1 Message Date
Qianggui Song 1713a8de4a dt-bindings: gpio: Add a header file for Amlogic Meson S4
Add a new dt-binding header file which documents the detail pin names.

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qianggui Song <qianggui.song@amlogic.com>
Link: https://lore.kernel.org/r/20220113031044.2665-3-qianggui.song@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-30 02:52:45 +01:00
Giulio Benetti a81595729b dt-bindings: imx: Add clock binding for i.MXRT1050
Add the clock binding doc for i.MXRT1050.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Jesse: added clocks from IMXRT1050_CLK_IPG_PDOF to
IMXRT1050_CLK_DMA_MUX and moved IMXRT1050_CLK_END on]
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220111215415.2075257-4-Mr.Bossman075@gmail.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2022-01-29 15:12:06 +02:00
Sergio Paracuellos f383b07706 dt-bindings: reset: add dt binding header for Mediatek MT7621 resets
Add dt binding header for resets lines in Mediatek MT7621 SoCs.

Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220110114930.1406665-2-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-26 13:04:46 +01:00
Alim Akhtar d6dc675377 dt-bindings: clock: Add bindings definitions for FSD CMU blocks
Clock controller driver of FSD platform is designed to have separate
instances for each particular CMU. So clock IDs in this bindings header
also start from 1 for each CMU block.

Cc: linux-fsd@tesla.com
Reported-by: kernel test robot <lkp@intel.com>
[robot: reported missing #endif]
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-3-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-01-26 10:21:39 +01:00
Daniel Mack 68643c3735 dt-bindings: clock: cs2000-cp: document aux-output-source
This new optional property can be used to control the function of the
auxiliary output pin. Introduce a new dt-bindings include file that
contains the numerical values.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220125093336.226787-3-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-25 14:23:15 -08:00
Tudor Ambarus a5ab04af49 clk: at91: sama7g5: Allow MCK1 to be exported and referenced in DT
MCK1 feeds the External Bus Interface (EBI). EBI's clock rate is used
to translate EBI's timmings to SMC timings, thus we need to handle MCK1
in the EBI driver. Allow MCK1 to be referenced as a PMC_TYPE_CORE clock
from phandle in DT.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220111125310.902856-1-tudor.ambarus@microchip.com
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24 17:05:45 -08:00
Zixun LI ea2be22f3d clk: at91: allow setting PMC_AUDIOPINCK clock parents via DT
Make AUDIOPINCK accessible via phandle to select it
as peripheral clock parent using assigned-clock-parents in DT
where available.

Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Claudiu Beznea <Claudiu.Beznea@microchip.com>
Link: https://lore.kernel.org/r/20220111142051.37957-1-admin@hifiphile.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24 17:05:34 -08:00
Daire McNamara 2145bb687e dt-bindings: clk: microchip: Add Microchip PolarFire host binding
Add device tree bindings for the Microchip PolarFire system
clock controller

Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211216140022.16146-2-conor.dooley@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-24 16:25:59 -08:00
Ariel D'Alessandro 6045ffd366
ASoC: tlv320aic31xx: Define PLL clock inputs
Add constants for the different PLL clock inputs in tlv320aic31xx.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Link: https://lore.kernel.org/r/20220117132109.283365-3-ariel.dalessandro@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24 13:31:53 +00:00
Ariel D'Alessandro 85f856f790
ASoC: Rename tlv320aic31xx-micbias.h as tlv320aic31xx.h
Let's use a more generic name, so other definitions for tlv320aic31xx
can be included.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220117132109.283365-2-ariel.dalessandro@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-01-24 13:31:52 +00:00
Linus Torvalds 3bad80dab9 Char/Misc and other driver changes for 5.17-rc1
Here is the large set of char, misc, and other "small" driver subsystem
 changes for 5.17-rc1.
 
 Lots of different things are in here for char/misc drivers such as:
 	- habanalabs driver updates
 	- mei driver updates
 	- lkdtm driver updates
 	- vmw_vmci driver updates
 	- android binder driver updates
 	- other small char/misc driver updates
 
 Also smaller driver subsystems have also been updated, including:
 	- fpga subsystem updates
 	- iio subsystem updates
 	- soundwire subsystem updates
 	- extcon subsystem updates
 	- gnss subsystem updates
 	- phy subsystem updates
 	- coresight subsystem updates
 	- firmware subsystem updates
 	- comedi subsystem updates
 	- mhi subsystem updates
 	- speakup subsystem updates
 	- rapidio subsystem updates
 	- spmi subsystem updates
 	- virtual driver updates
 	- counter subsystem updates
 
 Too many individual changes to summarize, the shortlog contains the full
 details.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYeGNAQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymoVgCg1CPjMu8/SDj3Sm3a1UMQJn9jnl8AnjQcEp3z
 hMr9mISG4r6g4PvjrJBj
 =9May
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc and other driver updates from Greg KH:
 "Here is the large set of char, misc, and other "small" driver
  subsystem changes for 5.17-rc1.

  Lots of different things are in here for char/misc drivers such as:

   - habanalabs driver updates

   - mei driver updates

   - lkdtm driver updates

   - vmw_vmci driver updates

   - android binder driver updates

   - other small char/misc driver updates

  Also smaller driver subsystems have also been updated, including:

   - fpga subsystem updates

   - iio subsystem updates

   - soundwire subsystem updates

   - extcon subsystem updates

   - gnss subsystem updates

   - phy subsystem updates

   - coresight subsystem updates

   - firmware subsystem updates

   - comedi subsystem updates

   - mhi subsystem updates

   - speakup subsystem updates

   - rapidio subsystem updates

   - spmi subsystem updates

   - virtual driver updates

   - counter subsystem updates

  Too many individual changes to summarize, the shortlog contains the
  full details.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits)
  counter: 104-quad-8: Fix use-after-free by quad8_irq_handler
  dt-bindings: mux: Document mux-states property
  dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
  counter: remove old and now unused registration API
  counter: ti-eqep: Convert to new counter registration
  counter: stm32-lptimer-cnt: Convert to new counter registration
  counter: stm32-timer-cnt: Convert to new counter registration
  counter: microchip-tcb-capture: Convert to new counter registration
  counter: ftm-quaddec: Convert to new counter registration
  counter: intel-qep: Convert to new counter registration
  counter: interrupt-cnt: Convert to new counter registration
  counter: 104-quad-8: Convert to new counter registration
  counter: Update documentation for new counter registration functions
  counter: Provide alternative counter registration functions
  counter: stm32-timer-cnt: Convert to counter_priv() wrapper
  counter: stm32-lptimer-cnt: Convert to counter_priv() wrapper
  counter: ti-eqep: Convert to counter_priv() wrapper
  counter: ftm-quaddec: Convert to counter_priv() wrapper
  counter: intel-qep: Convert to counter_priv() wrapper
  counter: microchip-tcb-capture: Convert to counter_priv() wrapper
  ...
2022-01-14 16:02:28 +01:00
Linus Torvalds 3ceff4ea07 sound updates for 5.17-rc1
It's a relatively calm development cycle, but still lots of updates in
 the driver side like Intel SOF.  Below are some highlights:
 
 * ALSA / ASoC core:
 - A new kselftest for ALSA control API
 - PCM NO_REWINDS support
 - Potential race fixes around control removals
 - Unify x86 SG-buffer memory allocation code
 - Cleanups and race fixes for ASoC DPCM locking
 
 * ASoC:
 - Refinements and cleanups around the delay() APIs
 - Wider use of dev_err_probe().
 - Continuing cleanups and improvements to the SOF code
 - Support for pin switches in simple-card derived cards
 - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel
   systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20
   S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments
   TLV320ADC3xxx
 
 * HD-audio / USB-audio:
 - Fix deadlock at HD-audio codec unbinding
 - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec
 - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device
 
 * Misc:
 - Fix virmidi drain behavior
 
 Note that the merge of CS35L41 codec support is still half-baked, and
 at least one ACPI change is missing.  Although this won't hinder the
 kernel build itself, we're going to catch up before RC1.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmHgHvgOHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE9/JBAAk1qY+2GE7a2j/dRW31rv2JxS3iMnCIdnp/Hn
 c0mArt8iEDPXbgmQ2b+tnuqh5GSz073UPCorxkEdAkYisbGSzk22VnfWsNwbSEgC
 p8Tqt8ma1blQWUYGzszQEN9u9BCLaMr1cO/ORZmD/f7hSq5W42Q8IYLTb1/9gdax
 +pJyBg8Y52PAKURnKWzmDoasJeDoQauxZ9R0g3BgQHj8Hb3QHQonyqKxJlyFac/e
 RyV7YycM2ES3Dj4u7TReRd9hdKeuzc2Wg8qYVC3x/9dzhKpvDM3Tg5ONw/58jW4x
 G6tuEj5SeEKH2LRQYTOLYScz9lVUalv97PCsq5LkQrDLqrO3hT+vxQpRdBZefRIQ
 +cKBd9GReRlQW9XCDrUs9ZuWtl1cyta8T3mk3WhTvjUcTlr1vd+TcyRoQvNhFNVH
 LaTjD1526Yra8BxyzSe7tyHhvOIvRWwjzSfwCyYV9097wV82+rOReqHyMDhN7Djc
 NbBQvoIh7v1Yo+hOYE3RUUhS5h+CJH8l43J1pWNODjXVYivYTzCOizDdJ8ktRaHE
 gpQ1vAM4pW1R5mQsyIwj6G9B1bclYboVBjlE9SXCpT3vmDneIWuLUmNV89gyNW+p
 96B3dL4BoCTyBtGYBtow2Es+/rX2dEWtM6pvOSHhRDoWL586Snr2lXDEbAQ9uZF9
 zpq1uqs=
 =csTR
 -----END PGP SIGNATURE-----

Merge tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "It's a relatively calm development cycle, but still lots of updates in
  the driver side like Intel SOF. Below are some highlights:

  ALSA / ASoC core:
   - A new kselftest for ALSA control API
   - PCM NO_REWINDS support
   - Potential race fixes around control removals
   - Unify x86 SG-buffer memory allocation code
   - Cleanups and race fixes for ASoC DPCM locking

  ASoC:
   - Refinements and cleanups around the delay() APIs
   - Wider use of dev_err_probe().
   - Continuing cleanups and improvements to the SOF code
   - Support for pin switches in simple-card derived cards
   - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel
     systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20
     S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments
     TLV320ADC3xxx

  HD-audio / USB-audio:
   - Fix deadlock at HD-audio codec unbinding
   - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec
   - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device

  Misc:
   - Fix virmidi drain behavior

  Note that the merge of CS35L41 codec support is still half-baked, and
  at least one ACPI change is missing. Although this won't hinder the
  kernel build itself, we're going to catch up before RC1"

* tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits)
  ALSA: hda: intel-dsp-config: reorder the config table
  ALSA: hda: intel-dsp-config: add JasperLake support
  ALSA: hda: cs35l41: fix double free on error in probe()
  ALSA: hda: Fix dependencies of CS35L41 on SPI/I2C buses
  ALSA: hda: Fix dependency on ASoC cs35l41 codec
  ASoC: cs35l41: Add support for hibernate memory retention mode
  ASoC: cs35l41: Update handling of test key registers
  ALSA: intel_hdmi: Check for error num after setting mask
  ASoC: wcd9335: Keep a RX port value for each SLIM RX mux
  ASoC: amd: acp: acp-mach: Change default RT1019 amp dev id
  ALSA: virmidi: Remove duplicated code
  ALSA: seq: virmidi: Add a drain operation
  ASoC: topology: Fix typo
  ASoC: fsl_asrc: refine the check of available clock divider
  ASoC: Intel: bytcr_rt5640: Add support for external GPIO jack-detect
  ASoC: Intel: bytcr_rt5640: Support retrieving the codec IRQ from the AMCR0F28 ACPI dev
  ASoC: rt5640: Add support for boards with an external jack-detect GPIO
  ASoC: rt5640: Allow snd_soc_component_set_jack() to override the codec IRQ
  ASoC: rt5640: Change jack_work to a delayed_work
  ASoC: rt5640: Fix possible NULL pointer deref on resume
  ...
2022-01-14 14:55:38 +01:00
Linus Torvalds fb3b0673b7 - qcom: misc updates to qcom-ipcc driver
- mpfs: change compatible string
 - pcc: fix handling of subtypes
 		avoid uninit variable
 - mtk: add missing of_node_put
 		enable control_by_sw
 		silent probe-defer prints
 		fix gce_num for mt8192
 - zynq: add missing of_node_put
 - imx: check for NULL instead of IS_ERR
 - appple: switch to generic compatibles
 - hi3660: convert comments to kernel-doc notation
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmHeb5AACgkQf9lkf8eY
 P5Vb9A//Q0a3TGr2NuRrgWy1JETOVTsbhDQXqMwkUJggyjXHQheXPLthh7NWAaCQ
 GDE7YBBImNVlkRZs7RevhTTN+IKfVDI9LzQnNODtm4ADvLPQvehN2xWieAORlJpb
 SYRJR1jQEcDPTk36C5EQNYQJvyIInXZvuBcRQHtyic7rbyCuxoTR4VFAj+ufmqRI
 NWk6vNr588lX1zOVy75/YPW7rzijUh709GFdArTdD2SqoQlOH/C1zUkpufpIBFvt
 b1REcOhhrTz1vZ96UnCeGBUKLjcQbWv8/fFODHmEdz//+Rl62GgI4SNuEUJ50b6n
 SSjAtf85r+de5f0Js4JnEIj+V9DcTjr3eVDaMYkQX/DQdzWVFl3jhXkXAFAKc6T2
 fzyPwdRgSAqwwweZkgX9OfH0TahS53qh6tleNXUufSWXVYkecbCC2/IRoymc3QAM
 sEPvmok4NAooP636cMRTD0deBYx0BO3/UWGm258hwRfpgMjjzQPiRiIRoeA5tiXt
 mjSPcljVNFbr2TQvPenJ0yjaBTiAJM7BV9bHeguprCYPPp4nNccr0q6MUmGDQlg+
 xdc4xUiARzumTI/uhcTTBYX92uXLBeEAwtisRUbXxrcnH3PIPVIffIyS15J++2M6
 Gl3AlBPFc1Tt+0sKorzgcDlbmrT+creEVdVRxRstQ1qnWZUcSQM=
 =8ZvF
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom: misc updates to qcom-ipcc driver

 - mpfs: change compatible string

 - pcc:
     - fix handling of subtypes
     - avoid uninitialized variable

 - mtk:
     - add missing of_node_put
     - enable control_by_sw
     - silent probe-defer prints
     - fix gce_num for mt8192

 - zynq: add missing of_node_put

 - imx: check for NULL instead of IS_ERR

 - appple: switch to generic compatibles

 - hi3660: convert comments to kernel-doc notation

* tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: Add more protocol and client ID
  mailbox: qcom-ipcc: Support interrupt wake up from suspend
  mailbox: qcom-ipcc: Support more IPCC instance
  mailbox: qcom-ipcc: Dynamic alloc for channel arrangement
  mailbox: change mailbox-mpfs compatible string
  mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irq
  mailbox: pcc: Avoid using the uninitialized variable 'dev'
  mailbox: mtk: add missing of_node_put before return
  mailbox: zynq: add missing of_node_put before return
  mailbox: imx: Fix an IS_ERR() vs NULL bug
  mailbox: hi3660: convert struct comments to kernel-doc notation
  mailbox: add control_by_sw for mt8195
  mailbox: mtk-cmdq: Silent EPROBE_DEFER errors for clks
  mailbox: fix gce_num of mt8192 driver data
  mailbox: apple: Bind to generic compatibles
  dt-bindings: mailbox: apple,mailbox: Add generic and t6000 compatibles
2022-01-13 11:19:07 -08:00
Linus Torvalds 455e73a07f We have a couple patches in the framework core this time around but
they're mostly minor cleanups and some debugfs stuff. The real work
 that's in here is the typical pile of clk driver updates and new SoC
 support. Per usual (or maybe just recent trends), Qualcomm gains a
 handful of SoC drivers additions and has the largest diffstat. After
 that there are quite a few updates to the Allwinner (sunxi) drivers to
 support modular drivers and Renesas is heavily updated to add more
 support for various clks. Overall it looks pretty normal.
 
 New Drivers:
  - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
  - MediaTek mt7986 SoC basic support
  - Clock and reset driver for Toshiba Visconti SoCs
  - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
  - Allwinner D1 clks
  - Lan966x Generic Clock Controller driver and associated DT bindings
  - Qualcomm SDX65, SM8450, and MSM8976 GCC clks
  - Qualcomm SDX65 and SM8450 RPMh clks
 
 Updates:
  - Set suppress_bind_attrs to true for i.MX8ULP driver
  - Switch from do_div to div64_ul for throughout all i.MX drivers
  - Fix imx8mn_clko1_sels for i.MX8MN
  - Remove unused IPG_AUDIO_ROOT from i.MX8MP
  - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
  - Removal of all remaining uses of __clk_lookup() in drivers/clk/samsung
  - Refactoring of the CPU clocks registration to use common interface
  - An update of the Exynos850 driver (support for more clock domains)
    required by the E850-96 development board
  - Prep for runtime PM and generic power domains on Tegra
  - Support modular Allwinner clk drivers via platform bus
  - Lan966x clock driver extended to support clock gating
  - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
    thermal (TSU) clocks and resets on Renesas RZ/G2L
  - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2 clock
    drivers, and in the Renesas SDHI driver
  - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
  - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
  - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
  - Add GPU clock and resets on Renesas RZ/G2L
  - Add clk-provider.h to various Qualcomm clk drivers
  - devm version of clk_hw_register_gate()
  - kerneldoc fixes in a couple drivers
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmHfOa8RHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSX+Ew/9FaQLRh3ahN+qF8VMJ1K9qUciYBlU+UtC
 excKfTkJg+1JGMP8dGSRSi/aC/UyLPb0dJDRMKcSZPYIScP+wc3HJHm4i+CpxDcn
 /wXPW3tvY1CkVq1P7/baesoNiIle5zqpl4+0w9CN5KuoXctc35Pr1GqJ/C0XsDfQ
 DS3lpck65tr7Wy1muChT1ZR+7hGv6K7olR7FDYNVSDtfJcaOZENSLgbPF6eea0FR
 /dl+6o1COF23XAGF1GJg88DYRgnEqxLsfFTaC6Hz8DeQdKBVh9GF6tpgLhk7vsaG
 gcRZxU24KaUw0lNZGdzmagy8ZJ6aZhcuzXQKN9VecbTIhRYNTWmB1VsvbhhEVb1T
 96kBAp/II1JZdh/8W7uOmg4Ahupap5+f6JKMfR3zD4aDXkNDsxyXBA5AXtC0GPGN
 5340WiJsBz/dD9/YE+mQ7YZKhdvKaGEVbmVUpQHceapeTBk4EIHKSVIq5sKd7qiq
 ZHxOIizx5MgBJyoSeIxkB3j0KvwSTDNz6WM2F9gnNNtGfuSlA4NAnO1davINNQun
 +seP+deBviUl+P2u9iodRApfCiEuM3mA548KTba/Z1nJ7sN93/qrqr1FBAUSqY+k
 xNRXfXIzlOY9ifm6PlvU8QUK0XVtKjt0ld7pFzRkf6EU523DwzL2I2XIY2Eve2vA
 LaDihwcKyR0=
 =jB+l
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "We have a couple patches in the framework core this time around but
  they're mostly minor cleanups and some debugfs stuff. The real work
  that's in here is the typical pile of clk driver updates and new SoC
  support.

  Per usual (or maybe just recent trends), Qualcomm gains a handful of
  SoC drivers additions and has the largest diffstat. After that there
  are quite a few updates to the Allwinner (sunxi) drivers to support
  modular drivers and Renesas is heavily updated to add more support for
  various clks.

  Overall it looks pretty normal.

  New Drivers:
   - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
   - MediaTek mt7986 SoC basic support
   - Clock and reset driver for Toshiba Visconti SoCs
   - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
   - Allwinner D1 clks
   - Lan966x Generic Clock Controller driver and associated DT bindings
   - Qualcomm SDX65, SM8450, and MSM8976 GCC clks
   - Qualcomm SDX65 and SM8450 RPMh clks

  Updates:
   - Set suppress_bind_attrs to true for i.MX8ULP driver
   - Switch from do_div to div64_ul for throughout all i.MX drivers
   - Fix imx8mn_clko1_sels for i.MX8MN
   - Remove unused IPG_AUDIO_ROOT from i.MX8MP
   - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
   - Removal of all remaining uses of __clk_lookup() in
     drivers/clk/samsung
   - Refactoring of the CPU clocks registration to use common interface
   - An update of the Exynos850 driver (support for more clock domains)
     required by the E850-96 development board
   - Prep for runtime PM and generic power domains on Tegra
   - Support modular Allwinner clk drivers via platform bus
   - Lan966x clock driver extended to support clock gating
   - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
     thermal (TSU) clocks and resets on Renesas RZ/G2L
   - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2
     clock drivers, and in the Renesas SDHI driver
   - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
   - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
   - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
   - Add GPU clock and resets on Renesas RZ/G2L
   - Add clk-provider.h to various Qualcomm clk drivers
   - devm version of clk_hw_register_gate()
   - kerneldoc fixes in a couple drivers"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits)
  clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
  clk: mediatek: add mt7986 clock support
  clk: mediatek: add mt7986 clock IDs
  dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
  clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
  clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
  clk: x86: Fix clk_gate_flags for RV_CLK_GATE
  clk: x86: Use dynamic con_id string during clk registration
  ACPI: APD: Add a fmw property clk-name
  drivers: acpi: acpi_apd: Remove unused device property "is-rv"
  x86: clk: clk-fch: Add support for newer family of AMD's SOC
  clk: ingenic: Add MDMA and BDMA clocks
  dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
  clk: bm1880: remove kfrees on static allocations
  clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
  clk: st: clkgen-mux: search reg within node or parent
  clk: st: clkgen-fsyn: search reg within node or parent
  clk: Enable/Disable runtime PM for clk_summary
  MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
  clk: visconti: Add support common clock driver and reset driver
  ...
2022-01-12 17:02:27 -08:00
Huang Yiwei 869b6ca39c dt-bindings: mailbox: Add more protocol and client ID
Add more protocol and client ID which can be used in device
tree properties.

Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Stephen Boyd 4afd2a9355 Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-next
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
 - MediaTek mt7986 SoC basic support

* clk-ingenic:
  clk: ingenic: Add MDMA and BDMA clocks
  dt-bindings: clk/ingenic: Add MDMA and BDMA clocks

* clk-mediatek:
  clk: mediatek: add mt7986 clock support
  clk: mediatek: add mt7986 clock IDs
  dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
  clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
  clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
2022-01-11 18:31:00 -08:00
Stephen Boyd 1d0bd126d9 Merge branches 'clk-socfpga', 'clk-toshiba', 'clk-st' and 'clk-bitmain' into clk-next
- Clock and reset driver for Toshiba Visconti SoCs

* clk-socfpga:
  clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_resource()
  clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_resource()
  clk: socfpga: remove redundant assignment after a mask operation
  clk: socfpga: remove redundant assignment on division

* clk-toshiba:
  clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
  MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
  clk: visconti: Add support common clock driver and reset driver
  dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
  dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV770x SoC

* clk-st:
  clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
  clk: st: clkgen-mux: search reg within node or parent
  clk: st: clkgen-fsyn: search reg within node or parent

* clk-bitmain:
  clk: bm1880: remove kfrees on static allocations
2022-01-11 18:30:50 -08:00
Stephen Boyd f691c9b526 Merge branches 'clk-nvidia', 'clk-imx', 'clk-samsung' and 'clk-qcom' into clk-next
* clk-nvidia:
  clk: tegra: Support runtime PM and power domain
  clk: tegra: Make vde a child of pll_p on tegra114

* clk-imx:
  clk: imx8mp: Fix the parent clk of the audio_root_clk
  clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h
  clk: imx8mn: Fix imx8mn_clko1_sels
  clk: imx: Use div64_ul instead of do_div
  clk: imx: imx8ulp: set suppress_bind_attrs to true

* clk-samsung:
  clk: samsung: Add initial Exynos7885 clock driver
  clk: samsung: clk-pll: Add support for pll1417x
  clk: samsung: Make exynos850_register_cmu shared
  dt-bindings: clock: Document Exynos7885 CMU bindings
  dt-bindings: clock: Add bindings definitions for Exynos7885 CMU
  clk: samsung: exynos850: Add missing sysreg clocks
  dt-bindings: clock: Add bindings for Exynos850 sysreg clocks
  clk: samsung: exynos850: Register clocks early
  clk: samsung: exynos850: Keep some crucial clocks running
  clk: samsung: exynos850: Implement CMU_CMGP domain
  dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
  clk: samsung: exynos850: Implement CMU_APM domain
  dt-bindings: clock: Add bindings for Exynos850 CMU_APM
  clk: samsung: Update CPU clk registration
  clk: samsung: Remove meaningless __init and extern from header files
  clk: samsung: remove __clk_lookup() usage
  dt-bindings: clock: samsung: add IDs for some core clocks

* clk-qcom: (25 commits)
  clk: qcom: gcc-sc7280: Mark gcc_cfg_noc_lpass_clk always enabled
  clk: qcom: clk-alpha-pll: Increase PLL lock detect poll time
  clk: qcom: turingcc-qcs404: explicitly include clk-provider.h
  clk: qcom: q6sstop-qcs404: explicitly include clk-provider.h
  clk: qcom: mmcc-apq8084: explicitly include clk-provider.h
  clk: qcom: lpasscc-sdm845: explicitly include clk-provider.h
  clk: qcom: lpasscc-sc7280: explicitly include clk-provider.h
  clk: qcom: gcc-sm6350: explicitly include clk-provider.h
  clk: qcom: gcc-msm8994: explicitly include clk-provider.h
  clk: qcom: gcc-sm8350: explicitly include clk-provider.h
  clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driver
  dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller
  clk: qcom: Add clock driver for SM8450
  clk: qcom: Add SDX65 GCC support
  clk: qcom: Add LUCID_EVO PLL type for SDX65
  dt-bindings: clock: Add SM8450 GCC clock bindings
  dt-bindings: clock: Add SDX65 GCC clock bindings
  clk: qcom: rpmh: add support for SM8450 rpmh clocks
  dt-bindings: clock: Add RPMHCC bindings for SM8450
  clk: qcom: smd-rpm: Drop binary value handling for buffered clock
  ...
2022-01-11 18:30:43 -08:00
Stephen Boyd 151768f348 Merge branches 'clk-x86', 'clk-stm', 'clk-amlogic' and 'clk-allwinner' into clk-next
* clk-x86:
  clk: x86: Fix clk_gate_flags for RV_CLK_GATE
  clk: x86: Use dynamic con_id string during clk registration
  ACPI: APD: Add a fmw property clk-name
  drivers: acpi: acpi_apd: Remove unused device property "is-rv"
  x86: clk: clk-fch: Add support for newer family of AMD's SOC
  clk: Introduce clk-tps68470 driver
  platform/x86: int3472: Deal with probe ordering issues
  platform/x86: int3472: Pass tps68470_regulator_platform_data to the tps68470-regulator MFD-cell
  platform/x86: int3472: Pass tps68470_clk_platform_data to the tps68470-regulator MFD-cell
  platform/x86: int3472: Add get_sensor_adev_and_name() helper
  platform/x86: int3472: Split into 2 drivers
  platform_data: Add linux/platform_data/tps68470.h file
  i2c: acpi: Add i2c_acpi_new_device_by_fwnode() function
  i2c: acpi: Use acpi_dev_ready_for_enumeration() helper
  ACPI: delay enumeration of devices with a _DEP pointing to an INT3472 device

* clk-stm:
  clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell

* clk-amlogic:
  clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB

* clk-allwinner:
  clk: sunxi-ng: Add support for the D1 SoC clocks
  clk: sunxi-ng: gate: Add macros for gates with fixed dividers
  clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw
  clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw
  clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hw
  dt-bindings: clk: Add compatibles for D1 CCUs
  clk: sunxi-ng: Allow the CCU core to be built as a module
  clk: sunxi-ng: Convert early providers to platform drivers
  clk: sunxi-ng: Allow drivers to be built as modules
  clk: sunxi-ng: Export symbols used by CCU drivers
2022-01-11 18:30:35 -08:00
Stephen Boyd 270bbc7253 Merge branches 'clk-doc', 'clk-renesas', 'clk-at91', 'clk-cleanup' and 'clk-debugfs' into clk-next
* clk-doc:
  clk: Gemini: fix struct name in kernel-doc
  clk: zynq: pll: Fix kernel-doc warnings
  clk: imx: pllv1: fix kernel-doc notation for struct clk_pllv1

* clk-renesas: (31 commits)
  clk: renesas: r9a07g044: Add GPU clock and reset entries
  clk: renesas: r9a07g044: Add mux and divider for G clock
  clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro
  clk: renesas: cpg-mssr: Add support for R-Car S4-8
  clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver
  dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779f0 SYSC power domain definitions
  clk: renesas: r9a07g044: Add TSU clock and reset entry
  mmc: renesas_sdhi: Simplify an expression
  mmc: renesas_sdhi: Use devm_clk_get_optional() to obtain CD clock
  dt-bindings: clock: renesas,cpg-mssr: Document r8a779f0
  clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple()
  clk: renesas: cpg-mssr: Check return value of pm_genpd_init()
  clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
  clk: renesas: rzg2l: Check return value of pm_genpd_init()
  clk: renesas: r9a07g044: Add RSPI clock and reset entries
  clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV
  clk: renesas: rzg2l: Add CPG_PL1_DDIV macro
  mmc: renesas_sdhi: Parse DT for SDnH
  mmc: renesas_sdhi: Use dev_err_probe when getting clock fails
  ...

* clk-at91:
  clk: lan966x: Extend lan966x clock driver for clock gating support
  dt-bindings: clock: lan966x: Extend includes with clock gates
  dt-bindings: clock: lan966x: Extend for clock gate support
  clk: gate: Add devm_clk_hw_register_gate()
  clk: lan966x: Add lan966x SoC clock driver
  dt-bindings: clock: lan966x: Add LAN966X Clock Controller
  dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs

* clk-cleanup:
  clk: stm32mp1: remove redundant assignment to pointer data
  clk: __clk_core_init() never takes NULL
  clk: clk_core_get() can also return NULL
  clk/ti/adpll: Make const pointer error a static const array

* clk-debugfs:
  clk: Enable/Disable runtime PM for clk_summary
  clk: Emit a stern warning with writable debugfs enabled
  clk: Add write operation for clk_parent debugfs node
2022-01-11 18:30:10 -08:00
Linus Torvalds c288ea6798 gpio updates for v5.17
- new testing module: gpio-sim that is scheduled to replace gpio-mockup
 - initial changes aiming at converting all GPIO drivers to using the fwnode
   interface and limiting any references to OF symbols to gpiolib-of.c
 - add support for Tegra234 and Tegra241 to gpio-tegra186
 - add support for new models (SSD201 and SSD202D) to gpio-msc313
 - add basic support for interrupts to gpio-aggregator
 - add support for AMDIF031 HID device to gpio-amdpt
 - drop support for unused platforms in gpio-xlp
 - cleanup leftovers from the removal of the legacy Samsung Exynos GPIO driver
 - use raw spinlocks in gpio-aspeed and gpio-aspeed-sgpio to make PREEMPT_RT
   happy
 - generalize the common 'ngpios' device property by reading it in the core
   gpiolib code so that we can remove duplicate reads from drivers
 - allow line names from device properties to override names set by drivers
 - code shrink in gpiod_add_lookup_table()
 - add new model to the DT bindings for gpio-vf610
 - convert DT bindings for tegra devices to YAML
 - improvements to interrupt handling in gpio-rcar and gpio-rockchip
 - updates to intel drivers from Andy (details in the merge commit)
 - some minor tweaks, improvements and coding-style fixes all around the
   subsystem
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmHdpawACgkQEacuoBRx
 13KBTxAA1uB3zOqq5L9gn7cLR8Pi1/N4o7ltB0uwIFGJ8X5+jkHqkEi2TRa7Nyv1
 OODt/C2g8iguhynQJ1g//ZW12tzoThwI9fUzixZ9FRBMmX5oHeCcrS/YAYP4GDJY
 T9KOiXPDJ+vHV7SbM4k8gIlMHFk5Uq1jjvNnDIebzyBlyzAKxH9dIY3r1zt0Y4BR
 aKlAD5pxmLDAMAWVlTRo5e/W/Xd0ob0LCkDwlgozb3gwoPQbQQIPHuw+jPl5cMR2
 wBRNVFuJLi5dnpyrOoCXWWDQzeQzw8x+5vlwZfLkr2pF4FfDWoxefmbrDulzU+Au
 t6TULGcFKhLalyozY2D2mWNo8lMs4fDt/SXrDHwgS/cmGpq7RUGfvFuV6a9IOukP
 /uqoMYviIRswJuvPBs6dBNFaZxJkw4cWzd9tIzywb07mpkUCwX8wARwg+dZGvdQt
 4aAJwkJHuR29bEpDVfWwd2UV+fdAX5RiVQqLznNzGK51O+vS4UklYyWtO44R+fgm
 F81y2zOo0ly9xA6YkGjoSATnWDTmzTQSrnwcFv9J9UewY3PJpQc4xgqvZysur5cb
 0k/kuf9eWazmo46gW3ztv8GfXogDko8DEKrEgGs47tg97RDR5YbzOkOmnsqWvoUd
 nSVyx6vs2ijXsEi96FKhfTrU0AT2YcAIbEWjQoQvBR+3zkase7I=
 =OUhL
 -----END PGP SIGNATURE-----

Merge tag 'gpio-updates-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
 "The gpio-sim module is back, this time without any changes to
  configfs. This results in a less elegant user-space interface but I
  never got any follow-up on the committable items and didn't want to
  delay this module for several more months.

  Other than that we have support for several new models and some
  support going away. We started working on converting GPIO drivers to
  using fwnode exclusively in order to limit references to OF symbols to
  gpiolib-of.c exclusively. We also have regular tweaks and improvements
  all over the place.

  Summary:

   - new testing module: gpio-sim that is scheduled to replace
     gpio-mockup

   - initial changes aiming at converting all GPIO drivers to using the
     fwnode interface and limiting any references to OF symbols to
     gpiolib-of.c

   - add support for Tegra234 and Tegra241 to gpio-tegra186

   - add support for new models (SSD201 and SSD202D) to gpio-msc313

   - add basic support for interrupts to gpio-aggregator

   - add support for AMDIF031 HID device to gpio-amdpt

   - drop support for unused platforms in gpio-xlp

   - cleanup leftovers from the removal of the legacy Samsung Exynos
     GPIO driver

   - use raw spinlocks in gpio-aspeed and gpio-aspeed-sgpio to make
     PREEMPT_RT happy

   - generalize the common 'ngpios' device property by reading it in the
     core gpiolib code so that we can remove duplicate reads from
     drivers

   - allow line names from device properties to override names set by
     drivers

   - code shrink in gpiod_add_lookup_table()

   - add new model to the DT bindings for gpio-vf610

   - convert DT bindings for tegra devices to YAML

   - improvements to interrupt handling in gpio-rcar and gpio-rockchip

   - updates to intel drivers from Andy (details in the merge commit)

   - some minor tweaks, improvements and coding-style fixes all around
     the subsystem"

* tag 'gpio-updates-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (59 commits)
  gpio: rcar: Propagate errors from devm_request_irq()
  gpio: rcar: Use platform_get_irq() to get the interrupt
  gpio: ts5500: Use platform_get_irq() to get the interrupt
  gpio: dwapb: Switch to use fwnode instead of of_node
  gpiolib: acpi: make fwnode take precedence in struct gpio_chip
  dt-bindings: gpio: samsung: drop unused bindings
  gpio: max3191x: Use bitmap_free() to free bitmap
  gpio: regmap: Switch to use fwnode instead of of_node
  gpio: tegra186: Add support for Tegra241
  dt-bindings: gpio: Add Tegra241 support
  gpio: brcmstb: Use local variable to access OF node
  gpio: Remove unused local OF node pointers
  gpio: sim: add missing fwnode_handle_put() in gpio_sim_probe()
  gpio: msc313: Add support for SSD201 and SSD202D
  gpio: msc313: Code clean ups
  dt-bindings: gpio: msc313: Add offsets for ssd20xd
  dt-bindings: gpio: msc313: Add compatible for ssd20xd
  gpio: sim: fix uninitialized ret variable
  gpio: Propagate firmware node from a parent device
  gpio: Setup parent device and get rid of unnecessary of_node assignment
  ...
2022-01-11 12:31:35 -08:00
Linus Torvalds bb4ed26e7e SoC: Add support for StarFive JH7100 RISC-V SoC
This adds support for the StarFive JH7100, including the necessary
 device drivers and DT files for the BeagleV Starlight prototype
 board, with additional boards to be added later. This SoC promises
 to be the first usable low-cost platform for RISC-V.
 
 I've taken this through the SoC tree in the anticipation of adding
 a few other Arm based SoCs as well, but those did not pass the
 review in time, so it's only this one.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHE4/wACgkQmmx57+YA
 GNlSlRAArOIWkgB8Uwf2dz1tdyGNo6b0yqrqPBnc2hlafQVkrd/Cy0imIEt21pJk
 IkVviuuJmWMS7lFppvjoKbTZDvGt4gcA2o//NorBtSLV5G7mbJAMkeDtfdURRAb0
 c7IXbtHaI5qMPHXOzjbKTHedbLJpS2P1uXQtGr9hiZFP8ZfyfbEF1bzL0edcCAWi
 DuY7cpEHEzeKATN8NQ1ETwpx0MJBfp7pzyfQbB9I1VvIMX1qbuLBUUJ6snLGSiw1
 kvLrQoV+2ZISeEfQ8M/PoHpHexO7CzY0thlTFt2mThLVI0ZlaVJvI6oJDAX5AG67
 tsmDiBxzvp+gWx5T8TfCgETJOVPUpNpSodF8U+cvIIpZM+DLiDc3Dyu6Zrod5guZ
 y989Sc+Be1LZEEyy0VscCoDleNxuFohh8aNJZnRtzd5UfJnz7cDIfGUdS2hwP9JN
 vI7Ci4nQIcvG35RwnLVMOp1azm3RIv2xoESdLkbS9/4smNEjLT1xtr6uVcP+MIKE
 qsWh8TITRWF4aiFqmsz1JyTHFAL0cCi4lZM//Y6XGKM2z0sCmpbfHIEGhJWuSNme
 lXvqn62VfiA5CvSnijYMwtRnCKIDDhsjvQo6H0gxCqW6ynCnKAivL/yo65hqtQO8
 wBpmlziU7IXx4Js/1eGpF7zq7a9LHFqFnKCrE/+7hK/DPGF2Qck=
 =X5uk
 -----END PGP SIGNATURE-----

Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull RISC-V SoC updates from Arnd Bergmann:
 "Add support for StarFive JH7100 RISC-V SoC

  This adds support for the StarFive JH7100, including the necessary
  device drivers and DT files for the BeagleV Starlight prototype board,
  with additional boards to be added later. This SoC promises to be the
  first usable low-cost platform for RISC-V.

  I've taken this through the SoC tree in the anticipation of adding a
  few other Arm based SoCs as well, but those did not pass the review in
  time, so it's only this one"

* tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  reset: starfive-jh7100: Fix 32bit compilation
  RISC-V: Add BeagleV Starlight Beta device tree
  RISC-V: Add initial StarFive JH7100 device tree
  serial: 8250_dw: Add StarFive JH7100 quirk
  dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
  pinctrl: starfive: Add pinctrl driver for StarFive SoCs
  dt-bindings: pinctrl: Add StarFive JH7100 bindings
  dt-bindings: pinctrl: Add StarFive pinctrl definitions
  reset: starfive-jh7100: Add StarFive JH7100 reset driver
  dt-bindings: reset: Add Starfive JH7100 reset bindings
  dt-bindings: reset: Add StarFive JH7100 reset definitions
  clk: starfive: Add JH7100 clock generator driver
  dt-bindings: clock: starfive: Add JH7100 bindings
  dt-bindings: clock: starfive: Add JH7100 clock definitions
  dt-bindings: interrupt-controller: Add StarFive JH7100 plic
  dt-bindings: timer: Add StarFive JH7100 clint
  RISC-V: Add StarFive SoC Kconfig option
2022-01-10 08:32:37 -08:00
Linus Torvalds aca48b2dd1 ARM: SoC devicetree changes for v5.17
As usual, this is the bulk of the updates for the SoC tree, adding
 more devices to existing files, addressing issues from ever improving
 automated checking, and fixing minor issues.
 
 The most interesting bits as usual are the new platforms.
 All the newly supported SoCs belong into existing families
 this time:
 
  - Qualcomm gets support for two newly announced platforms, both
    of which can now work in production environments: the SDX65
    5G modem that can run a minimal Linux on its Cortex-A7 core,
    and the Snapdragon 8 Gen 1, their latest high-end phone SoC.
 
  - Renesas adds support for R-Car S4-8, the most recent automotive
    Server/Communication SoC.
 
  - TI adds support for J721s2, a new automotive SoC in the K3
    family.
 
  - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
    generation following their popular MT76xx series. Only basic
    support is added for now.
 
  - NXP i.MX8 ULP8 is a new low-power variant of the widespread
    i.MX8 series.
 
  - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that
    we have supported for a long time.
 
 New boards with the existing SoCs include
 
  - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers
 
  - AT91/SAMA5 based evaluation board
 
  - NXP gains twenty new development and industrial boards for their
    i.MX and Layerscape SoCs
 
  - Intel IXP4xx now supports the final two machines in device tree
    that were previously only supported in old style board files.
 
  - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013,
    while MT8183 is used in the Acer Chromebook 314.
 
  - Qualcomm gains support for the reference machines using the two
    new SoCs, plus a number of Chromebook variants and phones based
    on the Snapdragon 7c, 845 and 888 SoCs, including various
    Sony Xperia devices and the Microsoft Surface Duo 2.
 
  - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.
 
  - Tegra now boots various older Android devices based on 32-bit
    chips out of the box, including a number of ASUS Transformer
    tablets.
    There is also a new Jetson AGX Orin developer kit.
 
  - Apple support adds the missing device trees for all the remaining
    M1 Macbook and iMac variants, though not yet the M1 Pro/Max
    versions.
 
  - Allwinner now supports another version of the Tanix TX6 set-top
    box based on the H6 SoC.
 
  - Broadcom gains support for the Netgear RAXE500 Wireless router
    based on BCM4908.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHDsm4ACgkQmmx57+YA
 GNm9YhAAm0c/uPAkDA/6ESjaMC5qIHnV8CC9ZV24iINqFutcjKm2az8OiqKZT7UW
 a/+n2sfjAiyoAAaXrp/WvyMH2Sula1i/OZpR4GYIbD/lbYRFk+4+iW2YY9vViCjL
 KH6M/H6KfOSNmGcpe3wDvu7D4YWfFKDCDyUJsEaMW2xSQehYbH5P0OuzQW1EROHr
 GQp60QtCbUpMmqIrkJT99MxBGCCyb4dV6BT3iU489/YU3q3pOF8OWMLKv5TlXzfw
 x0pLH5CKavvCFj3iqp80sCEBeSoUecLKVnBRfmwAH1vgfNrhpXh4jP9m1e3Vh3Bb
 aJGZ57W77Akf+TywZEojDdIDQGKcdlzpZNxN2i4e4+LECYvfOdJW8GP18MmsXEY4
 apb0NeKad8FGRI4b97dIVEcTa894JkEZaEtnNaIdjWFhBgzO+Kr2iOTw71AKsJmc
 eIwv4SDdUQTU4VT08ceJTOVt8NikGALJStg5knpVJ9lfHvFlWj1GAE4QnCtS6pUR
 iiyqJ1/7khNplcgowaz6nuC2gSE49UwYQImLvBfG17eT1YU3B2OZg/FZ9xSmr2bW
 Thk+TKO9A6xai8QQWYV99Ae+Y6nDWUrLL5U9DXTn4cm64g5z3VkVKGcNajg/kAad
 hyQmSIhcypp2KN//c+d3VU/KY1EUYJDzg1EEwRuxP7Gih5/7pb8=
 =IF3G
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "As usual, this is the bulk of the updates for the SoC tree, adding
  more devices to existing files, addressing issues from ever improving
  automated checking, and fixing minor issues.

  The most interesting bits as usual are the new platforms. All the
  newly supported SoCs belong into existing families this time:

   - Qualcomm gets support for two newly announced platforms, both of
     which can now work in production environments: the SDX65 5G modem
     that can run a minimal Linux on its Cortex-A7 core, and the
     Snapdragon 8 Gen 1, their latest high-end phone SoC.

   - Renesas adds support for R-Car S4-8, the most recent automotive
     Server/Communication SoC.

   - TI adds support for J721s2, a new automotive SoC in the K3 family.

   - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
     generation following their popular MT76xx series. Only basic
     support is added for now.

   - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8
     series.

   - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we
     have supported for a long time.

  New boards with the existing SoCs include

   - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers

   - AT91/SAMA5 based evaluation board

   - NXP gains twenty new development and industrial boards for their
     i.MX and Layerscape SoCs

   - Intel IXP4xx now supports the final two machines in device tree
     that were previously only supported in old style board files.

   - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while
     MT8183 is used in the Acer Chromebook 314.

   - Qualcomm gains support for the reference machines using the two new
     SoCs, plus a number of Chromebook variants and phones based on the
     Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia
     devices and the Microsoft Surface Duo 2.

   - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.

   - Tegra now boots various older Android devices based on 32-bit chips
     out of the box, including a number of ASUS Transformer tablets.

     There is also a new Jetson AGX Orin developer kit.

   - Apple support adds the missing device trees for all the remaining
     M1 Macbook and iMac variants, though not yet the M1 Pro/Max
     versions.

   - Allwinner now supports another version of the Tanix TX6 set-top box
     based on the H6 SoC.

   - Broadcom gains support for the Netgear RAXE500 Wireless router
     based on BCM4908"

* tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits)
  Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"
  arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
  arm64: dts: qcom: sm8450-qrd: Enable USB nodes
  arm64: dts: qcom: sm8450: Add usb nodes
  ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
  dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
  ARM: dts: aspeed: add LCLK setting into LPC IBT node
  ARM: dts: aspeed: p10: Add TPM device
  ARM: dts: aspeed: p10: Enable USB host ports
  ARM: dts: aspeed: Add TYAN S8036 BMC machine
  ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
  ARM: dts: aspeed: Adding Facebook Bletchley BMC
  ARM: dts: aspeed: g220a: Enable secondary flash
  ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
  ARM: dts: aspeed: Add secure boot controller node
  dt-bindings: aspeed: Add Secure Boot Controller bindings
  ARM: dts: Remove "spidev" nodes
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  ...
2022-01-10 08:24:40 -08:00
Sam Shih 4470c830f9 clk: mediatek: add mt7986 clock IDs
Add MT7986 clock dt-bindings, include topckgen, apmixedsys,
infracfg, and ethernet subsystem clocks.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217121148.6753-3-sam.shih@mediatek.com
Reviewed-by: Ryder Lee <ryder.lee@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-06 18:30:58 -08:00
Paul Cercueil 51d04bcfb8 dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
The Ingenic JZ4760 and JZ4770 both have an extra DMA core named BDMA
dedicated to the NAND and BCH controller, but which can also do
memory-to-memory transfers. The JZ4760 additionally has a DMA core named
MDMA dedicated to memory-to-memory transfers. The programming manual for
the JZ4770 does have a bit for a MDMA clock, but does not seem to have
the hardware wired in.

Add macros for the MDMA and BDMA clocks to the dt-bindings include
files, so that they can be used within Device Tree files.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20211220193319.114974-2-paul@crapouillou.net
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-06 17:51:11 -08:00
Nobuhiro Iwamatsu ffa81a0326 dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC
Add device tree bindings for SMU (System Management Unit) controller of
Toshiba Visconti TMPV770x SoC series.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211025031038.4180686-3-nobuhiro1.iwamatsu@toshiba.co.jp
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-01-05 17:05:21 -08:00
Aswath Govindraju 04ce4a6b9b dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC
There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/0571fd6b-ec4d-71b3-5cf7-6fa48ed5592c@axentia.se
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-01-03 13:59:57 +01:00
Greg Kroah-Hartman e75a58db41 phy-for-5.17
- New support:
         - Qualcomm eDP PHY driver
 	- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
 	- Lan966x ethernet serdes PHY driver
 	- Support for uniphier NXI & Pro4 SoC
         - Qualcomm SM6350 USB2 support
 	- Amlogic Meson8 HDMI TX PHY driver
 	- Rockchip rk3568 usb2 support
 	- Intel Thunder Bay eMMC PHY driver
 	- Freescale IMX8 PCIe phy driver
 
   - Updates:
 	- Cadence Sierra driver updates for multilink configurations
         - Bcm usb2 updates for Phy reg space
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmHNmqQACgkQfBQHDyUj
 g0fhew/9H14cOScEaekVHvEtyxWJwAuNFlquEiQPLqnjL67aSDy4Xku43Z8xXvvY
 8XwSmDhlZV/UmQMte1+XKyEEPpfUScN7elVP5/Vq07oHM/jaDG1dPPPZyf0pIM4y
 bpD2dameXpHThC3Mb8QpERsZA0d4zvm6+8PN0MtkZGTPNKTwMl7sBIA/W76Ic+my
 6+HUqANa5OXo0iEZSDK8TkygpblIdgYthYsTaSTuiAkxYSse47U0xUWuex3UVQpZ
 DSSCZUtjxTXTMSxJBNi8ry8ZJIkUhiVL4fY3Oh9bYRi9e7UGiEMwCb/yF979kPYA
 ZcI8bR/w0/f4oIQdOUjcxIA6n9avKrnAEIQFp18dWTBjUZTEZdYz2zS0DMuXq9t2
 4yLXSNqO2FvOo3/AK5B/K6tf2j3zJTEdVpiq+rKOKxCAZWY2EDVtdDJRYYynCPK9
 xBiut4PrGoG8Fs1RiL768kzy5a21fbDK5CFS8QYbbno/YhznwNFKKRX4VdgY/b1b
 ltI/cD6G70M+TOYCJ0jNIwRoA2dZCUClhdulpltSrTx9tR4M6oH+pXxHBD66WVNK
 ouJRaqtvi48ILwXZ9oAEKFQfu8hQt1OMWTcGbJ0ntPPVBPHv7hRQAxAyJZcADfDP
 RjO7CX48Il3/33w4kIH9VFO4DE/asYJ6QGOVo9SA0iRh5M9fI88=
 =29yF
 -----END PGP SIGNATURE-----

Merge tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next

Vinod writes:

phy-for-5.17

  - New support:
        - Qualcomm eDP PHY driver
	- Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support
	- Lan966x ethernet serdes PHY driver
	- Support for uniphier NXI & Pro4 SoC
        - Qualcomm SM6350 USB2 support
	- Amlogic Meson8 HDMI TX PHY driver
	- Rockchip rk3568 usb2 support
	- Intel Thunder Bay eMMC PHY driver
	- Freescale IMX8 PCIe phy driver

  - Updates:
	- Cadence Sierra driver updates for multilink configurations
        - Bcm usb2 updates for Phy reg space

* tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits)
  phy: cadence: Sierra: Add support for derived reference clock output
  dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock
  phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
  phy: cadence: Sierra: Add support for PHY multilink configurations
  phy: cadence: Sierra: Fix to get correct parent for mux clocks
  phy: cadence: Sierra: Update single link PCIe register configuration
  phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation
  phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
  phy: cadence: Sierra: Add PHY PCS common register configurations
  phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation
  phy: cadence: Sierra: Add support to get SSC type from device tree
  dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode
  dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names
  phy: cadence: Sierra: Prepare driver to add support for multilink configurations
  phy: cadence: Sierra: Use of_device_get_match_data() to get driver data
  phy: mediatek: Fix missing check in mtk_mipi_tx_probe
  phy: uniphier-usb3ss: fix unintended writing zeros to PHY register
  phy: phy-mtk-tphy: use new io helpers to access register
  phy: phy-mtk-xsphy: use new io helpers to access register
  phy: mediatek: add helpers to update bits of registers
  ...
2021-12-30 14:02:16 +01:00
Swapnil Jakhade 637feefb8a dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock
Add clock ID for Sierra derived reference clock.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211223060137.9252-15-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:09 +05:30
Swapnil Jakhade 253f06c7b1 dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names
Rename SSC macros to use generic names instead of PHY specific names,
so that they can be used to specify SSC modes for both Torrent and
Sierra. Renaming the macros should not affect the things as these are
not being used in any DTS file yet.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211223060137.9252-4-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-27 16:35:08 +05:30
Greg Kroah-Hartman 1bc4deedc2 interconnect changes for 5.17
Here are the interconnect changes for the 5.17-rc1 merge window
 consisting of new drivers, minor changes and fixes.
 
 New drivers:
  - New driver for MSM8996 platforms
  - New driver for SC7280 EPSS L3 hardware
  - New driver for QCM2290 platforms
  - New driver for SM8450 platforms
 
 Driver changes:
  - dt-bindings: interconnect: Combine SDM660 bindings into RPM schema
  - icc-rpm: Add support for bus power domain
  - icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check
  - icc-rpm: Define ICC device type
  - icc-rpm: Add QNOC type QoS support
  - icc-rpm: Support child NoC device probe
  - icc-rpm: Prevent integer overflow in rate
  - icc-rpmh: Add BCMs to commit list in pre_aggregate
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJhxGkPAAoJEIDQzArG2BZjsRwP/3nr3s4b60PZ9hoxSxcBmmoD
 OAwd1tIeyXGxkeKHeJDdDj92hvgdvZwpl/H+wLnzy4VZmNqrIkREl23KaSlLeJE7
 P4U0ZUj7DYqXhR6+D1MiWa8+2rzQ/kqbDiXsFPEQL5Wa2/rGVgq95D/znz5Szv6f
 EtZUDBBtzR9s56LlL9+pprApWRz4+bf4YfX6AsMuKaKedjqzEKxLov2+wC+6zGoV
 2vkFQODxntsoZ95cwRz6GVBAZle/6O/NiSc6ndx/MpPhIQpsr2F0Er1nsgERxDum
 EsC3JVl+7aoHTym7npFp/JT04YBpHC3l7SnJff0EDws7MSiBjkp1WNIlYwP5juuA
 PZ3ziLtSzy36Vi0OVpykZSdwbeS9lNuz58CI74fIzcfGA1H1q3s8K4JHS7WMcgsQ
 EgghbCaiREZKBhZa6gMn4d6cufTpqAImDYae8gD788ziw7x+Pr3P6RgWbn+PE7mI
 odlx3OKwnCIsDPTj+5B5rXFKkfzV7grX1HI0sUZDIJ8Cv4Qs1kcLWP6Sg4ZafOMj
 ZcwYoTo9dMy81aDfEKIlpXR2ILxcb4vJTNTSdmFsPmNX+01X8rPlk/uCPPx9nClW
 acpqJLfCMKKbSwoZwrkWZQo2XCJBq/jan5dg8Q/fMLsqDORUtmnkK+hzR75mHHhP
 IydRk18TN1TQUhnNiFcd
 =dXxk
 -----END PGP SIGNATURE-----

Merge tag 'icc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.17

Here are the interconnect changes for the 5.17-rc1 merge window
consisting of new drivers, minor changes and fixes.

New drivers:
 - New driver for MSM8996 platforms
 - New driver for SC7280 EPSS L3 hardware
 - New driver for QCM2290 platforms
 - New driver for SM8450 platforms

Driver changes:
 - dt-bindings: interconnect: Combine SDM660 bindings into RPM schema
 - icc-rpm: Add support for bus power domain
 - icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check
 - icc-rpm: Define ICC device type
 - icc-rpm: Add QNOC type QoS support
 - icc-rpm: Support child NoC device probe
 - icc-rpm: Prevent integer overflow in rate
 - icc-rpmh: Add BCMs to commit list in pre_aggregate

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: qcom: Add QCM2290 driver support
  dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support
  interconnect: icc-rpm: Support child NoC device probe
  interconnect: icc-rpm: Add QNOC type QoS support
  interconnect: icc-rpm: Define ICC device type
  interconnect: qcom: Add SM8450 interconnect provider driver
  dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings
  interconnect: qcom: rpm: Prevent integer overflow in rate
  interconnect: icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check
  interconnect: qcom: icc-rpmh: Add BCMs to commit list in pre_aggregate
  interconnect: qcom: Add MSM8996 interconnect provider driver
  dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings
  interconnect: icc-rpm: Add support for bus power domain
  dt-bindings: interconnect: Combine SDM660 bindings into RPM schema
  interconnect: qcom: Add EPSS L3 support on SC7280
  dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
2021-12-27 10:23:35 +01:00
Akhil R 9f01881bea dt-bindings: gpio: Add Tegra241 support
Add the port definitions for the main and AON GPIO controllers found on
Tegra241 (Grace).

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-23 17:12:11 +01:00
Arnd Bergmann c03b7ba969 Qualcomm ARM64 DeviceTree updates for v5.17
This introduces initial support for the brand new Snapdragon 8 Gen 1,
 aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses,
 TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and
 USB currently supported.
 
 SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo
 Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are
 described as thermal zones. OnePlus devices gains msm-id and board-id,
 to facilitate a single firmware image for the multiple devices.
 
 On SM8350 the Sony Xperia 1 III and 5 III, as well as initial
 description of Microsoft's Surface Duo 2 are introduced.  On the
 platform side, LLCC, QUP nodes, redistributor stride and all the
 low-speed QUPs are added
 
 MSM8996 gained various regulator fixes, and adsp firmware name to
 faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained
 touchkey controller definition.
 
 On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and
 regulator definitions, USB, eMMC and SD-card and a simple-framebuffer
 description.
 
 MSM8916 has the mmc aliases corrected, to stop the storage devices to
 move around and the RPM sleep stats memory is described. Support for the
 Samsung J5 2015 smartphone is introduced.
 
 SM6350 validation errors are fixed and and description of the audio,
 compute and modem remoteprocs are added.
 
 A couple new revisions of the SC7180 based Google devices are added.
 The SC7280 platform gains venus and a few fixes. The CRD development
 device is introduced, with the EC, touchscreen and touchpad.
 
 On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based
 on CPU frequency, are added. As is TX, RX macros and SoundWire blocks
 and used to enable audio on the SM8350 MTP.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmHDQQobHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FzJAQANU2GokY9/BRKTNJjZFj
 CIvSBWpBD6wAzqdWqIJBRSbhWDO58Oyu1qRMOw5iylKCqkb89vbcKorpwq6/8l7j
 Sttox8iRtd/N5GqgwwFB109DSWs6TqRd4rnbYd9au3c21RSLYYgLa1v9f6OobdZi
 vbY6DQBTHYYClLPYvn5iUMy6JGTFsR5EAjcEJj0cZ1178tKP0Do38Hldeo/wvX37
 oqA1GXG3uCtbYKG+gJcNSfwvOo9q0ki5oacGuUWVOWkL+Vj2LiMbhhzDJlu8tF8M
 VzAy3o6UN2+hquJVxQsfs5wfgcLVK/IdMyjiaEe5GZd9SWmtSt4n+CUQ0ZkDPBfR
 KkIOci4M0WoHlmY/IPELS9MfDxdDeJn+u8v8jpM/vEZMOSCZiBFcvNPPD7aBP9VK
 c+f8eVf21NGxfZ4zA9bkp9aBACyv4zfjo/iFd3TmT1P78sDOJMI7pG3APHOYY9Fc
 ZKT9uTcca9KgVzTZcLzvD69OudrHP9pw6QdT4OT1fy/EPtj2+9hHN+cfty+iAtDN
 sgIcFmWBryO6OctgF+CA/FuojYi6PB2WOfvECljnmQwfIxDnz/6EGbbG97yH0FZr
 TE4BasLkdQZZPrTxgj1kpu++CrkFeUhpsEciQjDxYoCJ3mFAXNws6prxKpTh1jcg
 dalfKkiEX1ww3WsfciUb0X/V
 =/hGD
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DeviceTree updates for v5.17

This introduces initial support for the brand new Snapdragon 8 Gen 1,
aka SM8450 platform, with SMP, CPUfreq, cluster idling, low speed buses,
TLMM pinctrl, SMMU, regulators, clocks, power-domains, UFS storage and
USB currently supported.

SDM845 adds new support for Sony Xperia XZ2, XZ2C and XZ3. The Lenovo
Yoga C630 gains a few audio related fixes. The PMIC's VADC channels are
described as thermal zones. OnePlus devices gains msm-id and board-id,
to facilitate a single firmware image for the multiple devices.

On SM8350 the Sony Xperia 1 III and 5 III, as well as initial
description of Microsoft's Surface Duo 2 are introduced.  On the
platform side, LLCC, QUP nodes, redistributor stride and all the
low-speed QUPs are added

MSM8996 gained various regulator fixes, and adsp firmware name to
faciliate pushing firmware to linux-firmware. Xiaomi Mi Note 2 gained
touchkey controller definition.

On SDM660 the Xiaomi Redmi Note 7 gained power and volume keys, RPM and
regulator definitions, USB, eMMC and SD-card and a simple-framebuffer
description.

MSM8916 has the mmc aliases corrected, to stop the storage devices to
move around and the RPM sleep stats memory is described. Support for the
Samsung J5 2015 smartphone is introduced.

SM6350 validation errors are fixed and and description of the audio,
compute and modem remoteprocs are added.

A couple new revisions of the SC7180 based Google devices are added.
The SC7280 platform gains venus and a few fixes. The CRD development
device is introduced, with the EC, touchscreen and touchpad.

On SM8250 CPU opp-tables, for scaling L3 cache and DDR frequency based
on CPU frequency, are added. As is TX, RX macros and SoundWire blocks
and used to enable audio on the SM8350 MTP.

* tag 'qcom-arm64-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (92 commits)
  arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
  arm64: dts: qcom: sm8450-qrd: Enable USB nodes
  arm64: dts: qcom: sm8450: Add usb nodes
  arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes
  arm64: dts: qcom: sm8450: add cpufreq support
  arm64: dts: qcom: sm8450: Add rpmhpd node
  arm64: dts: qcom: sm8450-qrd: enable ufs nodes
  arm64: dts: qcom: sm8450: add ufs nodes
  arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes
  arm64: dts: qcom: Add base SM8450 QRD DTS
  arm64: dts: qcom: sm8450: add smmu nodes
  arm64: dts: qcom: sm8450: Add reserved memory nodes
  arm64: dts: qcom: sm8450: Add tlmm nodes
  arm64: dts: qcom: Add base SM8450 DTSI
  arm64: dts: qcom: ipq6018: Fix gpio-ranges property
  arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible
  arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones
  arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node
  arm64: qcom: dts: drop legacy property #stream-id-cells
  Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer"
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-22 16:49:32 +01:00
Tony Lindgren 9206a3af4f clk: ti: Move dra7 clock devices out of the legacy section
I accidentally added some dra7 clock defines to the legacy section that
we want to stop using. Let's move the defines to the right location.
Note that this is just a cosmetic fix.

Cc: linux-clk@vger.kernel.org
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-12-22 08:27:35 +02:00
Arnd Bergmann dfdded9b0b Qualcomm DeviceTree updates for v5.17
To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe
 endpoint controller, as well as enables these for the FN960 device.
 
 The SDX65 5G platform is introduced, currently with definitions
 necessary to boot to a shell.
 
 The undocumented property "input-name" is dropped throughout the dts
 files, dwc3 nodes throughout gains more specific compatibles and lastly
 building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to
 its normal operation in 64-bit mode.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmHBVYobHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FruwQAIkncBLbeVIk2ioM7xEH
 WRpd5yDczi2LVsXaDCjmCu9s4MMMaDYYUiQWSh1etovEdN+x8t4R8gzeNYDkZNX3
 T0g3+x7bL0xjynQo4HEje8fzYZryCmWZfmYbqggawLWynUDXyYLSNFh+bxKEFpLw
 uxOiNXzmTRZQhNUE60JV2BJCNuZls+pjthURbTAGWZ/LoBhgW6RjADOqGHVz1eF0
 RIz8YPRaVN0lTrBxPAwwJDJ4AWo5nG5zNiy0/0fxnxabvr32N/2YBl2dCJ3hMgZB
 /OIsMS21b2wYbOR59NgD/vauGXUeGnophcWnMmIEPA9D/ZiJiKYNteWLfEbUNKnC
 sy/XXZbo0y+uHBIxFsmg8m4Dh5WBmkAgoINwEZ/0BFTVoCbQq6Oi8xnkkvPc61L1
 r/ZUpFr13xzV3s1e2dSPAlgW3P7WfgTyXTN/5YkNi4dT47uD71EiHTDvcUEocFcg
 gPyjm4SSRo/1HUqPOJMeFnVx5mv4cCo2OrnkQWKaCENgWg07wFq3lXJjOB666jMF
 OEXRKPmH8tA3eVexy0tayO1bps/Go2MGjERtRxz/EUw8UDWO/0SerhplYD/vMmFU
 NLOWbwIAUoJT5daiAsUYJQr1KBnJMlkFsim0Nd962rKZTX4F5cKkkJv8ucrwN+01
 SZoQVfDBHlZtMuMsJn/Sxqk/
 =SjjW
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHB5qAACgkQmmx57+YA
 GNkkxxAAw0GqWdbEiF2rNpTHsZgJnsDJpIfxFgONdzVA6C4pDi2YUlp5GgKitBzQ
 zok21TebNPTNOEf7q8FqubpleDU+x913eJaYYQA8DRmx5fHeNkzYt6jMAE5c3V5Y
 fpcRSLV0GLiT48tzhK/r3917/jZWnjcp7eKWDWByyavzkphgcVTbqYYBYZVltkzH
 s/nyIu8zdSvCmOLMipRrH85GSVi372DU6bD/ejHdz0yXv/RsT2/2DZA6ZeJSF3FQ
 qpZEnGxnizGrqcP6b3g6xVjVEYmwHC8js3B8scUyM/I9j+h/LAQD8yRXLivj5kwm
 tM/mtCGaIfux3ca1B0cRe5DTZP3jPa7vKUmIxTVJsjfgKyco9vwJlPIyHdSBKqQQ
 n7HtB2jBruCjb2IhtHjhCC0htPKFpEUs6k1SK3UB+I3usEfMhut/FC5RFU9Pz6ta
 GtQ8k6ucdJySQDxgOF62EFqEjQmcDNOqTl07rgosXx4zrh4TYNlvW6v6/N3QblPp
 8eRQGgK6HZMAypL1HgeEeYtYhK6eyRCfmNrQ+U2w1o/VRsRwwsLC6g4YENyEYm+1
 yVQjPyEgo9KZah3tYtc8pxAGs3E6ulyHMhBZtHh1gWjSNyDTEBvYjcuKE1Javxmh
 dRRgIoymJG1f7b5zACkimDuvB5A4DOJ6pUvpvpad6Cv724J7ixA=
 =rvAi
 -----END PGP SIGNATURE-----

Merge tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm DeviceTree updates for v5.17

To SDX55 this introduces the description of the IPA, PCIe PHY and PCIe
endpoint controller, as well as enables these for the FN960 device.

The SDX65 5G platform is introduced, currently with definitions
necessary to boot to a shell.

The undocumented property "input-name" is dropped throughout the dts
files, dwc3 nodes throughout gains more specific compatibles and lastly
building of the Dragonboard 410c DTB on ARM32 is enabled, in addition to
its normal operation in 64-bit mode.

* tag 'qcom-dts-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: Drop input-name property
  ARM: dts: qcom: sdx65: Add pincontrol node
  ARM: dts: qcom: Add SDX65 platform and MTP board support
  dt-bindings: arm: qcom: Document SDX65 platform and boards
  dt-bindings: clock: Add SDX65 GCC clock bindings
  ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32
  ARM: dts: qcom: sdx55-t55: Enable IPA
  ARM: dts: qcom: sdx55-fn980: Enable IPA
  ARM: dts: qcom: sdx55-fn980: Enable PCIe EP
  ARM: dts: qcom: sdx55: Add support for PCIe EP
  ARM: dts: qcom: sdx55-fn980: Enable PCIE0 PHY
  ARM: dts: qcom: sdx55: Add support for PCIe PHY
  ARM: dts: qcom: update USB nodes with new platform specific compatible

Link: https://lore.kernel.org/r/20211221042154.3621955-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21 15:37:20 +01:00
Arnd Bergmann 13ee75c7b5 Qualcomm driver updates for v5.17
This introduces RPM power-domain support for the SM8450, SM6125 and
 QCM2290 platforms. It them clean up the platform-based naming of the
 resources definitions throughout the RPMh PD driver.
 
 The last-level cache controller driver gains SM8350 support.
 
 The RPM sleep stats driver gains support for several older systems that
 had a slightly different memory layout for this information.
 
 The socinfo gains SM8450, SM6350 and SM7227 definitions.
 
 In addition to the DeviceTree binding updates related to these changes
 new compatibles was added to describe the SM8450 and the Kryo 780 CPU.
 
 Lastly a few typo and style fixes are introduced.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmHBUg4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FObUQAOCTBSbL/US0wCCUEHPq
 MScjFtPDAV88bJi9uRzi5lalwPd/3yPZu+XLcCV/CjRj6nlGAbua2EcogvMsM1Lj
 rgHZopKnnDOHEFII2ZZ3lyJN4EntvSGHtnm/i2Jd7n3nB52zBkuRpgn3mi32QWoL
 QmGECClAPFBlQi9P33yHDZ/XC8ZK1y982G+Pb8SD6guxmtGxXCm4SaZ4qwVya53s
 euBl+nT/snARPEwaqRoGIsvs+fH2BcoJbug19MLQ+3Q4K9ycxQkWalzcMsLM/EjT
 H1JGjoaHbTpNhyMmKDqN2jS0CkvoLiYOIvhAbqw6l2HluRkn8QhcDOJJ9RHl2oB/
 EqYkK457F7smA0Z9vViuaEZJWfyPNt0z2c7zcpf73Iuk8cBM+48MUQ1UOwyvQh3c
 8AeyyAkgyYBWv58h5rLDS2fqD+tWx4hz6tqxyYojsxYjQkyWRDU6540tGSDeVAt+
 SUQ9qFXWyG7R5Z3GBVHi7ztXnkl6vYZUF05fhZrkpw9YrGlmu3wK/3Rcg9ZIECOg
 Q0UA/GQsqQtCqmzkRQsur/ljEbCrmtiB6JvG+7cnQIWPwcN/4Ho3wyfXvtzNvNki
 dMIpd+7NKkTaj1HUaH5qEnyO4szUpMoFfOrtqzlucH5dGG6fppY3svVWzuxLcbDy
 8+b+/aDuWa7HUXpBbPaK7H7U
 =ovup
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHBy8wACgkQmmx57+YA
 GNmS3xAAhIPIdMWF76Gb7eQu0UWrbuACSl0Nkt5SRbRyjX0BHectf+ssXUzR6r2/
 l8Uf2fkBYP5UWVUbWXlKPlmwmdQo/lAGYeHvi/lx3W4ORvIe6CRTeIS0q0DLPwSV
 H7iH8lnoFozIITt+6N+LhN9VME/Zpo8E/t2Wt47mkSkV/2hP6Adrgh5f4pz4KMcl
 hHQcAhi0/3DTEoGjczBDcTXMIt8nUPSwTnd1ktOaD0avRgKgiiLslvzjTxLMXRuw
 aDInx8uIMBswbEE0ZtG1aFrYZ54Y3DAm65n4aZfOPo3OlLjiosOqT1pvKWkpF/u1
 OYcQzVEdUnEwZKB9BYzkTFVtK3ptE/5nNFg4HkclZATrqvEfQ6I3EbM9tvtY6GV+
 BUUjxOthWq0Rnazd3BkOJvsepSndB1dOfxAunBk6m/r44shWWjLKGRI3jd+0QgW2
 UVd0hy5pC28OZelGgSAU0PVQyHYl/82pRu7UCpHVaOg9mvuwgURChr7ddGi9XWVG
 cMChFAumH/hvnQrRavONPUqaTjP62hRkOqjA/bvc3jFuAgFWqvSrc+z1AvqKw4Uz
 0ks+tjoHrQ839EZB0g/LDk7K8MDe8llvOk16gzqNxplQJe2WYaRZ9S0GD+3MC1Wz
 sSIyMsFLhfZJ2Z7TNOqLTPPW3jfoU3ntNzHUY8gCpTSh8DVkbtQ=
 =NlpZ
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.17

This introduces RPM power-domain support for the SM8450, SM6125 and
QCM2290 platforms. It them clean up the platform-based naming of the
resources definitions throughout the RPMh PD driver.

The last-level cache controller driver gains SM8350 support.

The RPM sleep stats driver gains support for several older systems that
had a slightly different memory layout for this information.

The socinfo gains SM8450, SM6350 and SM7227 definitions.

In addition to the DeviceTree binding updates related to these changes
new compatibles was added to describe the SM8450 and the Kryo 780 CPU.

Lastly a few typo and style fixes are introduced.

* tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits)
  soc: qcom: rpmh-rsc: Fix typo in a comment
  soc: qcom: socinfo: Add SM6350 and SM7225
  dt-bindings: arm: msm: Don't mark LLCC interrupt as required
  dt-bindings: firmware: scm: Add SM6350 compatible
  dt-bindings: arm: msm: Add LLCC for SM6350
  soc: qcom: rpmhpd: Sort power-domain definitions and lists
  soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
  soc: qcom: rpmhpd: Rename rpmhpd struct names
  soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
  soc: qcom: socinfo: add SM8450 ID
  soc: qcom: rpmhpd: Add SM8450 power domains
  dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
  soc: qcom: smem: Update max processor count
  dt-bindings: arm: qcom: Document SM8450 SoC and boards
  dt-bindings: firmware: scm: Add SM8450 compatible
  dt-bindings: arm: cpus: Add kryo780 compatible
  soc: qcom: rpmpd: Add support for sm6125
  dt-bindings: qcom-rpmpd: Add sm6125 power domains
  soc: qcom: aoss: constify static struct thermal_cooling_device_ops
  PM: AVS: qcom-cpr: Use div64_ul instead of do_div
  ...

Link: https://lore.kernel.org/r/20211221040452.3620633-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-21 13:42:52 +01:00
Dmitry Baryshkov 22c755708c dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-6-vkoul@kernel.org
2021-12-20 19:10:10 -06:00
Martin Botka 8712107740 dt-bindings: qcom-rpmpd: Add sm6125 power domains
Add dt-bindings for sm6125 SoC RPM Power Domains

Signed-off-by: Martin Botka <martin.botka@somainline.org>
[bjorn: Added compatible to binding as well]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-1-martin.botka@somainline.org
2021-12-20 19:10:10 -06:00
Arnd Bergmann 0fd319105f Samsung DTS ARM64 changes for v5.17
1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
    E850-96 board and WinLink vendor prefix.
 2. Add pinctrl definitions used for Exynos850.
 3. Minor fixes and improvements.
 4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
    of USI node.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmHAZ5gQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD18hgD/9k4ki8CxbmuES6l9+wPlFQaPjmPePxF/P5
 nrFQRQL7kv+X05QBmswqGoZjh/ABPtaJan4Ue32BaMSr2vUrxauDec4046foCfcz
 cBttxFlcvkr7h1sHWZwrpqvcEG1QDcxSc0BUtCA0fFwNwcG8oadw5u1183VXFbwk
 UOwAZAZbqgZwRk/6LARrEXRp1P0qyyRnBuk6g9GFPDVvwK1KGSrfGnTQYDbSZBkt
 dHmvDMDR+0vMQgV/D1nHFDsKBRVFykKy9t5Xg+rvGHome7AkRtawibUcIB4ANQcz
 taxZA5vnlMDmvtNMRCHfx2HLzNwf1t1BGTZFj/EsVU+EJSf+juNSahRLiA0VC9uK
 x0jaRnhPwg7FkyksZZjDrSRZWe8GNYjBsE9nJ5EwH+H9Nf/PZD40eWgKlAEXbF0U
 tHfHX+xEoqy5o3qryPk1nLMEs3zXAqyAb3XRyz08m0j1oARPZgv/oi9h8Pgm5Dob
 SS7J/HiaNFipNyCcLz2D0JDQo47Xz5WLmYAsyUDgR1ddW/QphhafFqhhJt+LMqdx
 O+vG7xgBeZsQvlSsOlQTE0r541i6aAxgxsudVSFo7wlxA1LEn3WK5kC8W+GjzSsE
 1eN4Y3UvbIxv0oVuN/PfzhMZeVPLpr6M+0KnXaODfYtJNczQFizAxh9hfQ5cnmj+
 I2Zzzmsc1A==
 =A5Of
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAnZYACgkQmmx57+YA
 GNlQihAAml4a+mnX6NOZk6kMr/I4RuYESWDb4Gvinbd/GhwvSTx7i9lPWkfnvBRt
 vSyZgy8MbPLKcFVVrjI6L2IER+FnCpQH5iJyCPoEQ6lqpN6gzL8m1EEeOSuGf5NR
 JNFeMmFPCJbxHZnYPWyGgFDPo/f2sQxXRS69bNBGvMjH3ZCI1cLy4cow/2FuDxH0
 BfQh+zdYEdR9Fi/hdHIk8KU0pwzWzJGRRbMgsRUBDJl2B8UWM0xb4RpbEEEyag7H
 JOrvIzvQuT0LQvaM73DUJ/2UbQ0Sfhf5F0lWGhUPKLDTncKqe7tUNSqXRAjAYwtF
 0Jpp54cpWIjsjWijQ9LCcf0MV6zrEky5HtLYcNFooUR7/LdmJNogfFvBVhED52dD
 o4Z5++MFR4H/oLjSkK+ehjXp+lW0p+7fCm9boRhVOLTYK8UdZbc2j1oSsGoWUc2C
 KD4o+VXqo0/X48Zp90yPVKQf4CxV04+IJ0op8HTFEfvT58RvaDv96dSPj1XMrIhR
 1rL4yC814oPdQjbRI5IZfIyChpWGs9XOVETsdu59K/HXBY9ASO4oM+RyJJJxHJrS
 87DGaXymgazguAm/twlfMmAPFN2E8pRO9uJE7QH27wzG0O60WwreSXLxG2F3YywA
 2qUR0BpZ9MHoZTyiUObHojLMxcFoD0ObKiaZi3tsaySkqrcLc1Q=
 =qF6s
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Samsung DTS ARM64 changes for v5.17

1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
   E850-96 board and WinLink vendor prefix.
2. Add pinctrl definitions used for Exynos850.
3. Minor fixes and improvements.
4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
   of USI node.

* tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  dt-bindings: arm: samsung: document jackpotlte board binding
  dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
  arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9
  dt-bindings: soc: samsung: Add Exynos USI bindings
  arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7

Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 16:13:26 +01:00
Arnd Bergmann 33f8b4862a i.MX arm64 device tree change for 5.17:
- New SoC support: i.MX8 ULP.
 - New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2,
   i.MX8 ULP EVK.
 - A series from Adam Ford to enable Camera and USB support for
   imx8mm-beacon device.
 - Add overlays for various serdes protocols on LS1028A QDS board using
   different PHY cards.
 - A series from Biwen Li to update LS1028A devices around RTC, flextimer
   and PWM support.
 - A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M
   devices.
 - A couple of changes from Lucas Stach to update nitrogen8-som Ethernet
   PHY and I2C1 pad configuration.
 - A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3
   dtsi for Librem5 devices.
 - Add cache descriptions for i.MX8 SoCs.
 - A series from Vladimir Oltean to update ls1028a-rdb device tree in
   order to share the DTS between Linux and U-Boot.
 - Random device addtion to various i.MX8 and LX2160A based devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9hc4UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM5tZAf/chwOQUH6gwyc76vb2mzcMlYq4jPN
 vMxJZ6fJBf+QglOrGfSznl11SHNCGs+NBDvRkJt9JLKj1fHh/jUTZf5HCRnK62lH
 YB+w2XxlthufTPujkVXM10Dsx65Up67Mo3ZN5/3M6Fd+w/P8YUzPEL0jD2dm7CDM
 rKqe57kcJ6ZaJgASuPdVh51fwpmbCNOQZCRgg4Y+sunXzUVyjA/jOUaeQojg+m2e
 TTe80CH+3fugipWkotAa8ypxAJEbeEsPvVB711UxTY28rE2BqDkcPMyOiq+9HW+M
 AoqPeyeZffyJGwLblLCQTZzMEuWU9G87H+fda7b8sg7yFPvjefaj+4DbdA==
 =ARjB
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAm/QACgkQmmx57+YA
 GNk/4g/9GG9YYbOHzLDSit6I92eAwMhIxCE7ls2RrB/JBIi1v13qZ85YTPw9w1Bc
 klRXP46fI6dVl7R7t0Vt2zt5MpuNnKAMZsHQR+UvB/Zll4RC7n29NEpWyFW0i4Yv
 /G28Whmp1sQs8szrWwvOlxWMY3fSlQMKM4vrtJUU6Che5ec+PwgsRL2rWf5/cnJh
 E9HqQ3eJMyP8cdayRnlUCI8yWAdXHkeDQhl7Mu97eX4l7Ka2OkDseEZY+HgRmQSv
 Ee3X1EPxFHau9f842NtIwNz54Vdibfh+UHCzMeWOtDZXF8bhWVYp13joPNDM7AWM
 0oYMh966t/JuU4cPCQxed61C9Laxg42TkCbfuU7dC5pqKlCdSZSKOmLe7c6vw3Vf
 IGQwVgMh8/c3oJAbbPqWz+kfCg3O2KNzA3MnsQuizoLEwa5R4msqtk6FZ5uqR6d/
 RYL9eZKzeZWPXwth1KCEx+qLFWuRxC5cdK181Hc/Srm3bzNf/6vfCcReRCvlfOiE
 lU1kzHLOKtfUeWSEK3WFnWuTbU68NaH8rUZXpuTlV1kYEeBf/mD4aTOUW9hOh0v6
 EYwpk2QYPBcUUYR2KC6gfyJTTwihn3FR8+RiJR+VFjlhNrNHbrNmp3Vo19yjgu/Y
 brbFPEitQPnvXdrGAIfck9vHhO9VJ3xygo9SMowGsaRuFLunW/0=
 =zQ1O
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree change for 5.17:

- New SoC support: i.MX8 ULP.
- New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2,
  i.MX8 ULP EVK.
- A series from Adam Ford to enable Camera and USB support for
  imx8mm-beacon device.
- Add overlays for various serdes protocols on LS1028A QDS board using
  different PHY cards.
- A series from Biwen Li to update LS1028A devices around RTC, flextimer
  and PWM support.
- A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M
  devices.
- A couple of changes from Lucas Stach to update nitrogen8-som Ethernet
  PHY and I2C1 pad configuration.
- A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3
  dtsi for Librem5 devices.
- Add cache descriptions for i.MX8 SoCs.
- A series from Vladimir Oltean to update ls1028a-rdb device tree in
  order to share the DTS between Linux and U-Boot.
- Random device addtion to various i.MX8 and LX2160A based devices.

* tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits)
  arm64: dts: imx8mp-evk: configure multiple queues on eqos
  arm64: dts: ls1028a-qds: add overlays for various serdes protocols
  arm64: dts: ls1028a-qds: enable lpuart1
  arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus
  arm64: dts: ls1028a-rdb: enable pwm0
  arm64: dts: ls1028a: add flextimer based pwm nodes
  arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source
  arm64: dts: ls1028a: Add PCIe EP nodes
  arm64: dts: lx2162a-qds: add interrupt line for RTC node
  arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes
  arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes
  arm64: dts: lx2160a-qds: Add mdio mux nodes
  arm64: dts: lx2160a: add optee-tz node
  arm64: dts: lx2160a-rdb: Add Inphi PHY node
  arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi
  arm64: dts: nitrogen8-som: correct i2c1 pad-ctrl
  arm64: dts: nitrogen8-som: correct network PHY reset
  arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards
  arm64: dts: imx8mm/n: Remove the 'pm-ignore-notify' property
  arm64: dts: imx8ulp: add power domain entry for usdhc
  ...

Link: https://lore.kernel.org/r/20211218071427.26745-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 16:06:27 +01:00
Arnd Bergmann 990102a792 Devicetree changes for TI K3 platforms for v5.17 merge window:
* New Platforms:
   - J721s2 SoC, SoM and Common Processor Board support
 * New features:
   - CAN support on AM64 EVM and SK
   - TimeSync Router on AM64
 * Fixes:
   - Correct d-cache-sets info on J7200
   - Fix L2 cache-sets value for J721e/J7200/AM64
   - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
   - Disable McASP on IoT2050 board to fix dtbs_check warnings
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmG8nQoQHHZpZ25lc2hy
 QHRpLmNvbQAKCRDERh5FfJEW423oB/wMWRML3F6+LKGkDpm6Dme6oV24NzhnACBl
 CQ0me3NpQEq4QELPasRwc9E4WOLGCGtDS1HByCrpCELFI7ET9ebwgo7yxl9nvJm+
 nzSGwWY9/n3wtXhEc68r0if12WRuu59YTrhf+Q5GNF6uh4iv5aSmAfdSQmUljER5
 hs1mZVAQflbxhsG5XR+OUGUvxQZ6Uy8F0OjW++a+ci3QtmQ9y+FUCIMdeLMvXD4C
 efaWtFtselePPqN3AJMRddAgo/rbzXWBaX57LG8oMz4a223Ima7FpVB0sgzsnYh8
 +qG1JqFC88SR9Prjp7n8oaBdopL+ZXOZvernLWonFIGvvodK57ZM
 =DYkC
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAmXgACgkQmmx57+YA
 GNlR3g/+MjiqccCspohN8BRhsOTpDtq7NBM+F/oqwKzr9sktpwWeMz6dI1hjPihz
 spyixzw10lcHdO3me1B8jOV2+Cek8zZzhDHK0tBXZU4AO+lNmgsjyxWs953TMcg8
 eklBb3TpocHfGEuJSzPfTAD1B9QRB3Bl7kMztwE9uNKUCJiXCToIs63i/8QaCjIG
 kNzJOCdndw07h4Ms+6MTlDLbpivFnedU43YyrtYGCovg5tlv02B8452KpbfHAIUf
 MuuCAIYHm/ZAZa8aOfQ3ZsxwwXCYVu77uG14CTQKChOJeOZ9xzf5WFsRtY4EjJFW
 bixwAQ9ZxFuFm8vXPz5vHkNh0nDGdHV2LJ7SVCoFZ/zcxXROH8+ol9/XtHsaShRh
 C5+Ekz8GWvWnVCaeon53vzMXneVRoK6YvxtS1P87uuaM8IH3U8lktmHaJMlD/qdl
 mGLyJs4GRt3tKdqlLB3FvUb1tWSLSZ84fuRHVb/FXY9M/driZYgGymH7axTWJtSE
 m3rB2EMvbYWfdV69J8T0JSPmLwRY9lkJxSvnJulXB/J0yuvqHesrXoZHbiqxkZiM
 adYT/ub6a03yRwoCFowTtOfBGyHOG7SLwrdHQ5dam0dCHjc0SGgJZj+gnHWh0asC
 +/JMhePTxD1fH0UmElRHY1L1of6iWguWXTFgNZhHUxbCj/z+dSU=
 =R9bG
 -----END PGP SIGNATURE-----

Merge tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt

Devicetree changes for TI K3 platforms for v5.17 merge window:

* New Platforms:
  - J721s2 SoC, SoM and Common Processor Board support
* New features:
  - CAN support on AM64 EVM and SK
  - TimeSync Router on AM64
* Fixes:
  - Correct d-cache-sets info on J7200
  - Fix L2 cache-sets value for J721e/J7200/AM64
  - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
  - Disable McASP on IoT2050 board to fix dtbs_check warnings

* tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  arch: arm64: ti: Add support J721S2 Common Processor Board
  arm64: dts: ti: Add initial support for J721S2 System on Module
  arm64: dts: ti: Add initial support for J721S2 SoC
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
  dt-bindings: arm: ti: Add bindings for J721s2 SoC
  arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level
  arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK
  arm64: dts: ti: k3-am64-main: Add support for MCAN
  arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes
  arm64: dts: ti: k3-j721e: Add support for MCAN nodes
  arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes
  arm64: dts: ti: k3-am65-mcu: Add Support for MCAN
  arm64: dts: ti: k3-am64-main: add timesync router node
  arm64: dts: ti: k3-j7200: Correct the d-cache-sets info
  arm64: dts: ti: k3-j721e: Fix the L2 cache sets
  arm64: dts: ti: k3-j7200: Fix the L2 cache sets
  arm64: dts: ti: k3-am642: Fix the L2 cache sets
  arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node
  arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node
  arm64: dts: ti: k3-j721e: correct cache-sets info

Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:55:52 +01:00
Daniel Palmer e82513696e dt-bindings: gpio: msc313: Add offsets for ssd20xd
Add the gpio offsets for the SSD201 and SSD202D chips.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-20 15:48:43 +01:00
Arnd Bergmann b87cd3759d dt-bindings: Changes for v5.17-rc1
This contains a bunch of json-schema conversions for various Tegra-
 related DT bindings and additions for new SoC and board support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8sRoTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUpLD/9aTWMH3DhMh2uKpOOt8TOdNiZXLqec
 GLXFoA3jHNHxEcwOXU6or8Hg4ipZnYgN2tspu2qpI+OvgwsoZcJqu8WAfH+fS2vv
 950OmjAdKBTQhiOO1eSo86Kq00orE6TdMQ3NfTUqEKKcjbiAruy+ojuDfFRoutP+
 UCe7Vl8CMi++MFmvyKBLu2GoDKb2JoKtoabiCxNwchZH3acgWFMfxeLBWNBj6HqH
 W7h+uld9MTg1rEZ7P7ZGspiXh9Nzt8e3e2un7j24L0qDI+s8Ur4XOf+Fms4aAMXc
 Pbme+q4DaA4xcFXVd5kyAKK1f6kYNVNZBHjKMVuPR4zjK4vADAZ2SZ0hFc3pE7hB
 rZtjwp4TphuwGrwNoXE4koi04GZStwnvp/Wr4BlCSyycY2H1UxMHHgMDWLA4WVVw
 JM+9uvjvCe0oE7x6+l4usWMVJrQljWH3IU5w4SXyzowYu5cvbWFhqRieFcg8iDbF
 CnGJGorq6bKJExiIyWtiRR4+m1TGsBq2cNUb1A0qgUTrMq6O2R4AiqSe45wDYSlQ
 z1zON1LILctiQfyCM2vsDLOe4AEyitzQkRPS9zo7Jn6dPnf9k3knpTDdyDS7vU2A
 juR3JOTdHuZ6jNBu5ykJbr3EN54D9nXHEGEl5ToHkahXEpJIC5haQOkRYU+OxER0
 C+gWIEJcroJkjA==
 =aSMg
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAlSQACgkQmmx57+YA
 GNkY/g//Wc6o+0wNZ8DBGSvI/3spHcNdSeIFwprmMJyBd1ho30kDL+jBW+5bYekT
 5X7GC7E/GkbxfvePQkZtS5+qFFdOV5qtQdjLEf2bQc/RuErnwnLttLBTFQpuBNHh
 VFjB+KHkEGtGFjjJ6CCnz57M5m+4NBWpIBwtubEygWhopCAb6as/dvi3F6Gso4lq
 xUhRe7Gx7LiJeqJhQqhGTgLo50oBQOHbXsIKEMuwXDMuhsQnpWVq3srJPr6pfgZi
 Q4cgE7GTKCe2TE7wDk9wKB5ptK6hntXswN51tFEGZk/5PNjot+64LzIRQ47CjpGm
 nisGWyT86ksaVZnXZlRvynbedWasrXITL76ccadbF4vqZGe9G07kw5N+i/t05DeN
 TkvXSBe+4e6q6zAOzrUUCP59R7X+sgC8phYj8al8We7i+Prn5IX+a4Glm4wiOMVv
 n9j9yRr/YPDrLVDjmqIhESzSmq5IZucbuqi7CW+TeaKrILlMaYcWuxXdAd8H9Ite
 krT4RxSkM+DJCW0OGIpYH9EtynHpf1HGhlP05wmrSa+quWa8h7WBCS2D9lFk4RU3
 1cqV1qHLqL+HctxP0LGS2ajT1sUwkgoshijNlknmlwQW+Wzqu56J1H/+toLrH1XK
 20ZALOao6CN344n2A//XVOk0udBShg93KmvTLhv2HQ4SIK5Jlwg=
 =acJz
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.17-rc1

This contains a bunch of json-schema conversions for various Tegra-
related DT bindings and additions for new SoC and board support.

* tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
  media: dt: bindings: tegra-vde: Document OPP and power domain
  media: dt: bindings: tegra-vde: Convert to schema
  dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D
  dt-bindings: host1x: Document OPP and power domain properties
  dt-bindings: clock: tegra-car: Document new clock sub-nodes
  dt-bindings: ARM: tegra: Document Pegatron Chagall
  dt-bindings: ARM: tegra: Document ASUS Transformers
  dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties
  dt-bindings: serial: Document Tegra234 TCU
  dt-bindings: serial: tegra-tcu: Convert to json-schema
  dt-bindings: thermal: tegra186-bpmp: Convert to json-schema
  dt-bindings: firmware: tegra: Convert to json-schema
  dt-bindings: tegra: pmc: Convert to json-schema
  dt-bindings: serial: 8250: Document Tegra234 UART
  dt-bindings: mmc: tegra: Document Tegra234 SDHCI
  dt-bindings: fuse: tegra: Document Tegra234 FUSE
  dt-bindings: fuse: tegra: Convert to json-schema
  dt-bindings: rtc: tegra: Document Tegra234 RTC
  dt-bindings: rtc: tegra: Convert to json-schema
  dt-bindings: mailbox: tegra: Document Tegra234 HSP
  ...

Link: https://lore.kernel.org/r/20211217162253.1801077-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:37:24 +01:00
Arnd Bergmann 9593bdfa1d Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
 2. Exynos PMU: add Exynos850 support.
 3. Minor bindings cleanup.
 4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
    a shared IP block between I2C, UART/serial and SPI. Basically one has
    to choose which feature the USI block will support and later the
    regular I2C/serial/SPI driver will bind and work.
    This merges also one commit with dt-binding headers from my dts64
    pull request.
 
    Together with a future serial driver change, this will break the ABI.
 
    Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
 
    Why: To properly and efficiently support the USI with new hierarchy
    of USI-{serial,SPI,I2C} devicetree nodes.
 
    Rationale:
    Recently added serial and USI support was short-sighted and did not
    allow to smooth support of other features (SPI and I2C). Adding
    support for USI-SPI and USI-I2C would effect in code duplication.
    Adding support for different USI versions (currently supported is
    USIv2 but support for v1 is planned) would cause even more code
    duplication and create a solution difficult to maintain.
    Since USI-serial and ExynosAutov9 have been added recently, are
    considered fresh development features and there are no supported
    products using them, the code/solution is being refactored in
    non-backwards compatible way.  The compatibility is not broken yet.
    It will be when serial driver changes are accepted.
    The ABI break was discussed with only known users of ExynosAutov9 and
    received their permission.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmHAa1EQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1+/HEACSadLl5gVkHa2IDfnG5q8b0rWK2/qLNsKR
 YTLDB3XnLWMEZs7TMDqT6OtTKaQSJOlUAVKL5ZkZ9W0DNcG0mWcMdIPJ2HH8nv9Q
 oVwJnOpDVFRal/zligg6JO1Rwly9ZFJryg5o1k3Ii979wzRf5v4Wu/d7PdVQ53VB
 tmeL2tCE9Cf3LlnGi1Pnjcr9c/Jab62XFTXb/Hp62tXhtfCysVktaVLilTEnVP6D
 VJm842bLVLLGYmerUe7XvnmL7cpN07VzCCXl8QtiXQ92Sgf4hSLmn7CcwyfkVl0O
 vEhK8CrHgx4TenDUnF6DGec/64H+1f26BN0APbJWwoLX7jt595yZspmGhsHL6gmE
 lLNnl0mey5ExuNJTlEXpt4DJNjElA7s6C6kizoFwtIsdJWpnxLM+TB9CuqG2rS0o
 nRqEX1uIEYYIx4y3LK334Sctwnh0J90J40LrOzRNII2fwDa5THsckudgxCitUi+0
 xeX8NelVCAZrrzVWydCrDim7cT/VHPE1BC97vcVcViFFFjJt1clwn+gajGz7ffrt
 zm+XjubkaGWr81GivQK+axmZhg78229RjY2TYjFiDy7sPUnbDpT3JRxLv1Nh/xh8
 7nrzZoy0sZTdJ4j4n1+UkykoOzWJ96GifqIlqZBPOIHhVC0zSgGQFrQ8hKF1fdWb
 2BqdvGErUg==
 =2Ed8
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAlD4ACgkQmmx57+YA
 GNndpw//awblW/2vJ2hayxPCwQknzNXeEHn2jSQJ8j92Ep+Z90oyeiA7woPBepl2
 QxgLJlNRt7GGbLEH3R0wpx0kg5w4ZroHG1dyUxPfF/EFfnHpuCLNuUFnj8Cl/fPw
 14o2VLI7NBZFxK4pZYlrTX0QUWEnDET6G/LO3IL+/YelU8aBQZVBfb9Hvj9OnI1h
 juIPrfwaUNbl37HwfQU5FftQYJnOcy0EBiSOaqPoYpyIHguxU1QZ5mZy5M0iytGV
 HZFFYOfAs2l7kD+CVchtnGeIyWUinW7d4hRTS4qi4QP51pnaAefFnxHLKz9RwgMf
 FCKZUax4/t7ifDu9b2sqiT8htToY8/xpoHyi2YjQTvyM3vOTi2OLWtWbLv4fnybi
 L1MCAogcG/GCcTYECyGjSnfFV5c5CYIWEPqCJ50x4odj288OGSvtEZ2Q27j/HCvk
 dlhrAQyL+fIWt+U7LM9FnJRSwgD1fplvtXncuVl7J3oA8uXYZg5tw6LIFBkxQTMG
 Qypc5nxVtZK3Qz1Q59Q9zzZTE0amHr0m2uYGS6JOnIG6sbeApSLlxSW4+NMOLSMx
 BOfSZa1etm1TBx3fI0O0HjUb4MOnUwDoWrUrV5MkJohFtqvAoQMQejtjt11+ffGn
 SOTLAGE2VDTzCkAJs3gSLsESq6uB0wQFUiT68CyrR4ify61qZSs=
 =pxdx
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers

Samsung SoC drivers changes for v5.17

1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
   a shared IP block between I2C, UART/serial and SPI. Basically one has
   to choose which feature the USI block will support and later the
   regular I2C/serial/SPI driver will bind and work.
   This merges also one commit with dt-binding headers from my dts64
   pull request.

   Together with a future serial driver change, this will break the ABI.

   Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards

   Why: To properly and efficiently support the USI with new hierarchy
   of USI-{serial,SPI,I2C} devicetree nodes.

   Rationale:
   Recently added serial and USI support was short-sighted and did not
   allow to smooth support of other features (SPI and I2C). Adding
   support for USI-SPI and USI-I2C would effect in code duplication.
   Adding support for different USI versions (currently supported is
   USIv2 but support for v1 is planned) would cause even more code
   duplication and create a solution difficult to maintain.
   Since USI-serial and ExynosAutov9 have been added recently, are
   considered fresh development features and there are no supported
   products using them, the code/solution is being refactored in
   non-backwards compatible way.  The compatibility is not broken yet.
   It will be when serial driver changes are accepted.
   The ABI break was discussed with only known users of ExynosAutov9 and
   received their permission.

* tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: soc: samsung: keep SoC driver bindings together
  soc: samsung: Add USI driver
  dt-bindings: soc: samsung: Add Exynos USI bindings
  soc: samsung: exynos-pmu: Add Exynos850 support
  dt-bindings: samsung: pmu: Document Exynos850
  soc: samsung: exynos-chipid: add Exynos7885 SoC support
  soc: samsung: exynos-chipid: describe which SoCs go with compatibles

Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:33:34 +01:00
Arnd Bergmann 87e1287614 i.MX drivers update for 5.17:
- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver
   to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add
   i.MX8MN display related domain support.
 - Add optional continuous burst clock support for imx-weim bus driver.
 - Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in
   gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and
   MIX domain.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9dygUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM7+jwgAle7/Po7Qs0JVrUwkJOWAjNxveXjv
 keEC5o+svPOLIToX1lA+bY2CKlok2n6IIiEkpbgc+C+prTip0zJnJUFFHxuOeMkl
 +/EWTthCAddLwXCdmU6c5HSw8XJ9rkH3YDvd46GkPnZuUiZVVmTYkuZQ25qCbPpE
 f1kCg2RNVruZAOYHmMsoU+WMH3q40dvGSDVXbcHpNZ19qHooUyk/4jcXGlBJKXDo
 iGosWLdqMy0vbK4cWFzorPFyTpaF1qq/o7AppfexT1h0f6aLnuKnBA5JXY4y4bvd
 e+6EZ0VwvtdZBqMNaZLHqltCVA/Y0q2gXGryKUM6n7mGdv/LYictLHPudA==
 =WKrF
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAjj4ACgkQmmx57+YA
 GNlesQ/9HT8YKAUTsFRYbzKaK0tduZX9eFS8kIF6NlhTqD5IIYhwG4zZGhezRBdM
 Xt1DztCKqI5/okIn5mtHa/nPOoXd8mElivqt+z/rNIvdB+QkeVbCAOQvHUXeNS1F
 +sy8PTHLLGZNOGWGzKB4bFtJnc6yawwjz4EukG59cnC+AUePdo3DTT7Xnhf45j+j
 SSYdG2wgcQ5OW9okKov+AcoupFosrC3Zcuswf2lPcxOfZY0x6yalXXfmerRUZR+g
 JKTA3bFVLBG2o7nHcJp9ePh0K03+SfaaT5sSAbFm1DxL4hhtcPQJ2uq7I1kVBWKh
 8gBAy5Q+dNNZI/OQxM5TGB3EiQ20qBEdkxDxW2bUwAuG+Qyazgv5gRp5doU7FQnP
 Kl2f3TkM6/KRJNT3RytesTBSynisC9b4BuzpgFtfCBjK4/LEZSzSG07KHhP+k3pT
 b0FWQlw9+Rvj/stChWZgVRC6G3ALi7NYf5NLrGhsKjEdrAYBHwoh8OniwI4NyqdK
 14qWkPb9ctvh6J1IGQ7c2qG+iXSMc9oogG7dmb9Vas2RI/tMeEOJSWdmEY6TZbSP
 40e3Wews2RlU+lT8291Kuq2Dyj0YbK7dZ38ymy9cVHKvixr5QUEHxkJzICcDPqPQ
 rLdy/VwoSSDqkgNGcdXDdestnEXK7xvhgl/u3zT5RkcxfYxA3Q0=
 =74GG
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers

i.MX drivers update for 5.17:

- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver
  to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add
  i.MX8MN display related domain support.
- Add optional continuous burst clock support for imx-weim bus driver.
- Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in
  gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and
  MIX domain.

* tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
  dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains
  soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
  soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
  bus: imx-weim: optionally enable continuous burst clock
  soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
  soc: imx: gpcv2: Synchronously suspend MIX domains

Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-20 15:07:58 +01:00
Ricard Wanderlof e047d03726
ASoC: tlv320adc3xxx: New codec bindings
DT bindings for Texas Instruments TLV320ADC3001 and TLV320ADC3101
audio ADCs.

Signed-off-by: Ricard Wanderlof <ricardw@axis.com>
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2112151759170.27889@lap5cg0092dnk.se.axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-20 12:47:30 +00:00
Sam Protsenko 51b1a57294 dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
All Exynos850 GPIO blocks can use EXYNOS5420_PIN_DRV* definitions,
except GPIO_HSI block. Add pin drive strength definitions for GPIO_HSI
block correspondingly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217161549.24836-6-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-20 10:35:32 +01:00
David Virag 591020a516 dt-bindings: clock: Add bindings definitions for Exynos7885 CMU
Just like on Exynos850, the clock controller driver is designed to have
separate instances for each particular CMU, so clock IDs start from 1
for each CMU in this bindings header too.

Signed-off-by: David Virag <virag.david003@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211206153124.427102-2-virag.david003@gmail.com
2021-12-19 23:37:54 +01:00
Sam Protsenko a949f2cf1a dt-bindings: clock: Add bindings for Exynos850 sysreg clocks
System Register is used to configure system behavior, like USI protocol,
etc. SYSREG clocks should be provided to corresponding syscon nodes, to
make it possible to modify SYSREG registers.

While at it, add also missing PMU and GPIO clocks, which looks necessary
and might be needed for corresponding Exynos850 features soon.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211217161549.24836-2-semen.protsenko@linaro.org
2021-12-19 23:25:28 +01:00
Arnd Bergmann 527c71547d Renesas ARM DT updates for v5.17 (take two)
- Initial support for the R-Car S4-8 SoC on the Spider CPU and
     BreakOut boards,
   - MIPI DSI display support for the R-Car V3u SoC and the Falcon board
     stack,
   - Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
     development board,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYbxhigAKCRCKwlD9ZEnx
 cOG8AQCFiS+sBx/X7GiG6fshCBhGw4f+9+jsNl2ucQMmUe9YqAEA83HjBLSQ/DnP
 h/VI9JfeGdcyTseWFJwXzm8XChcdWwI=
 =sQeE
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG8pGoACgkQmmx57+YA
 GNkDuQ//TMzztwB+sv9Wd/6fItpqlKN6V80YX89bm4ePEsp6EDtaCAxw7/9+G7+A
 q9iaAHlukyodkMFea0CIOu7yvEUGM/+vuw501KGhIZ2fUR/GxQTZHw84hsQWDd/r
 dRm69sKQsaY/Wu+Rr5Z/0sQJRMbaIbY/fIWGFtKBbDFidJo545xX9ysMbLgSxiR3
 3TxPXeUI9MvGUZvmaRuQ3PdjULDb0y6iEN8rLGjEksQy/5G51V6WrYjGRlN855e2
 bSPHrY1ybYPpRxXYLbFTYD6DZFDj4YnF6sTSoG7w/G0DepFrHMzbI9bSkxFD0DtJ
 +eLvRDwBRQNdlbq/pnCESY4tvFXWKm4cxvSyTn2NjLaEDB2hk+TkeSfCBIJGv5Ao
 /dFOYAEhFUz8D3BD6ocFxDbJGoJhXDvb8J/D6BPaqTppLqdo2VbtOgKnjb99Y0GS
 Ss+uK25+Bmm6SXvpwWkT3GlpjFZ5R4faMuDupddU5Z461WUUXot5EmU3MG8zXjE3
 epC/ElsaxmsgKuMVqt7lrPV0fseJC+ElpXBEnJ9LArhmEoHeo6y0tzoYijuPfgcE
 wjizEw3AotVzeLKgoKFYqVVmvXFvOyocA3KbvwQ3doLxyvcQgXBBYdzSBYwTzOaB
 0ixsdOqwFPqjF12ycRlvMGVbUJPxmyo33XWI29voem83Mpzxdqk=
 =1udU
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.17 (take two)

  - Initial support for the R-Car S4-8 SoC on the Spider CPU and
    BreakOut boards,
  - MIPI DSI display support for the R-Car V3u SoC and the Falcon board
    stack,
  - Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
    development board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: Fix pin controller node names
  arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator
  arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node
  arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA
  arm64: dts: renesas: r9a07g044: Add TSU node
  arm64: dts: renesas: falcon-cpu: Add DSI display output
  arm64: dts: renesas: r8a779a0: Add DSI encoders
  arm64: dts: renesas: Add Renesas Spider boards support
  arm64: dts: renesas: Add Renesas R8A779F0 SoC support
  dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
  dt-bindings: power: Add r8a779f0 SYSC power domain definitions
  arm64: dts: renesas: Fix thermal bindings

Link: https://lore.kernel.org/r/cover.1639736718.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-17 15:53:30 +01:00
Prathamesh Shete a8b10f3d12 dt-bindings: gpio: Add Tegra234 support
Extend the existing Tegra186 GPIO controller device tree bindings with
support for the GPIO controller found on Tegra234. The number of pins is
slightly different, but the programming model remains the same.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
[treding@nvidia.com: update device tree bindings]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
2021-12-17 12:26:13 +01:00
Adam Ford b77beaaee1 dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains
This adds the defines for the power domains provided by the DISP
blk-ctrl.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-17 10:53:15 +08:00
Marijn Suijten 6d24d9546d dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller
Document the required properties and firmware clocks for gcc-msm8976 to
operate nominally, and add header definitions for referencing the clocks
from firmware.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
2021-12-16 13:17:23 -06:00
Bjorn Andersson fe5cf1c34f Merge tag '20211207114003.100693-2-vkoul@kernel.org' into clk-for-5.17
v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org

The immutable branch contains the DT binding and clock defines as need
for the Qualcomm SM8450 global clock controller driver.
2021-12-16 13:17:22 -06:00
Emil Renner Berthing 3021114b3d dt-bindings: pinctrl: Add StarFive pinctrl definitions
Add definitons for pins and GPIO input, output and output enable
signals on the StarFive JH7100 SoC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16 17:24:23 +01:00
Geert Uytterhoeven 810e287e83 dt-bindings: reset: Add StarFive JH7100 reset definitions
Add all resets for the StarFive JH7100 reset controller.

Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added
to all definitions.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16 17:24:23 +01:00
Geert Uytterhoeven 38bb8a7264 dt-bindings: clock: starfive: Add JH7100 clock definitions
Add all clock outputs for the StarFive JH7100 clock generator.

Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added
to all definitions.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-16 17:22:35 +01:00
Thierry Reding c3859c1436 dt-bindings: memory: tegra: Add Tegra234 support
Document the variant of the memory controller and external memory
controllers found on Tegra234 and add some memory client and SMMU
stream ID definitions for use in device tree files.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 16:43:49 +01:00
Mikko Perttunen fc5e0e3762 dt-bindings: Update headers for Tegra234
Add a few more clocks that will be used in follow-up patches to enable
more functionality on Tegra234.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 16:43:49 +01:00
Georgi Djakov 01f8938ad0 Merge branch 'icc-qcm2290' into icc-next
Add support for QCM2290 including a few prep changes.

* icc-qcm2290
  interconnect: icc-rpm: Define ICC device type
  interconnect: icc-rpm: Add QNOC type QoS support
  interconnect: icc-rpm: Support child NoC device probe
  dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support
  interconnect: qcom: Add QCM2290 driver support

Link: https://lore.kernel.org/r/20211215002324.1727-1-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:14:27 +02:00
Shawn Guo 061dbde2bf dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support
Add bindings for Qualcomm QCM2290 Network-On-Chip interconnect devices.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211215002324.1727-5-shawn.guo@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-15 07:13:08 +02:00
Vinod Koul 72a0ca203c dt-bindings: clock: Add SM8450 GCC clock bindings
Add device tree bindings for global clock controller on SM8450 SoCs.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211207114003.100693-2-vkoul@kernel.org
2021-12-14 21:19:13 -06:00
Vamsi krishna Lanka 8f8ef3860d dt-bindings: clock: Add SDX65 GCC clock bindings
Add device tree bindings for global clock controller on SDX65 SOCs.

Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com
2021-12-14 20:53:19 -06:00
Georgi Djakov 4a5cf65d00 Merge branch 'icc-sm8450' into icc-next
This add device tree binding and driver for interconnect providers found in
SM8450 SoC.

* icc-sm8450
  dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings
  interconnect: qcom: Add SM8450 interconnect provider driver

Link: https://lore.kernel.org/r/20211209084842.189627-1-vkoul@kernel.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14 23:44:01 +02:00
Vinod Koul 0ae8c62528 dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings
The Qualcomm SM8450 SoC has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211209084842.189627-2-vkoul@kernel.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-12-14 23:42:47 +02:00
Richard Zhu f6f787874a dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy
Add binding for reference clock PAD modes of the i.MX8 PCIe PHY.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1638432158-4119-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-12-14 20:02:32 +05:30
Peng Fan 057ccd9db7 dt-bindings: power: imx8ulp: add power domain header file
Add i.MX8ULP power domain header file

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 16:33:02 +08:00
Aswath Govindraju beba81faad dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
Add pinctrl macros for J721S2 SoC. These macro definitions are
similar to that of J721E, but adding new definitions to avoid
any naming confusions in the soc dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211207080904.14324-3-a-govindraju@ti.com
2021-12-13 23:21:21 +05:30
Sam Protsenko e522ae91b8 dt-bindings: soc: samsung: Add Exynos USI bindings
Add constants for choosing USIv2 configuration mode in device tree.
Those are further used in USI driver to figure out which value to write
into SW_CONF register. Also document USIv2 IP-core bindings.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211204195757.8600-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-12-13 12:03:22 +01:00
Cosmin Tanislav 3cf3cdea6f dt-bindings: iio: add AD74413R
The AD74412R and AD74413R are quad-channel, software configurable,
input/output solutions for building and process control applications.

They contain functionality for analog output, analog input, digital input,
resistance temperature detector, and thermocouple measurements integrated
into a single chip solution with an SPI interface.

The devices feature a 16-bit ADC and four configurable 13-bit DACs to
provide four configurable input/output channels and a suite of diagnostic
functions.

The AD74413R differentiates itself from the AD74412R by being
HART-compatible.

Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20211205114045.173612-3-cosmin.tanislav@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-12-12 17:09:11 +00:00
Horatiu Vultur 51d0a37dde dt-bindings: clock: lan966x: Extend includes with clock gates
On lan966x it is allow to control the clock to some peripherals like
USB. So extend the include file with these clocks.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103085102.1656081-4-horatiu.vultur@microchip.com
2021-12-08 11:19:20 +01:00
Kavyasree Kotagiri 265d27caf9 dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs
LAN966X supports 14 clock outputs for its peripherals.
This include file is introduced to use identifiers for clocks.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211103061935.25677-2-kavyasree.kotagiri@microchip.com
2021-12-08 10:57:25 +01:00
Yoshihiro Shimoda 81c1655823 dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas
R-Car S4-8 (R8A779F0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:29:25 +01:00
Yoshihiro Shimoda 500daa0e6b dt-bindings: power: Add r8a779f0 SYSC power domain definitions
Add power domain indices for R-Car S4-8 (r8a779f0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211201073308.1003945-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 16:29:24 +01:00
Oder Chiou 083a7fba38
ASoC: rt5640: Add the binding include file for the HDA header support
The patch adds the binding include file for the HDA header support.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Link: https://lore.kernel.org/r/20211125055812.8911-1-oder_chiou@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-11-25 11:54:32 +00:00
Samuel Holland 71b597ef5d
dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS
hardware implements memory dynamic frequency scaling using this clock.

Export this clock for SoCs which will be getting a devfreq driver.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
2021-11-23 11:29:35 +01:00
Samuel Holland c962f10f39
dt-bindings: clk: Add compatibles for D1 CCUs
The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with
3 and 4 clock inputs, respectively. Add the compatibles and bindings.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-2-samuel@sholland.org
2021-11-23 10:29:05 +01:00
Horatiu Vultur ea8a163e02 dt-bindings: phy: Add constants for lan966x serdes
Lan966x has: 2 integrated PHYs, 3 SerDes and 2 RGMII interfaces. Which
requires to be muxed based on the HW representation.

So add constants for each interface to be able to distinguish them.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20211116100818.1615762-3-horatiu.vultur@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23 13:09:08 +05:30
Yassine Oudjana 3e9fdc6b73 dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings
Add bindings for interconnects on Qualcomm MSM8996.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c
Link: https://lore.kernel.org/r/20211021132329.234942-4-y.oudjana@protonmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-11-22 18:25:56 +02:00
Hui Wang 6deb3fb22d clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h
Since the commit b24e288d50 ("clk: imx: Remove the audio ipg clock
from imx8mp") removes the non-existing IPG_AUDIO_ROOT from the
clk-imx8mp.c, and this definition is not used by anywhere, let us
removed it in the imx8mp-clock.h as well.

Signed-off-by: Hui Wang <hui.wang@canonical.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20211109125657.63485-1-hui.wang@canonical.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-11-22 17:06:48 +02:00
Sam Protsenko c2afeb79fd dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP
CMU_CMGP generates USI and ADC clocks for BLK_ALIVE. In particular USI
clocks are needed for HSI2C_3 and HSI2C_4 instances.

Add clock indices and bindings documentation for CMU_CMGP domain.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-4-semen.protsenko@linaro.org
2021-11-22 10:13:18 +01:00
Sam Protsenko 16e0c2474f dt-bindings: clock: Add bindings for Exynos850 CMU_APM
CMU_APM generates clocks for APM IP-core (Active Power Management). In
particular it generates RTC clocks, which are needed to enable rtc-s3c
driver on Exynos850 SoC.

Add clock indices and binding documentation for CMU_APM.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211121232741.6967-2-semen.protsenko@linaro.org
2021-11-22 10:13:18 +01:00
Marek Szyprowski d68f50e6ad dt-bindings: clock: samsung: add IDs for some core clocks
Add IDs for some core clocks referenced during the boot process.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20211018125456.8292-1-m.szyprowski@samsung.com
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2021-11-19 19:32:26 +01:00
Shawn Guo 2475fcfbe4 dt-bindings: power: rpmpd: Add QCM2290 support
Add compatible and constants for the power domains exposed by the
QCM2290 RPM.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211108134442.30051-3-shawn.guo@linaro.org
2021-11-18 15:20:26 -06:00
Paul Cercueil c4a11bf423 dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
2021-11-11 22:27:14 -06:00
Linus Torvalds 3a9b0a46e1 - Remove Drivers
- Remove support for TI TPS80031/TPS80032 PMICs
 
  - New Device Support
    - Add support for Magnetic Reader to TI AM335x
    - Add support for DA9063_EA to Dialog DA9063
    - Add support for SC2730 PMIC to Spreadtrum SC27xx
    - Add support for MacBookPro16,2 ICL-N UART Intel LPSS PCI
    - Add support for lots of new PMICS in QCom SPMI PMIC
    - Add support for ADC to Diolan DLN2
 
  - New Functionality
    - Add support for Power Off to Rockchip RK817
 
  - Fix-ups
    - Simplify Regmap passing to child devices; hi6421-spmi-pmic
    - SPDX licensing updates; ti_am335x_tscadc
    - Improve error handling; ti_am335x_tscadc
    - Expedite clock search; ti_am335x_tscadc
    - Generic simplifications; ti_am335x_tscadc
    - Use generic macros/defines; ti_am335x_tscadc
    - Remove unused code; ti_am335x_tscadc, cros_ec_dev
    - Convert to GPIOD; wcd934x
    - Add namespacing; ti_am335x_tscadc
    - Restrict compilation to relevant arches; intel_pmt
    - Provide better description/documentation; exynos_lpass
    - Add SPI device ID table; altera-a10sr, motorola-cpcap, sprd-sc27xx-spi
    - Change IRQ handling; qcom-pm8xxx
    - Split out I2C and SPI code; arizona
    - Explicitly include used headers; altera-a10sr
    - Convert sysfs show() function to; sysfs_emit
    - Standardise *_exit() and *_remove() return values; mc13xxx, stmpe, tps65912
    - Trivial (style/spelling/whitespace) fixups; ti_am335x_tscadc, qcom-spmi-pmic,
                                                  max77686-private
    - Device Tree fix-ups; ti,am3359-tscadc, samsung,s2mps11, samsung,s2mpa01,
                           samsung,s5m8767, brcm,misc, brcm,cru, syscon, qcom,tcsr,
 			  xylon,logicvc, max77686, x-powers,ac100, x-powers,axp152,
 			  x-powers,axp209-gpio, syscon, qcom,spmi-pmic
 
  - Bug Fixes
    - Balance refcounting (get/put); ti_am335x_tscadc, mfd-core
    - Fix IRQ trigger type; sec-irq, max77693, max14577
    - Repair off-by-one; altera-sysmgr
    - Add explicit 'select MFD_CORE' to MFD_SIMPLE_MFD_I2C
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmGJTIAACgkQUa+KL4f8
 d2FYsRAAhcTUP7PH5gWko1mQnCzh6h3Q7iQ1MHEokZgIvqc/U2Zmxu57cF9f3jOt
 goZdVsU7x6qiMD4SfmInyEp32Emo1pbUTVz6kB3o0G+YACPHOU17xyKuh0FnzQkm
 yu/EbEDYNPbNWx9BTA9wgjSOTzCrKMBSd/p9zPzq9M69ihAf2uE9sn5Hbmso1Pdu
 tSJ7XYqWVwYzZh8OVzQd6lEIDkA+o+/gR4nCgxqAvGiXQq6yVVOCpnNzj4GrAcep
 hkuQVkg14+rmXRbLiZsmc1V+yT13bueKu2fD96gMFpXI8NkR1KZ6QRInI6FtJcl/
 m2LGPUuICpd2IiKRa1XtXFZWcMbZ2JVjJSWArgfHj7YBs9+0KcRsbpfHHirpcf14
 9LFy4TzjX2A1K0vvKhHSTAhh13HFcvWyd0GCrEhLRmapeiLDXohkUHGMVFVedXzE
 tQLCEByjcL+/OCJiQ4Jwk1aaU2cAVEXtvYuciXcBOtHkfaQR/bOYwjRm4Z3AdZyU
 zLYMkw/LWvzAaV3Rh1zP6W47WLFHbeMgTmApFOSxAbRsmun0loasVzXWrkvxZlYF
 p39l4UcSOIK08PzxqF9ZEM/LtUglShbZbg2wf0VSHzomA+oIsxT7fN16vPHLYDYL
 tsQ5fYVN0a3j4ltKFeQl7l2HV/ZzUI/Q6iGmMia5sFbwRN8tlZM=
 =SJ7N
 -----END PGP SIGNATURE-----

Merge tag 'mfd-next-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Removed Drivers:
   - Remove support for TI TPS80031/TPS80032 PMICs

  New Device Support:
   - Add support for Magnetic Reader to TI AM335x
   - Add support for DA9063_EA to Dialog DA9063
   - Add support for SC2730 PMIC to Spreadtrum SC27xx
   - Add support for MacBookPro16,2 ICL-N UART Intel LPSS PCI
   - Add support for lots of new PMICS in QCom SPMI PMIC
   - Add support for ADC to Diolan DLN2

  New Functionality:
   - Add support for Power Off to Rockchip RK817

  Fix-ups:
   - Simplify Regmap passing to child devices in hi6421-spmi-pmic
   - SPDX licensing updates in ti_am335x_tscadc
   - Improve error handling in ti_am335x_tscadc
   - Expedite clock search in ti_am335x_tscadc
   - Generic simplifications in ti_am335x_tscadc
   - Use generic macros/defines in ti_am335x_tscadc
   - Remove unused code in ti_am335x_tscadc, cros_ec_dev
   - Convert to GPIOD in wcd934x
   - Add namespacing in ti_am335x_tscadc
   - Restrict compilation to relevant arches in intel_pmt
   - Provide better description/documentation in exynos_lpass
   - Add SPI device ID table in altera-a10sr, motorola-cpcap,
     sprd-sc27xx-spi
   - Change IRQ handling in qcom-pm8xxx
   - Split out I2C and SPI code in arizona
   - Explicitly include used headers in altera-a10sr
   - Convert sysfs show() function to in sysfs_emit
   - Standardise *_exit() and *_remove() return values in mc13xxx,
     stmpe, tps65912
   - Trivial (style/spelling/whitespace) fixups in ti_am335x_tscadc,
     qcom-spmi-pmic, max77686-private
   - Device Tree fix-ups in ti,am3359-tscadc, samsung,s2mps11,
     samsung,s2mpa01, samsung,s5m8767, brcm,misc, brcm,cru, syscon,
     qcom,tcsr, xylon,logicvc, max77686, x-powers,ac100,
     x-powers,axp152, x-powers,axp209-gpio, syscon, qcom,spmi-pmic

  Bug Fixes:
   - Balance refcounting (get/put) in ti_am335x_tscadc, mfd-core
   - Fix IRQ trigger type in sec-irq, max77693, max14577
   - Repair off-by-one in altera-sysmgr
   - Add explicit 'select MFD_CORE' to MFD_SIMPLE_MFD_I2C"

* tag 'mfd-next-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (95 commits)
  mfd: simple-mfd-i2c: Select MFD_CORE to fix build error
  mfd: tps80031: Remove driver
  mfd: max77686: Correct tab-based alignment of register addresses
  mfd: wcd934x: Replace legacy gpio interface for gpiod
  dt-bindings: mfd: qcom: pm8xxx: Add pm8018 compatible
  mfd: dln2: Add cell for initializing DLN2 ADC
  mfd: qcom-spmi-pmic: Add missing PMICs supported by socinfo
  mfd: qcom-spmi-pmic: Document ten more PMICs in the binding
  mfd: qcom-spmi-pmic: Sort compatibles in the driver
  mfd: qcom-spmi-pmic: Sort the compatibles in the binding
  mfd: janz-cmoio: Replace snprintf in show functions with sysfs_emit
  mfd: altera-a10sr: Include linux/module.h
  mfd: tps65912: Make tps65912_device_exit() return void
  mfd: stmpe: Make stmpe_remove() return void
  mfd: mc13xxx: Make mc13xxx_common_exit() return void
  dt-bindings: mfd: syscon: Add samsung,exynosautov9-sysreg compatible
  mfd: altera-sysmgr: Fix a mistake caused by resource_size conversion
  dt-bindings: gpio: Convert X-Powers AXP209 GPIO binding to a schema
  dt-bindings: mfd: syscon: Add rk3368 QoS register compatible
  mfd: arizona: Split of_match table into I2C and SPI versions
  ...
2021-11-08 12:07:52 -08:00
Linus Torvalds 5af06603c4 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid
Pull HID updates from Jiri Kosina:

 - support for Nintendo Switch Pro Controllers and Joy-Cons (Daniel J.
   Ogorchock)

 - support for new revision of the NitroKey U2F device firmware (Andrej
   Shadura)

 - LED handling improvements for Sony Playstation5 controllers (Roderick
   Colenbrander)

 - support for Apple 2021 Magic Keyboard (Alex Henrie)

 - other assorted code cleanups and new device ID additions

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid: (41 commits)
  HID: nintendo: fix -Werror build
  HID: playstation: require multicolor LED functionality
  HID: u2fzero: properly handle timeouts in usb_submit_urb
  HID: u2fzero: clarify error check and length calculations
  HID: u2fzero: Support NitroKey U2F revision of the device
  HID: wacom: Make use of the helper function devm_add_action_or_reset()
  HID: wacom: Shrink critical section in `wacom_add_shared_data`
  HID: nintendo: prevent needless queueing of the rumble worker
  HID: nintendo: ratelimit subcommands and rumble
  HID: nintendo: improve rumble performance and stability
  HID: nintendo: add IMU support
  HID: nintendo: add support for reading user calibration
  HID: nintendo: add support for charging grip
  HID: nintendo: set controller uniq to MAC
  HID: nintendo: reduce device removal subcommand errors
  HID: nintendo: patch hw version for userspace HID mappings
  HID: nintendo: send subcommands after receiving input report
  HID: nintendo: improve subcommand reliability
  HID: nintendo: add rumble support
  HID: nintendo: add home led support
  ...
2021-11-05 08:31:51 -07:00
Linus Torvalds 5a1bcbd965 Pin control changes for the v5.16 kernel cycle
Core changes:
 
 - Add infrastructure for per-parent interrupt data to support
   the Apple pin controller.
 
 New drivers:
 
 - New combined pin control and GPIO driver for the Apple SoC.
   This is used in all modern Apple silicon such as the M1
   laptops but also in at least recent iPhone variants.
 
 - New subdriver for the Qualcomm SM6350
 
 - New subdriver for the Qualcomm QCM2290
 
 - New subdriver for the Qualcomm PM6350
 
 - New subdriver for the Uniphier NX1
 
 - New subdriver for the Samsung ExynosAutoV9
 
 - New subdriver for the Mediatek MT7986
 
 - New subdriver for the nVidia Tegra194
 
 Improvements:
 
 - Improve power management in the Mediatek driver.
 
 - Improvements to the Renesas internal consistency checker.
 
 - Convert the Rockchip pin control device tree bindings to YAML.
 
 - Finally convert the Qualcomm PMIC SSBI and SPMI MPP GPIO
   driver to use hierarchical interrupts.
 
 - Convert the Qualcomm PMIC MPP device tree bindings to YAML.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmGEimgACgkQQRCzN7AZ
 XXPelQ/+M7WhOfa52zSCBMB90OrgPD1NsZnWc6+QaC96Nwh2xvf51zngt4BOdU5K
 e/K85vLN8iwM9XekFRAFA5tKbm8rGXfhKMs3neuK2tQEebRJWusBAKgarYMtGAIL
 dDm2i4C3LVBQDKGvjEqedctoLdVDs8mqaZFkGyrM0H6Q4cHK2jIxvtK6UImWEM4y
 eKJPIJgvahKmVZoh6maMynn6b7hNs94DxLNgO+6GaSXuucJ0hJ4rqLKx/rKOW7/W
 GVaxZfwSQ88zdPTSUagSXz1Q4zll32pBtcPzGPwYlsRnl/dQyWNVY0Rlon+i/Ost
 DCoNkcKhrZ6qYsqlv3pqHIZvfSCWvP4krk/kJdt/ufMz2El/vO7CEMbcea2d1ZfR
 rNz6upEUfvRJk3iihdjHR+KFk4AUaeGPqg/xZKkoxB7g9pk5asysiL29wuaTukwL
 Av1b2hRZE7ES843rjPy88vnRi22DB0WdcHH5H7gqeOfhCoOuChZN09Al5g5aPNaP
 mH8ydPXKhZZX13vZggpfKfMEltwhb5yU0diy6ECZHhV5RdTWfAzLP8cHgeiZZXJY
 zXRO9z/Et9xRdWeoENmh26l3vfkr6RlfkxvA1BC8nfrYVOGyjUTnRYVlpG/QfiqQ
 b4VP2NO5l/oioDp8TSK/JdY2e5VtPTJAjwQUzZU5I1kVgD+VLsk=
 =4Ms6
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "The most interesting aspect is that we now have initial support for
  the Apple pin controller as used in the M1 laptops and the iPhones
  which is a step forward for using Linux efficiently on this Apple
  silicon.

  Core changes:

   - Add infrastructure for per-parent interrupt data to support the
     Apple pin controller.

  New drivers:

   - New combined pin control and GPIO driver for the Apple SoC. This is
     used in all modern Apple silicon such as the M1 laptops but also in
     at least recent iPhone variants.

   - New subdriver for the Qualcomm SM6350

   - New subdriver for the Qualcomm QCM2290

   - New subdriver for the Qualcomm PM6350

   - New subdriver for the Uniphier NX1

   - New subdriver for the Samsung ExynosAutoV9

   - New subdriver for the Mediatek MT7986

   - New subdriver for the nVidia Tegra194

  Improvements:

   - Improve power management in the Mediatek driver.

   - Improvements to the Renesas internal consistency checker.

   - Convert the Rockchip pin control device tree bindings to YAML.

   - Finally convert the Qualcomm PMIC SSBI and SPMI MPP GPIO driver to
     use hierarchical interrupts.

   - Convert the Qualcomm PMIC MPP device tree bindings to YAML"

* tag 'pinctrl-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (55 commits)
  pinctrl: add pinctrl/GPIO driver for Apple SoCs
  dt-bindings: pinctrl: Add apple,npins property to apple,pinctrl
  dt-bindings: pinctrl: add #interrupt-cells to apple,pinctrl
  gpio: Allow per-parent interrupt data
  pinctrl: tegra: Fix warnings and error
  pinctrl: intel: Kconfig: Add configuration menu to Intel pin control
  pinctrl: tegra: Use correct offset for pin group
  pinctrl: core: fix possible memory leak in pinctrl_enable()
  pinctrl: bcm2835: Allow building driver as a module
  pinctrl: equilibrium: Fix function addition in multiple groups
  pinctrl: tegra: Add pinmux support for Tegra194
  pinctrl: tegra: include lpdr pin properties
  pinctrl: mediatek: add support for MT7986 SoC
  dt-bindings: pinctrl: update bindings for MT7986 SoC
  pinctrl: microchip sgpio: use reset driver
  dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add reset binding
  dt-bindings: pinctrl: qcom,pmic-mpp: switch to #interrupt-cells
  pinctrl: qcom: spmi-mpp: add support for hierarchical IRQ chip
  pinctrl: qcom: spmi-mpp: hardcode IRQ counts
  pinctrl: qcom: ssbi-mpp: add support for hierarchical IRQ chip
  ...
2021-11-05 08:24:17 -07:00
Linus Torvalds 5c904c66ed Char/Misc driver update for 5.16-rc1
Here is the big set of char and misc and other tiny driver subsystem
 updates for 5.16-rc1.
 
 Loads of things in here, all of which have been in linux-next for a
 while with no reported problems (except for one called out below.)
 
 Included are:
 	- habanana labs driver updates, including dma_buf usage,
 	  reviewed and acked by the dma_buf maintainers
 	- iio driver update (going through this tree not staging as they
 	  really do not belong going through that tree anymore)
 	- counter driver updates
 	- hwmon driver updates that the counter drivers needed, acked by
 	  the hwmon maintainer
 	- xillybus driver updates
 	- binder driver updates
 	- extcon driver updates
 	- dma_buf module namespaces added (will cause a build error in
 	  arm64 for allmodconfig, but that change is on its way through
 	  the drm tree)
 	- lkdtm driver updates
 	- pvpanic driver updates
 	- phy driver updates
 	- virt acrn and nitr_enclaves driver updates
 	- smaller char and misc driver updates
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYYPX2A8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymUUgCbB4EKysgLuXYdjUalZDx+vvZO4k0AniS14O4k
 F+2dVSZ5WX6wumUzCaA6
 =bXQM
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big set of char and misc and other tiny driver subsystem
  updates for 5.16-rc1.

  Loads of things in here, all of which have been in linux-next for a
  while with no reported problems (except for one called out below.)

  Included are:

   - habanana labs driver updates, including dma_buf usage, reviewed and
     acked by the dma_buf maintainers

   - iio driver update (going through this tree not staging as they
     really do not belong going through that tree anymore)

   - counter driver updates

   - hwmon driver updates that the counter drivers needed, acked by the
     hwmon maintainer

   - xillybus driver updates

   - binder driver updates

   - extcon driver updates

   - dma_buf module namespaces added (will cause a build error in arm64
     for allmodconfig, but that change is on its way through the drm
     tree)

   - lkdtm driver updates

   - pvpanic driver updates

   - phy driver updates

   - virt acrn and nitr_enclaves driver updates

   - smaller char and misc driver updates"

* tag 'char-misc-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (386 commits)
  comedi: dt9812: fix DMA buffers on stack
  comedi: ni_usb6501: fix NULL-deref in command paths
  arm64: errata: Enable TRBE workaround for write to out-of-range address
  arm64: errata: Enable workaround for TRBE overwrite in FILL mode
  coresight: trbe: Work around write to out of range
  coresight: trbe: Make sure we have enough space
  coresight: trbe: Add a helper to determine the minimum buffer size
  coresight: trbe: Workaround TRBE errata overwrite in FILL mode
  coresight: trbe: Add infrastructure for Errata handling
  coresight: trbe: Allow driver to choose a different alignment
  coresight: trbe: Decouple buffer base from the hardware base
  coresight: trbe: Add a helper to pad a given buffer area
  coresight: trbe: Add a helper to calculate the trace generated
  coresight: trbe: Defer the probe on offline CPUs
  coresight: trbe: Fix incorrect access of the sink specific data
  coresight: etm4x: Add ETM PID for Kryo-5XX
  coresight: trbe: Prohibit trace before disabling TRBE
  coresight: trbe: End the AUX handle on truncation
  coresight: trbe: Do not truncate buffer on IRQ
  coresight: trbe: Fix handling of spurious interrupts
  ...
2021-11-04 08:21:47 -07:00
Linus Torvalds 7ddb58cb0e The usual collection of clk driver updates and new driver additions. In
terms of lines it's mainly Qualcomm and Mediatek code, supporting
 various SoCs and their multitude of clk controllers.
 
 New Drivers:
  - GCC and RPMcc support for Qualcomm QCM2290 SoCs
  - GCC support for Qualcomm MSM8994/MSM8992 SoCs
  - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs
  - Support for Mediatek MT8195 SoCs
  - Initial clock driver for the Exynos850 SoC
  - Add i.MX8ULP clock driver and related bindings
 
 Updates:
  - Clock power management for new SAMA7G5 SoC
  - Updates to the master clock driver and sam9x60-pll to be able to use
    cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while
    changing the frequency via DVFS
  - Use ARRAY_SIZE in qcom clk drivers
  - Remove some impractical fallback parent names in qcom clk drivers
  - Make Mediatek clk drivers tristate
  - Refactoring of the CPU clock code and conversion of Samsung Exynos5433
    CPU clock driver to the platform driver
  - A few conversions to devm_platform_ioremap_resource()
  - Updates of the Samsung Kconfig help text
  - Update video path realted clocks for Amlogic meson8
  - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L
  - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U
  - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N
  - Remove unused helpers from i.MX specific clock header
  - Rework all i.MX clk based helpers to use clk_hw based ones
  - Rework i.MX gate/mux/divider wrappers
  - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers
  - Update i.MX pllv4 and composite clocks to support i.MX8ULP
  - Disable i.MX7ULP composite clock during initialization
  - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite
  - Disable the i.MX pfd when set pfdv2 clock rate
  - Add support for i.MX8ULP in pfdv2
  - Add the pcc reset controller support on i.MX8ULP
  - Fix the build break when clk-imx8ulp is built as module
  - Move csi_sel mux to correct base register in i.MX6UL clock drivr
  - Fix csi clk gate register in i.MX6UL clock driver
  - Fix build bug making CLK_IMX8ULP select MXC_CLK
  - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U
  - Add Ethernet clocks on Renesas RZ/G2L
  - Move Rockchip to use module_platform_probe
  - Enable usage of Coresight related clocks on Rockchip rk3399
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmGDLIwRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSWasBAA2TTYnSNm/vaNHYPrKRhv5OgALOX5T8yy
 rylvO8qcGrmzX3lVRiO4Bp34jZxQQMG7d2eJn6OMbGEN+9GcsZGA3p4zA8wZaXkN
 yAnddCUEyFl2zMrikXLijhjJ87bmsKUaHHN+zGrGAxC9/VBMwDUPjp9Gy4kdmUFj
 0fq2yhWULulm7UgDTLzwow22wCYYx9/SaNbhnDj7s/eV5N2oexXOrwfIlDHtXnMZ
 4zbJtZ4GKmdicUUMIVzO7wrdEHcWgbPrY2S8UuUbM5PPMzsX7OZ4k/w94p18iT40
 kaJnvEgwZomsYkBMMTrxRjlI/AU3r9omyquKEPX2UXUsTqGHOXZqFXVDPS/6tnvU
 +sqP1V59NMmN9t3HomZ+gr+VKyjakYXuz7QlZZ5kuZRM0aWDfCaq8UEAjyU1WQ+J
 NI4BKzok7+JqEZ25MjcpEV6UBrzNnJ3SMGGiiEUxL6Fl4BE9anVUn06E16v3b5Vb
 k36eosnT3gCBvhNI6gV5zIUyavwb4ga4QJyRQJBeHE7qSVegeoauS8qTFvV04tud
 fWZwAqdLUU/fVse8iuolciZBMAkiuI/R0N8/rZ3MHLe3VB0D/Q/XWGcIheyVpALK
 KAWQ/OA96mM9qf1VBkeItdciSQ+rwAcivmcJTvVIUiwlNk36CYzRsja+sgcNphPH
 WV1CLOIrOgQ=
 =Is+O
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The usual collection of clk driver updates and new driver additions.
  In terms of lines it's mainly Qualcomm and Mediatek code, supporting
  various SoCs and their multitude of clk controllers.

  New Drivers:
   - GCC and RPMcc support for Qualcomm QCM2290 SoCs
   - GCC support for Qualcomm MSM8994/MSM8992 SoCs
   - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs
   - Support for Mediatek MT8195 SoCs
   - Initial clock driver for the Exynos850 SoC
   - Add i.MX8ULP clock driver and related bindings

  Updates:
   - Clock power management for new SAMA7G5 SoC
   - Updates to the master clock driver and sam9x60-pll to be able to
     use cpufreq-dt driver and avoid overclocking of CPU and MCK0
     domains while changing the frequency via DVFS
   - Use ARRAY_SIZE in qcom clk drivers
   - Remove some impractical fallback parent names in qcom clk drivers
   - Make Mediatek clk drivers tristate
   - Refactoring of the CPU clock code and conversion of Samsung
     Exynos5433 CPU clock driver to the platform driver
   - A few conversions to devm_platform_ioremap_resource()
   - Updates of the Samsung Kconfig help text
   - Update video path realted clocks for Amlogic meson8
   - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L
   - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U
   - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N
   - Remove unused helpers from i.MX specific clock header
   - Rework all i.MX clk based helpers to use clk_hw based ones
   - Rework i.MX gate/mux/divider wrappers
   - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers
   - Update i.MX pllv4 and composite clocks to support i.MX8ULP
   - Disable i.MX7ULP composite clock during initialization
   - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite
   - Disable the i.MX pfd when set pfdv2 clock rate
   - Add support for i.MX8ULP in pfdv2
   - Add the pcc reset controller support on i.MX8ULP
   - Fix the build break when clk-imx8ulp is built as module
   - Move csi_sel mux to correct base register in i.MX6UL clock drivr
   - Fix csi clk gate register in i.MX6UL clock driver
   - Fix build bug making CLK_IMX8ULP select MXC_CLK
   - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U
   - Add Ethernet clocks on Renesas RZ/G2L
   - Move Rockchip to use module_platform_probe
   - Enable usage of Coresight related clocks on Rockchip rk3399"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (170 commits)
  clk: use clk_core_get_rate_recalc() in clk_rate_get()
  clk: at91: sama7g5: set low limit for mck0 at 32KHz
  clk: at91: sama7g5: remove prescaler part of master clock
  clk: at91: clk-master: add notifier for divider
  clk: at91: clk-sam9x60-pll: add notifier for div part of PLL
  clk: at91: clk-master: fix prescaler logic
  clk: at91: clk-master: mask mckr against layout->mask
  clk: at91: clk-master: check if div or pres is zero
  clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL
  clk: at91: pmc: add sama7g5 to the list of available pmcs
  clk: at91: clk-master: improve readability by using local variables
  clk: at91: clk-master: add register definition for sama7g5's master clock
  clk: at91: sama7g5: add securam's peripheral clock
  clk: at91: pmc: execute suspend/resume only for backup mode
  clk: at91: re-factor clocks suspend/resume
  clk: ux500: Add driver for the reset portions of PRCC
  dt-bindings: clock: u8500: Rewrite in YAML and extend
  clk: composite: Use rate_ops.determine_rate when also a mux is available
  clk: samsung: describe drivers in Kconfig
  clk: samsung: exynos5433: update apollo and atlas clock probing
  ...
2021-11-03 21:18:44 -07:00
Linus Torvalds d461e96cd2 ARM: SoC drivers for 5.16
These are all the driver updates for SoC specific drivers. There
 are a couple of subsystems with individual maintainers picking up
 their patches here:
 
  - The reset controller subsystem add support for a few new SoC
    variants to existing drivers, along with other minor improvements
 
  - The OP-TEE subsystem gets a driver for the ARM FF-A transport
 
  - The memory controller subsystem has improvements for Tegra,
    Mediatek, Renesas, Freescale and Broadcom specific drivers.
 
  - The tegra cpuidle driver changes get merged through this
    tree this time. There are only minor changes, but they depend
    on other tegra driver updates here.
 
  - The ep93xx platform finally moves to using the drivers/clk/
    subsystem, moving the code out of arch/arm in the process.
    This depends on a small sound driver change that is included
    here as well.
 
  - There are some minor updates for Qualcomm and Tegra specific
    firmware drivers.
 
 The other driver updates are mainly for drivers/soc, which contains
 a mixture of vendor specific drivers that don't really fit elsewhere:
 
  - Mediatek drivers gain more support for MT8192, with new support for
    hw-mutex and mmsys routing, plus support for reset lines in the
    mmsys driver.
 
  - Qualcomm gains a new "sleep stats" driver, and support for
    the "Generic Packet Router" in the APR driver.
 
  - There is a new user interface for routing the UARTS on ASpeed
    BMCs, something that apparently nobody else has needed so far.
 
  - More drivers can now be built as loadable modules, in particular
    for Broadcom and Samsung platforms.
 
  - Lots of improvements to the TI sysc driver for better suspend/resume
    support
 
 Finally, there are lots of minor cleanups and new device IDs for
 amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape,
 allwinner, broadcom, and omap.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGCvKgACgkQmmx57+YA
 GNnNfw/8DDTfMUycVvtaNslYlWri0/2O0nSqhNIIbTAcVuD/x5qo/McDhKuv+ldM
 BoTDMjRYZfQkrNXSEj3MaxB9E0o6Srva5SM8y4+Koe0VVtvEVovjYkXOhXqSEWWl
 aqVIe0S6Y1rF/KxJlvAfGxYHb5d+6aYqzdmhjURpXNGxqpSHb9/hqisY97Q9TpnD
 6lQZOz9d1JNDq0eOh1qjcfuMjg1EHZHDZJyioCvyX38KIl2q7p3ll2z/eqrrDhQZ
 TrvL/YVosTXqBcAfi47Oz+n/CX2i0MrjVO8nfPSGOq5UL4Al3SZD4XYY96IOIQrH
 +XGFigGGAkV2LfKSEPNJWaq7g+SiQUr2jc3p8b4Zxde8/+5M127/gotiPddyG2LX
 1OnFRnPskgRApGqHjGEcEzzJUTag7Hc+YVH82TMEHZhSDMq6i30k9UnyfXsziZDV
 8CrkOpjuSg+YxFv/83bfa1pIoYtFfjGr16mq4muajodnX7+b7My9iv+2Oo2iQM9y
 DwRUKj7+eap23SEUpi4et6HlNpoF6yJMbt5Ae1k+gTK2DvQ4Cx6n4QJz/I7WC1Wp
 BdVhvSH8XVppVLtQqODud+VWvLgLerRxUpGRdbS8r5VsnNUJTvaS4YGMpm9616G7
 TrgUSSvsyu1lLqbWMh+pOCk4l3r64vSUn581hrIw6jtioNGvMdE=
 =tUuj
 -----END PGP SIGNATURE-----

Merge tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are all the driver updates for SoC specific drivers. There are a
  couple of subsystems with individual maintainers picking up their
  patches here:

   - The reset controller subsystem add support for a few new SoC
     variants to existing drivers, along with other minor improvements

   - The OP-TEE subsystem gets a driver for the ARM FF-A transport

   - The memory controller subsystem has improvements for Tegra,
     Mediatek, Renesas, Freescale and Broadcom specific drivers.

   - The tegra cpuidle driver changes get merged through this tree this
     time. There are only minor changes, but they depend on other tegra
     driver updates here.

   - The ep93xx platform finally moves to using the drivers/clk/
     subsystem, moving the code out of arch/arm in the process. This
     depends on a small sound driver change that is included here as
     well.

   - There are some minor updates for Qualcomm and Tegra specific
     firmware drivers.

  The other driver updates are mainly for drivers/soc, which contains a
  mixture of vendor specific drivers that don't really fit elsewhere:

   - Mediatek drivers gain more support for MT8192, with new support for
     hw-mutex and mmsys routing, plus support for reset lines in the
     mmsys driver.

   - Qualcomm gains a new "sleep stats" driver, and support for the
     "Generic Packet Router" in the APR driver.

   - There is a new user interface for routing the UARTS on ASpeed BMCs,
     something that apparently nobody else has needed so far.

   - More drivers can now be built as loadable modules, in particular
     for Broadcom and Samsung platforms.

   - Lots of improvements to the TI sysc driver for better
     suspend/resume support"

  Finally, there are lots of minor cleanups and new device IDs for
  amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx,
  layerscape, allwinner, broadcom, and omap"

* tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits)
  optee: Fix spelling mistake "reclain" -> "reclaim"
  Revert "firmware: qcom: scm: Add support for MC boot address API"
  qcom: spm: allow compile-testing
  firmware: arm_ffa: Remove unused 'compat_version' variable
  soc: samsung: exynos-chipid: add exynosautov9 SoC support
  firmware: qcom: scm: Don't break compile test on non-ARM platforms
  soc: qcom: smp2p: Add of_node_put() before goto
  soc: qcom: apr: Add of_node_put() before return
  soc: qcom: qcom_stats: Fix client votes offset
  soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
  dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
  ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
  firmware: qcom: scm: Add support for MC boot address API
  soc: qcom: spm: Add 8916 SPM register data
  dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
  soc: qcom: socinfo: Add PM8150C and SMB2351 models
  firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
  soc: aspeed: Add UART routing support
  soc: fsl: dpio: rename the enqueue descriptor variable
  soc: fsl: dpio: use an explicit NULL instead of 0
  ...
2021-11-03 17:00:52 -07:00
Linus Torvalds ae45d84fc3 ARM: SoC DT updates for v5.16
This is a rather large update for the ARM devicetree files, after a few
 quieter releases, with 775 total commits and 47 branches pulled into
 this one. There are 5 new SoC types plus some minor variations, and
 a total of 60 new machines, so I'm limiting the summary to the main
 noteworthy items:
 
  - Apple M1 gain support for PCI and pinctrl, getting a bit
    closer to a usable system out of the box.
 
  - Qualcomm gains support for Snapdragon 690 (aka SM6350) as
    well as SM7225, 11 new smartphones, and three additional
    Chromebooks, and improvements all over the place.
 
  - Samsung gains support for ExynosAutov9, an automotive version
    of their smartphone SoC, but otherwise no major changes.
 
  - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a
    number of improvements for the recently added SAMA7 family.
    The LAN966 SoC that was added in the platform code does not
    have dts files yet. Two board files are added for the older
    at91sam9g20 SoC
 
  - Aspeed supports two additional server boards using their AST2600
    as BMC, and improves support for qemu models
 
  - Rockchip RK3566/RK3688 gets added, along with six new
    development boards using RK3328/RK3399/RK3566, and one
    Chromebook tablet.
 
  - Two NAS boxes are added using the ARMv4 based Gemini platform
 
  - One new board is added to the Intel Arria SoC FPGA family
 
  - Marvell adds one network switch based on Armada 381 and the
    new MOCHAbin 7040 development board
 
  - NXP adds support for the S32G2 automotive SoC, two imx6 based
    ebook readers, and three additional development boards, which
    is notably less than their usual additions, but they also gain
    improvements to their many existing boards
 
  - STmicroelectronics adds their stm32mp13 SoC family along with
    a reference board
 
  - Renesas adds new versions of their R-Car Gen3 SoCs and many
    updates for their older generations
 
  - Broadcom adds support for a number of Cisco Meraki wireless
    controllers, along with two new boards and other updates for
    BCM53xx/BCM47xx networking SoCs and the Raspberry Pi
    boards
 
  - Mediatek improves support for the MT81xx SoCs used in Chromebooks
    as well as the MT76xx networking SoCs
 
  - NVIDIA adds a number of cleanups and additional support for
    more hardware on the already supported machines
 
  - TI K3 adds support for three new boards along with cleanups
 
  - Toshiba adds one board for the Visconti family
 
  - Xilinx adds five new ZynqMP based machines
 
  - Amlogic support is added for the Radxa Zero and two Jethub
    home automation controllers, along with changes to other
    machines
 
  - Rob Herring continues his work on fixing dtc warnings all over
    the tree.
 
  - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
    Ux500, Unisoc
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGDCJYACgkQmmx57+YA
 GNlIlQ//VOQJeP7Om3Qt3Vai/zvrSWegAagI8quF6m4fTI0D3NVRw4KD7sld1+39
 lIcUTdM4eSXO+vsyWRSb9ESyymGGsTy9o8irIDTH2SSyawMwFwydgoO/riS6/tkG
 37c9OvCNdjhQIgxo20vW8+dr021UNJqQNG7dQzTJrlbe8IzNGkSjVO5i97v8XK2e
 HWtwhOd8W7ptmuTKdq5/DTv0V9LzcJSfWlwYPscHRGHg/t0+frC+G2H3osjgGuux
 gbbrdocy1Qmj1sqeAPBud5O2TTEu4M09HYgVWXoKcgBzTt3hJZ9TmzE4YNfUYmv6
 sYz+BaPesm2hR+zjBz0wxGG+eP27Zv4FUN/VeMGilRbhXVCv6GSf90fDTbaW4Q8F
 IR/BgN0lk2GyNjRyVUcDQI/Aus//TXAI7+rcfXccGBrxs/EBZ3e/hmNNTi9jCMBT
 NGLkXAI574tcfLUYybj87upFTPLHTwq4is9p1RY/l73wlcFDZHai+aE2X5GhYLzy
 XaYuyur1wA+v5938RjjwCYJjqssz+OlJJP1N2KeQT99PVkS0IunXFJGcsve6UOAN
 maRxI4oSU1lz6VaP8tsVJESzObwFCtOdYjgUHpRUJ8JTNTRpy/6JLAX0dnr1LrQV
 Fr6gLtodCOa2Udc5T+VkoodAw2f5Gta8cE1fQB9CjUDklkhUtsg=
 =jp4P
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "This is a rather large update for the ARM devicetree files, after a
  few quieter releases, with 775 total commits and 47 branches pulled
  into this one.

  There are 5 new SoC types plus some minor variations, and a total of
  60 new machines, so I'm limiting the summary to the main noteworthy
  items:

   - Apple M1 gain support for PCI and pinctrl, getting a bit closer to
     a usable system out of the box.

   - Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as
     SM7225, 11 new smartphones, and three additional Chromebooks, and
     improvements all over the place.

   - Samsung gains support for ExynosAutov9, an automotive version of
     their smartphone SoC, but otherwise no major changes.

   - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number
     of improvements for the recently added SAMA7 family. The LAN966 SoC
     that was added in the platform code does not have dts files yet.
     Two board files are added for the older at91sam9g20 SoC

   - Aspeed supports two additional server boards using their AST2600 as
     BMC, and improves support for qemu models

   - Rockchip RK3566/RK3688 gets added, along with six new development
     boards using RK3328/RK3399/RK3566, and one Chromebook tablet.

   - Two NAS boxes are added using the ARMv4 based Gemini platform

   - One new board is added to the Intel Arria SoC FPGA family

   - Marvell adds one network switch based on Armada 381 and the new
     MOCHAbin 7040 development board

   - NXP adds support for the S32G2 automotive SoC, two imx6 based ebook
     readers, and three additional development boards, which is notably
     less than their usual additions, but they also gain improvements to
     their many existing boards

   - STmicroelectronics adds their stm32mp13 SoC family along with a
     reference board

   - Renesas adds new versions of their R-Car Gen3 SoCs and many updates
     for their older generations

   - Broadcom adds support for a number of Cisco Meraki wireless
     controllers, along with two new boards and other updates for
     BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards

   - Mediatek improves support for the MT81xx SoCs used in Chromebooks
     as well as the MT76xx networking SoCs

   - NVIDIA adds a number of cleanups and additional support for more
     hardware on the already supported machines

   - TI K3 adds support for three new boards along with cleanups

   - Toshiba adds one board for the Visconti family

   - Xilinx adds five new ZynqMP based machines

   - Amlogic support is added for the Radxa Zero and two Jethub home
     automation controllers, along with changes to other machines

   - Rob Herring continues his work on fixing dtc warnings all over the
     tree.

   - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon,
     Ux500, Unisoc"

* tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (720 commits)
  arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address
  arm64: dts: apple: t8103: Add root port interrupt routing
  arm64: dts: apple: t8103: Add PCIe DARTs
  arm64: apple: Add PCIe node
  arm64: apple: Add pinctrl nodes
  ARM: dts: arm: Update ICST clock nodes 'reg' and node names
  ARM: dts: arm: Update register-bit-led nodes 'reg' and node names
  arm64: dts: exynos: add chipid node for exynosautov9 SoC
  ARM: dts: qcom: fix typo in IPQ8064 thermal-sensor node
  Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors"
  arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node
  arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property
  arm64: dts: qcom: sm8350: Add CPU topology and idle-states
  arm64: dts: qcom: Drop unneeded extra device-specific includes
  arm64: dts: qcom: msm8916: Drop standalone smem node
  arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes
  arm64: dts: qcom: msm8916-asus-z00l: Add sensors
  arm64: dts: qcom: msm8916-asus-z00l: Add SDCard
  arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen
  arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node
  ...
2021-11-03 16:56:03 -07:00
Stephen Boyd e2ceaa867d Merge branches 'clk-composite-determine-fix', 'clk-allwinner', 'clk-amlogic' and 'clk-samsung' into clk-next
* clk-composite-determine-fix:
  clk: composite: Use rate_ops.determine_rate when also a mux is available
  clk: composite: Also consider .determine_rate for rate + mux composites

* clk-allwinner:
  clk: sunxi: sun8i-apb0: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi: sun6i-ar100: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi: sun6i-apb0-gates: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi: sun6i-apb0: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun9i-a80-usb: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun9i-a80-de: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun9i-a80: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun8i-r40: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun8i-de2: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun8i-a83t: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun50i-h6: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi-ng: ccu-sun50i-a64: Make use of the helper function devm_platform_ioremap_resource()
  clk: sunxi: clk-mod0: Make use of the helper function devm_platform_ioremap_resource()
  dt-bindings: clocks: Fix typo in the H6 compatible
  clk: sunxi-ng: Use a separate lock for each CCU instance
  clk: sunxi-ng: Prevent unbinding CCUs via sysfs
  clk: sunxi-ng: Unregister clocks/resets when unbinding
  clk: sunxi-ng: Add machine dependency to A83T CCU
  clk: sunxi-ng: mux: Remove unused 'reg' field

* clk-amlogic:
  clk: meson: meson8b: Make the video clock trees mutable
  clk: meson: meson8b: Initialize the HDMI PLL registers
  clk: meson: meson8b: Add the HDMI PLL M/N parameters
  clk: meson: meson8b: Add the vid_pll_lvds_en gate clock
  clk: meson: meson8b: Use CLK_SET_RATE_NO_REPARENT for vclk{,2}_in_sel
  clk: meson: meson8b: Export the video clocks

* clk-samsung:
  clk: samsung: describe drivers in Kconfig
  clk: samsung: exynos5433: update apollo and atlas clock probing
  clk: samsung: add support for CPU clocks
  clk: samsung: Introduce Exynos850 clock driver
  dt-bindings: clock: Document Exynos850 CMU bindings
  dt-bindings: clock: Add bindings definitions for Exynos850 CMU
  clk: samsung: clk-pll: Implement pll0831x PLL type
  clk: samsung: clk-pll: Implement pll0822x PLL type
  clk: samsung: s5pv210-audss: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos5433: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos4412-isp: Make use of devm_platform_ioremap_resource()
  clk: samsung: exynos-audss: Make use of devm_platform_ioremap_resource()
2021-11-02 11:27:06 -07:00
Stephen Boyd 8d741ecd46 Merge branches 'clk-imx', 'clk-ux500' and 'clk-debugfs' into clk-next
* clk-imx: (21 commits)
  clk: imx: Make CLK_IMX8ULP select MXC_CLK
  clk: imx: imx6ul: Fix csi clk gate register
  clk: imx: imx6ul: Move csi_sel mux to correct base register
  clk: imx: Fix the build break when clk-imx8ulp build as module
  clk: imx: Add the pcc reset controller support on imx8ulp
  clk: imx: Add clock driver for imx8ulp
  clk: imx: Update the pfdv2 for 8ulp specific support
  clk: imx: disable the pfd when set pfdv2 clock rate
  clk: imx: Add 'CLK_SET_RATE_NO_REPARENT' for composite-7ulp
  clk: imx: disable i.mx7ulp composite clock during initialization
  clk: imx: Update the compsite driver to support imx8ulp
  clk: imx: Update the pllv4 to support imx8ulp
  dt-bindings: clock: Add imx8ulp clock support
  clk: imx: Rework imx_clk_hw_pll14xx wrapper
  clk: imx: Rework all imx_clk_hw_composite wrappers
  clk: imx: Rework all clk_hw_register_divider wrappers
  clk: imx: Rework all clk_hw_register_mux wrappers
  clk: imx: Rework all clk_hw_register_gate2 wrappers
  clk: imx: Rework all clk_hw_register_gate wrappers
  clk: imx: Make mux/mux2 clk based helpers use clk_hw based ones
  ...

* clk-ux500:
  clk: ux500: Add driver for the reset portions of PRCC
  dt-bindings: clock: u8500: Rewrite in YAML and extend

* clk-debugfs:
  clk: use clk_core_get_rate_recalc() in clk_rate_get()
2021-11-02 11:27:02 -07:00
Stephen Boyd a379e16ab8 Merge branches 'clk-qcom', 'clk-mtk', 'clk-versatile' and 'clk-doc' into clk-next
- Use ARRAY_SIZE in qcom clk drivers
 - Remove some impractical fallback parent names in qcom clk drivers
 - GCC and RPMcc support for Qualcomm QCM2290 SoCs
 - GCC support for Qualcomm MSM8994/MSM8992 SoCs
 - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs
 - Support for Mediatek MT8195 SoCs
 - Make Mediatek clk drivers tristate

* clk-qcom: (44 commits)
  clk: qcom: gdsc: enable optional power domain support
  clk: qcom: videocc-sm8250: use runtime PM for the clock controller
  clk: qcom: dispcc-sm8250: use runtime PM for the clock controller
  dt-bindings: clock: qcom,videocc: add mmcx power domain
  dt-bindings: clock: qcom,dispcc-sm8x50: add mmcx power domain
  clk: qcom: gcc-sc7280: Drop unused array
  clk: qcom: camcc: Add camera clock controller driver for SC7280
  dt-bindings: clock: Add YAML schemas for CAMCC clocks on SC7280
  clk: qcom: Add lpass clock controller driver for SC7280
  dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
  clk: qcom: Kconfig: Sort the symbol for SC_LPASS_CORECC_7180
  clk: qcom: mmcc-sdm660: Add hw_ctrl flag to venus_core0_gdsc
  clk: qcom: mmcc-sdm660: Add necessary CXCs to venus_gdsc
  clk: qcom: gcc-msm8994: Use ARRAY_SIZE() for num_parents
  clk: qcom: gcc-msm8994: Add proper msm8992 support
  clk: qcom: gcc-msm8994: Add modem reset
  clk: qcom: gcc-msm8994: Remove the inexistent GDSC_PCIE
  clk: qcom: gcc-msm8994: Add missing clocks
  clk: qcom: gcc-msm8994: Add missing NoC clocks
  clk: qcom: gcc-msm8994: Fix up SPI QUP clocks
  ...

* clk-mtk: (28 commits)
  clk: mediatek: Export clk_ops structures to modules
  clk: mediatek: support COMMON_CLK_MT6779 module build
  clk: mediatek: support COMMON_CLK_MEDIATEK module build
  clk: composite: export clk_register_composite
  clk: mediatek: Add MT8195 apusys clock support
  clk: mediatek: Add MT8195 imp i2c wrapper clock support
  clk: mediatek: Add MT8195 wpesys clock support
  clk: mediatek: Add MT8195 vppsys1 clock support
  clk: mediatek: Add MT8195 vppsys0 clock support
  clk: mediatek: Add MT8195 vencsys clock support
  clk: mediatek: Add MT8195 vdosys1 clock support
  clk: mediatek: Add MT8195 vdosys0 clock support
  clk: mediatek: Add MT8195 vdecsys clock support
  clk: mediatek: Add MT8195 scp adsp clock support
  clk: mediatek: Add MT8195 mfgcfg clock support
  clk: mediatek: Add MT8195 ipesys clock support
  clk: mediatek: Add MT8195 imgsys clock support
  clk: mediatek: Add MT8195 ccusys clock support
  clk: mediatek: Add MT8195 camsys clock support
  clk: mediatek: Add MT8195 infrastructure clock support
  ...

* clk-versatile:
  clk: versatile: hide clock drivers from non-ARM users
  clk: versatile: Rename ICST to CLK_ICST
  clk: versatile: clk-icst: Support 'reg' in addition to 'vco-offset' for register address
  dt-bindings: clock: arm,syscon-icst: Use 'reg' instead of 'vco-offset' for VCO register address

* clk-doc:
  dt-bindings: clk: fixed-mmio-clock: Convert to YAML
2021-11-02 11:26:33 -07:00
Roderick Colenbrander 61177c088a leds: add new LED_FUNCTION_PLAYER for player LEDs for game controllers.
Player LEDs are commonly found on game controllers from Nintendo and Sony
to indicate a player ID across a number of LEDs. For example, "Player 2"
might be indicated as "-x--" on a device with 4 LEDs where "x" means on.

This patch introduces LED_FUNCTION_PLAYER1-5 defines to properly indicate
player LEDs from the kernel. Until now there was no good standard, which
resulted in inconsistent behavior across xpad, hid-sony, hid-wiimote and
other drivers. Moving forward new drivers should use LED_FUNCTION_PLAYERx.

Note: management of Player IDs is left to user space, though a kernel
driver may pick a default value.

Signed-off-by: Roderick Colenbrander <roderick.colenbrander@sony.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2021-10-27 09:49:29 +02:00
Linus Walleij f2b883bbdd dt-bindings: clock: u8500: Rewrite in YAML and extend
This rewrites the ux500/u8500 clock bindings in YAML schema and extends them
with the PRCC reset controller.

The bindings are a bit idiomatic but it just reflects their age, the ux500
platform was used as guinea pig for early device tree conversion of platforms
in 2015. The new subnode for the reset controller follows the pattern of the
old bindings and adds a node with reset-cells for this.

Cc: devicetree@vger.kernel.org
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20210921184803.1757916-1-linus.walleij@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-26 18:03:41 -07:00
Srinivas Kandagatla e3008b7ccb
ASoC: dt-bindings: rename q6afe.h to q6dsp-lpass-ports.h
move all LPASS audio ports defines from q6afe.h to q6dsp-lpass-ports.h
as these belong to LPASS IP.
Also this move helps in reusing this header across multiple audio
frameworks on Qualcomm Audio DSP.

This patch is split out of the dt-bindings patch to enable easy review.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211026111655.1702-4-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-10-26 13:49:57 +01:00
Mark Brown 21b178b8e9 v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org
This immutable branch is based on v5.15-rc1 and contains the following
 patches extending the existig APR driver to also implement GPR:
 20210927135559.738-2-srinivas.kandagatla@linaro.org
 20210927135559.738-3-srinivas.kandagatla@linaro.org
 20210927135559.738-4-srinivas.kandagatla@linaro.org
 20210927135559.738-5-srinivas.kandagatla@linaro.org
 20210927135559.738-6-srinivas.kandagatla@linaro.org
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmFSiE4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FNV0P/1R/t0Dfj+vJg8SarPPg
 u/2LbLBAhFfn0WoVJgdYmpW3lG3kxG+z7I4s5gDdKCrKeyj//jJReRVwkgG4QxNs
 NgSAd24o/afb4/jcNTlmbhIyo+k9gsU5rxw7AynwRkLOyfNG71sytEH/1LvzBj1F
 X5AVQlzEnTsclVlwK3n9ZSm3cKiwgyFnqBLZs+e199FVjJgFGk6WDPplWPo50+hz
 pYImAVPGRbwSGH6cR2M4JSwpU/GJzFAAZf5Y8GrEBQVyhiQeKvYV7UNPjbNt15tv
 qI8Xfa5xbgAFunRC6GsjpaffTmCzHJKYgikchbIKre906IYBLwDHTnxvtXXDgBVe
 Zrd0jFQIrtuHseLQkvaEiVuuzmFibm/atdMUWCyncdunl2fuwTS60hCG+mRd7Pz2
 B85HmcAfS7LTu+dkn4doG4zVHO/JVpYr2eZExb1wxY0Kyz+5KDsESqUCB+7c6wya
 rGqsC+LX8l0MjunxSJbZUcuQLLcaFN9AXJTB6a0gPk+VLZH7EutkG98SonYU07w/
 Wff0bwVQWk3I4QHf0NaS5Ikbcx8KAv1ZaqcUaL2pPYNtIamkiyJdH6f+4C0q+K6n
 aMcLNLzaRcVayHO88SG3XpDLNc+cR2f/rehAkghxXJ8jhdtV5HSb5HLKgu+Lf8q4
 hEBzBQLYeRFJM1TuaZL02aXw
 =r7vf
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmF3+W4ACgkQJNaLcl1U
 h9C+DQf7Bxzz7xjGv5AFyZ8eZbAx0LnTBp9SytON2gh5mxWGUCI0kxSdnEd/ot9u
 PUhWMf7192kQw4qmkZArdtKiaxhZdKZvXZ0kTfyoTvcR4o9fdgWtMUla5QhBVzAu
 UgZbTH91wDt4P68cYzLrhG8gFlagzSwRT8WF4imJmcJsehPq22Nz70tK5tSePZko
 KcbnpkqYV19CQRJsEKXBivAptpE/oAQJBSoYVw/gkizqrznNGI2cqWBl+krGOdBW
 zI+CZbzuAwTi9xNu3tmlcgPDGxOHYFVU7aIy2w/ENNRsAbWgFThcO25pWBKROtKc
 45uC5fj24R6cCCyuygwFJuLoeRy31Q==
 =ts3p
 -----END PGP SIGNATURE-----

Merge tag '20210927135559.738-6-srinivas.kandagatla@linaro.org' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into v11_20211026_srinivas_kandagatla_asoc_qcom_add_audioreach_support for audioreach support

v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org

This immutable branch is based on v5.15-rc1 and contains the following
patches extending the existig APR driver to also implement GPR:
20210927135559.738-2-srinivas.kandagatla@linaro.org
20210927135559.738-3-srinivas.kandagatla@linaro.org
20210927135559.738-4-srinivas.kandagatla@linaro.org
20210927135559.738-5-srinivas.kandagatla@linaro.org
20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-10-26 13:49:25 +01:00
Swapnil Jakhade f9aec1648d dt-bindings: phy: cadence-torrent: Add clock IDs for derived and received refclk
Add clock IDs for derived and received reference clock output.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210922123735.21927-3-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26 16:36:23 +05:30
Srinivasa Rao Mandadapu de6e9190a8
ASoC: dt-bindings: lpass: add binding headers for digital codecs
Add header defining for lpass internal digital codecs rx,tx and va
dai node id's.

Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Link: https://lore.kernel.org/r/1633670491-27432-1-git-send-email-srivasam@codeaurora.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-10-25 17:41:24 +01:00
Miquel Raynal 59139ada4a clk: ti: am43xx: Add clkctrl data for am43xx ADC1
Declare ADC1 clkctrl which feeds the magnetic-reader/ADC1 hardware
module.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20211015081506.933180-2-miquel.raynal@bootlin.com
2021-10-20 17:06:20 +01:00
Arnd Bergmann 353bbb3d07 i.MX DT bindings update for 5.16:
- Various board compatible addition: NXP S32G2, LS1021A TSN, Toradex
   Colibri i.MX6ULL, LX2160A BlueBox 3 boards.
 - Toradex board and module compatibles clean-up.
 - Convert fsl-linflexuart bindings to json-schema format and add S32G2
   compatible.
 - Add bindings and defines for i.MX8MM VPU and DISP blk-ctrl.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmFqx00UHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM6yMgf/RrQ/w3oGlI6lPJS+JiP2FGJwjzwS
 ICtYUInxDCHD4sdKUYT7ZIT4CGBbNabX/7jGVxwFyrbp1YkTp4s4aV1zgqGYdLAh
 6/8X3MsYT9unYLWGh0jSyWJatYvj6kkKWQB95g3nuvUzJcxIEP3/e7JFngEebCCV
 F++VN4y4b+B3GZbZuiGEOQEvjkG+kC776+Lhm1HNnq3nzcCfJyXqE4tQiSPJOyrJ
 aSocMW27GLpBW7VyUJOs6vHgWPeSZzHLar/iwWBNXQaq7qlb2tILd3f1PxPuiBqy
 tYO3Xm6D1O0LdnxcdV0XkyRSC83sjeRCVD1KzfBO/cJUXwJmT+EsrkikmA==
 =HEuA
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFwEtoACgkQmmx57+YA
 GNnpYg/9FmaMO8cUF4FQGW1+HVZfxtv65emlTlZhC3DHhWKZxPY7AXR1ZKrZJmDr
 kukBUpKkRYg7bg1/GgaEjpqlpAQNTXsCQhLUGPE9tHrSM3RWZziowZd6GFUcAnXi
 u8MSQts4uVNuzWcUz1Oe60Ru7UrXuoh+s9emVeCcpEZgDLuil6vtioJJgYDqoMWH
 dS9EzD/B0V5j3gIQa2PHUeWVaPUEvn5NwmLGB0deIBKctPyH+mNPSsaaYvgXRwN6
 BO/IvgScVFLc5R3sZurGNYW6hmBhxHu+FLe026faKsg/yZCU4MzFb4Loso1Yt8lW
 y9QX6PHtsW9Ya5L2+ExfPmSd/x/T9z0snLvjhE2TWYPFBbA/HT8UQ9To5l5l1HC9
 rDCTbHTWXkSRI42Bzbhbm+RrifHAQWmJq1+hjzgrPtvyT0vTeSjes/l4ct2XllfX
 YZWS32sMi2EiMwD0PFBx965vXaIz8EHtuvP8b1xTX6qlJWJdLUsEjR8nPw6PW2NZ
 QSMzUk9I2zPRRImSoI1w5zvCxrAv94rtGXOJFlUs4HFD9XzyIW6Vr/kjEHdLjQgn
 T5cOpC7O5ZuZPAKFp2MT+hb8f3vBcmCLEZau6wmyXV7xtHxSqaGAFuunZQgzM5Kg
 fkmdSIMYS/Ayj9PQUb/sjOJB0+9/XgbpYSeSsb+olg0wLMm5Swo=
 =uZE/
 -----END PGP SIGNATURE-----

Merge tag 'imx-bindings-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX DT bindings update for 5.16:

- Various board compatible addition: NXP S32G2, LS1021A TSN, Toradex
  Colibri i.MX6ULL, LX2160A BlueBox 3 boards.
- Toradex board and module compatibles clean-up.
- Convert fsl-linflexuart bindings to json-schema format and add S32G2
  compatible.
- Add bindings and defines for i.MX8MM VPU and DISP blk-ctrl.

* tag 'imx-bindings-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: arm: fsl: add ls1021a-tsn board
  dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains
  dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl
  dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains
  dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl
  dt-bindings: arm: fsl: Add E70K02 based ebook readers
  dt-bindings: arm: fsl: add toradex,colibri-imx6ull-emmc
  dt-bindings: arm: fsl: clean-up all toradex boards/modules
  dt-bindings: serial: fsl-linflexuart: add compatible for S32G2
  dt-bindings: serial: fsl-linflexuart: convert to json-schema format
  dt-bindings: arm: fsl: add NXP S32G2 boards
  dt-bindings: arm: fsl: document the LX2160A BlueBox 3 boards

Link: https://lore.kernel.org/r/20211016140138.1603-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-10-20 15:00:09 +02:00
Taniya Das a764e1ed50 dt-bindings: clock: Add YAML schemas for CAMCC clocks on SC7280
The camera clock controller clock provider have a bunch of generic
properties that are needed in a device tree. Add the CAMCC clock IDs for
camera client to request for the clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1633567425-11953-1-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:24:54 -07:00
Taniya Das d15eb80124 dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Add the LPASS clock IDs for
LPASS PIL client to request for the clocks.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1633484416-27852-2-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:22:49 -07:00
Konrad Dybcio a888dc4cae clk: qcom: gcc-msm8994: Add modem reset
This will be required to support the modem.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-7-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio b8f415c6ae clk: qcom: gcc-msm8994: Add missing clocks
This should be the last "add missing clocks" commit, as to
my knowledge there are no more clocks registered within gcc.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-5-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Konrad Dybcio 74a33fac3a clk: qcom: gcc-msm8994: Add missing NoC clocks
Add necessary NoC clocks to provide frequency sources for
relevant branch clocks.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210923162645.23257-4-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:23 -07:00
Shawn Guo 78b727d028 clk: qcom: smd-rpm: Add QCM2290 RPM clock support
Add support for RPM-managed clocks on the QCM2290 platform.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210917030434.19859-4-shawn.guo@linaro.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 15:20:22 -07:00
Shawn Guo 496d1a13d4 clk: qcom: Add Global Clock Controller driver for QCM2290
Add Global Clock Controller (GCC) driver for QCM2290.  This is a porting
of gcc-scuba driver from CAF msm-4.19, with GDSC support added on top.

Because the alpha_pll on the platform has a different register
layout (offsets), its own clk_alpha_pll_regs_offset[] is used in the
driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210919023308.24498-3-shawn.guo@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@kernel.org: Drop duplicate includes, clk.h include, module alias]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-10-13 12:43:02 -07:00
Sam Protsenko 2ae5c2c3f8 dt-bindings: clock: Add bindings definitions for Exynos850 CMU
Clock controller driver is designed to have separate instances for each
particular CMU. So clock IDs in this bindings header also start from 1
for each CMU.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211008154352.19519-4-semen.protsenko@linaro.org
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2021-10-09 22:21:14 +02:00
Enric Balletbo i Serra 4bdb00edbd arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0
Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.

While here, also remove the undocumented and also not used
'mediatek,syscon-dsi' property.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.5.I933f1532d7a1b2910843a9644c86a7d94a4b44e1@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:11:14 +02:00
Enric Balletbo i Serra 7fdb1bc3d9 arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0
Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.4.I7bd7d9a8da5e2894711b700a1127e6902a2b2f1d@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:11:13 +02:00
Enric Balletbo i Serra f07c776f6d arm64: dts: mediatek: Move reset controller constants into common location
The DT binding includes for reset controllers are located in
include/dt-bindings/reset/. Move the Mediatek reset constants in there.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20210930103105.v4.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-10-08 15:11:13 +02:00
Lucas Stach e66f2cd293 dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains
This adds the defines for the power domains provided by the DISP
blk-ctrl.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 14:36:20 +08:00
Lucas Stach 5d6fdcf2e5 dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains
This adds the defines for the power domains provided by the VPU
blk-ctrl.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-10-05 14:35:49 +08:00
Zhiyong Tao 26564c4435 dt-bindings: pinctrl: mt8195: add rsel define
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210924080632.28410-2-zhiyong.tao@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-10-03 00:43:35 +02:00
Jacky Bai d48f12d9ae dt-bindings: clock: Add imx8ulp clock support
Add the clock dt-binding file for i.MX8ULP.

For pcc node, it will also be used as a reset controller,
so add the '#reset-cells' property description and add the
pcc reset IDs.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20210914065208.3582128-2-ping.bai@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-09-30 16:22:55 +03:00
Bjorn Andersson f27591125a v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org
This immutable branch is based on v5.15-rc1 and contains the following
 patches extending the existig APR driver to also implement GPR:
 20210927135559.738-2-srinivas.kandagatla@linaro.org
 20210927135559.738-3-srinivas.kandagatla@linaro.org
 20210927135559.738-4-srinivas.kandagatla@linaro.org
 20210927135559.738-5-srinivas.kandagatla@linaro.org
 20210927135559.738-6-srinivas.kandagatla@linaro.org
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmFSiE4bHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FNV0P/1R/t0Dfj+vJg8SarPPg
 u/2LbLBAhFfn0WoVJgdYmpW3lG3kxG+z7I4s5gDdKCrKeyj//jJReRVwkgG4QxNs
 NgSAd24o/afb4/jcNTlmbhIyo+k9gsU5rxw7AynwRkLOyfNG71sytEH/1LvzBj1F
 X5AVQlzEnTsclVlwK3n9ZSm3cKiwgyFnqBLZs+e199FVjJgFGk6WDPplWPo50+hz
 pYImAVPGRbwSGH6cR2M4JSwpU/GJzFAAZf5Y8GrEBQVyhiQeKvYV7UNPjbNt15tv
 qI8Xfa5xbgAFunRC6GsjpaffTmCzHJKYgikchbIKre906IYBLwDHTnxvtXXDgBVe
 Zrd0jFQIrtuHseLQkvaEiVuuzmFibm/atdMUWCyncdunl2fuwTS60hCG+mRd7Pz2
 B85HmcAfS7LTu+dkn4doG4zVHO/JVpYr2eZExb1wxY0Kyz+5KDsESqUCB+7c6wya
 rGqsC+LX8l0MjunxSJbZUcuQLLcaFN9AXJTB6a0gPk+VLZH7EutkG98SonYU07w/
 Wff0bwVQWk3I4QHf0NaS5Ikbcx8KAv1ZaqcUaL2pPYNtIamkiyJdH6f+4C0q+K6n
 aMcLNLzaRcVayHO88SG3XpDLNc+cR2f/rehAkghxXJ8jhdtV5HSb5HLKgu+Lf8q4
 hEBzBQLYeRFJM1TuaZL02aXw
 =r7vf
 -----END PGP SIGNATURE-----

Merge tag '20210927135559.738-6-srinivas.kandagatla@linaro.org' into drivers-for-5.16

v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org

This immutable branch is based on v5.15-rc1 and contains the following
patches extending the existig APR driver to also implement GPR:
20210927135559.738-2-srinivas.kandagatla@linaro.org
20210927135559.738-3-srinivas.kandagatla@linaro.org
20210927135559.738-4-srinivas.kandagatla@linaro.org
20210927135559.738-5-srinivas.kandagatla@linaro.org
20210927135559.738-6-srinivas.kandagatla@linaro.org
2021-09-27 22:13:45 -05:00
Srinivas Kandagatla 974c6faf76 soc: dt-bindings: qcom: add gpr bindings
Qualcomm Generic Packet router aka GPR is the IPC mechanism found
in AudioReach next generation signal processing framework to perform
command and response messages between various processors.

GPR has concepts of static and dynamic port, all static services like
APM (Audio Processing Manager), PRM (Proxy resource manager) have
fixed port numbers where as dynamic services like graphs have dynamic
port numbers which are allocated at runtime. All GPR packet messages
will have source and destination domain and port along with opcode
and payload.

This support is added using existing APR driver to reuse most of
the code.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210927135559.738-5-srinivas.kandagatla@linaro.org
2021-09-27 22:10:07 -05:00
Sibi Sankar e603577231 dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions
Delete unused power-domain definitions exposed by AOSS QMP.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631800770-371-14-git-send-email-sibis@codeaurora.org
2021-09-27 15:01:59 -05:00
Martin Blumenstingl 2e1205422c clk: meson: meson8b: Export the video clocks
Setting the video clocks requires fine-tuned adjustments of various
video clocks. Export the required ones to allow changing the video clock
for the CVBS and HDMI outputs at runtime.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20210713232510.3057750-7-martin.blumenstingl@googlemail.com
2021-09-23 11:46:37 +02:00
Konrad Dybcio 92dde3279d dt-bindings: power: rpmpd: Add SM6350 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm SM6350 platform.

Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210820203105.229764-3-konrad.dybcio@somainline.org
2021-09-21 17:41:49 -05:00
Vladimir Lypak cdb6f6044a dt-bindings: power: rpmpd: Add MSM8953 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPM
in the Qualcomm MSM8953 platform.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210825170233.19859-1-sireeshkodali1@gmail.com
2021-09-21 17:41:48 -05:00
Chun-Jie Chen 01404648df clk: mediatek: Add dt-bindings of MT8195 clocks
Add MT8195 clock dt-bindings, includes topckgen, apmixedsys,
infracfg_ao, pericfg_ao and subsystem clocks.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210914021633.26377-3-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14 15:05:37 -07:00
Srinivasa Rao Mandadapu bfad37c53a
ASoC: dt-bindings: lpass: add binding headers for digital codecs
Add header defining for lpass internal digital codecs rx,tx and va
dai node id's.

Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Link: https://lore.kernel.org/r/1630934854-14086-1-git-send-email-srivasam@codeaurora.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-09-13 01:59:13 +01:00
Linus Torvalds 4c00e1e2e5 linux-watchdog 5.15-rc1 tag
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.14 (GNU/Linux)
 
 iEYEABECAAYFAmE3t2UACgkQ+iyteGJfRspKrgCfVDZuMeFiDrRjPz9FMDUncIZ7
 /24AoKWWPcOJLNXXNCwwD61kcW34LzVV
 =gMcs
 -----END PGP SIGNATURE-----

Merge tag 'linux-watchdog-5.15-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

 - add Mediatek MT7986 & MT8195 wdt support

 - add Maxim MAX63xx

 - drop bd70528 support

 - rewrite ixp4xx to watchdog framework

 - constify static struct watchdog_ops for sl28cpld_wdt, mpc8xxx_wdt and
   tqmx86

 - introduce watchdog_dev_suspend/resume

 - several fixes and improvements

* tag 'linux-watchdog-5.15-rc1' of git://www.linux-watchdog.org/linux-watchdog:
  dt-bindings: watchdog: Add compatible for Mediatek MT7986
  watchdog: ixp4xx: Rewrite driver to use core
  watchdog: Start watchdog in watchdog_set_last_hw_keepalive only if appropriate
  watchdog: max63xx_wdt: Add device tree probing
  dt-bindings: watchdog: Add Maxim MAX63xx bindings
  watchdog: mediatek: mt8195: add wdt support
  dt-bindings: reset: mt8195: add toprgu reset-controller header file
  watchdog: tqmx86: Constify static struct watchdog_ops
  watchdog: mpc8xxx_wdt: Constify static struct watchdog_ops
  watchdog: sl28cpld_wdt: Constify static struct watchdog_ops
  watchdog: iTCO_wdt: Fix detection of SMI-off case
  watchdog: bcm2835_wdt: consider system-power-controller property
  watchdog: imx2_wdg: notify wdog core to stop ping worker on suspend
  watchdog: introduce watchdog_dev_suspend/resume
  watchdog: Fix NULL pointer dereference when releasing cdev
  watchdog: only run driver set_pretimeout op if device supports it
  watchdog: bd70528 drop bd70528 support
2021-09-07 13:52:46 -07:00
Linus Torvalds c793011242 This is the bulk of pin control changes for the v5.15 kernel cycle,
no core changes at all this time, just driver work!
 
 New drivers:
 
 - New subdriver for Intel Keem Bay (an ARM-based SoC)
 
 - New subdriver for Qualcomm MDM9607 and SM6115
 
 - New subdriver for ST Microelectronics STM32MP135
 
 - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")
 
 - New subdriver for Ingenic X2100
 
 - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO
 
 - Support Samsung Exynos850
 
 - Support Renesas RZ/G2L
 
 Enhancements:
 
 - A major refactoring of the Rockchip driver, breaking part of it out
   to a separate GPIO driver in drivers/gpio
 
 - Pin bias support on Renesas r8a77995
 
 - Add SCI pins support to Ingenic JZ4755 and JZ4760
 
 - Mediatek device tree bindings converted to YAML
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmEw+3cACgkQQRCzN7AZ
 XXOBihAAyVGtmXsEO9yO50R0+RzbTvD8QVGTdBqjSK/ILghoP5xRZzYkOt9oKUgG
 2ue24euJ2Ww0+tV69CEKHOfTt8vnXEawQe9hiROQTgSDrT+9ScdT81pEQPH00smM
 oQJqxXmi0HQ28r6NyrA/0WN6f0J+nEh7f4STPWtSW8E3Cz/pyODhrtdhyNXbzMJ3
 W9JGjTsz4VBy7qurb0RKpQrZ244uDyFCMzZnoBvJBN/f6Jupu09d0mNkDrYhvK5z
 FVdIwFEZ2sssF9zf33BkJ7BKnHa5WANJD3RaM2fcCC/sFIq8k3ZVHhvOkdE3QmLp
 yWrFZREsJvvK1U/ksHRFB3RucOMKVAXV+CnVxKqTU7rv+cEHH0l/TacPqfZaONm9
 LGF3FoGYnG5oO+CxtfAedpHmajDZZNky2RC0Eov/Eigiq+VHXpuClB/DcpHyCuv2
 aKDxeqP8JXsZW1t7YutCb6w5f6f8SKC/csaFkMqCJMXz10sCPjKBsvlgWq49A99X
 CtwJxlzDKI7i9TSffCTHYUQBWAYa/b3fwnwuVphzpVya1gERvHN30ZhJH9ho0LGW
 YNNdVAvqNdH6FzyTzOY8fOKc/J2OY1Yd7gL35T0xYiTrT8JK7rwW8pUh0JINxSdU
 QGHjis4WjGUFzgqUpC8qhI6u+rInLRr08sGJ/qnj5TmpZRp9rsk=
 =I6N/
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.15 kernel cycle, no
  core changes at all this time, just driver work!

  New drivers:

   - New subdriver for Intel Keem Bay (an ARM-based SoC)

   - New subdriver for Qualcomm MDM9607 and SM6115

   - New subdriver for ST Microelectronics STM32MP135

   - New subdriver for Freescale i.MX8ULP ("Ultra Low Power")

   - New subdriver for Ingenic X2100

   - Support for Qualcomm PMC8180, PMC8180C, SA8155p-adp PMIC GPIO

   - Support Samsung Exynos850

   - Support Renesas RZ/G2L

  Enhancements:

   - A major refactoring of the Rockchip driver, breaking part of it out
     to a separate GPIO driver in drivers/gpio

   - Pin bias support on Renesas r8a77995

   - Add SCI pins support to Ingenic JZ4755 and JZ4760

   - Mediatek device tree bindings converted to YAML"

* tag 'pinctrl-v5.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (53 commits)
  pinctrl: renesas: Add RZ/G2L pin and gpio controller driver
  pinctrl: samsung: Add Exynos850 SoC specific data
  dt-bindings: pinctrl: samsung: Add Exynos850 doc
  MAINTAINERS: Add maintainers for amd-pinctrl driver
  pinctrl: Add Intel Keem Bay pinctrl driver
  dt-bindings: pinctrl: Add bindings for Intel Keembay pinctrl driver
  pinctrl: zynqmp: Drop pinctrl_unregister for devm_ registered device
  dt-bindings: pinctrl: qcom-pmic-gpio: Remove the interrupts property
  dt-bindings: pinctrl: qcom-pmic-gpio: Convert qcom pmic gpio bindings to YAML
  dt-bindings: pinctrl: mt8195: Use real world values for drive-strength arguments
  dt-bindings: mediatek: convert pinctrl to yaml
  arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
  arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
  pinctrl: ingenic: Add .max_register in regmap_config
  pinctrl: ingenic: Fix bias config for X2000(E)
  pinctrl: ingenic: Fix incorrect pull up/down info
  pinctrl: Ingenic: Add pinctrl driver for X2100.
  dt-bindings: pinctrl: Add bindings for Ingenic X2100.
  pinctrl: Ingenic: Add SSI pins support for JZ4755 and JZ4760.
  pinctrl: Ingenic: Improve the code.
  ...
2021-09-02 14:22:56 -07:00
Linus Torvalds 75d6e7d9ce Nothing changed in the clk framework core this time around. We did get
some updates to the basic clk types to use determine_rate for the
 divider type and add a power of two fractional divider flag though.
 Otherwise, this is a collection of clk driver updates. More than half
 the diffstat is in the Qualcomm clk driver where we add a bunch of data
 to describe clks on various SoCs and fix bugs. The other big new thing
 in here is the Mediatek MT8192 clk driver. That's been under review for
 a while and it's nice to see that it's finally upstream.
 
 Beyond that it's the usual set of minor fixes and tweaks to clk drivers.
 There are some non-clk driver bits in here which have all been acked by
 the respective maintainers.
 
 New Drivers:
  - Support video, gpu, display clks on qcom sc7280 SoCs
  - GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
  - Multimedia clks (MMCC) on qcom MSM8994/MSM8992
  - RPMh clks on qcom SM6350 SoCs
  - Support for Mediatek MT8192 SoCs
  - Add display (DU and DSI) clocks on Renesas R-Car V3U
  - Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
    resets on Renesas RZ/G2L
 
 Updates:
  - Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
  - Add power of two flag to fractional divider clk type
  - Migrate some clk drivers to clk_divider_ops.determine_rate
  - Migrate to clk_parent_data in gcc-sdm660
  - Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
  - Switch from .round_rate to .determine_rate in clk-divider-gate
  - Fix clock tree update for TF-A controlled clocks for all i.MX8M
  - Add missing M7 core clock for i.MX8MN
  - YAML conversion of rk3399 clock controller binding
  - Removal of GRF dependency for the rk3328/rk3036 pll types
  - Drop CLK_IS_CRITICAL flag from Tegra fuse clk
  - Make CLK_R9A06G032 Kconfig symbol invisible
  - Convert various DT bindings to YAML
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmExEooRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSXXBhAAvhHm4fcm3fRjNdfImd+jDEl8XSvg+w43
 adSnmVxbYM6ZVNOiJ4CJWHbj0hOY/PJnsQYWbV0xXvXW+zXva6p495MMHHOGSi2o
 lMgZVMvj5UAwu304ZC9Xfn31dwo8XdGrltp4JqIcI2NEBMh1/PlZW22esT+jDiWN
 3SWFD3M7lu88xTREyiEu11FY3z/KiGzbGlqYcbivx1X0sHVnBRbl4qcqZway+BmQ
 95Ma4YWwhvDGYc+ypKH2EPxs/LikHXj05nMooigy65DOQ5wrM4L1eWkwmVUf6h+e
 t4x7sAVysLnkihzdH5r2pw6CcAIom76v8w0+maSfk+jINUu1LeGVuat1eXSesFTu
 49o+uTKRghkUe/Qh6r+7lbo8AZXQq+wUsLTYRuaWT/mSb+svAtJaUWAru8tJnMlH
 oK6OehcQwz4nGhH0HnBK1jCVdtgckxPBw8F/GYN9rYhsccIe0XmFjX1rzMM3s8De
 PLl6QO7Xzd+xb/FwAU8+S1WpKFdPU6ILTUnI2Ma3Mn/gfjZEZHvWAdTjo4oZGEsw
 +N4n924ArptbeSLRrlNUtqx4BVDL5yo54xS5gefNpmD5yezO7aoUtN0aGcBq+01p
 Qw0N5hKtcdsNYLBEFSvBGcZZmErMZbPwMXHWiUwNymXBDzJKgj5d+ks+1vJ3iCNW
 R5r9hvATJPQ=
 =Rrqg
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Nothing changed in the clk framework core this time around. We did get
  some updates to the basic clk types to use determine_rate for the
  divider type and add a power of two fractional divider flag though.

  Otherwise, this is a collection of clk driver updates. More than half
  the diffstat is in the Qualcomm clk driver where we add a bunch of
  data to describe clks on various SoCs and fix bugs. The other big new
  thing in here is the Mediatek MT8192 clk driver. That's been under
  review for a while and it's nice to see that it's finally upstream.

  Beyond that it's the usual set of minor fixes and tweaks to clk
  drivers. There are some non-clk driver bits in here which have all
  been acked by the respective maintainers.

  New Drivers:
   - Support video, gpu, display clks on qcom sc7280 SoCs
   - GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
   - Multimedia clks (MMCC) on qcom MSM8994/MSM8992
   - RPMh clks on qcom SM6350 SoCs
   - Support for Mediatek MT8192 SoCs
   - Add display (DU and DSI) clocks on Renesas R-Car V3U
   - Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
     resets on Renesas RZ/G2L

  Updates:
   - Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
   - Add power of two flag to fractional divider clk type
   - Migrate some clk drivers to clk_divider_ops.determine_rate
   - Migrate to clk_parent_data in gcc-sdm660
   - Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
   - Switch from .round_rate to .determine_rate in clk-divider-gate
   - Fix clock tree update for TF-A controlled clocks for all i.MX8M
   - Add missing M7 core clock for i.MX8MN
   - YAML conversion of rk3399 clock controller binding
   - Removal of GRF dependency for the rk3328/rk3036 pll types
   - Drop CLK_IS_CRITICAL flag from Tegra fuse clk
   - Make CLK_R9A06G032 Kconfig symbol invisible
   - Convert various DT bindings to YAML"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
  dt-bindings: clock: samsung: fix header path in example
  clk: tegra: fix old-style declaration
  clk: qcom: Add SM6350 GCC driver
  MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
  dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos4 to dtschema
  dt-bindings: clock: samsung: convert Exynos3250 to dtschema
  dt-bindings: clock: samsung: convert Exynos542x to dtschema
  dt-bindings: clock: samsung: add bindings for Exynos external clock
  dt-bindings: clock: samsung: convert Exynos5250 to dtschema
  clk: vc5: Add properties for configuring SD/OE behavior
  clk: vc5: Use dev_err_probe
  dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
  dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
  clk: zynqmp: Fix kernel-doc format
  clk: at91: clk-generated: Limit the requested rate to our range
  clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
  clk: zynqmp: Fix a memory leak
  clk: zynqmp: Check the return type
  ...
2021-09-02 14:17:24 -07:00
Linus Torvalds a180eab0b5 - mtk: added support for mt8192 and mt8195
minor fix regarding address shift.
 - qcom: added compatibles for MSM8953, SM6350 and SM6115
 		enable loading IPCC as a module
 - misc: change Altera maintainer
 		fix sti kernel-doc warnings
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmEvkXIACgkQf9lkf8eY
 P5VVXg/9FItkspoh1DxiOi2KBrtpSdwMpbnjQRPoQx22efHR89KFRil1+srxdL5X
 eYEDXJV91J7jdo9JS4O6hM3uTUGVNRHYypDrSGhzmG1WDuLVM4x9EVLAe6EG026q
 3h8NRt7bxDLNGI9wjSuZyVsTt+rpAOQXpEkw3GPOhZFwE2ZRBNSqiv6fI+TI/GC9
 c8nELD1fktrEU491wLOAFiEwOQxJe5rLPexfT2gox2sg8DOpbNSz1BAjqfks5Qcl
 f4Gc8Q/AhAlghEnjpRNC44RoE7ce2KLJtrYJrClN7ToyjGbV4NMDg7vfHeZiTACh
 n/lp7oS0sX1xdKclZyZDFtYJW/FnwkkgVm7cpH48sQR0jqsrZmfyen8gnGhxxo1B
 4F+/k8tplIs1or8EqpR688+fzkUKjXDzFTESa+xj2cL8cdfmZomnyBhTdsfKVoi0
 Aqydgn907v8+l5uep0b5uj1SMRCDolgnipBjkryKkp+Y78i9AsqWWGPcCoY+VP35
 0vCU5Q+UgtINIrO5MjaEtm3fqw/xpgu4TDPIEnfOCZMLxp7wSV9e3Zqh+ppGnzMn
 sWPRI93q7YQx4hkbrFsaGGEylWmxffr3fiBDnR9f7ZV7sLMQON73+493AIeCTBND
 BkUhEwdBlLVLVcGreSO8wr4IyJ4MNvRm0vB3T7LjQXPoa7fLw0A=
 =F3Lm
 -----END PGP SIGNATURE-----

Merge tag 'mailbox-v5.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - mtk:
     - added support for mt8192 and mt8195
     - minor fix regarding address shift

 - qcom:
     - added compatibles for MSM8953, SM6350 and SM6115
     - enable loading IPCC as a module

 - misc:
     - change Altera maintainer
     - fix sti kernel-doc warnings

* tag 'mailbox-v5.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: cmdq: add multi-gce clocks support for mt8195
  mailbox: cmdq: add mediatek mailbox support for mt8195
  dt-bindings: gce: add gce header file for mt8195
  dt-bindings: mailbox: add definition for mt8195
  mailbox: qcom-apcs-ipc: Add compatible for MSM8953 SoC
  dt-bindings: mailbox: Add compatible for the MSM8953
  dt-bindings: mailbox: qcom-ipcc: Add compatible for SM6350
  mailbox: qcom: Add support for SM6115 APCS IPC
  dt-bindings: mailbox: qcom: Add SM6115 APCS compatible
  soc: mediatek: cmdq: add address shift in jump
  mailbox: cmdq: add mt8192 support
  dt-binding: gce: add gce header file for mt8192
  MAINTAINERS: Replace Ley Foon Tan as Altera Mailbox maintainer
  mailbox: qcom-ipcc: Enable loading QCOM_IPCC as a module
  mailbox: sti: quieten kernel-doc warnings
2021-09-02 14:12:24 -07:00
Linus Torvalds 9e5f3ffcf1 Devicetree updates for v5.15:
- Refactor arch kdump DT related code to a common implementation
 
 - Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight',
   'resets', and 'pwm' properties
 
 - Various clean-ups to DT FDT code
 
 - Fix a runtime error for !CONFIG_SYSFS
 
 - Convert Synopsys DW PCI and derivative binding docs to schemas. Add
   Toshiba Visconti PCIe binding.
 
 - Convert a bunch of memory controller bindings to schemas
 
 - Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ
   combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq
   MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards,
   brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema.
 
 - Extend nvmem bindings to handle bit offsets in unit-addresses
 
 - Add DT schemas for HiKey 970 PCIe PHY
 
 - Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings
 
 - Enable dtc pci_device_reg warning by default
 
 - Fixes for handling 'unevaluatedProperties' in preparation to enable
   pending support in the tooling for jsonschema 2020-12 draft
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmEuWEsQHHJvYmhAa2Vy
 bmVsLm9yZwAKCRD6+121jbxhw+CtD/45m84GisULb7FFmlo+WY2SbzE8a+MUEXo0
 5ZZoMViSvBchphap9ueFNDdrLMUOHMsFaxHuTCUxXr4tq7EOemM7Br4OLiwiRrM5
 o2CwBvXYu+49c4UKVFMM6RCKFiXvw5NLI4Twpj4Ge8farHvt9Ecwtq+Y+RYWgFk2
 xwXWut7ZK3zBU6B+s4MRBATCFTD5oC4pAJIK3OQUlUPqZEQqdTRBKv5lyg+VUY2k
 eU0Cyzm0dZAmtjAu8ovhVNLfK1pp165QiaFIE1qh5H3ZVZAJlNyqN4jBDx9E4pLj
 BeazrsqfOkC8mZC+T7TgixhwB6D+r6/JW9NiCjYbarXibIsUOKSTKtj8XR8eZF/g
 sLeVDx33U5S+dlj1OB7scwq4Q9sG27ii2rlkvafA5KKBjoR2dzz7o9JesCV1Guha
 goPXmcd08e+KrjINxVc6gk4Y+KG8u+G7qnXnnmSatESJKxiDu1OgU3L16mlTJFaM
 hBmrh5rx1y8EkQnzgceTZIIWh30poSQKKyDB6Ta4Dude5JE+rS30oVURDR7MIrav
 rY70OYOiSq/nCcC7bc0Yu0UxJi+bwH28WvsD0aeCUOBTFsnI4j2uvsPsh3Aq74O0
 UbQmUCMxhpmsDVdIOqlS1IVH8M79I+BrDTPVP6EE96ttoj9FbSi6AgjeGJzVMC99
 EhtWe+gKTQ==
 =28CD
 -----END PGP SIGNATURE-----

Merge tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:

 - Refactor arch kdump DT related code to a common implementation

 - Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight',
   'resets', and 'pwm' properties

 - Various clean-ups to DT FDT code

 - Fix a runtime error for !CONFIG_SYSFS

 - Convert Synopsys DW PCI and derivative binding docs to schemas. Add
   Toshiba Visconti PCIe binding.

 - Convert a bunch of memory controller bindings to schemas

 - Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ
   combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq
   MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards,
   brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema.

 - Extend nvmem bindings to handle bit offsets in unit-addresses

 - Add DT schemas for HiKey 970 PCIe PHY

 - Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings

 - Enable dtc pci_device_reg warning by default

 - Fixes for handling 'unevaluatedProperties' in preparation to enable
   pending support in the tooling for jsonschema 2020-12 draft

* tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
  dt-bindings: display: remove zte,vou.txt binding doc
  dt-bindings: hwmon: merge max1619 into trivial devices
  dt-bindings: mtd-physmap: Add 'arm,vexpress-flash' compatible
  dt-bindings: PCI: imx6: convert the imx pcie controller to dtschema
  dt-bindings: Use 'enum' instead of 'oneOf' plus 'const' entries
  dt-bindings: Add vendor prefix for Topic Embedded Systems
  of: fdt: Rename reserve_elfcorehdr() to fdt_reserve_elfcorehdr()
  arm64: kdump: Remove custom linux,usable-memory-range handling
  arm64: kdump: Remove custom linux,elfcorehdr handling
  riscv: Remove non-standard linux,elfcorehdr handling
  of: fdt: Use IS_ENABLED(CONFIG_BLK_DEV_INITRD) instead of #ifdef
  of: fdt: Add generic support for handling usable memory range property
  of: fdt: Add generic support for handling elf core headers property
  crash_dump: Make elfcorehdr address/size symbols always visible
  dt-bindings: memory: convert Samsung Exynos DMC to dtschema
  dt-bindings: devfreq: event: convert Samsung Exynos PPMU to dtschema
  dt-bindings: devfreq: event: convert Samsung Exynos NoCP to dtschema
  kbuild: Enable dtc 'pci_device_reg' warning by default
  dt-bindings: soc: remove obsolete zte zx header
  dt-bindings: clock: remove obsolete zte zx header
  ...
2021-09-01 18:34:51 -07:00
Linus Torvalds 7c636d4d20 ARM: SoC DT changes for 5.15
As usual, the bulk of work in the SoC tree goes into DT files,
 this time with a roughly even split between 32-bit and 64-bit
 SoCs rather than the usual mostly 64-bit changes.
 
 New SoCs:
 
  - Microchip SAMA7 SoC family based on Cortex-A7, a new
    32-bit platform based on the older SAMA5 series.
 
  - Qualcomm Snapdragon SDM636 and SM8150, variations of the
    existing phone SoCs.
 
  - Renesas R-Car H3e-2G and M3e-2G SoCs, variations of
    older Renesas SoCs.
 
 New boards:
 
  - Marvell CN913x reference boards
 
  - ASpeed AST2600 BMC implementations for Facebook Cloudripper,
    Elbert and Fuji server boards.
 
  - Snapdragon 665 based Sony Xperia 10II
 
  - Snapdragon MSM8916 based Xiaomi Redmi 2
 
  - Snapdragon MSM8226 based Samsung Galaxy S3 Neo
 
  - NXP i.MX based 32-bit boards:
    - DHCOM based PicoITX
    - DHSOM based DRC0ỉ
    - SolidRun SolidSense
    - SKOV i.MX6 boards.
 
  - NXP i.MX based 64-bit boards:
    - Nitrogen8 SoM and MNT Reform2
    - LS1088A based Traverse Ten64
    - i.MX8M based GW7902.
 
  - NVIDIA Jetson TX2 NX Developer Kit
 
  - 4KOpen STiH418-b2264 development board
 
  - ux500 based Samsung phones: Gavini, Codina and Kyle
 
  - TI AM335x based Sancloud BBE Lite
 
  - ixp4xx dts files to replace all old board files
 
 Other changes:
 
  - Treewide fixes for dtc warnings
 
  - Rockchips i/o domain support
 
  - TI OMAP/AM3 CPSW switch driver support
 
  - Improved device support for allwinner, aspeed, qualcomm, NXP,
    nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
    OMAP and actions.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iD8DBQBhL13Z5t5GS2LDRf4RAljwAJ0acTxOBYP8J5zETlAQRWYcYWh5hACfZOgC
 Om6K0IN5+lJuaUyF/GdmqS4=
 =zXua
 -----END PGP SIGNATURE-----

Merge tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "As usual, the bulk of work in the SoC tree goes into DT files, this
  time with a roughly even split between 32-bit and 64-bit SoCs rather
  than the usual mostly 64-bit changes.

  New SoCs:

   - Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit
     platform based on the older SAMA5 series.

   - Qualcomm Snapdragon SDM636 and SM8150, variations of the existing
     phone SoCs.

   - Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas
     SoCs.

  New boards:

   - Marvell CN913x reference boards

   - ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert
     and Fuji server boards.

   - Snapdragon 665 based Sony Xperia 10II

   - Snapdragon MSM8916 based Xiaomi Redmi 2

   - Snapdragon MSM8226 based Samsung Galaxy S3 Neo

   - NXP i.MX based 32-bit boards:
       - DHCOM based PicoITX
       - DHSOM based DRC0ỉ
       - SolidRun SolidSense
       - SKOV i.MX6 boards.

   - NXP i.MX based 64-bit boards:
       - Nitrogen8 SoM and MNT Reform2
       - LS1088A based Traverse Ten64
       - i.MX8M based GW7902.

   - NVIDIA Jetson TX2 NX Developer Kit

   - 4KOpen STiH418-b2264 development board

   - ux500 based Samsung phones: Gavini, Codina and Kyle

   - TI AM335x based Sancloud BBE Lite

   - ixp4xx dts files to replace all old board files

  Other changes:

   - Treewide fixes for dtc warnings

   - Rockchips i/o domain support

   - TI OMAP/AM3 CPSW switch driver support

   - Improved device support for allwinner, aspeed, qualcomm, NXP,
     nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti,
     OMAP and actions"

* tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits)
  arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
  ARM: dts: rockchip: Add SFC to RV1108
  arm64: dts: marvell: armada-37xx: Extend PCIe MEM space
  ARM: dts: aspeed: p10bmc: Add power control pins
  ARM: dts: aspeed: cloudripper: Add comments for "mdio1"
  ARM: dts: aspeed: minipack: Update flash partition table
  dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board
  dt-bindings: vendor-prefixes: add Traverse Technologies
  arm64: dts: add device tree for Traverse Ten64 (LS1088A)
  arm64: dts: ls1088a: add missing PMU node
  arm64: dts: ls1088a: add internal PCS for DPMAC1 node
  ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz
  ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node
  ARM: dts: add SKOV imx6q and imx6dl based boards
  dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards
  dt-bindings: vendor-prefixes: Add an entry for SKOV A/S
  arm64: dts: imx8mq-reform2: add sound support
  arm64: dts: imx8m: drop interrupt-affinity for pmu
  arm64: dts: imx8qxp: update pmu compatible
  arm64: dts: imx8mm: update pmu compatible
  ...
2021-09-01 15:39:09 -07:00
Stephen Boyd 47505bf3a8 Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-ralink' into clk-next
* clk-kirkwood:
  clk: kirkwood: Fix a clocking boot regression

* clk-imx:
  clk: imx8mn: Add M7 core clock
  clk: imx8m: fix clock tree update of TF-A managed clocks
  clk: imx: clk-divider-gate: Switch to clk_divider.determine_rate
  clk: imx8mn: use correct mux type for clkout path
  clk: imx8mm: use correct mux type for clkout path

* clk-doc:
  dt-bindings: clock: samsung: fix header path in example
  MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
  dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
  dt-bindings: clock: samsung: convert Exynos4 to dtschema
  dt-bindings: clock: samsung: convert Exynos3250 to dtschema
  dt-bindings: clock: samsung: convert Exynos542x to dtschema
  dt-bindings: clock: samsung: add bindings for Exynos external clock
  dt-bindings: clock: samsung: convert Exynos5250 to dtschema
  dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
  clk: zynqmp: Fix kernel-doc format
  clk: at91: sama7g5: remove all kernel-doc & kernel-doc warnings
  clk: zynqmp: fix kernel doc

* clk-zynq:
  clk: zynqmp: Fix a memory leak
  clk: zynqmp: Check the return type

* clk-ralink:
  clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
2021-09-01 15:27:07 -07:00
Stephen Boyd 8fb59ce15c Merge branches 'clk-nvidia', 'clk-rockchip', 'clk-at91' and 'clk-vc5' into clk-next
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators

* clk-nvidia:
  clk: tegra: fix old-style declaration
  clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock
  soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
  soc/tegra: fuse: Add runtime PM support
  soc/tegra: fuse: Clear fuse->clk on driver probe failure
  soc/tegra: pmc: Prevent racing with cpuilde driver
  soc/tegra: bpmp: Remove unused including <linux/version.h>

* clk-rockchip:
  clk: rockchip: make rk3308 ddrphy4x clock critical
  clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types
  dt-bindings: clk: Convert rockchip,rk3399-cru to DT schema
  clk: rockchip: Add support for hclk_sfc on rk3036
  clk: rockchip: rk3036: fix up the sclk_sfc parent error
  clk: rockchip: add dt-binding clkid for hclk_sfc on rk3036

* clk-at91:
  clk: at91: clk-generated: Limit the requested rate to our range

* clk-vc5:
  clk: vc5: Add properties for configuring SD/OE behavior
  clk: vc5: Use dev_err_probe
  dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
2021-09-01 15:26:58 -07:00
Linus Torvalds 866147b8fa ARM: SoC drivers for 5.15
These are updates for drivers that are tied to a particular SoC,
 including the correspondig device tree bindings:
 
  - A couple of reset controller changes for unisoc, uniphier, renesas
    and zte platforms
 
  - memory controller driver fixes for omap and tegra
 
  - Rockchip io domain driver updates
 
  - Lots of updates for qualcomm platforms, mostly touching their
    firmware and power management drivers
 
  - Tegra FUSE and firmware driver updateѕ
 
  - Support for virtio transports in the SCMI firmware framework
 
  - cleanup of ixp4xx drivers, towards enabling multiplatform
    support and bringing it up to date with modern platforms
 
  - Minor updates for keystone, mediatek, omap, renesas.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iD8DBQBhLz215t5GS2LDRf4RAjlHAJ473D0PymaTzv68EuPHThG+DEPifQCdGjLq
 QGBB6JidIP8rtEdC+LWBB8I=
 =M5+N
 -----END PGP SIGNATURE-----

Merge tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "These are updates for drivers that are tied to a particular SoC,
  including the correspondig device tree bindings:

   - A couple of reset controller changes for unisoc, uniphier, renesas
     and zte platforms

   - memory controller driver fixes for omap and tegra

   - Rockchip io domain driver updates

   - Lots of updates for qualcomm platforms, mostly touching their
     firmware and power management drivers

   - Tegra FUSE and firmware driver updateѕ

   - Support for virtio transports in the SCMI firmware framework

   - cleanup of ixp4xx drivers, towards enabling multiplatform support
     and bringing it up to date with modern platforms

   - Minor updates for keystone, mediatek, omap, renesas"

* tag 'drivers-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  reset: simple: remove ZTE details in Kconfig help
  soc: rockchip: io-domain: Remove unneeded semicolon
  soc: rockchip: io-domain: add rk3568 support
  dt-bindings: power: add rk3568-pmu-io-domain support
  bus: ixp4xx: return on error in ixp4xx_exp_probe()
  soc: renesas: Prefer memcpy() over strcpy()
  firmware: tegra: Stop using seq_get_buf()
  soc/tegra: fuse: Enable fuse clock on suspend for Tegra124
  soc/tegra: fuse: Add runtime PM support
  soc/tegra: fuse: Clear fuse->clk on driver probe failure
  soc/tegra: pmc: Prevent racing with cpuilde driver
  soc/tegra: bpmp: Remove unused including <linux/version.h>
  dt-bindings: soc: ti: pruss: Add dma-coherent property
  soc: ti: Remove pm_runtime_irq_safe() usage for smartreflex
  soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM64x SoCs
  dt-bindings: soc: ti: pruss: Update bindings for K3 AM64x SoCs
  firmware: arm_scmi: Use WARN_ON() to check configured transports
  firmware: arm_scmi: Fix boolconv.cocci warnings
  soc: mediatek: mmsys: Fix missing UFOE component in mt8173 table routing
  soc: mediatek: mmsys: add MT8365 support
  ...
2021-09-01 15:25:28 -07:00
Stephen Boyd 7110569a09 Merge branches 'clk-renesas', 'clk-cleanup' and 'clk-determine-divider' into clk-next
- Migrate some clk drivers to clk_divider_ops.determine_rate

* clk-renesas:
  clk: renesas: Make CLK_R9A06G032 invisible
  clk: renesas: r9a07g044: Add entry for fixed clock P0_DIV2
  dt-bindings: clock: r9a07g044-cpg: Add entry for P0_DIV2 core clock
  clk: renesas: r9a07g044: Add clock and reset entries for ADC
  clk: renesas: r9a07g044: Add clock and reset entries for CANFD
  clk: renesas: Rename renesas-rzg2l-cpg.[ch] to rzg2l-cpg.[ch]
  clk: renesas: r9a07g044: Add GPIO clock and reset entries
  clk: renesas: r9a07g044: Add SSIF-2 clock and reset entries
  clk: renesas: r9a07g044: Add USB clocks/resets
  clk: renesas: r9a07g044: Add DMAC clocks/resets
  clk: renesas: r9a07g044: Add I2C clocks/resets
  clk: renesas: r8a779a0: Add the DSI clocks
  clk: renesas: r8a779a0: Add the DU clock
  clk: renesas: rzg2: Rename i2c-dvfs to iic-pmic
  clk: renesas: rzg2l: Fix off-by-one check in rzg2l_cpg_clk_src_twocell_get()
  clk: renesas: rzg2l: Avoid mixing error pointers and NULL
  clk: renesas: rzg2l: Fix a double free on error
  clk: renesas: rzg2l: Fix return value and unused assignment
  clk: renesas: rzg2l: Remove unneeded semicolon

* clk-cleanup:
  clk: palmas: Add a missing SPDX license header
  clk: Align provider-specific CLK_* bit definitions

* clk-determine-divider:
  clk: stm32mp1: Switch to clk_divider.determine_rate
  clk: stm32h7: Switch to clk_divider.determine_rate
  clk: stm32f4: Switch to clk_divider.determine_rate
  clk: bcm2835: Switch to clk_divider.determine_rate
  clk: divider: Implement and wire up .determine_rate by default
2021-09-01 15:25:15 -07:00
Stephen Boyd 4990d8c133 Merge branches 'clk-qcom', 'clk-socfpga', 'clk-mediatek', 'clk-lmk' and 'clk-x86' into clk-next
- Support video, gpu, display clks on qcom sc7280 SoCs
 - GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
 - Multimedia clks (MMCC) on qcom MSM8994/MSM8992
 - Migrate to clk_parent_data in gcc-sdm660
 - RPMh clks on qcom SM6350 SoCs
 - Support for Mediatek MT8192 SoCs

* clk-qcom: (38 commits)
  clk: qcom: Add SM6350 GCC driver
  dt-bindings: clock: Add SM6350 GCC clock bindings
  clk: qcom: rpmh: Add support for RPMH clocks on SM6350
  dt-bindings: clock: Add RPMHCC bindings for SM6350
  clk: qcom: adjust selects for SM_VIDEOCC_8150 and SM_VIDEOCC_8250
  clk: qcom: Add Global Clock controller (GCC) driver for SM6115
  dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
  clk: qcom: mmcc-msm8994: Add MSM8992 support
  clk: qcom: Add msm8994 MMCC driver
  dt-bindings: clock: Add support for MSM8992/4 MMCC
  clk: qcom: Add Global Clock Controller driver for MSM8953
  dt-bindings: clock: add Qualcomm MSM8953 GCC driver bindings
  clk: qcom: gcc-sdm660: Replace usage of parent_names
  clk: qcom: gcc-sdm660: Move parent tables after PLLs
  clk: qcom: use devm_pm_runtime_enable and devm_pm_clk_create
  PM: runtime: add devm_pm_clk_create helper
  PM: runtime: add devm_pm_runtime_enable helper
  clk: qcom: a53-pll: Add MSM8939 a53pll support
  dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
  clk: qcom: a53pll/mux: Use unique clock name
  ...

* clk-socfpga:
  clk: socfpga: agilex: add the bypass register for s2f_usr0 clock
  clk: socfpga: agilex: fix up s2f_user0_clk representation
  clk: socfpga: agilex: fix the parents of the psi_ref_clk

* clk-mediatek: (22 commits)
  clk: mediatek: make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167
  clk: mediatek: Add MT8192 vencsys clock support
  clk: mediatek: Add MT8192 vdecsys clock support
  clk: mediatek: Add MT8192 scp adsp clock support
  clk: mediatek: Add MT8192 msdc clock support
  clk: mediatek: Add MT8192 mmsys clock support
  clk: mediatek: Add MT8192 mfgcfg clock support
  clk: mediatek: Add MT8192 mdpsys clock support
  clk: mediatek: Add MT8192 ipesys clock support
  clk: mediatek: Add MT8192 imp i2c wrapper clock support
  clk: mediatek: Add MT8192 imgsys clock support
  clk: mediatek: Add MT8192 camsys clock support
  clk: mediatek: Add MT8192 audio clock support
  clk: mediatek: Add MT8192 basic clocks support
  clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
  clk: mediatek: Add configurable enable control to mtk_pll_data
  clk: mediatek: Fix asymmetrical PLL enable and disable control
  clk: mediatek: Get regmap without syscon compatible check
  clk: mediatek: Add dt-bindings of MT8192 clocks
  dt-bindings: ARM: Mediatek: Add audsys document binding for MT8192
  ...

* clk-lmk:
  clk: lmk04832: drop redundant fallthrough statements

* clk-x86:
  clk: x86: Rename clk-lpt to more specific clk-lpss-atom
2021-09-01 15:24:59 -07:00
Linus Torvalds 477f70cd2a drm for v5.15-rc1
core:
 - extract i915 eDP backlight into core
 - DP aux bus support
 - drm_device.irq_enabled removed
 - port drivers to native irq interfaces
 - export gem shadow plane handling for vgem
 - print proper driver name in framebuffer registration
 - driver fixes for implicit fencing rules
 - ARM fixed rate compression modifier added
 - updated fb damage handling
 - rmfb ioctl logging/docs
 - drop drm_gem_object_put_locked
 - define DRM_FORMAT_MAX_PLANES
 - add gem fb vmap/vunmap helpers
 - add lockdep_assert(once) helpers
 - mark drm irq midlayer as legacy
 - use offset adjusted bo mapping conversion
 
 vgaarb:
 - cleanups
 
 fbdev:
 - extend efifb handling to all arches
 - div by 0 fixes for multiple drivers
 
 udmabuf:
 - add hugepage mapping support
 
 dma-buf:
 - non-dynamic exporter fixups
 - document implicit fencing rules
 
 amdgpu:
 - Initial Cyan Skillfish support
 - switch virtual DCE over to vkms based atomic
 - VCN/JPEG power down fixes
 - NAVI PCIE link handling fixes
 - AMD HDMI freesync fixes
 - Yellow Carp + Beige Goby fixes
 - Clockgating/S0ix/SMU/EEPROM fixes
 - embed hw fence in job
 - rework dma-resv handling
 - ensure eviction to system ram
 
 amdkfd:
 - uapi: SVM address range query added
 - sysfs leak fix
 - GPUVM TLB optimizations
 - vmfault/migration counters
 
 i915:
 - Enable JSL and EHL by default
 - preliminary XeHP/DG2 support
 - remove all CNL support (never shipped)
 - move to TTM for discrete memory support
 - allow mixed object mmap handling
 - GEM uAPI spring cleaning
   - add I915_MMAP_OBJECT_FIXED
   - reinstate ADL-P mmap ioctls
   - drop a bunch of unused by userspace features
   - disable and remove GPU relocations
 - revert some i915 misfeatures
 - major refactoring of GuC for Gen11+
 - execbuffer object locking separate step
 - reject caching/set-domain on discrete
 - Enable pipe DMC loading on XE-LPD and ADL-P
 - add PSF GV point support
 - Refactor and fix DDI buffer translations
 - Clean up FBC CFB allocation code
 - Finish INTEL_GEN() and friends macro conversions
 
 nouveau:
 - add eDP backlight support
 - implicit fence fix
 
 msm:
 - a680/7c3 support
 - drm/scheduler conversion
 
 panfrost:
 - rework GPU reset
 
 virtio:
 - fix fencing for planes
 
 ast:
 - add detect support
 
 bochs:
 - move to tiny GPU driver
 
 vc4:
 - use hotplug irqs
 - HDMI codec support
 
 vmwgfx:
 - use internal vmware device headers
 
 ingenic:
 - demidlayering irq
 
 rcar-du:
 - shutdown fixes
 - convert to bridge connector helpers
 
 zynqmp-dsub:
 - misc fixes
 
 mgag200:
 - convert PLL handling to atomic
 
 mediatek:
 - MT8133 AAL support
 - gem mmap object support
 - MT8167 support
 
 etnaviv:
 - NXP Layerscape LS1028A SoC support
 - GEM mmap cleanups
 
 tegra:
 - new user API
 
 exynos:
 - missing unlock fix
 - build warning fix
 - use refcount_t
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmEtvn8ACgkQDHTzWXnE
 hr7aqw//WfcIyGdPLjAz59cW8jm+FgihD5colHtOUYRHRO4GeX/bNNufquR8+N3y
 HESsyZdpihFHms/wURMq41ibmHg0EuHA01HZzjZuGBesG4F9I8sP/HnDOxDuYuAx
 N7Lg4PlUNlfFHmw7Y84owQ6s/XWmNp5iZ8e/mTK5hcraJFQKS4QO74n9RbG/F1vC
 Hc3P6AnpqGac2AEGXt0NjIRxVVCTUIBGx+XOhj+1AMyAGzt9VcO1DS9PVCS0zsEy
 zKMj9tZAPNg0wYsXAi4kA1lK7uVY8KoXSVDYLpsI5Or2/e7mfq2b4EWrezbtp6UA
 H+w86axuwJq7NaYHYH6HqyrLTOmvcHgIl2LoZN91KaNt61xfJT3XZkyQoYViGIrJ
 oZy6X/+s+WPoW98bHZrr6vbcxtWKfEeQyUFEAaDMmraKNJwROjtwgFC9DP8MDctq
 PUSM+XkwbGRRxQfv9dNKufeWfV5blVfzEJO8EfTU1YET3WTDaUHe/FoIcLZt2DZG
 JAJgZkIlU8egthPdakUjQz/KoyLMyovcN5zcjgzgjA9PyNEq74uElN9l446kSSxu
 jEVErOdd+aG3Zzk7/ZZL/RmpNQpPfpQ2RaPUkgeUsW01myNzUNuU3KUDaSlVa+Oi
 1n7eKoaQ2to/+LjhYApVriri4hIZckNNn5FnnhkgwGi8mpHQIVQ=
 =vZkA
 -----END PGP SIGNATURE-----

Merge tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drm

Pull drm updates from Dave Airlie:
 "Highlights:

   - i915 has seen a lot of refactoring and uAPI cleanups due to a
     change in the upstream direction going forward

     This has all been audited with known userspace, but there may be
     some pitfalls that were missed.

   - i915 now uses common TTM to enable discrete memory on DG1/2 GPUs

   - i915 enables Jasper and Elkhart Lake by default and has preliminary
     XeHP/DG2 support

   - amdgpu adds support for Cyan Skillfish

   - lots of implicit fencing rules documented and fixed up in drivers

   - msm now uses the core scheduler

   - the irq midlayer has been removed for non-legacy drivers

   - the sysfb code now works on more than x86.

  Otherwise the usual smattering of stuff everywhere, panels, bridges,
  refactorings.

  Detailed summary:

  core:
   - extract i915 eDP backlight into core
   - DP aux bus support
   - drm_device.irq_enabled removed
   - port drivers to native irq interfaces
   - export gem shadow plane handling for vgem
   - print proper driver name in framebuffer registration
   - driver fixes for implicit fencing rules
   - ARM fixed rate compression modifier added
   - updated fb damage handling
   - rmfb ioctl logging/docs
   - drop drm_gem_object_put_locked
   - define DRM_FORMAT_MAX_PLANES
   - add gem fb vmap/vunmap helpers
   - add lockdep_assert(once) helpers
   - mark drm irq midlayer as legacy
   - use offset adjusted bo mapping conversion

  vgaarb:
   - cleanups

  fbdev:
   - extend efifb handling to all arches
   - div by 0 fixes for multiple drivers

  udmabuf:
   - add hugepage mapping support

  dma-buf:
   - non-dynamic exporter fixups
   - document implicit fencing rules

  amdgpu:
   - Initial Cyan Skillfish support
   - switch virtual DCE over to vkms based atomic
   - VCN/JPEG power down fixes
   - NAVI PCIE link handling fixes
   - AMD HDMI freesync fixes
   - Yellow Carp + Beige Goby fixes
   - Clockgating/S0ix/SMU/EEPROM fixes
   - embed hw fence in job
   - rework dma-resv handling
   - ensure eviction to system ram

  amdkfd:
   - uapi: SVM address range query added
   - sysfs leak fix
   - GPUVM TLB optimizations
   - vmfault/migration counters

  i915:
   - Enable JSL and EHL by default
   - preliminary XeHP/DG2 support
   - remove all CNL support (never shipped)
   - move to TTM for discrete memory support
   - allow mixed object mmap handling
   - GEM uAPI spring cleaning
       - add I915_MMAP_OBJECT_FIXED
       - reinstate ADL-P mmap ioctls
       - drop a bunch of unused by userspace features
       - disable and remove GPU relocations
   - revert some i915 misfeatures
   - major refactoring of GuC for Gen11+
   - execbuffer object locking separate step
   - reject caching/set-domain on discrete
   - Enable pipe DMC loading on XE-LPD and ADL-P
   - add PSF GV point support
   - Refactor and fix DDI buffer translations
   - Clean up FBC CFB allocation code
   - Finish INTEL_GEN() and friends macro conversions

  nouveau:
   - add eDP backlight support
   - implicit fence fix

  msm:
   - a680/7c3 support
   - drm/scheduler conversion

  panfrost:
   - rework GPU reset

  virtio:
   - fix fencing for planes

  ast:
   - add detect support

  bochs:
   - move to tiny GPU driver

  vc4:
   - use hotplug irqs
   - HDMI codec support

  vmwgfx:
   - use internal vmware device headers

  ingenic:
   - demidlayering irq

  rcar-du:
   - shutdown fixes
   - convert to bridge connector helpers

  zynqmp-dsub:
   - misc fixes

  mgag200:
   - convert PLL handling to atomic

  mediatek:
   - MT8133 AAL support
   - gem mmap object support
   - MT8167 support

  etnaviv:
   - NXP Layerscape LS1028A SoC support
   - GEM mmap cleanups

  tegra:
   - new user API

  exynos:
   - missing unlock fix
   - build warning fix
   - use refcount_t"

* tag 'drm-next-2021-08-31-1' of git://anongit.freedesktop.org/drm/drm: (1318 commits)
  drm/amd/display: Move AllowDRAMSelfRefreshOrDRAMClockChangeInVblank to bounding box
  drm/amd/display: Remove duplicate dml init
  drm/amd/display: Update bounding box states (v2)
  drm/amd/display: Update number of DCN3 clock states
  drm/amdgpu: disable GFX CGCG in aldebaran
  drm/amdgpu: Clear RAS interrupt status on aldebaran
  drm/amdgpu: Add support for RAS XGMI err query
  drm/amdkfd: Account for SH/SE count when setting up cu masks.
  drm/amdgpu: rename amdgpu_bo_get_preferred_pin_domain
  drm/amdgpu: drop redundant cancel_delayed_work_sync call
  drm/amdgpu: add missing cleanups for more ASICs on UVD/VCE suspend
  drm/amdgpu: add missing cleanups for Polaris12 UVD/VCE on suspend
  drm/amdkfd: map SVM range with correct access permission
  drm/amdkfd: check access permisson to restore retry fault
  drm/amdgpu: Update RAS XGMI Error Query
  drm/amdgpu: Add driver infrastructure for MCA RAS
  drm/amd/display: Add Logging for HDMI color depth information
  drm/amd/amdgpu: consolidate PSP TA init shared buf functions
  drm/amd/amdgpu: add name field back to ras_common_if
  drm/amdgpu: Fix build with missing pm_suspend_target_state module export
  ...
2021-09-01 11:26:46 -07:00
Linus Torvalds ebf435d3b5 IIO / Staging driver update for 5.15-rc1
Here is the big set of staging and IIO driver updates for 5.15-rc1.
 Also included in here are the counter driver subsystem updates as the
 IIO drivers needed them.
 
 Lots of churn in some staging drivers, we dropped the "old" rtl8188eu
 driver and replaced it with a newer version of the driver that had been
 maintained out-of-tree by Larry with the end goal of actually being able
 to get this driver out of staging eventually.  Despite that driver being
 "newer" the line count of this pull request is going up.
 
 Some drivers moved out of staging as well, which is always nice to see,
 that is why there are additions to the mfc and misc driver subsystems.
 All of these were acked by the various subsystem maintainers involved.
 
 But by far, as normal, it's coding style cleanups all over the
 drivers/staging/ tree in here.
 
 Full details of these changes are in the shortlog.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYS+BKg8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yku5gCgyMykJ2mwtEiQxfAWu13e2iZX29AAnjk38ANp
 Un2sQXYnL9RVlcnjLg+X
 =jMWL
 -----END PGP SIGNATURE-----

Merge tag 'staging-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull IIO and staging driver updates from Greg KH:
 "Here is the big set of staging and IIO driver updates for 5.15-rc1.
  Also included in here are the counter driver subsystem updates as the
  IIO drivers needed them.

  Lots of churn in some staging drivers, we dropped the "old" rtl8188eu
  driver and replaced it with a newer version of the driver that had
  been maintained out-of-tree by Larry with the end goal of actually
  being able to get this driver out of staging eventually. Despite that
  driver being "newer" the line count of this pull request is going up.

  Some drivers moved out of staging as well, which is always nice to
  see, that is why there are additions to the mfc and misc driver
  subsystems. All of these were acked by the various subsystem
  maintainers involved.

  But by far, as normal, it's coding style cleanups all over the
  drivers/staging/ tree in here.

  Full details of these changes are in the shortlog.

  All of these have been in linux-next for a while with no reported
  problems"

[ Note: the r8188eu merge clashed with commit 89939e8906 ("staging:
  rtlwifi: use siocdevprivate") from the networking tree. When resolving
  the issue, I noted that the whole r8188eu rtw_android code is dead
  since commit ae7471cae0 ("staging: r8188eu: remove rtw_ioctl
  function").

  End result: the merge resolution was to throw all of that away,
  rather than do the mindless fixup to code that isn't actually
  reachable                                               - Linus ]

* tag 'staging-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (551 commits)
  staging: vt6655: Remove filenames in files
  staging: r8188eu: add extra TODO entries
  staging: vt6656: Remove filenames in files
  staging: wlan-ng: fix invalid assignment warning
  staging: r8188eu: rename fields of struct rtl_ps
  staging: r8188eu: remove ODM_DynamicPrimaryCCA_DupRTS()
  staging: r8188eu: rename fields of struct dyn_primary_cca
  staging: r8188eu: rename struct field Wifi_Error_Status
  staging: r8188eu: Provide a TODO file for this driver
  staging: r8188eu: remove unneeded variable
  staging: r8188eu: remove unneeded conversions to bool
  staging: r8188eu: remove {read,write}_macreg
  staging: r8188eu: core: remove condition with no effect
  staging: r8188eu: remove ethernet.h header file
  staging: r8188eu: remove ip.h header file
  staging: r8188eu: remove if_ether.h header file
  staging: r8188eu: make rtw_deinit_intf_priv return void
  staging: r8188eu: use is_multicast_ether_addr in os_dep/recv_linux.c
  staging: r8188eu: use is_multicast_ether_addr in hal/rtl8188eu_xmit.c
  staging: r8188eu: use is_multicast_ether_addr in core/rtw_xmit.c
  ...
2021-09-01 09:45:57 -07:00
Linus Torvalds ba1dc7f273 Char / Misc driver changes for 5.15-rc1
Here is the big set of char/misc driver changes for 5.15-rc1.
 
 Lots of different driver subsystems are being updated in here, notably:
 	- mhi subsystem update
 	- fpga subsystem update
 	- coresight/hwtracing subsystem update
 	- interconnect subsystem update
 	- nvmem subsystem update
 	- parport drivers update
 	- phy subsystem update
 	- soundwire subsystem update
 and there are some other char/misc drivers being updated as well:
 	- binder driver additions
 	- new misc drivers
 	- lkdtm driver updates
 	- mei driver updates
 	- sram driver updates
 	- other minor driver updates.
 
 Note, there are no habanna labs driver updates in this pull request,
 that will probably come later before -rc1 is out in a different request.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYS+Kyw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymlpACg0JM+hSeo8T5GtwZksZ1QXXQfh8sAoK6Dt6xF
 e62OQuuMFT0Un0qOflZk
 =emH+
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the big set of char/misc driver changes for 5.15-rc1.

  Lots of different driver subsystems are being updated in here,
  notably:

   - mhi subsystem update

   - fpga subsystem update

   - coresight/hwtracing subsystem update

   - interconnect subsystem update

   - nvmem subsystem update

   - parport drivers update

   - phy subsystem update

   - soundwire subsystem update

  and there are some other char/misc drivers being updated as well:

   - binder driver additions

   - new misc drivers

   - lkdtm driver updates

   - mei driver updates

   - sram driver updates

   - other minor driver updates.

  Note, there are no habanalabs driver updates in this pull request,
  that will probably come later before -rc1 is out in a different
  request.

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (169 commits)
  Revert "bus: mhi: Add inbound buffers allocation flag"
  misc/pvpanic: fix set driver data
  VMCI: fix NULL pointer dereference when unmapping queue pair
  char: mware: fix returnvar.cocci warnings
  parport: remove non-zero check on count
  soundwire: cadence: do not extend reset delay
  soundwire: intel: conditionally exit clock stop mode on system suspend
  soundwire: intel: skip suspend/resume/wake when link was not started
  soundwire: intel: fix potential race condition during power down
  phy: qcom-qmp: Add support for SM6115 UFS phy
  dt-bindings: phy: qcom,qmp: Add SM6115 UFS PHY bindings
  phy: qmp: Provide unique clock names for DP clocks
  lkdtm: remove IDE_CORE_CP crashpoint
  lkdtm: replace SCSI_DISPATCH_CMD with SCSI_QUEUE_RQ
  coresight: Replace deprecated CPU-hotplug functions.
  Documentation: coresight: Add documentation for CoreSight config
  coresight: syscfg: Add initial configfs support
  coresight: config: Add preloaded configurations
  coresight: etm4x: Add complex configuration handlers to etmv4
  coresight: etm-perf: Update to activate selected configuration
  ...
2021-09-01 08:35:06 -07:00
jason-jh.lin 704446b935 dt-bindings: gce: add gce header file for mt8195
Add gce header file to define the gce subsys id,
hardware event id and constant for mt8195.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-31 22:57:33 -05:00
Linus Torvalds 8596e589b7 Updates for timekeeping, timers and related drivers:
Core code:
 
   - Cure a couple of incorrectness issues in the posix CPU timer code to
     prevent that the tick dependency for NOHZ full is kept alive for no
     reason.
 
   - Avoid expensive double reprogramming of the clockevent device in
     hrtimer_start_range_ns().
 
   - Avoid pointless SMP function calls when the clock was set to avoid
     disturbing CPUs which do not have any affected timers queued.
 
   - Make the clocksource watchdog test work correctly when CONFIG_HZ is
     less than 100.
 
 Drivers:
 
   - Prefer the ARM architected timer over the Exynos timer which is way
     more expensive to access.
 
   - Add device tree bindings for new Ingenic SoCs
 
   - The usual improvements and cleanups all over the place
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmEsnxcTHHRnbHhAbGlu
 dXRyb25peC5kZQAKCRCmGPVMDXSYoZAmEAC0R5+9RkWAOpx0JWC7dQxFuIZoUZD1
 8Inqs0ZFLX/LNrkjbBmZ/0XFvoU38+Eqd4Gqy3I748TgzMcB/0NHUUnXaugJE35J
 UzqdHkzhSReVinDHgRcIGMxkdj+JGomhlOM7RjTcdTixUWBfi1iXJBsit/tIWYq9
 R9r/cthpEQzFu7BCZCdAsgRBaLNinCH9cCP0qXNS3hDwHFtziszjBhIrElAaEK4J
 IqrW/tsoxOlX/yQ/5TI8+E9DKgrr4pf+uNVjMJC0QBDodJrXRrkez9lFg6zJJggw
 adtzSFgL/OrbwsuEKAREpkSTwWSdQGdtLy2i9fx16jmh78YiTilHYe2A1ZD5v3zd
 dxfHUexnsgXcn4Im9w+sxLGxf2RQ6SsfVgd+R0lyOKLBFltnmbQWcvVl/6ZUa4Cc
 je+yuh9DTr0ksUiCnm0spP8AMtsSaHKJUP+MqHbXgo83AutVIFXr4zyQimM1lkY1
 TPeXtbKlhd76jDgdcKU85tiyLsJrIImEJDzLtOEvSAk37yO6S9PHzLUMbg9Yp/vp
 Li4aUaMNmytCJTvKeSu6Wivzmyxqf4zSJus/fWLIJJjg/NSlNNhFDc0vkKPzaxM7
 mg2VIcPrQKzQ1ZAap1kTdj1JNDWuANlV6pjE+zwaJbMtdHhvELyWnqC6EA05MsVj
 Txw2VVFaQcqKXA==
 =eP5w
 -----END PGP SIGNATURE-----

Merge tag 'timers-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer updates from Thomas Gleixner:
 "Updates for timekeeping, timers and related drivers:

  Core code:

   - Cure a couple of correctness issues in the posix CPU timer code to
     prevent that the tick dependency for NOHZ full is kept alive for no
     reason.

   - Avoid expensive double reprogramming of the clockevent device in
     hrtimer_start_range_ns().

   - Avoid pointless SMP function calls when the clock was set to avoid
     disturbing CPUs which do not have any affected timers queued.

   - Make the clocksource watchdog test work correctly when CONFIG_HZ is
     less than 100.

  Drivers:

   - Prefer the ARM architected timer over the Exynos timer which is way
     more expensive to access.

   - Add device tree bindings for new Ingenic SoCs

   - The usual improvements and cleanups all over the place"

* tag 'timers-core-2021-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (29 commits)
  clocksource: Make clocksource watchdog test safe for slow-HZ systems
  dt-bindings: timer: Add ABIs for new Ingenic SoCs
  clocksource/drivers/fttmr010: Pass around less pointers
  clocksource/drivers/mediatek: Optimize systimer irq clear flow on shutdown
  clocksource/drivers/ingenic: Use bitfield macro helpers
  clocksource/drivers/sh_cmt: Fix wrong setting if don't request IRQ for clock source channel
  dt-bindings: timer: convert rockchip,rk-timer.txt to YAML
  clocksource/drivers/exynos_mct: Mark MCT device as CLOCK_EVT_FEAT_PERCPU
  clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64
  hrtimer: Unbreak hrtimer_force_reprogram()
  hrtimer: Use raw_cpu_ptr() in clock_was_set()
  hrtimer: Avoid more SMP function calls in clock_was_set()
  hrtimer: Avoid unnecessary SMP function calls in clock_was_set()
  hrtimer: Add bases argument to clock_was_set()
  time/timekeeping: Avoid invoking clock_was_set() twice
  timekeeping: Distangle resume and clock-was-set events
  timerfd: Provide timerfd_resume()
  hrtimer: Force clock_was_set() handling for the HIGHRES=n, NOHZ=y case
  hrtimer: Ensure timerfd notification for HIGHRES=n
  hrtimer: Consolidate reprogramming code
  ...
2021-08-30 15:31:33 -07:00
Linus Torvalds 4520dcbe0d power supply and reset changes for the v5.15 series
battery/charger related changes:
  - cros-peripheral-charger: new driver
  - mt6360-charger: new driver
  - simple-battery: support reading chemistry info
  - max17042-battery: add max77849 support
  - sbs-battery: add time_to_empty_now support
  - smb347-charger: prepare USB OTG support
  - rn5t618: add voltage_now support
  - axp288: cleanup & optimizations
  - max17042_battery: cleanups
  - ab8500: cleanups
  - misc minor cleanups and DT binding fixes
 
 reset related changes:
  - tps65086-restart: new driver
  - linkstation-poweroff: support NETGEAR ReadyNAS Duo v2
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE72YNB0Y/i3JqeVQT2O7X88g7+poFAmEmUVwACgkQ2O7X88g7
 +poFbA//XimqwjO0MR7xqmm2905l78L3L1cNn7vRPzfdPbcf/kKPg8Jrx8kTn1EK
 wKdbP4ZQJOIyCLIFcI6oURUaNHh485KXj4DFvT13AsbkPw+2xUv0Ha5p8J698QAG
 RPmkTNHk+0M/K+/Z7/GPb6t0B7uQi3cg7/aIZeFo26FYpIP5XekoxP1xoLfE9lO2
 aSrSbDh8oIjOLFPc4nuzm0x4Bcg/MpbUG1nhTBdP8OD8xjuMSmDUnbEvLgQYv4oP
 9PLbi4jxm0VSfFhdECCSZ+x7CO0+wqxLXWCoOGlzDQ1Y2OYp9nG+Xgsj46HGh38c
 11WER/16J7AfzUg1zqfu7NKDOKWad+TsTvQgXVK4GAxDOxpOS8Hz7GuP0/nnZBLx
 PoDAb7ZBtb6QXJDEvCDWoo+yMcZRaULbefQCgR/ys6bWoL+B6wdowxfV/daFGpmx
 fAMDGoSGrmYJhbPkcfAVJrN196zd5EQzbB6pyOfAPu3lJiDz+M/DyPNYwkljagAx
 JzSK80cwtXk07lgZZvC8Z3MJruN5pqqvWX/TA8l7dHpReoguCM3hAPUJ9pdVoIa7
 haavL0UzLwya9C2sK9hcys8EBim5thkXI6GsnpRxiztkXZh0LtsUP9Dydt2srGA6
 Hl4BD/g23W9+zmjkAIAvgMwbBoZ2/SHkD7l3ZqG2N2j6LrQxpwc=
 =UcdD
 -----END PGP SIGNATURE-----

Merge tag 'for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply

Pull power supply and reset updates from Sebastian Reichel:
 "Battery/charger related:
   - cros-peripheral-charger: new driver
   - mt6360-charger: new driver
   - simple-battery: support reading chemistry info
   - max17042-battery: add max77849 support
   - sbs-battery: add time_to_empty_now support
   - smb347-charger: prepare USB OTG support
   - rn5t618: add voltage_now support
   - axp288: cleanup & optimizations
   - max17042_battery: cleanups
   - ab8500: cleanups
   - misc minor cleanups and DT binding fixes

  reset related:
   - tps65086-restart: new driver
   - linkstation-poweroff: support NETGEAR ReadyNAS Duo v2"

* tag 'for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: (51 commits)
  power: supply: core: Fix parsing of battery chemistry/technology
  power: supply: max17042_battery: log SOC threshold using debug log level
  power: supply: max17042_battery: more robust chip type checks
  power: supply: max17042_battery: fix typo in MAx17042_TOFF
  power: supply: max17042_battery: clean up MAX17055_V_empty
  power: supply: smb347-charger: Implement USB VBUS regulator
  power: supply: smb347-charger: Add missing pin control activation
  power: supply: smb347-charger: Utilize generic regmap caching
  power: supply: smb347-charger: Make smb347_set_writable() IRQ-safe
  dt-bindings: power: supply: smb347-charger: Document USB VBUS regulator
  power: reset: Add TPS65086 restart driver
  dt-bindings: power: supply: max17042: describe interrupt
  power: supply: max17042: remove duplicated STATUS bit defines
  power: supply: max17042: handle fails of reading status register
  power: supply: core: Parse battery chemistry/technology
  dt-bindings: power: Extend battery bindings with chemistry
  power: reset: linkstation-poweroff: add new device
  power: reset: linkstation-poweroff: prepare for new devices
  power: supply: bq24735: reorganize ChargeOption command macros
  power: supply: rn5t618: Add voltage_now property
  ...
2021-08-30 11:47:32 -07:00
Yongqiang Niu 5f48ed2e81 dt-binding: gce: add gce header file for mt8192
Add documentation for the mt8192 gce.

Add gce header file defined the gce hardware event,
subsys number and constant for mt8192.

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-08-30 00:20:30 -05:00
Konrad Dybcio 920e9b9cd1 dt-bindings: clock: Add SM6350 GCC clock bindings
Add device tree bindings for global clock controller on SM6350 SoC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203624.232268-2-konrad.dybcio@somainline.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 21:03:03 -07:00
Konrad Dybcio be5b605d34 clk: qcom: rpmh: Add support for RPMH clocks on SM6350
Add support for RPMH clocks on SM6350 SoCs.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210820203243.230157-3-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 21:01:21 -07:00
Iskren Chernev dce25b3e0b dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
Add device tree bindings for global clock controller on SM6115 and
SM4250 SoCs (pin and software compatible).

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210805161107.1194521-2-iskren.chernev@gmail.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-28 20:54:20 -07:00
Konrad Dybcio 4d5b4572c4 clk: qcom: Add msm8994 MMCC driver
Add a driver for managing MultiMedia SubSystem clocks on msm8994
and its derivatives.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210618111435.595689-2-konrad.dybcio@somainline.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-26 11:58:14 -07:00
Vladimir Lypak 1b9de19e24 dt-bindings: clock: add Qualcomm MSM8953 GCC driver bindings
Add bindings and compatible to document MSM8953 GCC (Global Clock
Controller) driver.

Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
Signed-off-by: Adam Skladowski <a_skl39@protonmail.com>
Signed-off-by: Sireesh Kodali <sireeshkodali@protonmail.com>
Link: https://lore.kernel.org/r/Q6uB3NRxqtD8Prsmliv8ZdsTXGeviv7lb2jQ743jr1E@cp4-web-036.plabs.ch
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-08-26 11:51:18 -07:00
Arnd Bergmann 06779631d1 Reset controller updates for v5.15
Add support for the SC7280 PDC Global and RZ/G2L USB/PHY reset
 controllers, convert UniPhier glue device tree bindings to json-schema
 and remove a leftover mention of ZTE zx2967 from Kconfig.
 -----BEGIN PGP SIGNATURE-----
 
 iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCYSOy1BcccC56YWJlbEBw
 ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwKxPAQDYffSCcsiXIcZqwO8mpBspzw+R
 rWTqcUeszNXJtPY0rwD/VFs7ESt2RijkKPJeP6VV7VvJkmzaRhFDtLB3MdyG1Qk=
 =60wV
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEnXuMACgkQmmx57+YA
 GNmunBAAv8XVaPA47KvXrsZ8Day6GI9j0EyQAYRvm7MkxD35lDBaooniPT/6bGNs
 cfz6oolZPAzBtomErZUnqCADYGNKCta+Egsp836GCiX85M1sooic9gmidJW0oywQ
 98d+BNjNJDF42RmBdLGqsE4UA/lB/1CgiRKtxkeTDgORQ+UKwwC2CZRwIhyr2ku9
 /YsokNOLETSRf7UxERfZVQDoCpCY8rHn9Yk5Ldjf1a3wSNpEFcxY08TtK8wAxw1x
 ZdnIVMbDX9P3Yowh5LayguXUwXX3ZSiJJKeIaqf4FGn+7e0ISyGX2LSRmsLEP1N/
 gi0D3tS/C6GPiIIup92VAVgN60WwxPl7whwpon98ii7krY3LMr9BibqyL9QEkZF7
 W64flH+HUqm6zzZC26d73Ub413Y5ndSBzcq8Q8nrcsj/lPfUv1xzQMKm0WVUymxU
 7hIognQQCcVIdUk3Ht33wJ3MQOs4kgrQ/VdVqvNRlqE3JpWvd9X4L1D3eUXq9TWV
 2nAQoDQC5LmdW8V1HiV4RKmWqQxdGBlIFXscwH8W4TmRLJXGHQbGi9M2sjch3ycr
 RY0INAN3WpjhI/2saJxkGBeP1HmyQnmxNkfYZLbcFAvStXkgCBI5PIaO0flhevFK
 K10jMPajFaojRZpkQTc9WOasyv8IGez0TrVIgA1WlJZE6BL+KoE=
 =/KnZ
 -----END PGP SIGNATURE-----

Merge tag 'reset-for-v5.15' of git://git.pengutronix.de/pza/linux into arm/drivers

Reset controller updates for v5.15

Add support for the SC7280 PDC Global and RZ/G2L USB/PHY reset
controllers, convert UniPhier glue device tree bindings to json-schema
and remove a leftover mention of ZTE zx2967 from Kconfig.

* tag 'reset-for-v5.15' of git://git.pengutronix.de/pza/linux:
  reset: simple: remove ZTE details in Kconfig help
  reset: renesas: Add RZ/G2L usbphy control driver
  dt-bindings: reset: Document RZ/G2L USBPHY Control bindings
  dt-bindings: reset: Convert UniPhier glue reset to json-schema
  reset: qcom: Add PDC Global reset signals for WPSS
  dt-bindings: reset: pdc: Add PDC Global bindings
  dt-bindings: reset: aoss: Add AOSS reset controller binding

Link: https://lore.kernel.org/r/d42a75fc17ce718ef1b3fa4c5d3f5c7fb0bd2bc2.camel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-26 11:29:06 +02:00
Greg Kroah-Hartman c446e40ed3 interconnect changes for 5.15
Here are changes for the 5.15-rc1 merge window consisting of interconnect
 core and driver updates.
 
 Framework change:
 - Add sanity check to detect if node is already added to provider.
 
 Driver changes:
 - RPMh drivers probe function consolidation
 - Add driver for SC8180x platforms
 - Add support for SC8180x OSM L3
 - Use driver-specific naming in OSM L3
 
 Signed-off-by: Georgi Djakov <djakov@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJhI7tWAAoJEIDQzArG2BZjRWsQAIPaOLOBYGN7+aGLI0MO4aRx
 u5P7i5QD/EJzSQ6z+MtNkzwgDV4+D6EzWxA2eyIPtHQsbpmift+qdWBVHPZcRFkD
 sKV+B0NqJZSJe2W/RQ8u66yKaj931nbiSfxvCdpCB/Vamrfip8Bv7IO0hRsmFsSe
 ji+UFg7SnCyou1C461visnl7+yGVwDB6e5BS7aXTYJ/3gl5lJ7IGooCwXs6w/EsS
 FBBrvBqGU3ez61y6SYKrTQTI9MQEcioIUULXa0z8OGdAIqjfY3lWOIk6bhJTYFj8
 snjowrGxMP+K7JzR9KgktB/eCivzYAdyMJKJrd6z1sPUS6vrAOLd0OZdHKVF87si
 8s1ed6gUTkEK62Eg1OL1dIL3D6Ivf+UgGolz98hFqr2IxI/WRLGQ5oeuSHefiE8U
 Rni13/vCNeM82mYIxk4e5VScM1PWPUdSPJl/40TgKELt7XvxKTPc0FO2u6mc+nRl
 vsMJpnnVFszas0I40g0eIspWI4NYnukOFARP+2AXTpVuAylbf4YLkKSiwG1MN5TV
 LdralsxcRLvp2ot9IliqmXjam+QJILK7GBpIqWe0jbo6ND4fGcd5ZN48pGmWxot6
 mrNMXfq7cUbsG0aWrHIUZ8bISUEBlBBqqTSzKqVT4RtSZ8862lvQEHx5j72sQLj/
 EYGoCI2F7tqFzs5P+qqm
 =K/bk
 -----END PGP SIGNATURE-----

Merge tag 'icc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.15

Here are changes for the 5.15-rc1 merge window consisting of interconnect
core and driver updates.

Framework change:
- Add sanity check to detect if node is already added to provider.

Driver changes:
- RPMh drivers probe function consolidation
- Add driver for SC8180x platforms
- Add support for SC8180x OSM L3
- Use driver-specific naming in OSM L3

Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: qcom: osm-l3: Use driver-specific naming
  interconnect: qcom: osm-l3: Add sc8180x support
  dt-bindings: interconnect: Add SC8180x to OSM L3 DT binding
  interconnect: qcom: Add SC8180x providers
  dt-bindings: interconnect: Add Qualcomm SC8180x DT bindings
  interconnect: Sanity check that node isn't already on list
  interconnect: qcom: icc-rpmh: Consolidate probe functions
2021-08-24 15:33:04 +02:00
Marek Vasut 86842d255b clk: imx8mn: Add M7 core clock
Add missing M7 core clock entry to the iMX8MN clock driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Cc: Abel Vesa <abel.vesa@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20210819202036.2084782-1-marex@denx.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-08-24 16:09:07 +03:00
Zenghui Yu cc8c996132 dt-bindings: soc: remove obsolete zte zx header
The zte zx platform had been removed in commit 89d4f98ae9 ("ARM: remove
zte zx platform"), so this header is no longer needed.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20210821030924.192-2-yuzenghui@huawei.com
Signed-off-by: Rob Herring <robh@kernel.org>
2021-08-23 13:52:10 -05:00
Zenghui Yu d014c93515 dt-bindings: clock: remove obsolete zte zx header
The zx296718-clkc driver had been removed in commit bcbe6005eb ("clk:
remove zte zx driver"), so this header is no longer needed.

Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20210821030924.192-1-yuzenghui@huawei.com
Signed-off-by: Rob Herring <robh@kernel.org>
2021-08-23 13:52:10 -05:00
Christine Zhu 39c5b2f6f2 dt-bindings: reset: mt8195: add toprgu reset-controller header file
Add toprgu reset-controller header file for MT8195 platform.

Signed-off-by: Christine Zhu <Christine.Zhu@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20210726122901.12195-3-Christine.Zhu@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
2021-08-22 10:28:10 +02:00
周琰杰 (Zhou Yanjie) f196ae2820 dt-bindings: timer: Add ABIs for new Ingenic SoCs
1.Add OST_CLK_EVENT_TIMER for new XBurst®1 SoCs.
2.Add OST_CLK_EVENT_TIMER0 to OST_CLK_EVENT_TIMER15 for new XBurst®2 SoCs.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1626370605-120775-1-git-send-email-zhouyanjie@wanyeetech.com
2021-08-21 09:58:17 +02:00
Arnd Bergmann 5c785014b6 Qualcomm driver updates for v5.15
This fixes the "shared memory state machine" (SMSM) interrupt logic to
 avoid missing transitions happening while the interrupts are masked.
 
 SM6115 support is added to smd-rpm and rpmpd.
 
 The Qualcomm SCM firmware driver is once again made possible to compile
 and load as a kernel module.
 
 An out-of-bounds error related to the cooling devices of the AOSS driver
 is corrected. The binding is converted to YAML and a generic compatible
 is introduced to reduce the driver churn.
 
 The GENI wrapper gains a helper function used in I2C and SPI for
 switching the serial engine hardware to use the wrapper's DMA-engine.
 
 Lastly it contains a number of cleanups and smaller fixes for rpmhpd,
 socinfo, CPR, mdt_loader and the GENI DT binding.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmEa29wbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FFnMP/A2Od7JYhdjH7sfc3i3B
 0zws88lT7XTo9KSMpLFrQg1Qzp3ELDMfVhS2CpsekZn1g7s6RGnbQrh2Mac9Yh4z
 +7e4YLhoMxEkdbEVvbVRIX4parFWD/KxUdkyXM8gKZntJzOFl6VY5V8aKi+7IO+/
 CdWHvELDVXMe2LkBd3lKE1AlS2MjkohXpFKgRwkY4r2nVXwqYTdkfJvXdGdhECGr
 ld4ZIvIR6ERLmVpGvTxdU5W0z2xsLTbPYDPSv6mPkWqDYSOyXV3zABV1fSkH28ot
 wIoesHyI3vL4/LNIlHn+tcWj1Ou8hSzxZmxfq7cdKbkfwPLCWE5D8+HEO4kmbFiF
 5Dds+oxvKSFpf/wppK7bUSEd9Q+dKsrFt2mdWy/sYRe1EaEv5sFBgE0rV3+c6ykL
 tptUEFlaB2si7PKSpKje8czHn4Akuc6BwT6xovZZ72K8CNz9D71etSkoNLLXa54d
 bJibw2eNTT1EOACC/FPBO9AS11Icm6wszn/dcaSwaSPGQ6cR3lvAwHqzDFMGHp+x
 L+iojgnZoHykFhQjGuGrI3yTHOpp0MCNxRoN7DlFwm7KLKVHqeqg+xHXtV9sJer8
 iAhY/uepLRxc1oC5Z+Ejx1gABmKycXtzKQ9ecwTclrk66ampWQBlv5+Bxd5w/hux
 ZR96mJPmpk1WKOX3FAgdeaaP
 =88qN
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEdDA4ACgkQmmx57+YA
 GNmAmw//WfdprWl2SJGfyojhDeeUq6ZeNesMFBabFss7Ar++szhyFSu3bqlyH6WC
 ZgPOZOJakKQq2EGKNm7RuEgeR8sEUs9czetNO8AqVy1szlhqnUKhG0OO+uLqRLQn
 Hvf1fc+uG3xeaFP0/Q/4fuG+GL1fnmXIJWl0nZFUGfWyQ3mxxm5fLq1DM27KAzP1
 eKMqtCh3F0qHMWZTJd084LO2XXyUTVVBbXAQKX/IQmH6+BK3Q2YMToo/919HCnZs
 XfgcdKuB/fOfi1n+PgGNODdTJ/Uy10WkSALZHlzKfr77AUCs9+RWxdkogCmACJBs
 IhNoZ/6D6a6kCIEuaEjHtNsMAVoG0bYpaB9vFLhJgF4wfdCd+DuOXkCy9B7vI4/8
 7/SKArKYrG1sPlhDGFaWZjWEFBCGycDDsHQ4T2ecZ5d3f+Kuimgx7NLYhKRHPI+9
 8QVJwNbIGrNXjwIn6S0AeqDLoXIzMmAbNvuX1lFz0OyEkbgDYPSuUPmKYoKh0VL5
 +aTPYANbKxfF7nIPxfN580yjQGZmJmctyhkqnavEB6HdNySO2/oM5F2uGRVdVKnv
 5HaPLqWZf2PffjAg+bU3O3bBlYRdIpEaKaa1eHFIMTgK7nlcvFESWWtwg+IBKdqY
 JI3Kkg5PP3jxqxybzgFPE298vI1G6/so2A12HBi0dl28XheK+wM=
 =dS58
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers

Qualcomm driver updates for v5.15

This fixes the "shared memory state machine" (SMSM) interrupt logic to
avoid missing transitions happening while the interrupts are masked.

SM6115 support is added to smd-rpm and rpmpd.

The Qualcomm SCM firmware driver is once again made possible to compile
and load as a kernel module.

An out-of-bounds error related to the cooling devices of the AOSS driver
is corrected. The binding is converted to YAML and a generic compatible
is introduced to reduce the driver churn.

The GENI wrapper gains a helper function used in I2C and SPI for
switching the serial engine hardware to use the wrapper's DMA-engine.

Lastly it contains a number of cleanups and smaller fixes for rpmhpd,
socinfo, CPR, mdt_loader and the GENI DT binding.

* tag 'qcom-drivers-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: smsm: Fix missed interrupts if state changes while masked
  soc: qcom: smsm: Implement support for get_irqchip_state
  soc: qcom: mdt_loader: be more informative on errors
  dt-bindings: qcom: geni-se: document iommus
  soc: qcom: smd-rpm: Add SM6115 compatible
  soc: qcom: geni: Add support for gpi dma
  soc: qcom: geni: move GENI_IF_DISABLE_RO to common header
  PM: AVS: qcom-cpr: Use nvmem_cell_read_variable_le_u32()
  drivers: soc: qcom: rpmpd: Add SM6115 RPM Power Domains
  dt-bindings: power: rpmpd: Add SM6115 to rpmpd binding
  dt-bindings: soc: qcom: smd-rpm: Add SM6115 compatible
  soc: qcom: aoss: Fix the out of bound usage of cooling_devs
  firmware: qcom_scm: Allow qcom_scm driver to be loadable as a permenent module
  soc: qcom: socinfo: Don't print anything if nothing found
  soc: qcom: rpmhpd: Use corner in power_off
  soc: qcom: aoss: Add generic compatible
  dt-bindings: soc: qcom: aoss: Convert to YAML
  dt-bindings: soc: qcom: aoss: Add SC8180X and generic compatible
  firmware: qcom_scm: remove a duplicative condition
  firmware: qcom_scm: Mark string array const

Link: https://lore.kernel.org/r/20210816214840.581244-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-18 15:33:02 +02:00
Dmitry Osipenko 3e81bd7dfb dt-bindings: power: supply: smb347-charger: Document USB VBUS regulator
SMB347 can supply power to USB VBUS, which is required by OTG-cable
devices that want to switch USB port into the host mode. Add USB VBUS
regulator properties.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-08-16 17:56:20 +02:00
Greg Kroah-Hartman f805ef1ce5 First set of new IIO and counter device support, cleanups and features for 5.15
Usual mix of cleanups and new device support.
 
 Counter
 ======
 
 Cleanups and refactoring:
 * treewide
   - Ensure attempts to set invalid modes result in -EINVAL return.
   - Rename counter_count_function to counter_function as the middle count
     is redundant.
   - Standardize error returns when limits are exceeded.
 * 104-quad:
   - Document the lock.
   - Return an error if attempt to set the ceiling value in a mode that
     doesn't support it.
 * intel-qep
   - Drop unused bitops.h include
 
 IIO
 ===
 
 New device support
 * bma255
   - Add support fo the bosch,bmc156_accel which oddly only exposes the INT2
     interrupt pin and not INT1. Patch set includes enabling use of INT2.
 * ingenic_adc
   - Add support for JZ4760 and similar and update bindings
   - Add support for JZ4760B and update bindings
 * rockchip_saradc
   - Add support for rk3568 ADC (separate channel array as more channels)
 * sgp40 gas sensor used to measure air quality
   - New driver including binding and ABI documentation.
 
 Bindings
 --------
 
 * Add missing bindings for many DACs where the binding was effectively
   implicit due to fallback probe methods in I2C and SPI.
   adi,ad5064
   adi,ad5360
   adi,ad5380
   adi,ad5421
   adi,ad5449
   adi,ad5504
   adi,ad5624r
   adi,ad5686 / adi,ad5696
   adi,ad5761
   adi,ad5764
   adi,ad5791
   adi,ad8801
   capella,cm3323 (also add explicit of_device_id table)
   microchip,mcp4922
 * bosch,bma255
   - Interrupt type in example was opposite of what the device expects.
     It's possible that a particular board had an inverter, but we
     definitely don't want the example to suggest this would be normal.
   - Add interrupt-names to allow for cases where only INT2 is connected.
   - Sort compatibles
   - Merge in very similar bosch,bma180 binding.
 
 New feature
 -----------
 
 * Devices only allowed to provide either extended_name or a label for given
   channel. If extend_name is used (generally discouraged but can't be
   removed as it would be a userspaece ABI change), then the label sysfs
   attribute will provide the extended_name. This allows some userspace
   parser simplications and hardening.
 * hid-sensors-pres
   - Add a timestamp channel (either from hardware, or locally filled).
 * vcnl3020
   - Add periodic sensor mode used to provide IIO events.
 
 Cleanups / minor fixes
 ----------------------
 
 * core/buffers
   - Avoid unnecessary zeroing of bitmaps that are immediately overwritten.
   - Move a sanity check earlier to simplify error path.
 * Quite a few cases of refactors to use devm_* for all of probe and drop
   remove
   - adjd_s311
   - adxl345
   - bma220
   - da280
   - dmard10
   - ds311
   - max5481
   - max5821
   - rfd77402
   - tcs3414
   - tmp006
 * ad5624r
   - Fix incorrect handling of a regulator that was preventing use of
     internal regulators.
 * adjd_s311
   - Allocate a buffer as part of iio_priv() structure as maximum size
     is small enough, no significant advantage in making it flexible sized.
 * bma220
   - Make handling of suspend and resume closer to the probe() wrt to the
     rather odd interface, that suspend mode is entered by reading a register.
 * ep93xx
   - Prepare clock before using (part of conversion to CCF)
 * fsl-imx25-gcq
   - Use local device pointer.
   - Adjust handling of platform_get_irq() to not check for 0 as an error.
     The function is documented as never returning it.
 * hid-sensors
   - Use devm_kmemdup() consistently across all drivers to simplify channel
     structure allocation management.
 * meson-saradc
   - Drop BL30 integration on G12A and newer SoCs as not used.
   - Whitespace fixes.
 * mpu6050
   - Add per device type startup times. This avoids an issue with having
     to dsicard initial data from gyroscopes when they were still stabilizing.
 * rfd77402
   - Change from passing private data, to passing i2c_client where only
     that is needed, reducing back and forth in pm functions.
 * si1145
   - Drop pointless continue
 * st-sensors
   - Cleanup of includes to remove unused and add missing headers that are used.
   - Use some devm functions to simplify probe() and remove() - gets us part way
     towards a fully device managed driver.
 * sx9310
   - Switch from of to generic properties to enable ACPI bindings.
 * vcnl3020
   - Add DMA safe buffer for bulk transfers.
   - Drop use of iio_claim_direct() in a driver that has no mode changes.
     A local lock is more appropriate.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEbilms4eEBlKRJoGxVIU0mcT0FogFAmEX9x4RHGppYzIzQGtl
 cm5lbC5vcmcACgkQVIU0mcT0FohFFg//ezTrpdh7w2F4iTmMfWHks3GKloah3U0p
 DnuhfrW6w0uEsHCtuHE3ogL+5LssHgoRpBuIU6gXr0yNFxsfqWjeJQ34eTCOa5HK
 G532ecgexDF6LPIuvZi/4iv8xPFdjbFN2nQCkikNE9Ko7mcpdJP5xJL7Xa5htzm9
 r76ugJn7p1u0sZmcStWzIX/cZl2QI/5/NqZz/F2x2fWh8WKEZPns/SmqSIcsaPTu
 XHg4D8HnauRS1qDiO5XJlY0sPbwyjC3sOsziq0JcIbnp3+McF2Kypu3BrizJLl4Z
 vL0+iUvoYqt3OetALECxXuCFu0hDjJrqs2EWdEpXoc4A0rNh7Jhnc86Qb+s4Sath
 KvMyGf1qDc3rX2C4ADXdlq/YompQuhsYc1gmeGGG3YCDbfvnEPIPdwIU0stXlWy/
 0+f4Wifa0ABw5upyXly+AwWMWCpnl8XsPTEb7WiKpItviNktyssPTwbCggjITW8x
 17YbH2B0Rx5xIlVIinGEQXVELuA4gOjwBBjpFQCT6Z07tBHkbPpwS5fJeoHTjBmM
 ZAV3x54UUo7RIKVrFF/szsVwXRBJGu5cYWuCAzaA6Z37agxBrJShxbmBE7nJiB1n
 /x4oqywXL6RjfN1HSrJvd6SjHBv3oK98CNryD9V0F3ppzIZvYb/cAzHOI922iEQR
 tcXSUf4CQik=
 =cDKa
 -----END PGP SIGNATURE-----

Merge tag 'iio-for-5.15a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

First set of new IIO and counter device support, cleanups and features for 5.15

Usual mix of cleanups and new device support.

Counter
======

Cleanups and refactoring:
* treewide
  - Ensure attempts to set invalid modes result in -EINVAL return.
  - Rename counter_count_function to counter_function as the middle count
    is redundant.
  - Standardize error returns when limits are exceeded.
* 104-quad:
  - Document the lock.
  - Return an error if attempt to set the ceiling value in a mode that
    doesn't support it.
* intel-qep
  - Drop unused bitops.h include

IIO
===

New device support
* bma255
  - Add support fo the bosch,bmc156_accel which oddly only exposes the INT2
    interrupt pin and not INT1. Patch set includes enabling use of INT2.
* ingenic_adc
  - Add support for JZ4760 and similar and update bindings
  - Add support for JZ4760B and update bindings
* rockchip_saradc
  - Add support for rk3568 ADC (separate channel array as more channels)
* sgp40 gas sensor used to measure air quality
  - New driver including binding and ABI documentation.

Bindings
--------

* Add missing bindings for many DACs where the binding was effectively
  implicit due to fallback probe methods in I2C and SPI.
  adi,ad5064
  adi,ad5360
  adi,ad5380
  adi,ad5421
  adi,ad5449
  adi,ad5504
  adi,ad5624r
  adi,ad5686 / adi,ad5696
  adi,ad5761
  adi,ad5764
  adi,ad5791
  adi,ad8801
  capella,cm3323 (also add explicit of_device_id table)
  microchip,mcp4922
* bosch,bma255
  - Interrupt type in example was opposite of what the device expects.
    It's possible that a particular board had an inverter, but we
    definitely don't want the example to suggest this would be normal.
  - Add interrupt-names to allow for cases where only INT2 is connected.
  - Sort compatibles
  - Merge in very similar bosch,bma180 binding.

New feature
-----------

* Devices only allowed to provide either extended_name or a label for given
  channel. If extend_name is used (generally discouraged but can't be
  removed as it would be a userspaece ABI change), then the label sysfs
  attribute will provide the extended_name. This allows some userspace
  parser simplications and hardening.
* hid-sensors-pres
  - Add a timestamp channel (either from hardware, or locally filled).
* vcnl3020
  - Add periodic sensor mode used to provide IIO events.

Cleanups / minor fixes
----------------------

* core/buffers
  - Avoid unnecessary zeroing of bitmaps that are immediately overwritten.
  - Move a sanity check earlier to simplify error path.
* Quite a few cases of refactors to use devm_* for all of probe and drop
  remove
  - adjd_s311
  - adxl345
  - bma220
  - da280
  - dmard10
  - ds311
  - max5481
  - max5821
  - rfd77402
  - tcs3414
  - tmp006
* ad5624r
  - Fix incorrect handling of a regulator that was preventing use of
    internal regulators.
* adjd_s311
  - Allocate a buffer as part of iio_priv() structure as maximum size
    is small enough, no significant advantage in making it flexible sized.
* bma220
  - Make handling of suspend and resume closer to the probe() wrt to the
    rather odd interface, that suspend mode is entered by reading a register.
* ep93xx
  - Prepare clock before using (part of conversion to CCF)
* fsl-imx25-gcq
  - Use local device pointer.
  - Adjust handling of platform_get_irq() to not check for 0 as an error.
    The function is documented as never returning it.
* hid-sensors
  - Use devm_kmemdup() consistently across all drivers to simplify channel
    structure allocation management.
* meson-saradc
  - Drop BL30 integration on G12A and newer SoCs as not used.
  - Whitespace fixes.
* mpu6050
  - Add per device type startup times. This avoids an issue with having
    to dsicard initial data from gyroscopes when they were still stabilizing.
* rfd77402
  - Change from passing private data, to passing i2c_client where only
    that is needed, reducing back and forth in pm functions.
* si1145
  - Drop pointless continue
* st-sensors
  - Cleanup of includes to remove unused and add missing headers that are used.
  - Use some devm functions to simplify probe() and remove() - gets us part way
    towards a fully device managed driver.
* sx9310
  - Switch from of to generic properties to enable ACPI bindings.
* vcnl3020
  - Add DMA safe buffer for bulk transfers.
  - Drop use of iio_claim_direct() in a driver that has no mode changes.
    A local lock is more appropriate.

* tag 'iio-for-5.15a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (77 commits)
  counter: 104-quad-8: Describe member 'lock' in 'quad8'
  iio: hid-sensor-press: Add timestamp channel
  counter: Rename counter_count_function to counter_function
  counter: Rename counter_signal_value to counter_signal_level
  counter: Standardize to ERANGE for limit exceeded errors
  counter: Return error code on invalid modes
  counter: 104-quad-8: Return error when invalid mode during ceiling_write
  iio: accel: bmc150: Add support for BMC156
  iio: accel: bmc150: Make it possible to configure INT2 instead of INT1
  dt-bindings: iio: accel: bma255: Add bosch,bmc156_accel
  dt-bindings: iio: accel: bma255: Add interrupt-names
  iio: light: cm3323: Add of_device_id table
  dt-bindings: Add bindings for Capella cm3323 Ambient Light Sensor
  iio: chemical: Add driver support for sgp40
  dt-bindings: iio: chemical: Add trivial DT binding for sgp40
  iio: ep93xx: Prepare clock before using it
  iio: adc: fsl-imx25-gcq: adjust irq check to match docs and simplify code
  iio: dac: max5821: convert device register to device managed function
  dt-bindings: iio/adc: ingenic: add the JZ4760(B) socs to the sadc Documentation
  iio/adc: ingenic: add JZ4760B support to the sadc driver
  ...
2021-08-15 08:32:07 +02:00
Linus Walleij 8cd99e3e22 pinctrl: renesas: Updates for v5.15 (take two)
- Add pin control and GPIO support for the new RZ/G2L SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYRZFUQAKCRCKwlD9ZEnx
 cCRjAP0U1x4/IFI9ht4WL2t2FKMy4TreYcOxeLVSivXC91r19wD/WpjASyA/Dnlj
 Y4hJRyW0dFv7Uab0dqzLAO+WtABM0gg=
 =3MMW
 -----END PGP SIGNATURE-----

Merge tag 'renesas-pinctrl-for-v5.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: renesas: Updates for v5.15 (take two)

  - Add pin control and GPIO support for the new RZ/G2L SoC.
2021-08-14 00:39:33 +02:00
Linus Walleij 379e28b5b3 Merge branch 'ib-mt8135' into devel 2021-08-11 10:50:07 +02:00
Hsin-Yi Wang 4e233326e5 arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
Move mt8183-pinfunc.h into include/dt-bindings/pinctrl so that we can
include it in yaml examples.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210804044033.3047296-2-hsinyi@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11 10:49:43 +02:00
Hsin-Yi Wang 3acd5d8b7c arm: dts: mt8135: Move pinfunc to include/dt-bindings/pinctrl
Move mt8135-pinfunc.h into include/dt-bindings/pinctrl so that we can
include it in yaml examples.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210804044033.3047296-1-hsinyi@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-11 10:49:43 +02:00
Lad Prabhakar 7958f88aa6 dt-bindings: pinctrl: renesas: Add DT bindings for RZ/G2L pinctrl
Add device tree binding documentation and header file for Renesas
RZ/G2L pinctrl.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210727112328.18809-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-08-10 13:12:50 +02:00
Georgi Djakov d81274f8fd dt-bindings: interconnect: Add Qualcomm SC8180x DT bindings
Add compatibles and port definitions for the SC8180x RPMH interconnect
providers.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
[bjorn: Split defines from driver patch and added binding update]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210723194243.3675795-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2021-08-09 15:16:31 +03:00
Jonathan Marek bb5b94f5bb dt-bindings: msm: dsi: document phy-type property for 7nm dsi phy
Document a new phy-type property which will be used to determine whether
the phy should operate in D-PHY or C-PHY mode.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210617144349.28448-3-jonathan@marek.ca
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-08-07 11:48:37 -07:00
Christophe Branchereau d827cbcdb3 dt-bindings: iio/adc: add an INGENIC_ADC_AUX0 entry
The JZ4760(B) socs have 3 AUX inputs, add an entry to prepare including the one named AUX in the sadc driver.
Leaving the rest untouched as it's ABI.

Signed-off-by: Christophe Branchereau <cbranchereau@gmail.com>

Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210726082033.351533-3-cbranchereau@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-07-31 18:14:53 +01:00
Sai Krishna Potthuri ef641c449e dt-bindings: pinctrl-zynq: Replace 'io-standard' with 'power-source'
Replace custom pin configuration option 'io-standard' with generic property
'power-source' for Zynq pinctrl also add dt-binding file contains pin
configuration defines for Zynq pinctrl.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/1626868353-96475-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-07-30 14:40:33 +02:00
Iskren Chernev 04a572c51a dt-bindings: clock: qcom: rpmcc: Document SM6115 compatible
Add the dt-binding for the RPM Clock Controller on the SM4250/6115 SoCs.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20210627185927.695411-3-iskren.chernev@gmail.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-27 14:41:41 -07:00
Chun-Jie Chen f35f1a23e0 clk: mediatek: Add dt-bindings of MT8192 clocks
Add MT8192 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210726105719.15793-5-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-27 10:53:06 -07:00
Lad Prabhakar 0b256c403d dt-bindings: clock: r9a07g044-cpg: Add entry for P0_DIV2 core clock
Add P0_DIV2 core clock required for CANFD module. CANFD core clock is
sourced from P0_DIV2 referenced from HW manual Rev.0.50.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210719143811.2135-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-07-26 14:10:59 +02:00
Sibi Sankar 9e3b594a92 dt-bindings: reset: pdc: Add PDC Global bindings
Add PDC Global reset controller bindings for SC7280 SoCs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1619693465-5724-4-git-send-email-sibis@codeaurora.org
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2021-07-21 12:16:16 +02:00
Taniya Das f1f5a30385 dt-bindings: clock: Add SC7280 VideoCC clock binding
Add device tree bindings for video clock subsystem clock
controller for Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-7-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-20 13:46:32 -07:00
Taniya Das 6f1a1ced9e dt-bindings: clock: Add SC7280 GPUCC clock binding
Add device tree bindings for graphics clock subsystem clock
controller for Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-5-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-20 13:46:32 -07:00
Taniya Das ced3aaead0 dt-bindings: clock: Add SC7280 DISPCC clock binding
Add device tree bindings for display clock controller subsystem for
Qualcomm Technology Inc's SC7280 SoCs.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-3-git-send-email-tdas@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-20 13:46:32 -07:00
Taniya Das 8bde9dd381 dt-bindings: clock: qcom: Update license for GCC SC7280
Update BSD license for GCC clock ids.

Fixes: 87a3d523b3 ("dt-bindings: clock: Add SC7280 GCC clock binding")
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1626189143-12957-2-git-send-email-tdas@codeaurora.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-07-20 13:46:32 -07:00
Iskren Chernev 49a22c4a71 dt-bindings: power: rpmpd: Add SM6115 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPM
in the Qualcomm SM4250/6115 platforms.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210627185927.695411-5-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-07-19 17:32:50 -05:00
Chris Morgan b13c1fff66 clk: rockchip: add dt-binding clkid for hclk_sfc on rk3036
Add dt-binding for hclk_sfc on rk3036

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210713094718.1709-1-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-07-16 00:33:16 +02:00
Biju Das c3e67ad6f5 dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitions
Update clock and reset definitions as per RZ/G2L_clock_list_r02_02.xlsx
and RZ/G2L HW(Rev.0.50) manual.

Update {GIC,IA55,SCIF} clock and reset entries in the CPG driver, and
separate reset from module clocks in order to handle them efficiently.

Update the SCIF0 clock and reset index in the SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210626081344.5783-6-biju.das.jz@bp.renesas.com
Link: https://lore.kernel.org/r/20210626081344.5783-7-biju.das.jz@bp.renesas.com
Link: https://lore.kernel.org/r/20210626081344.5783-8-biju.das.jz@bp.renesas.com
[geert: Squashed 3 commits]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-07-12 10:52:03 +02:00
Linus Torvalds 071e5aceeb ARM: Drivers for 5.14
- Reset controllers: Adding support for Microchip Sparx5 Switch.
 
 - Memory controllers: ARM Primecell PL35x SMC memory controller
   driver cleanups and improvements.
 
 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.
 
 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.
 
 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.
 
 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining
   management interfaces and communication (including bus model)
   between partitions both in Normal and Secure Worlds.
 
 - Tegra Memory controller changes, including major rework to deal
   with identity mappings at boot and integration with ARM SMMU
   pieces.
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDokgYPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3looP/20uQAjRadPJFdV/B2mpZYqXMI4dIN9g7KJ1
 6uEoaGurzYWQQreDXswQ5vFUcQfIudEJ9Im9IF+9BUsFQ2uvPTJ4I+HDN++WH70B
 cIsmwwBr7Q4JUVP+O7T2WGtBY69jvHTpJrCCVtyHtwEyL4a1uyfelsAJXbxqaqis
 w1lmXNkkSqx5c67H3maNNDRnbutyLL2gO0TYdiBapOcc5V03OYKNnMbDqRTddqyt
 4UH4eYkFkNai8UJ476BXHU9ldlWzEkRBib/OKwF9k3oPj9W3kdQ/vd2IKK5a1fTX
 jIbOPSRRC8K/9Bxn1KEtdoU0Yy+rlm3xd7DtQl5RyGTD+tHVq3dN55WjoXBY83Yh
 r37y7uII9i09tPg5+APSX/jgodsIt4c46dKwvYuWXvB7ziomfsKxQiRanApJG6UX
 qS5NCUrlfYWlL302JOTvEtDBePXXiXQ065GuRjM948WMnVzXwEKwYUakGhvXQWMS
 jXCcOGW7GhnbY3+Ipn9chyhydHpKSxIb8oBk4cMRJU9jlN2GmjHgW8RMvT2WM6VF
 1F8acyMvf6en5tV6f23cjbW+iIMTS5egKNfqi8tdjGVxbowypyJYzjYOhaqk6veJ
 jHOmpglTXas0QD3ZRU7vGVlrvHqik8XyRsq3N9CQjVenRCbsQLKZRi1gTbIuspcR
 rejqH3Fs
 =kPg8
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Olof Johansson:

 - Reset controllers: Adding support for Microchip Sparx5 Switch.

 - Memory controllers: ARM Primecell PL35x SMC memory controller driver
   cleanups and improvements.

 - i.MX SoC drivers: Power domain support for i.MX8MM and i.MX8MN.

 - Rockchip: RK3568 power domains support + DT binding updates,
   cleanups.

 - Qualcomm SoC drivers: Amend socinfo with more SoC/PMIC details,
   including support for MSM8226, MDM9607, SM6125 and SC8180X.

 - ARM FFA driver: "Firmware Framework for ARMv8-A", defining management
   interfaces and communication (including bus model) between partitions
   both in Normal and Secure Worlds.

 - Tegra Memory controller changes, including major rework to deal with
   identity mappings at boot and integration with ARM SMMU pieces.

* tag 'arm-drivers-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (120 commits)
  firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
  firmware: turris-mox-rwtm: show message about HWRNG registration
  firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng
  firmware: turris-mox-rwtm: report failures better
  firmware: turris-mox-rwtm: fix reply status decoding function
  soc: imx: gpcv2: add support for i.MX8MN power domains
  dt-bindings: add defines for i.MX8MN power domains
  firmware: tegra: bpmp: Fix Tegra234-only builds
  iommu/arm-smmu: Use Tegra implementation on Tegra186
  iommu/arm-smmu: tegra: Implement SID override programming
  iommu/arm-smmu: tegra: Detect number of instances at runtime
  dt-bindings: arm-smmu: Add Tegra186 compatible string
  firmware: qcom_scm: Add MDM9607 compatible
  soc: qcom: rpmpd: Add MDM9607 RPM Power Domains
  soc: renesas: Add support to read LSI DEVID register of RZ/G2{L,LC} SoC's
  soc: renesas: Add ARCH_R9A07G044 for the new RZ/G2L SoC's
  dt-bindings: soc: rockchip: drop unnecessary #phy-cells from grf.yaml
  memory: emif: remove unused frequency and voltage notifiers
  memory: fsl_ifc: fix leak of private memory on probe failure
  memory: fsl_ifc: fix leak of IO mapping on probe failure
  ...
2021-07-10 09:46:20 -07:00
Linus Torvalds e083bbd604 ARM: Devicetree material for 5.14
Like always, the DT branch is sizable. There are numerous additions and
 fixes to existing platforms, but also a handful of new ones introduced.
 Less than some other releases, but there's been significant work on
 cleanups, refactorings and device enabling on existing platforms.
 
 A non-exhaustive list of new material:
 
  - Refactoring of BCM2711 dtsi structure to add support for the Raspberry Pi 400
  - Rockchip: RK3568 SoC and EVB, video codecs for rk3036/3066/3188/322x
  - Qualcomm: SA8155p Automotive platform (SM8150 derivative),
    SM8150/8250 enhancements and support for Sony Xperia 1/1II and 5/5II
  - TI K3: PCI/USB3 support on AM64-sk boards, R5 remoteproc definitions
  - TI OMAP: Various cleanups
  - Tegra: Audio support for Jetson Xavier NX, SMMU support on Tegra194
  - Qualcomm: lots of additions for peripherals across several SoCs, and
    new support for Microsoft Surface Duo (SM8150-based), Huawei Ascend G7.
  - i.MX: Numerous additions of features across SoCs and boards.
  - Allwinner: More device bindings for V3s, Forlinx OKA40i-C and NanoPi
    R1S H5 boards
  - MediaTek: More device bindings for mt8167, new Chromebook system
    variants for mt8183
  - Renesas: RZ/G2L SoC and EVK added
  - Amlogic: BananaPi BPI-M5 board added
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDopIQPHG9sb2ZAbGl4
 b20ubmV0AAoJEIwa5zzehBx3j28P/Rgodomz/V8BHMKUdJQtMHGBxgzNwSJIZGsD
 9pmzJumPinqsTd+w/mJdgYjJd4YIveQWrnOt7TxxqBMxlv8J3Z7RAvsfkQ+Xisnt
 XcXznVeibky/pRi0cumxC1KhI2Us1sqxe9bP3Jeq9yYxgERfth4xQdZH3gnPwb6c
 HmBh7dhyWk76KoBhgOme1zRB+o0jaLyFQgGJUp02WVryzG4tvWKXISs+IAq7rOTx
 W0GNa6bjl2dlB7bWIMpi8Pbwnr1G+g4ZEeCjUv/ob8sc1I/2Smp9VOoEoHEp72zg
 f2rOAjzsWgoUBcl8+9gB9LJPlgfnGLH9NM1Mgn2bU0v9q+Ojjvy+fQrEu4HLjlRj
 2c529vA6azubpCPVj3na76E6dOBXCRGBT6BK7XpFOwd991J+cLcl2y/eC0p6kHP2
 FoNkF5nSBhc6ANorJBDQ3gn6pFESof9Ka5kOFL1znQLNR03O6LKPzOIVbJrdijrp
 GRgvxuyZ7+Wre8WQHy5UZD6pGSFYTLC+usoX4WNHP6dM/jfUoWCaLfnwTCZaHh48
 DLIrveSfTOD5Lg11+vyZf4Rdtbk73LHc98O+0MKQOeURGD1l5AuQ/ZA4Dc3GgWtX
 aJOMxoI1bvHfSHmjz/uS+YAeycty37njXzGv6JQC//M2P/zyofsLxzstBLWcfvY2
 9tsEGo6E
 =X6PF
 -----END PGP SIGNATURE-----

Merge tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Olof Johansson:
 "Like always, the DT branch is sizable. There are numerous additions
  and fixes to existing platforms, but also a handful of new ones
  introduced. Less than some other releases, but there's been
  significant work on cleanups, refactorings and device enabling on
  existing platforms.

  A non-exhaustive list of new material:

   - Refactoring of BCM2711 dtsi structure to add support for the
     Raspberry Pi 400

   - Rockchip: RK3568 SoC and EVB, video codecs for
     rk3036/3066/3188/322x

   - Qualcomm: SA8155p Automotive platform (SM8150 derivative),
     SM8150/8250 enhancements and support for Sony Xperia 1/1II and
     5/5II

   - TI K3: PCI/USB3 support on AM64-sk boards, R5 remoteproc
     definitions

   - TI OMAP: Various cleanups

   - Tegra: Audio support for Jetson Xavier NX, SMMU support on Tegra194

   - Qualcomm: lots of additions for peripherals across several SoCs,
     and new support for Microsoft Surface Duo (SM8150-based), Huawei
     Ascend G7.

   - i.MX: Numerous additions of features across SoCs and boards.

   - Allwinner: More device bindings for V3s, Forlinx OKA40i-C and
     NanoPi R1S H5 boards

   - MediaTek: More device bindings for mt8167, new Chromebook system
     variants for mt8183

   - Renesas: RZ/G2L SoC and EVK added

   - Amlogic: BananaPi BPI-M5 board added"

* tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (511 commits)
  arm64: dts: rockchip: add basic dts for RK3568 EVB
  arm64: dts: rockchip: add core dtsi for RK3568 SoC
  arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs
  ARM: dts: rockchip: add vpu and vdec node for RK322x
  ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188
  ARM: dts: rockchip: add vpu node for RK3036
  arm64: dts: ipq8074: Add QUP6 I2C node
  arm64: dts: rockchip: Re-add regulator-always-on for vcc_sdio for rk3399-roc-pc
  arm64: dts: rockchip: Re-add regulator-boot-on, regulator-always-on for vdd_gpu on rk3399-roc-pc
  arm64: dts: rockchip: add ir-receiver for rk3399-roc-pc
  arm64: dts: rockchip: Add USB-C port details for rk3399 Firefly
  arm64: dts: rockchip: Sort rk3399 firefly pinmux entries
  arm64: dts: rockchip: add infrared receiver node to RK3399 Firefly
  arm64: dts: rockchip: add SPDIF node for rk3399-firefly
  arm64: dts: rockchip: Add Rotation Property for OGA Panel
  arm64: dts: qcom: sc7180: bus votes for eMMC and SD card
  arm64: dts: qcom: sm8250-edo: Add Samsung touchscreen
  arm64: dts: qcom: sm8250-edo: Enable GPI DMA
  arm64: dts: qcom: sm8250-edo: Enable ADSP/CDSP/SLPI
  arm64: dts: qcom: sm8250-edo: Enable PCIe
  ...
2021-07-10 09:33:54 -07:00
Linus Torvalds aef4226f91 More power management updates for 5.14-rc1
- Drop the ->stop_cpu() (not really useful) and ->resolve_freq()
    (unused) cpufreq driver callbacks and modify the users of the
    former accordingly (Viresh Kumar, Rafael Wysocki).
 
  - Add frequency invariance support to the ACPI CPPC cpufreq driver
    again along with the related fixes and cleanups (Viresh Kumar).
 
  - Update the Meditak, qcom and SCMI ARM cpufreq drivers (Fabien
    Parent, Seiya Wang, Sibi Sankar, Christophe JAILLET).
 
  - Rename black/white-lists in the DT cpufreq driver (Viresh Kumar).
 
  - Add generic performance domains support to the dvfs DT bindings
    (Sudeep Holla).
 
  - Refine locking in the generic power domains (genpd) support code
    to avoid lock dependency issues (Stephen Boyd).
 
  - Update the MSM and qcom ARM cpuidle drivers (Bartosz Dudziak).
 
  - Simplify the PM core debug code by using ktime_us_delta() to
    compute time interval lengths (Mark-PK Tsai).
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmDl+NcSHHJqd0Byand5
 c29ja2kubmV0AAoJEILEb/54YlRxyggQALTT/4fFZYlAG/2jpu0wl/3OeR5EPS/O
 /KrfU7NfXOlNDiuZzVVrMsu1YhkAMedvhHl+9bvveYJBgNuMz7Y1WSGY4PAbW9j+
 htnvPd8UdpNODAhT3MDV9sdpXglkWAjivCAM7nr57nl3vwrRgAhBEBkA0/OKiij7
 dlTSRy+Doq0AI3ceOHlMFHGnL+/PBx3YJcOuKBwK9gHrbCQxoBQJ5QJnm2Sa8NEy
 QGoQWWvSI6mDntsAYL4g7mbUdOqGSN04KdXnf0nA9Ywe/Lb/Rp/Il7zCfc13iBSV
 Nv1ala2NFtp/W+nQan8hxXOgbET+ybbduG65bB33McTuaZ3VIV5sSxxAfEWV+DiM
 PGEGwDJ/vZqoJiiTKmYij07/sIUXe1Q2YsxTvDh0tqzFmO78reDfXlLdfrrOjRsd
 Ybw3dkI/XQH7/sTawCxn/TdFRj2hx7wg7yDqkLJXnA037BN+EBFqSckyABoBPpmA
 TwcacjyotwnfwOpoxbxmjCX1VwIIZ2Mk7Q3h+v9Ej5aNIuyDfR0DzybqCLqIan/4
 vETtz+OCO5H1BT6g/ctIi13e7MvWzZXudNWTRTS8ZVXzuzo1hO3okHWuXiQbKGOA
 Dh2sjkJBBgr9WPFjkF5mgZZp8SM0D4S5SSAEglTKSwxcaMcqXVlgEN8beyMa5FuD
 y/UeopwhL66a
 =Un7e
 -----END PGP SIGNATURE-----

Merge tag 'pm-5.14-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull more power management updates from Rafael Wysocki:
 "These include cpufreq core simplifications and fixes, cpufreq driver
  updates, cpuidle driver update, a generic power domains (genpd)
  locking fix and a debug-related simplification of the PM core.

  Specifics:

   - Drop the ->stop_cpu() (not really useful) and ->resolve_freq()
     (unused) cpufreq driver callbacks and modify the users of the
     former accordingly (Viresh Kumar, Rafael Wysocki).

   - Add frequency invariance support to the ACPI CPPC cpufreq driver
     again along with the related fixes and cleanups (Viresh Kumar).

   - Update the Meditak, qcom and SCMI ARM cpufreq drivers (Fabien
     Parent, Seiya Wang, Sibi Sankar, Christophe JAILLET).

   - Rename black/white-lists in the DT cpufreq driver (Viresh Kumar).

   - Add generic performance domains support to the dvfs DT bindings
     (Sudeep Holla).

   - Refine locking in the generic power domains (genpd) support code to
     avoid lock dependency issues (Stephen Boyd).

   - Update the MSM and qcom ARM cpuidle drivers (Bartosz Dudziak).

   - Simplify the PM core debug code by using ktime_us_delta() to
     compute time interval lengths (Mark-PK Tsai)"

* tag 'pm-5.14-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (21 commits)
  PM: domains: Shrink locking area of the gpd_list_lock
  PM: sleep: Use ktime_us_delta() in initcall_debug_report()
  cpufreq: CPPC: Add support for frequency invariance
  arch_topology: Avoid use-after-free for scale_freq_data
  cpufreq: CPPC: Pass structure instance by reference
  cpufreq: CPPC: Fix potential memleak in cppc_cpufreq_cpu_init
  cpufreq: Remove ->resolve_freq()
  cpufreq: Reuse cpufreq_driver_resolve_freq() in __cpufreq_driver_target()
  cpufreq: Remove the ->stop_cpu() driver callback
  cpufreq: powernv: Migrate to ->exit() callback instead of ->stop_cpu()
  cpufreq: CPPC: Migrate to ->exit() callback instead of ->stop_cpu()
  cpufreq: intel_pstate: Combine ->stop_cpu() and ->offline()
  cpuidle: qcom: Add SPM register data for MSM8226
  dt-bindings: arm: msm: Add SAW2 for MSM8226
  dt-bindings: cpufreq: update cpu type and clock name for MT8173 SoC
  clk: mediatek: remove deprecated CLK_INFRA_CA57SEL for MT8173 SoC
  cpufreq: dt: Rename black/white-lists
  cpufreq: scmi: Fix an error message
  cpufreq: mediatek: add support for mt8365
  dt-bindings: dvfs: Add support for generic performance domains
  ...
2021-07-07 13:22:59 -07:00
Linus Torvalds eed0218e8c Char / Misc driver updates for 5.14-rc1
Here is the big set of char / misc and other driver subsystem updates
 for 5.14-rc1.  Included in here are:
 	- habanna driver updates
 	- fsl-mc driver updates
 	- comedi driver updates
 	- fpga driver updates
 	- extcon driver updates
 	- interconnect driver updates
 	- mei driver updates
 	- nvmem driver updates
 	- phy driver updates
 	- pnp driver updates
 	- soundwire driver updates
 	- lots of other tiny driver updates for char and misc drivers
 
 This is looking more and more like the "various driver subsystems mushed
 together" tree...
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYOM8jQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ymECgCg0yL+8WxDKO5Gg5llM5PshvLB1rQAn0y5pDgg
 nw78LV3HQ0U7qaZBtI91
 =x+AR
 -----END PGP SIGNATURE-----

Merge tag 'char-misc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the big set of char / misc and other driver subsystem updates
  for 5.14-rc1. Included in here are:

   - habanalabs driver updates

   - fsl-mc driver updates

   - comedi driver updates

   - fpga driver updates

   - extcon driver updates

   - interconnect driver updates

   - mei driver updates

   - nvmem driver updates

   - phy driver updates

   - pnp driver updates

   - soundwire driver updates

   - lots of other tiny driver updates for char and misc drivers

  This is looking more and more like the "various driver subsystems
  mushed together" tree...

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (292 commits)
  mcb: Use DEFINE_RES_MEM() helper macro and fix the end address
  PNP: moved EXPORT_SYMBOL so that it immediately followed its function/variable
  bus: mhi: pci-generic: Add missing 'pci_disable_pcie_error_reporting()' calls
  bus: mhi: Wait for M2 state during system resume
  bus: mhi: core: Fix power down latency
  intel_th: Wait until port is in reset before programming it
  intel_th: msu: Make contiguous buffers uncached
  intel_th: Remove an unused exit point from intel_th_remove()
  stm class: Spelling fix
  nitro_enclaves: Set Bus Master for the NE PCI device
  misc: ibmasm: Modify matricies to matrices
  misc: vmw_vmci: return the correct errno code
  siox: Simplify error handling via dev_err_probe()
  fpga: machxo2-spi: Address warning about unused variable
  lkdtm/heap: Add init_on_alloc tests
  selftests/lkdtm: Enable various testable CONFIGs
  lkdtm: Add CONFIG hints in errors where possible
  lkdtm: Enable DOUBLE_FAULT on all architectures
  lkdtm/heap: Add vmalloc linear overflow test
  lkdtm/bugs: XFAIL UNALIGNED_LOAD_STORE_WRITE
  ...
2021-07-05 13:42:16 -07:00
Linus Torvalds 463c09d09d - Core Frameworks
- Fix Software Node clean-up code
 
  - New Drivers
    - Add support for MediaTek MT6359 PMIC
    - Add support for Qualcomm PM8008 PMIC
    - Add support for Richtek RT4831
 
  - New Device Support
    - Add support for Audio CODECs to Rockchip RK817
    - Add support for Alder Lake-M to Intel LPSS PCI
    - Add support for Periph Device Charge to ChromeOS EC
 
  - New Functionality
    - Provide additional IRQs; wcd934x
    - Add optional Reset functionality; lp87565
 
  - Fix-ups
    - Namespacing & visibility; lp87565
    - Differentiate between Power and Home key IRQs; mt6358
    - Export I2C device tables; da9052-i2c, stmpe-i2c
    - Adapt IRQ flags; max8907, rn5t61, max8907
    - Make some functions/devices optional; axp20x, cros_ec_dev
    - Explicitly include used header files; ioc3
    - Remove superfluous lines; MAINTAINERS, sec-core, st,stm32-timers
    - Resolve Kerneldoc issues; omap-usb-host, omap-usb-tll, si476x-cmd, si476x-i2c
    - Convert to a module; arizona-core
    - Copyright changes; hi655x-pmic
    - Drop support for board file initialisation; sec-core
    - Trivial; spelling, whitespace etc; lp87565, si476x-cmd, mt6360-core, wm831x-core,
 					twl-core, db8500-prcmu
    - Simplify various implementations; wcd934x, mt6360-core, max8997, max8998,
                                        da9052-i2c, da9062-core, sec-core,
    - Device Tree binding changes; google,cros-ec, richtek,rt4831-backlight,
                                   db8500-prcmu, qcom,pm8008, qcom,spmi-pmic
    - Use provided APIs to simplify; t7l66xb, as3722, da9055-core, tps80031, 88pm800,
                                 88pm805, asic3, sun6i-prcm,
 				wm831x-core, wm831x-otp,
 				ucb1x00-assabet, timberdale, sm501,
 				pcf50633-core, kempld-core,
 				janz-cmodio, intel_soc_pmic_bxtwc, ab8500-core
 
  - Bug Fixes
    - Fix unused variable warning; rk817_codec
    - Fix regulator voltage configuration; rohm-bd71828
    - Fix ongoing freeing of regmap_config 'name' issue; syscon
    - Fix error handling path; da9063-i2c
    - Fix Kconfig issues; MFD_MP2629
    - Fix DMA mask warnings; motorola-cpcap
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAmDjETYACgkQUa+KL4f8
 d2GmAw/7BbJpXUc8Rbw09qEWf/jOmmoQ+H1U5Gjvw6rbHMmGxFRce1Xf/01JAW8U
 ypffmQ/oSJgR1c5l5/g0+Tbn4LFmgGAxG+4RGdTVe4H81wjraKAnRLoJTFl74cD7
 LahcrUPkSf50VrrkiephO/yGvU53XfOhbJMQf21OM7TCoskWLUUyB72akBAyu6jC
 +cxi3DymyG26E1xG6opYFrY7VmQ3Wj+QywiJs0GYbik0nBgEGrG6fctTPKLNbv/Q
 duCRwVnZvoYbVHw5lwfYMRy/gsOU8/cLiWZOxpbng9J3C/PP19L+DHGrOp/l7RNc
 D7FLHZWiFwI3sHPnxaJQx87cOQ6WiVy1Q/fyVR2OyJkvk5wedIrBfLtvSuN3f2gb
 C4U6g0+PxGlkmf4Q5QqLRmJRUN6vqAglTa885M+INwOiNCTD/nfh+EFztIi1biX4
 dW3A+IYCl4Mx5DjIfv+cfoAD57fTHyhIaHJAKNgSUbKAfIJ/UeeuCgSomb2PgHNv
 fA6uECRgTTYC6HdZ1+5dj9hJdb1BPW6l01uDKLVs5NyXQ4trgOzCgvcy5jJgLxlC
 QCatkKejfqK9XLoJBN5Bn6G74X08zoSbykOPHZBdD40leR6LeMr4wlsKJRi8XAeJ
 YbaUWbPQCOSgvrw1bZLpXQyc49myxyJMmG69TTopOTmXt3aglag=
 =g7ix
 -----END PGP SIGNATURE-----

Merge tag 'mfd-next-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull mfd updates from Lee Jones:
 "Core Frameworks:
   - Fix Software Node clean-up code

  New Drivers:
   - Add support for MediaTek MT6359 PMIC
   - Add support for Qualcomm PM8008 PMIC
   - Add support for Richtek RT4831

  New Device Support:
   - Add support for Audio CODECs to Rockchip RK817
   - Add support for Alder Lake-M to Intel LPSS PCI
   - Add support for Periph Device Charge to ChromeOS EC

  New Functionality:
   - Provide additional IRQs for wcd934x
   - Add optional Reset functionality to lp87565

  Fix-ups:
   - Namespacing & visibility fixes to lp87565
   - Differentiate between Power and Home key IRQs in mt6358
   - Export I2C device tables in da9052-i2c, stmpe-i2c
   - Adapt IRQ flags in max8907, rn5t61, max8907
   - Make some functions/devices optional in axp20x, cros_ec_dev
   - Explicitly include used header files in ioc3
   - Remove superfluous lines in MAINTAINERS, sec-core, st,stm32-timers
   - Resolve Kerneldoc issues in omap-usb-host, omap-usb-tll, si476x-cmd, si476x-i2c
   - Convert arizona-core to a module
   - Copyright changes in hi655x-pmic
   - Drop support for board file initialisation in sec-core
   - Trivial spelling, whitespace etc updates in lp87565, si476x-cmd,
     mt6360-core, wm831x-core, twl-core, db8500-prcmu
   - Simplify various implementations of wcd934x, mt6360-core, max8997,
     max8998, da9052-i2c, da9062-core, sec-core,
   - Device Tree binding changes in google,cros-ec,
     richtek,rt4831-backlight, db8500-prcmu, qcom,pm8008, qcom,spmi-pmic
   - Use provided APIs to simplify t7l66xb, as3722, da9055-core,
     tps80031, 88pm800, 88pm805, asic3, sun6i-prcm, wm831x-core,
     wm831x-otp, ucb1x00-assabet, timberdale, sm501, pcf50633-core,
     kempld-core, janz-cmodio, intel_soc_pmic_bxtwc, ab8500-core

  Bug Fixes:
   - Fix unused variable warning in rk817_codec
   - Fix regulator voltage configuration in rohm-bd71828
   - Fix ongoing freeing of regmap_config 'name' issue in syscon
   - Fix error handling path in da9063-i2c
   - Fix Kconfig issues in MFD_MP2629
   - Fix DMA mask warnings in motorola-cpcap"

* tag 'mfd-next-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (83 commits)
  mfd: cros_ec: Add peripheral device charger
  mfd: max8907: Remove IRQF_NO_AUTOEN flag
  mfd: ab8500-core: Use DEVICE_ATTR_RO/RW macro
  mfd: intel_soc_pmic_bxtwc: Use DEVICE_ATTR_ADMIN_RW macro
  mfd: janz-cmodio: Use DEVICE_ATTR_RO macro
  mfd: kempld-core: Use DEVICE_ATTR_RO macro
  mfd: pcf50633: Use DEVICE_ATTR_ADMIN_RO macro
  mfd: sm501: Use DEVICE_ATTR_RO macro
  mfd: timberdale: Use DEVICE_ATTR_RO macro
  mfd: ucb1x00-assabet: Use DEVICE_ATTR_RO macro
  mfd: wm831x: Use DEVICE_ATTR_RO macro
  mfd: wm831x: Use DEFINE_RES_IRQ_NAMED() and DEFINE_RES_IRQ() to simplify code
  dt-bindings: mfd: stm32-timers: Remove #address/size cells from required properties
  mfd: sun6i-prcm: Use DEFINE_RES_MEM() to simplify code
  mfd: asic3: Use DEFINE_RES_MEM() and DEFINE_RES_IRQ() to simplify code
  mfd: 88pm805: Use DEFINE_RES_IRQ_NAMED() to simplify code
  mfd: 88pm800: Use DEFINE_RES_IRQ_NAMED() to simplify code
  mfd: tps80031: Use DEFINE_RES_IRQ() to simplify code
  mfd: da9055: Use DEFINE_RES_IRQ_NAMED() to simplify code
  mfd: as3722: Use DEFINE_RES_IRQ_NAMED() to simplify code
  ...
2021-07-05 12:10:34 -07:00
Linus Torvalds d6b63b5b7d sound updates for 5.14
As the diffstat scatters over the tree, we've got many tree-wide
 small changes, but also got quite a few intrusive changes in the
 core side.  The only ABI-visible core change is the new rawmidi
 framing mode support while others are kernel-internal, mostly code
 refactoring and/or nice improvements.
 
 Here are some highlights:
 
 Core:
 - A new framing access mode for rawmidi to get timestamps
 - Cleanup / refactoring of buffer memory management helper code
 - Support for automatic negotiation of ASoC DAI formats
 - Revival of software suspend for PCM and control core, as a
   preliminary work for PCI BAR rescan support
 
 ASoC:
 - Accessory detection support for several Qualcomm parts
 - Support for IEC958 control with hdmi-codec
 - Merging of Tegra machine drivers into a single driver
 - Support for AmLogic SM1 TOACODEC, Intel AlderLake-M, several NXP
   i.MX8 variants, NXP TFA1 and TDF9897, Rockchip RK817, Qualcomm
   Quinary MI2S, Texas Instruments TAS2505
 
 USB-audio:
 - Reduction of latency at playback start
 - Code cleanup / fixes of usx2y driver
 - Scarlett2 mixer code fixes and enhancements
 - Quirks for Ozone and Denon devices
 
 HD-audio:
 - A few quirks for HP and ASUS machines
 - Display power management fixes
 
 Others:
 - FireWire code refactoring and enhancements
 - Tree-wide trivial coding-style fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmDezZ8OHHRpd2FpQHN1
 c2UuZGUACgkQLtJE4w1nLE8kxhAAhWyQBU9HX7xo/132J0SsP0tqT0NhePr217T7
 RSmRre3kD8iNDtpe9P9eziyN5q5TB8+InY52yUiDiWdSxCHOBDKBPwzzDeVRdOGg
 /BdQqCtEAtdgzsnPEsXxvK+y3LayLwlkCyN1kMLCl4KGFfMg8fQgMbXobEOfyKwT
 r23Xgbkb8jIFyjEAmvJnbvPXjkUjv2ew0+RB+cqV80m9h+KdNN/k/8+0wdWaQBEd
 6oRSE8ApYclgyLf4TYCkLAwTP3NQ8SuvYSuZ9tFGy7vjz7l69xPWS/6ndbfrJvEP
 pO615dYWKTWQKi2SjStnjFUH7ODirbPZzyDqU9tvEAGbKj0l07LNXy0JrbwJ8VB2
 JBfsdTlmSwHcAXmj0JB7IhflmG96W9azUKf1a8YNJLw7UgHoXjDZC0NFtOanaB7x
 PEdf+27Ty1pZaNbtJpwdzEyc06UNA8dNRAr6FsSMphRTnBBzcUz2uEAfWbevS7Yl
 Q5IOZd2lqKIUHPB6j2r0iDiCKScXzlHVhFzOLj3vHS4L8vjfbVshxkIkSY0HeA9r
 HINbkby2mpk901oyqaFwTLkoatXBk5zDX2m2ow7rQLLUIdF0hWBXrE5Xrl3c/T/x
 aFXuDxJfZm4YibJiBAOO5xv03DzVBNJz01E020oyum2m0NHhB1xD3RK428pcjshV
 zgXJaZg=
 =IN9G
 -----END PGP SIGNATURE-----

Merge tag 'sound-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "As the diffstat scatters over the tree, we've got many tree-wide small
  changes, but also got quite a few intrusive changes in the core side.
  The only ABI-visible core change is the new rawmidi framing mode
  support while others are kernel-internal, mostly code refactoring
  and/or nice improvements.

  Here are some highlights:

  Core:
   - A new framing access mode for rawmidi to get timestamps
   - Cleanup / refactoring of buffer memory management helper code
   - Support for automatic negotiation of ASoC DAI formats
   - Revival of software suspend for PCM and control core, as a
     preliminary work for PCI BAR rescan support

  ASoC:
   - Accessory detection support for several Qualcomm parts
   - Support for IEC958 control with hdmi-codec
   - Merging of Tegra machine drivers into a single driver
   - Support for AmLogic SM1 TOACODEC, Intel AlderLake-M, several NXP
     i.MX8 variants, NXP TFA1 and TDF9897, Rockchip RK817, Qualcomm
     Quinary MI2S, Texas Instruments TAS2505

  USB-audio:
   - Reduction of latency at playback start
   - Code cleanup / fixes of usx2y driver
   - Scarlett2 mixer code fixes and enhancements
   - Quirks for Ozone and Denon devices

  HD-audio:
   - A few quirks for HP and ASUS machines
   - Display power management fixes

  Others:
   - FireWire code refactoring and enhancements
   - Tree-wide trivial coding-style fixes"

* tag 'sound-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (594 commits)
  ALSA: usb-audio: scarlett2: Fix for loop increment in scarlett2_usb_get_config
  ALSA: hda/realtek: fix mute/micmute LEDs for HP ProBook 630 G8
  ALSA: hda/realtek: fix mute/micmute LEDs for HP ProBook 445 G8
  ALSA: hda/realtek: fix mute/micmute LEDs for HP ProBook 450 G8
  ALSA: hda/realtek - Add ALC285 HP init procedure
  ALSA: hda/realtek - Add type for ALC287
  ALSA: scarlett2: Fix scarlett2_*_ctl_put() return values again
  ALSA: scarlett2: Fix pad count for 18i8 Gen 3
  ALSA: hda/realtek: fix mute/micmute LEDs for HP EliteBook 830 G8 Notebook PC
  ALSA: firewire-lib: Fix 'amdtp_domain_start()' when no AMDTP_OUT_STREAM stream is found
  ASoC: qcom: lpass-cpu: mark IRQ_CLEAR register as volatile and readable
  ALSA: hda: Release codec display power during shutdown/reboot
  ALSA: hda: Release controller display power during shutdown/reboot
  ALSA: hda/realtek: Apply LED fixup for HP Dragonfly G1, too
  ASoC: fsl: remove unnecessary oom message
  ASoC: tlv320aic32x4: dt-bindings: add TAS2505 to compatible
  ASoC: tlv320aic32x4: add support for TAS2505
  ASoC: tlv320aic32x4: add type to device private data struct
  ASoC: tegra30: ahub: Use devm_platform_get_and_ioremap_resource()
  ASoC: tegra: tegra210_admaif: Use devm_platform_get_and_ioremap_resource()
  ...
2021-07-02 15:25:23 -07:00
Linus Torvalds a32b344e6f This is the bulk of pin control changes for the v5.14 kernel:
New drivers:
 
 - Last merge window we created a driver for the Ralink RT2880.
   We are now moving the Ralink SoC pin control drivers out of the MIPS
   architecture code and into the pin control subsystem. This concerns
   RT288X, MT7620, RT305X, RT3883 and MT7621.
 
 - Qualcomm SM6125 SoC pin control driver.
 
 - Qualcomm spmi-gpio support for PM7325.
 
 - Qualcomm spmi-mpp also handles PMI8994 (just a compatible string)
 
 - Mediatek MT8365 SoC pin controller.
 
 - New device HID for the AMD GPIO controller.
 
 Improvements:
 
 - Pin bias config support for a slew of Renesas pin controllers.
 
 - Incremental improvements and non-urgent bug fixes to the Renesas
   SoC drivers.
 
 - Implement irq_set_wake on the AMD pin controller so we can wake
   up from external pin events.
 
 Misc:
 
 - Devicetree bindings for the Apple M1 pin controller, we will probably
   see a proper driver for this soon as well.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmDeTu0ACgkQQRCzN7AZ
 XXO2Yg/+LHbqYX8V+Ig1ZcY4p5bfbGyyC6QG6g3d/kzzCmsjHFgmDFQoZ+LoRx+p
 FRUSvmiR0VERMZCEepHsZgzns6ezzJfBt4Cu/388d4iYZppaETpQV47TzqY3eP7Q
 4Shu2wIKwd7C3vNrCifub0JOYAAEsqdlHd75g0bqhal9hgH/MgYQSq9F22/TKAFl
 hteFwyw5L4OwKIDUpqDOIcG8thhHYWrQy77/Pp82/TVnmO9gamt863dKBjIg6iF9
 c+pmIWI8K2mBhNO+epGG4VSroUudIBwKV88nwUjKSe+pu0VAU7lit/V0Uh1IhG0s
 FUHHGDeF62Ncn4SOYetlnSlKbQkhJaBDV2sDgQ3xzqvs1P3WEHRWqYIh1egq5iW6
 /KtpSlRLQ/aO+k0iN66pErpAfsGNFAxkqlCSypyJG7ROnb2rADzZ0ftEKQb8RzZb
 nypPupOO5/bFfQHbQtFORDaNu9MUTR5PR04eTPMoApG0nv7zY+kcJ6iJuKE9spLb
 ahoxLstfQ/fKK27yms72E6PqwanuUEzcQv7gjhuHmFEjNrW1ARUqoa5hpdAzhZOX
 20P8SZWkSeUZnqB26YQq+1U9p6wV0064Vp+jYY/wzQpV40dgX9oumiRkxCWCzpjt
 6mw6x9txlrEEu+2WadW8yZd4ewKvWFLEGI+C/83pnI5NF1Dp0Go=
 =Ajcr
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v5.14 kernel. Not so
  much going on. No core changes, just drivers.

  The most interesting would be that MIPS Ralink is migrating to pin
  control and we have some bindings but not yet code for the Apple M1
  pin controller.

  New drivers:

   - Last merge window we created a driver for the Ralink RT2880. We are
     now moving the Ralink SoC pin control drivers out of the MIPS
     architecture code and into the pin control subsystem. This concerns
     RT288X, MT7620, RT305X, RT3883 and MT7621.

   - Qualcomm SM6125 SoC pin control driver.

   - Qualcomm spmi-gpio support for PM7325.

   - Qualcomm spmi-mpp also handles PMI8994 (just a compatible string)

   - Mediatek MT8365 SoC pin controller.

   - New device HID for the AMD GPIO controller.

  Improvements:

   - Pin bias config support for a slew of Renesas pin controllers.

   - Incremental improvements and non-urgent bug fixes to the Renesas
     SoC drivers.

   - Implement irq_set_wake on the AMD pin controller so we can wake up
     from external pin events.

  Misc:

   - Devicetree bindings for the Apple M1 pin controller, we will
     probably see a proper driver for this soon as well"

* tag 'pinctrl-v5.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (54 commits)
  pinctrl: ralink: rt305x: add missing include
  pinctrl: stm32: check for IRQ MUX validity during alloc()
  pinctrl: zynqmp: some code cleanups
  drivers: qcom: pinctrl: Add pinctrl driver for sm6125
  dt-bindings: pinctrl: qcom: sm6125: Document SM6125 pinctrl driver
  dt-bindings: pinctrl: mcp23s08: add documentation for reset-gpios
  pinctrl: mcp23s08: Add optional reset GPIO
  pinctrl: mediatek: fix mode encoding
  pinctrl: mcp23s08: Fix missing unlock on error in mcp23s08_irq()
  pinctrl: bcm: Constify static pinmux_ops
  pinctrl: bcm: Constify static pinctrl_ops
  pinctrl: ralink: move RT288X SoC pinmux config into a new 'pinctrl-rt288x.c' file
  pinctrl: ralink: move MT7620 SoC pinmux config into a new 'pinctrl-mt7620.c' file
  pinctrl: ralink: move RT305X SoC pinmux config into a new 'pinctrl-rt305x.c' file
  pinctrl: ralink: move RT3883 SoC pinmux config into a new 'pinctrl-rt3883.c' file
  pinctrl: ralink: move MT7621 SoC pinmux config into a new 'pinctrl-mt7621.c' file
  pinctrl: ralink: move ralink architecture pinmux header into the driver
  pinctrl: single: config: enable the pin's input
  pinctrl: mtk: Fix mt8365 Kconfig dependency
  pinctrl: mcp23s08: fix race condition in irq handler
  ...
2021-07-01 16:57:14 -07:00
Linus Torvalds 514798d365 This round has a diffstat dominated by Qualcomm clk drivers. Honestly though
that's just a bunch of data so the diffstat reflects that. Looking beyond that
 there's just a bunch of updates all around in various clk drivers. Renesas and
 NXP (for i.MX) are two SoC vendors that have a lot of patches in here. Overall
 the driver changes look to be mostly enabling more clks and non-critical fixes
 that we could hold until the next merge window.
 
 I'm especially excited about the series from Arnd that graduates clkdev to be
 the only implementation of clk_get() and clk_put(). That's a good step in the
 right direction to migreate eveerything over to the common clk framework. Now
 we don't have to worry about clkdev specific details, they're just part of the
 clk API now.
 
 Core:
  - clkdev is now the only option, i.e. clk_get()/clk_put() is implemented in
    only one place in the kernel instead of in drivers/clk/clkdev.c and in
    architectures that want their own implementation
 
 New Drivers:
  - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant Clock
    Jitter Cleaner With Dual Loop PLLs
  - Qualcomm MDM9607 GCC
  - Qualcomm SC8180X display clks
  - Qualcomm SM6125 GCC
  - Qualcomm SM8250 CAMCC (camera)
  - Renesas RZ/G2L SoC
  - Hisilicon hi3559A SoC
 
 Updates:
  - Stop using clock-output-names in ST clk drivers (yay!)
  - Support secure mode of STM32MP1 SoCs
  - Improve clock support for Actions S500 SoC
  - duty cycle setting support on qcom clks
  - Add TI am33xx spread spectrum clock support
  - Use determine_rate() for the Amlogic pll ops instead of round_rate()
  - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1
  - Improve Amlogic axg-audio controller error on deferral
  - Add NNA clocks on Amlogic g12a
  - Reduce memory footprint of Rockchip PLL rate tables
  - A fix for the newly added Rockchip rk3568 clk driver
  - Exported clock for the newly added Rockchip video decoder
  - Remove audio ipg clock from i.MX8MP
  - Remove deprecated legacy clock binding for i.MX SCU clock driver
  - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM
  - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif, audio,
    parallel interface)
  - Add dedicated clock ops for i.MX paralel interface
  - Different fixes for clocks controlled by ATF on i.MX SoCs
  - Add A53/A72 frequency scaling support i.MX clk-scu driver
  - Add special case for DCSS clock on suspend for i.MX clk-scu driver
  - Add parent save/restore on suspend/resume to i.MX clk-scu driver
  - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver
  - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their
    bindings
  - Tegra clk driver no longer deasserts resets on clk_enable as it
    gets in the way of certain power-up sequences
  - Fix compile testing for Tegra clk driver
  - One patch to fix a divider on the Allwinner v3s Audio PLL
  - Add support for CPU core clock boost modes on Renesas R-Car Gen3
  - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U
  - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate()
    and improve support for multiple parents
  - Switch Renesas RZ/N1 divider clocks to .determine_rate()
  - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3
  - Convert ar7 to common clk framework
  - Convert ralink to common clk framework
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmDbu3sRHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSV+OA/9EEV3uuauFsxVm8ySX4T8amHAzE98asEX
 XldxMqBuGNnlqJn3A3LeGISKKafaRMkL/7xqBnTi9ZycDy1WRi2SiAKLTDoJCmi7
 ES32EBCO1O9D5uo4mYFsYgHUaxFmE+4tQbtDCttVt59yZEiiNPz0Lm8tWz5yuDzX
 IwCN8HrNShyL4dykTRUDuUkqrTg9sSqSvdG+XcyI24pgLtBWvJU32wIFfLN+/n9C
 JSyYwzHkajoeuv5kpAJ1IV/tzZgy77xQHunsatJWz1qJ1J2eFADWI2p3NVf88N21
 5Mw5xvikMJZ5Xq8pdZKiyEQOFfcxN/+k7hfc6eq3SDpbkaHPti9CX2rv9Uck6rdh
 Bigixsx9IHbQ+1CJAXZxcAJma/GwzoWW1irqzTQoChYgwlJIyPijFqbuJxqS4P0d
 9sEp0WvbdAEgnktiqs7gphki7Q04y2gUD3LKD6hz5sL0vZ+Dy1DY6olkWJefGrHo
 FDnEGf6gsP3vvvlJt5G2zeZQ/NzMKkfaIGLj/1hTtoLMaxpg282cmPXVUxD+ripW
 /GG/z14RdaHQXeMXduo+MeK5qUsO6LspnYown54IWilOOo1m/rfbun3yAFJaphG1
 ZQB+JDfeH8Cv6AYbNwbEpXyXyj2Rz5fGQjA31+97fCCxykZ+suBQkWqK/lUCmTyf
 ofwokRnKiYY=
 =YnCF
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This round has a diffstat dominated by Qualcomm clk drivers. Honestly
  though that's just a bunch of data so the diffstat reflects that.
  Looking beyond that there's just a bunch of updates all around in
  various clk drivers. Renesas and NXP (for i.MX) are two SoC vendors
  that have a lot of patches in here.

  Overall the driver changes look to be mostly enabling more clks and
  non-critical fixes that we could hold until the next merge window.

  I'm especially excited about the series from Arnd that graduates
  clkdev to be the only implementation of clk_get() and clk_put().
  That's a good step in the right direction to migreate eveerything over
  to the common clk framework. Now we don't have to worry about clkdev
  specific details, they're just part of the clk API now.

  Core:
   - clkdev is now the only option, i.e. clk_get()/clk_put() is
     implemented in only one place in the kernel instead of in
     drivers/clk/clkdev.c and in architectures that want their own
     implementation

  New Drivers:
   - Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant
     Clock Jitter Cleaner With Dual Loop PLLs
   - Qualcomm MDM9607 GCC
   - Qualcomm SC8180X display clks
   - Qualcomm SM6125 GCC
   - Qualcomm SM8250 CAMCC (camera)
   - Renesas RZ/G2L SoC
   - Hisilicon hi3559A SoC

  Updates:
   - Stop using clock-output-names in ST clk drivers (yay!)
   - Support secure mode of STM32MP1 SoCs
   - Improve clock support for Actions S500 SoC
   - duty cycle setting support on qcom clks
   - Add TI am33xx spread spectrum clock support
   - Use determine_rate() for the Amlogic pll ops instead of
     round_rate()
   - Restrict Amlogic gp0/1 and audio plls range on g12a/sm1
   - Improve Amlogic axg-audio controller error on deferral
   - Add NNA clocks on Amlogic g12a
   - Reduce memory footprint of Rockchip PLL rate tables
   - A fix for the newly added Rockchip rk3568 clk driver
   - Exported clock for the newly added Rockchip video decoder
   - Remove audio ipg clock from i.MX8MP
   - Remove deprecated legacy clock binding for i.MX SCU clock driver
   - Use common clk-imx8qxp for both i.MX8QXP and i.MX8QM
   - Add multiple clocks to clk-imx8qxp driver (enet, hdmi, lcdif,
     audio, parallel interface)
   - Add dedicated clock ops for i.MX paralel interface
   - Different fixes for clocks controlled by ATF on i.MX SoCs
   - Add A53/A72 frequency scaling support i.MX clk-scu driver
   - Add special case for DCSS clock on suspend for i.MX clk-scu driver
   - Add parent save/restore on suspend/resume to i.MX clk-scu driver
   - Skip runtime PM enablement for CPU clocks in i.MX clk-scu driver
   - Remove the sys1_pll/sys2_pll clock gates for i.MX8MQ and their
     bindings
   - Tegra clk driver no longer deasserts resets on clk_enable as it
     gets in the way of certain power-up sequences
   - Fix compile testing for Tegra clk driver
   - One patch to fix a divider on the Allwinner v3s Audio PLL
   - Add support for CPU core clock boost modes on Renesas R-Car Gen3
   - Add ISPCS (Image Signal Processor) clocks on Renesas R-Car V3U
   - Switch SH/R-Mobile and R-Car "DIV6" clocks to .determine_rate() and
     improve support for multiple parents
   - Switch Renesas RZ/N1 divider clocks to .determine_rate()
   - Add ZA2 (Audio Clock Generator) clock on Renesas R-Car D3
   - Convert ar7 to common clk framework
   - Convert ralink to common clk framework"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (161 commits)
  clk: zynqmp: Handle divider specific read only flag
  clk: zynqmp: Use firmware specific mux clock flags
  clk: zynqmp: Use firmware specific divider clock flags
  clk: zynqmp: Use firmware specific common clock flags
  clk: lmk04832: Use of match table
  clk: lmk04832: Depend on SPI
  clk: stm32mp1: new compatible for secure RCC support
  dt-bindings: clock: stm32mp1 new compatible for secure rcc
  dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
  dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
  dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
  reset: stm32mp1: remove stm32mp1 reset
  clk: hisilicon: Add clock driver for hi3559A SoC
  dt-bindings: Document the hi3559a clock bindings
  clk: si5341: Add sysfs properties to allow checking/resetting device faults
  clk: si5341: Add silabs,iovdd-33 property
  clk: si5341: Add silabs,xaxb-ext-clk property
  clk: si5341: Allow different output VDD_SEL values
  clk: si5341: Update initialization magic
  clk: si5341: Check for input clock presence and PLL lock on startup
  ...
2021-07-01 13:26:16 -07:00
Viresh Kumar c503c193db Merge branch 'cpufreq/cppc-fie' into cpufreq/arm/linux-next 2021-07-01 07:32:37 +05:30
Stephen Boyd d2b21013bf Merge branches 'clk-st', 'clk-si' and 'clk-hisilicon' into clk-next
- Stop using clock-output-names in ST clk drivers

* clk-st:
  dt-bindings: clock: st: clkgen-fsyn: add new introduced compatible
  clk: st: clkgen-fsyn: embed soc clock outputs within compatible data
  dt-bindings: clock: st: clkgen-pll: add new introduced compatible
  clk: st: clkgen-pll: embed soc clock outputs within compatible data
  dt-bindings: clock: st: flexgen: add new introduced compatible
  clk: st: flexgen: embed soc clock outputs within compatible data
  clk: st: clkgen-pll: remove unused variable of struct clkgen_pll

* clk-si:
  clk: si5341: Add sysfs properties to allow checking/resetting device faults
  clk: si5341: Add silabs,iovdd-33 property
  clk: si5341: Add silabs,xaxb-ext-clk property
  clk: si5341: Allow different output VDD_SEL values
  clk: si5341: Update initialization magic
  clk: si5341: Check for input clock presence and PLL lock on startup
  clk: si5341: Avoid divide errors due to bogus register contents
  clk: si5341: Wait for DEVICE_READY on startup
  dt-bindings: clock: clk-si5341: Add new attributes

* clk-hisilicon:
  clk: hisilicon: Add clock driver for hi3559A SoC
  dt-bindings: Document the hi3559a clock bindings
2021-06-29 13:33:42 -07:00
Stephen Boyd 4f47c91fc6 Merge branches 'clk-lmk04832', 'clk-stm', 'clk-rohm', 'clk-actions' and 'clk-ingenic' into clk-next
- Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant Clock
   Jitter Cleaner With Dual Loop PLLs
 - Support secure mode of STM32MP1 SoCs
 - Improve clock support for Actions S500 SoC

* clk-lmk04832:
  clk: lmk04832: Use of match table
  clk: lmk04832: Depend on SPI
  clk: lmk04832: add support for digital delay
  clk: add support for the lmk04832
  dt-bindings: clock: add ti,lmk04832 bindings

* clk-stm:
  clk: stm32mp1: new compatible for secure RCC support
  dt-bindings: clock: stm32mp1 new compatible for secure rcc
  dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
  dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
  dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
  reset: stm32mp1: remove stm32mp1 reset
  clk: stm32mp1: move RCC reset controller into RCC clock driver
  clk: stm32mp1: convert to module driver
  clk: stm32mp1: remove intermediate pll clocks
  clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' into one clock
  clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clock

* clk-rohm:
  clk: bd718xx: Drop BD70528 support

* clk-actions:
  clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoC
  dt-bindings: clock: Add NIC and ETHERNET bindings for Actions S500 SoC
  clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC
  clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
  clk: actions: Fix SD clocks factor table on Owl S500 SoC
  clk: actions: Fix UART clock dividers on Owl S500 SoC

* clk-ingenic:
  clk: ingenic: Add support for the JZ4760
  clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
  clk: ingenic: Remove pll_info.no_bypass_bit
  clk: ingenic: Read bypass register only when there is one
  clk: Support bypassing dividers
  dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles
2021-06-29 13:33:22 -07:00
Stephen Boyd 029eae234b Merge branches 'clk-legacy', 'clk-vc5', 'clk-allwinner', 'clk-nvidia' and 'clk-imx' into clk-next
* clk-legacy:
  clkdev: remove unused clkdev_alloc() interfaces
  clkdev: remove CONFIG_CLKDEV_LOOKUP
  m68k: coldfire: remove private clk_get/clk_put
  m68k: coldfire: use clkdev_lookup on most coldfire
  mips: ralink: convert to CONFIG_COMMON_CLK
  mips: ar7: convert to CONFIG_COMMON_CLK
  mips: ar7: convert to clkdev_lookup

* clk-vc5:
  clk: vc5: fix output disabling when enabling a FOD

* clk-allwinner:
  clk: sunxi-ng: v3s: fix incorrect postdivider on pll-audio

* clk-nvidia:
  clk: tegra: clk-tegra124-dfll-fcpu: don't use devm functions for regulator
  clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing()
  clk: tegra: Add stubs needed for compile-testing
  clk: tegra: Don't deassert reset on enabling clocks
  clk: tegra: Mark external clocks as not having reset control
  clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling
  clk: tegra: Don't allow zero clock rate for PLLs
  clk: tegra: Halve SCLK rate on Tegra20
  clk: tegra: Ensure that PLLU configuration is applied properly
  clk: tegra: Fix refcounting of gate clocks
  clk: tegra30: Use 300MHz for video decoder by default

* clk-imx:
  clk: imx8mq: remove SYS PLL 1/2 clock gates
  clk: imx: scu: Do not enable runtime PM for CPU clks
  clk: imx: scu: add parent save and restore
  clk: imx: scu: Only save DC SS clock using non-cached clock rate
  clk: imx: scu: Add A72 frequency scaling support
  clk: imx: scu: Add A53 frequency scaling support
  clk: imx: scu: bypass pi_pll enable status restore
  clk: imx: scu: detach pd if can't power up
  clk: imx: scu: bypass cpu clock save and restore
  clk: imx: scu: add parallel port clock ops
  clk: imx: scu: add more scu clocks
  clk: imx: scu: add enet rgmii gpr clocks
  clk: imx8qm: add clock valid resource checking
  clk: imx8qxp: add clock valid checking mechnism
  clk: imx: scu: add gpr clocks support
  clk: imx: scu: remove legacy scu clock binding support
  dt-bindings: arm: imx: scu: drop deprecated legacy clock binding
  dt-bindings: arm: imx: scu: fix naming typo of clk compatible string
  clk: imx: Remove the audio ipg clock from imx8mp
2021-06-29 13:33:10 -07:00
Stephen Boyd d915611eda Merge branches 'clk-qcom', 'clk-versatile', 'clk-renesas', 'clk-sifive' and 'clk-ti' into clk-next
- duty cycle setting support on qcom clks
 - qcom MDM9607 GCC
 - qcom sc8180x display clks
 - qcom SM6125 GCC
 - Add TI am33xx spread spectrum clock support

* clk-qcom: (22 commits)
  clk: qcom: clk-alpha-pll: fix CAL_L write in alpha_pll_fabia_prepare
  clk: qcom: Add camera clock controller driver for SM8250
  dt-bindings: clock: add QCOM SM8250 camera clock bindings
  clk: qcom: clk-alpha-pll: add support for zonda pll
  clk/qcom: Remove unused variables
  clk: qcom: smd-rpmcc: Add support for MSM8226 rpm clocks
  clk: qcom: gcc: Add support for Global Clock controller found on MSM8226
  dt-bindings: clock: qcom: Add MSM8226 GCC clock bindings
  clk: qcom: Add SM6125 (TRINKET) GCC driver
  dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver
  clk: qcom: gcc: Add support for a new frequency for SC7280
  clk: qcom: smd-rpm: Fix wrongly assigned RPM_SMD_PNOC_CLK
  dt-bindings: clock: qcom: rpmcc: Document MSM8226 compatible
  clk: qcom: dispcc-sm8250: Add EDP clocks
  clk: qcom: dispcc-sm8250: Add sc8180x support
  clk: qcom: smd-rpm: De-duplicate identical entries
  clk: qcom: smd-rpm: Switch to parent_data
  clk: qcom: Add MDM9607 GCC driver
  dt-bindings: clock: Add MDM9607 GCC clock bindings
  clk: qcom: cleanup some dev_err_probe() calls
  ...

* clk-versatile:
  clk: versatile: Depend on HAS_IOMEM
  clk: versatile: remove dependency on ARCH_*

* clk-renesas: (22 commits)
  clk: renesas: Add support for R9A07G044 SoC
  clk: renesas: Add CPG core wrapper for RZ/G2L SoC
  dt-bindings: clock: renesas: Document RZ/G2L SoC CPG driver
  dt-bindings: clock: Add r9a07g044 CPG Clock Definitions
  clk: renesas: r8a77995: Add ZA2 clock
  clk: renesas: cpg-mssr: Make srstclr[] comment block consistent
  clk: renesas: cpg-mssr: Remove unused [RM]MSTPCR() definitions
  clk: renesas: r9a06g032: Switch to .determine_rate()
  clk: renesas: div6: Implement range checking
  clk: renesas: div6: Consider all parents for requested rate
  clk: renesas: div6: Switch to .determine_rate()
  clk: renesas: div6: Simplify src mask handling
  clk: renesas: div6: Use clamp() instead of clamp_t()
  clk: renesas: rcar-usb2-clock-sel: Fix error handling in .probe()
  clk: renesas: r8a779a0: Add ISPCS clocks
  clk: renesas: rcar-gen3: Add boost support to Z clocks
  clk: renesas: rcar-gen3: Add custom clock for PLLs
  clk: renesas: rcar-gen3: Increase Z clock accuracy
  clk: renesas: rcar-gen3: Grammar s/dependent of/dependent on/
  clk: renesas: rcar-gen3: Remove superfluous masking in cpg_z_clk_set_rate()
  ...

* clk-sifive:
  clk: analogbits: fix doc warning in wrpll-cln28hpc.c
  clk: sifive: Fix kernel-doc

* clk-ti:
  drivers: ti: remove redundant error message in adpll.c
  clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclk
  dt-bindings: clock: ehrpwm: Add support for AM64 specific compatible
  clk: ti: add am33xx/am43xx spread spectrum clock support
  ARM: dts: am43xx-clocks: add spread spectrum support
  ARM: dts: am33xx-clocks: add spread spectrum support
  dt-bindings: ti: dpll: add spread spectrum support
  clk: ti: fix typo in routine description
2021-06-29 13:32:46 -07:00
Gabriel Fernandez f040e135c5 dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
Add ID to SCMI0 to exposes reset controller for the MCU HOLD BOOT resource.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210617051814.12018-10-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-28 16:09:09 -07:00
Gabriel Fernandez 256c7521cb dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
stm32mp15 TZ secure firmware provides SCMI reset domains for
secure resources. This change defines the SCMI reset domain
identifiers used by SCMI agents and servers.

Stm32mp15 TZ secure firmware provides SCMI clocks for oscillators, some
PLL output and few secure aware interfaces. This change defines the
SCMI clock identifiers used by SCMI agents and servers.

Server SCMI0 exposes reset controllers for resources under RCC[TZEN]
configuration control.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210617051814.12018-9-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-28 16:09:09 -07:00
Gabriel Fernandez bd08b193cf dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
stm32mp15 TZ secure firmware provides SCMI clocks for oscillators, some
PLL output and few secure aware interfaces.
This change defines the SCMI clock identifiers used by SCMI agents
and servers.
Server SCMI0 exposes clocks and reset controllers for resources under
RCC[TZEN] configuration control.
Server SCMI1 exposes clocks for resources under RCC[MCKPROT] control.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210617051814.12018-8-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-28 16:09:09 -07:00
Dongjiu Geng b87111da42 dt-bindings: Document the hi3559a clock bindings
Add DT bindings documentation for hi3559a SoC clock.

Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1616498973-47067-2-git-send-email-gengdongjiu1@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 20:05:41 -07:00
Paul Cercueil bdbfc02937 clk: ingenic: Add support for the JZ4760
Add the CGU code and the compatible string to the TCU driver to support
the JZ4760 SoC.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20210530164923.18134-7-paul@crapouillou.net
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:49:18 -07:00
Cristian Ciocaltea a4acefd858 dt-bindings: clock: Add NIC and ETHERNET bindings for Actions S500 SoC
Add the missing NIC and ETHERNET clock bindings constants for Actions
Semi Owl S500 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/1d0902cf073f76a1a602410061481ccb3fc36a72.1623354574.git.cristian.ciocaltea@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 18:45:16 -07:00
Jonathan Marek a3b82fa77b dt-bindings: clock: add QCOM SM8250 camera clock bindings
Add device tree bindings for camera clock controller for
Qualcomm Technology Inc's SM8250 SoC.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20210609022051.2171-3-jonathan@marek.ca
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 17:12:55 -07:00
Martin Botka 11fa5f8392 dt-bindings: clk: qcom: gcc-sm6125: Document SM6125 GCC driver
Document the newly added SM6125 GCC driver.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
Link: https://lore.kernel.org/r/20210605121040.282053-1-martin.botka@somainline.org
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 16:53:25 -07:00