4 Commits

Author	SHA1	Message	Date
Mika Westerberg	f25c3aa908	pinctrl: intel: Convert to use devm_gpiochip_add_data() ... This simplifies error handling and allows us to drop intel_pinctrl_remove() completely. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2017-01-11 13:52:37 +01:00
Qipeng Zha	618a919b4c	pinctrl: intel: fix bug of register offset calculation ... The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS, GPI_IE, are not 24 for Broxton, Add a parameter to allow different platform to set correct value. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2015-12-10 23:01:41 +01:00
Mika Westerberg	551fa5801e	pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H support ... Intel Sunrisepoint-H is a desktop version of the PCH (Platform Controller Hub). It has slightly different pin configuration compared to the LP version. This patch adds support for Sunrisepoint-H to the existing pinctrl-sunrisepoint.c driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2015-05-12 13:17:41 +02:00
Mika Westerberg	7981c0015a	pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support ... This driver supports pinctrl/GPIO hardware found on Intel Sunrisepoint (a Skylake PCH) providing users a pinctrl and GPIO interfaces (including GPIO interrupts). The driver is split into core and platform parts so that the same core driver can be reused in other drivers for other Intel GPIO hardware that is based on the same host controller design. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2015-04-07 15:15:23 +02:00