Commit Graph

10 Commits

Author SHA1 Message Date
Linus Torvalds f5b8fcb48b blackfin updates for Linux 3.10
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Merge tag 'for-linus' of git://github.com/realmz/blackfin-linux

Pull blackfin updates from Steven Miao.

* tag 'for-linus' of git://github.com/realmz/blackfin-linux:
  bfin cache: dcplb map: add 16M dcplb map for BF60x
  blackfin: smp: fix smp build after drop asm/system.h
  blackfin: fix bootup core clock and system clock display
  Platform Nand: Set the GPIO for NAND read as input
  blackfin: rename vmImage to uImage after we move to buildroot
  blackfin: twi: Remove bogus #endif
  bf609: rsi: Add bf609 rsi MMR macro and board platform data.
  blackfin: dmc: Improve DDR2 write through in DMC effict controller.
2013-05-10 07:21:16 -07:00
Steven Miao 5ae89ee043 bfin cache: dcplb map: add 16M dcplb map for BF60x
use 16M data cplb map on BF60x to avoid too much dcplb miss overhead
cleanup cplb info

Signed-off-by: Steven Miao <realmz6@gmail.com>
2013-05-09 18:22:45 +08:00
Al Viro d9dda78bad procfs: new helper - PDE_DATA(inode)
The only part of proc_dir_entry the code outside of fs/proc
really cares about is PDE(inode)->data.  Provide a helper
for that; static inline for now, eventually will be moved
to fs/proc, along with the knowledge of struct proc_dir_entry
layout.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-04-09 14:13:32 -04:00
Al Viro 496ad9aa8e new helper: file_inode(file)
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-02-22 23:31:31 -05:00
Mike Frysinger 48dee09325 Blackfin: cplbinfo: drop d_path() hacks
The cplbinfo was using d_path() to figure out which cpu/cplb was being
parsed.  As Al pointed out, this isn't exactly reliable as it assumes the
static VFS path to be unchanged, and it's just poor form.  So use the
proc_create_data() to properly (and internally) pass the exact cpu/cplb
requested to the parser function.

Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-07 04:48:04 -04:00
Robin Getz 96f1050d3d Blackfin: mass clean up of copyright/licensing info
Bill Gatliff & David Brownell pointed out we were missing some
copyrights, and licensing terms in some of the files in
./arch/blackfin, so this fixes things, and cleans them up.

It also removes:
 - verbose GPL text(refer to the top level ./COPYING file)
 - file names (you are looking at the file)
 - bug url (it's in the ./MAINTAINERS file)
 - "or later" on GPL-2, when we did not have that right

It also allows some Blackfin-specific assembly files to be under a BSD
like license (for people to use them outside of Linux).

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-07 04:36:26 -04:00
Bernd Schmidt dbdf20db53 Blackfin arch: Faster C implementation of no-MPU CPLB handler
This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code.

We ditch the old cplb-nompu implementation, which is a good example of
why a good algorithm in a HLL is preferrable to a bad algorithm written in
assembly.  Rather than try to construct a table of all posible CPLBs and
search it, we just create a (smaller) table of memory regions and
their attributes.  Some of the data structures are now unified for both
the mpu and nompu cases.  A lot of needless complexity in cplbinit.c is
removed.

Further optimizations:
  * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving
    these registers on the stack when entering a CPLB exception.
  * lose cli/nop/nop/sti sequences for some workarounds - these don't
  * make
    sense in an exception context

Additional code unification should be possible after this.

[Mike Frysinger <vapier.adi@gmail.com>:
 - convert CPP if statements to C if statements
 - remove redundant statements
 - use a do...while loop rather than a for loop to get slightly better
   optimization and to avoid gcc "may be used uninitialized" warnings ...
   we know that the [id]cplb_nr_bounds variables will never be 0, so this
   is OK
 - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten,
   we can punt it
 - add some BUG_ON() checks to make sure we dont overflow the small
   cplb_bounds array
 - add i/d cplb entries for the bootrom because there is functions/data in
   there we want to access
 - we do not need a NULL trailing entry as any time we access the bounds
   arrays, we use the nr_bounds variable
]

Signed-off-by: Michael McTernan <mmcternan@airvana.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:38 +08:00
Mike Frysinger a024d41bfe Blackfin arch: rewrite cplbinfo to use seq files
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:39 +08:00
Mike Frysinger cb15e57cc7 Blackfin arch: noMMU CPLB lookup tables can be in L1 SRAM
- unify duplicate page_size_table definitions
 - make sure it is placed alongside the other cplb switching code

Pointed-out-by: Michael McTernan <mmcternan@airvana.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-11-18 17:48:22 +08:00
Mike Frysinger ff4c02e4be Blackfin arch: unify cplbinfo files
Merge MPU and noMPU version of CPLB info code to one common version.

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-11-18 17:48:22 +08:00