Commit Graph

161 Commits

Author SHA1 Message Date
Tony Lindgren c8692ad416 bus: ti-sysc: Fix flakey idling of uarts and stop using swsup_sidle_act
Looks like the swsup_sidle_act quirk handling is unreliable for serial
ports. The serial ports just eventually stop idling until woken up and
re-idled again. As the serial port not idling blocks any deeper SoC idle
states, it's adds an annoying random flakeyness for power management.

Let's just switch to swsup_sidle quirk instead like we already do for
omap3 uarts. This means we manually idle the port instead of trying to
use the hardware autoidle features when not in use.

For more details on why the serial ports have been using swsup_idle_act,
see commit 66dde54e97 ("ARM: OMAP2+: hwmod-data: UART IP needs software
control to manage sidle modes"). It seems that the swsup_idle_act quirk
handling is not enough though, and for example the TI Android kernel
changed to using swsup_sidle with commit 77c34c84e1e0 ("OMAP4: HWMOD:
UART1: disable smart-idle.").

Fixes: b4a9a7a389 ("bus: ti-sysc: Handle swsup idle mode quirks")
Cc: Carl Philipp Klemm <philipp@uvos.xyz>
Cc: Ivan Jelincic <parazyd@dyne.org>
Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Sicelo A. Mhlongo <absicsz@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-05-25 09:08:23 +03:00
Tony Lindgren 4d7b324e23 bus: ti-sysc: Fix am335x resume hang for usb otg module
On am335x, suspend and resume only works once, and the system hangs if
suspend is attempted again. However, turns out suspend and resume works
fine multiple times if the USB OTG driver for musb controller is loaded.

The issue is caused my the interconnect target module losing context
during suspend, and it needs a restore on resume to be reconfigure again
as debugged earlier by Dave Gerlach <d-gerlach@ti.com>.

There are also other modules that need a restore on resume, like gpmc as
noted by Dave. So let's add a common way to restore an interconnect
target module based on a quirk flag. For now, let's enable the quirk for
am335x otg only to fix the suspend and resume issue.

As gpmc is not causing hangs based on tests with BeagleBone, let's patch
gpmc separately. For gpmc, we also need a hardware reset done before
restore according to Dave.

To reinit the modules, we decouple system suspend from PM runtime. We
replace calls to pm_runtime_force_suspend() and pm_runtime_force_resume()
with direct calls to internal functions and rely on the driver internal
state. There no point trying to handle complex system suspend and resume
quirks via PM runtime.

This is issue should have already been noticed with commit 1819ef2e2d
("bus: ti-sysc: Use swsup quirks also for am335x musb") when quirk
handling was added for am335x otg for swsup. But the issue went unnoticed
as having musb driver loaded hides the issue, and suspend and resume works
once without the driver loaded.

Fixes: 1819ef2e2d ("bus: ti-sysc: Use swsup quirks also for am335x musb")
Suggested-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-05-18 10:11:06 +03:00
Tony Lindgren 85ebe5aeef Merge branch 'fixes-rc1' into fixes 2021-05-18 09:45:08 +03:00
Tony Lindgren db8e712e06 bus: ti-sysc: Fix missing quirk flags for sata
Naresh Kamboju <naresh.kamboju@linaro.org> reported that Beaglebone-X15
does not detect sata drives any longer after dra7 was flipped to boot with
device tree data only. Turns out we are now missing the sata related quirk
flags in ti-sysc that we used to have earlier.

Fixes: 98feab31ac ("ARM: OMAP2+: Drop legacy platform data for dra7 sata")
Fixes: 21206c8f2c ("ARM: OMAP2+: Drop legacy platform data for omap5 sata")
Link: https://lore.kernel.org/regressions/CA+G9fYtTN6ug3eBAW3wMcDeESUo+ebj7L5HBe5_fj4uqDExFQg@mail.gmail.com/
Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Tested-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-05-07 14:21:32 +03:00
Linus Torvalds 37f00ab4a0 ARM: SoC drivers for v5.13
Updates for SoC specific drivers include a few subsystems that
 have their own maintainers but send them through the soc tree:
 
 TEE/OP-TEE:
  -  Add tracepoints around calls to secure world
 
 Memory controller drivers:
  - Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
  - Add debug statistics to Tegra20 memory controller
  - Update Tegra bindings and convert to dtschema
 
 ARM SCMI Firmware:
  - Support for modular SCMI protocols and vendor specific extensions
  - New SCMI IIO driver
  - Per-cpu DVFS
 
 The other driver changes are all from the platform maintainers
 directly and reflect the drivers that don't fit into any other
 subsystem as well as treewide changes for a particular platform.
 
 SoCFPGA:
  - Various cleanups contributed by Krzysztof Kozlowski
 
 Mediatek:
  - add MT8183 support to mutex driver
  - MMSYS: use per SoC array to describe the possible routing
  - add MMSYS support for MT8183 and MT8167
  - add support for PMIC wrapper with integrated arbiter
  - add support for MT8192/MT6873
 
 Tegra:
  - Bug fixes to PMC and clock drivers
 
 NXP/i.MX:
  - Update SCU power domain driver to keep console domain power on.
  - Add missing ADC1 power domain to SCU power domain driver.
  - Update comments for single global power domain in SCU power domain
    driver.
  - Add i.MX51/i.MX53 unique id support to i.MX SoC driver.
 
 NXP/FSL SoC driver updates for v5.13
  - Add ACPI support for RCPM driver
  - Use generic io{read,write} for QE drivers after performance optimized
    for PowerPC
  - Fix QBMAN probe to cleanup HW states correctly for kexec
  - Various cleanup and style fix for QBMAN/QE/GUTS drivers
 
 OMAP:
  - Preparation to use devicetree for genpd
  - ti-sysc needs iorange check improved when the interconnect target module
    has no control registers listed
  - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to avoid
    issues with missing resources and unnecessary deferred probe
  - ti-sysc debug option can now detect more devices
  - ti-sysc now warns if an old incomplete devicetree data is found as we
    now rely on it being complete for am3 and 4
  - soc init code needs to check for prcm and prm nodes for omap4/5 and dra7
  - omap-prm driver needs to enable autoidle retention support for omap4
  - omap5 clocks are missing gpmc and ocmc clock registers
  - pci-dra7xx now needs to use builtin_platform_driver instead of using
    builtin_platform_driver_probe for deferred probe to work
 
 Raspberry Pi:
  - Fix-up all RPi firmware drivers so as for unbind to happen in an
    orderly fashion
  - Support for RPi's PoE hat PWM bus
 
 Qualcomm
  - Improved detection for SCM calling conventions
  - Support for OEM specific wifi firmware path
  - Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Updates for SoC specific drivers include a few subsystems that have
  their own maintainers but send them through the soc tree:

  TEE/OP-TEE:
   - Add tracepoints around calls to secure world

  Memory controller drivers:
   - Minor fixes for Renesas, Exynos, Mediatek and Tegra platforms
   - Add debug statistics to Tegra20 memory controller
   - Update Tegra bindings and convert to dtschema

  ARM SCMI Firmware:
   - Support for modular SCMI protocols and vendor specific extensions
   - New SCMI IIO driver
   - Per-cpu DVFS

  The other driver changes are all from the platform maintainers
  directly and reflect the drivers that don't fit into any other
  subsystem as well as treewide changes for a particular platform.

  SoCFPGA:
   - Various cleanups contributed by Krzysztof Kozlowski

  Mediatek:
   - add MT8183 support to mutex driver
   - MMSYS: use per SoC array to describe the possible routing
   - add MMSYS support for MT8183 and MT8167
   - add support for PMIC wrapper with integrated arbiter
   - add support for MT8192/MT6873

  Tegra:
   - Bug fixes to PMC and clock drivers

  NXP/i.MX:
   - Update SCU power domain driver to keep console domain power on.
   - Add missing ADC1 power domain to SCU power domain driver.
   - Update comments for single global power domain in SCU power domain
     driver.
   - Add i.MX51/i.MX53 unique id support to i.MX SoC driver.

  NXP/FSL SoC driver updates for v5.13
   - Add ACPI support for RCPM driver
   - Use generic io{read,write} for QE drivers after performance
     optimized for PowerPC
   - Fix QBMAN probe to cleanup HW states correctly for kexec
   - Various cleanup and style fix for QBMAN/QE/GUTS drivers

  OMAP:
   - Preparation to use devicetree for genpd
   - ti-sysc needs iorange check improved when the interconnect target
     module has no control registers listed
   - ti-sysc needs to probe l4_wkup and l4_cfg interconnects first to
     avoid issues with missing resources and unnecessary deferred probe
   - ti-sysc debug option can now detect more devices
   - ti-sysc now warns if an old incomplete devicetree data is found as
     we now rely on it being complete for am3 and 4
   - soc init code needs to check for prcm and prm nodes for omap4/5 and
     dra7
   - omap-prm driver needs to enable autoidle retention support for
     omap4
   - omap5 clocks are missing gpmc and ocmc clock registers
   - pci-dra7xx now needs to use builtin_platform_driver instead of
     using builtin_platform_driver_probe for deferred probe to work

  Raspberry Pi:
   - Fix-up all RPi firmware drivers so as for unbind to happen in an
     orderly fashion
   - Support for RPi's PoE hat PWM bus

  Qualcomm
   - Improved detection for SCM calling conventions
   - Support for OEM specific wifi firmware path
   - Added drivers for SC7280/SM8350: RPMH, LLCC< AOSS QMP"

* tag 'arm-drivers-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
  soc: aspeed: fix a ternary sign expansion bug
  memory: mtk-smi: Add device-link between smi-larb and smi-common
  memory: samsung: exynos5422-dmc: handle clk_set_parent() failure
  memory: renesas-rpc-if: fix possible NULL pointer dereference of resource
  clk: socfpga: fix iomem pointer cast on 64-bit
  soc: aspeed: Adapt to new LPC device tree layout
  pinctrl: aspeed-g5: Adapt to new LPC device tree layout
  ipmi: kcs: aspeed: Adapt to new LPC DTS layout
  ARM: dts: Remove LPC BMC and Host partitions
  dt-bindings: aspeed-lpc: Remove LPC partitioning
  soc: fsl: enable acpi support in RCPM driver
  soc: qcom: mdt_loader: Detect truncated read of segments
  soc: qcom: mdt_loader: Validate that p_filesz < p_memsz
  soc: qcom: pdr: Fix error return code in pdr_register_listener
  firmware: qcom_scm: Fix kernel-doc function names to match
  firmware: qcom_scm: Suppress sysfs bind attributes
  firmware: qcom_scm: Workaround lack of "is available" call on SC7180
  firmware: qcom_scm: Reduce locking section for __get_convention()
  firmware: qcom_scm: Make __qcom_scm_is_call_available() return bool
  Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers"
  ...
2021-04-26 12:11:52 -07:00
Zheng Yongjun d995d3d025 bus: ti-sysc: Use kzalloc for allocating only one thing
Use kzalloc rather than kcalloc(1,...)

The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
@@

- kcalloc(1,
+ kzalloc(
          ...)
// </smpl>

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 13:44:04 +02:00
Yang Li 52fbb5aabb bus: ti-sysc: remove unneeded semicolon
Eliminate the following coccicheck warning:
./drivers/bus/ti-sysc.c:1595:2-3: Unneeded semicolon
./drivers/bus/ti-sysc.c:2833:3-4: Unneeded semicolon

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 13:30:12 +02:00
Tony Lindgren 4adcf4c28f bus: ti-sysc: Warn about old dtb for dra7 and omap4/5
Let's warn if an old incomplete dtb is detected. We now assume the dtb
is complete and does not depend on the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-12 10:23:48 +02:00
Tony Lindgren 5f7259a578 bus: ti-sysc: Check for old incomplete dtb
Let's be nice and show an error on the SoCs about old imcomplete devicetree
if the dtb is still using "simple-bus" instead of "simple-pm-bus" for the
root OCP node.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 13:59:17 +02:00
Tony Lindgren f2dc0755fc bus: ti-sysc: Detect more modules for debugging
We want to see what the interconnect target module names are for
debugging.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08 11:35:07 +02:00
Tony Lindgren 4700a00755 bus: ti-sysc: Probe for l4_wkup and l4_cfg interconnect devices first
We want to probe l4_wkup and l4_cfg interconnect devices first to avoid
issues with missing resources. Otherwise we attempt to probe l4_per
devices first causing pointless deferred probe and also annoyingh
renumbering of the MMC devices for example.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08 11:35:07 +02:00
Tony Lindgren 7bad5af826 bus: ti-sysc: Fix initializing module_pa for modules without sysc register
We have interconnect target modules with no known registers using only
clocks and resets, but we still want to detect them based on the module
IO range. So let's call sysc_parse_and_check_child_range() earlier so we
have module_pa properly initialized.

Fixes: 2928135c93 ("bus: ti-sysc: Support modules without control registers")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08 11:35:06 +02:00
Tony Lindgren a7b5d7c496 bus: ti-sysc: Fix warning on unbind if reset is not deasserted
We currently get thefollowing on driver unbind if a reset is configured
and asserted:

WARNING: CPU: 0 PID: 993 at drivers/reset/core.c:432 reset_control_assert
...
(reset_control_assert) from [<c0fecda8>] (sysc_remove+0x190/0x1e4)
(sysc_remove) from [<c0a2bb58>] (platform_remove+0x24/0x3c)
(platform_remove) from [<c0a292fc>] (__device_release_driver+0x154/0x214)
(__device_release_driver) from [<c0a2a210>] (device_driver_detach+0x3c/0x8c)
(device_driver_detach) from [<c0a27d64>] (unbind_store+0x60/0xd4)
(unbind_store) from [<c0546bec>] (kernfs_fop_write_iter+0x10c/0x1cc)

Let's fix it by checking the reset status.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-02-18 13:06:57 +02:00
Linus Torvalds 48c1c40ab4 ARM: SoC drivers for v5.11
There are a couple of subsystems maintained by other people that
 merge their drivers through the SoC tree, those changes include:
 
  - The SCMI firmware framework gains support for sensor notifications
    and for controlling voltage domains.
 
  - A large update for the Tegra memory controller driver, integrating
    it better with the interconnect framework
 
  - The memory controller subsystem gains support for Mediatek MT8192
 
  - The reset controller framework gains support for sharing pulsed
    resets
 
 For Soc specific drivers in drivers/soc, the main changes are
 
  - The Allwinner/sunxi MBUS gets a rework for the way it handles
    dma_map_ops and offsets between physical and dma address spaces.
 
  - An errata fix plus some cleanups for Freescale Layerscape SoCs
 
  - A cleanup for renesas drivers regarding MMIO accesses.
 
  - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains
 
  - New SoC specific drivers for Aspeed AST2600 LPC bus control
    and SoC identification.
 
  - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660
    and SDX55.
 
  - A rework of the TI AM33xx 'genpd' power domain support to use
    information from DT instead of platform data
 
  - Support for TI AM64x SoCs
 
  - Allow building some Amlogic drivers as modules instead of built-in
 
 Finally, there are numerous cleanups and smaller bug fixes for
 Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
 Renesas, and Xilinx SoCs.
 
 There is a trivial conflict in the cedrus driver, with two branches
 adding the same CEDRUS_CAPABILITY_H265_DEC flag, and another trivial
 remove/remove conflict in linux/dma-mapping.h.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "There are a couple of subsystems maintained by other people that merge
  their drivers through the SoC tree, those changes include:

   - The SCMI firmware framework gains support for sensor notifications
     and for controlling voltage domains.

   - A large update for the Tegra memory controller driver, integrating
     it better with the interconnect framework

   - The memory controller subsystem gains support for Mediatek MT8192

   - The reset controller framework gains support for sharing pulsed
     resets

  For Soc specific drivers in drivers/soc, the main changes are

   - The Allwinner/sunxi MBUS gets a rework for the way it handles
     dma_map_ops and offsets between physical and dma address spaces.

   - An errata fix plus some cleanups for Freescale Layerscape SoCs

   - A cleanup for renesas drivers regarding MMIO accesses.

   - New SoC specific drivers for Mediatek MT8192 and MT8183 power
     domains

   - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC
     identification.

   - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and
     SDX55.

   - A rework of the TI AM33xx 'genpd' power domain support to use
     information from DT instead of platform data

   - Support for TI AM64x SoCs

   - Allow building some Amlogic drivers as modules instead of built-in

  Finally, there are numerous cleanups and smaller bug fixes for
  Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips,
  Renesas, and Xilinx SoCs"

* tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits)
  soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS
  firmware: xilinx: Properly align function parameter
  firmware: xilinx: Add a blank line after function declaration
  firmware: xilinx: Remove additional newline
  firmware: xilinx: Fix kernel-doc warnings
  firmware: xlnx-zynqmp: fix compilation warning
  soc: xilinx: vcu: add missing register NUM_CORE
  soc: xilinx: vcu: use vcu-settings syscon registers
  dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
  soc: xilinx: vcu: drop useless success message
  clk: samsung: mark PM functions as __maybe_unused
  soc: samsung: exynos-chipid: initialize later - with arch_initcall
  soc: samsung: exynos-chipid: order list of SoCs by name
  memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe()
  memory: ti-emif-sram: only build for ARMv7
  memory: tegra30: Support interconnect framework
  memory: tegra20: Support hardware versioning and clean up OPP table initialization
  dt-bindings: memory: tegra20-emc: Document opp-supported-hw property
  soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe()
  reset-controller: ti: force the write operation when assert or deassert
  ...
2020-12-16 16:38:41 -08:00
Grygorii Strashko 65fb736761 bus: ti-sysc: suppress err msg for timers used as clockevent/source
GP Timers used as clockevent/source are not available for ti-sysc bus and
handled by Kernel timekeeping core. Now ti-sysc produces error message
every time such timer is detected:

 "ti-sysc: probe of 48040000.target-module failed with error -16"

Such messages are not necessary, so suppress them by returning -ENXIO
instead of -EBUSY.

Fixes: 6cfcd5563b ("clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19 11:05:48 +02:00
Tony Lindgren cfeeea60af bus: ti-sysc: Implement GPMC debug quirk to drop platform data
We need to enable no-reset-on-init quirk for GPMC if the config
option for CONFIG_OMAP_GPMC_DEBUG is set. Otherwise the GPMC
driver code is unable to show the bootloader configured timings.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-16 12:57:27 +02:00
Tony Lindgren 2928135c93 bus: ti-sysc: Support modules without control registers
Some modules like MPU have a powerdomain and functional clock but not
necessarily any control registers. Let's allow configuring interconnect
target modules with no control registers.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-16 12:57:24 +02:00
Tony Lindgren 4097c9a64d bus: ti-sysc: Assert reset only after disabling clocks
The rstctrl reset must be asserted after gating the module clock as
described in the TRM at least for IVA. Otherwise the rstctrl reset
done with module clock enabled can hang the system.

Note that this issue is has been only seen with related IVA changes
that we do not currently have merged. So probably no need to apply
this patch as a fix.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-16 12:57:15 +02:00
Tony Lindgren e7ae08d398 bus: ti-sysc: Fix bogus resetdone warning on enable for cpsw
Bail out early from sysc_wait_softreset() just like we do in sysc_reset()
if there's no sysstatus srst_shift to fix a bogus resetdone warning on
enable as suggested by Grygorii Strashko <grygorii.strashko@ti.com>.

We do not currently handle resets for modules that need writing to the
sysstatus register. If we at some point add that, we also need to add
SYSS_QUIRK_RESETDONE_INVERTED flag for cpsw as the sysstatus bit is low
when reset is done as described in the am335x TRM "Table 14-202
SOFT_RESET Register Field Descriptions"

Fixes: d46f9fbec7 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit")
Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-10-26 10:08:53 +02:00
Tony Lindgren e275d2109c bus: ti-sysc: Fix reset status check for modules with quirks
Commit d46f9fbec7 ("bus: ti-sysc: Use optional clocks on for enable and
wait for softreset bit") started showing a "OCP softreset timed out"
warning on enable if the interconnect target module is not out of reset.
This caused the warning to be often triggered for i2c and hdq while the
devices are working properly.

Turns out that some interconnect target modules seem to have an unusable
reset status bits unless the module specific reset quirks are activated.

Let's just skip the reset status check for those modules as we only want
to activate the reset quirks when doing a reset, and not on enable. This
way we don't see the bogus "OCP softreset timed out" warnings during boot.

Fixes: d46f9fbec7 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-10-26 10:08:51 +02:00
Gustavo A. R. Silva df561f6688 treewide: Use fallthrough pseudo-keyword
Replace the existing /* fall through */ comments and its variants with
the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
fall-through markings when it is the case.

[1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through

Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2020-08-23 17:36:59 -05:00
Linus Torvalds 2f3fbfdaf7 ARM: SoC DT changes for 5.9
As usual, there are many patches addressing minor issues in existing
 DTS files, such as DTC warnings, or adding support for additional
 peripherals.
 
 There are three added SoCs in existing product families:
 
  - Amazon:
     Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
     otherwise known as AL73400 or first-generation Graviton, and following
     the already supported Cortex-A1`5 and Cortex-A57 based Alpine chips.
     This one is added together with the official Evaluation platform.
 
  - Qualcomm:
     The Snapdragon SDM630 platform is a family of mid-range mobile phone
     chips from 2017 based on Cortex-A53 or Kryo 260 CPUs.
     A total of five end-user products are added based on these, all
     Android phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and
     XA2 Ultra.
 
  - Renesas:
     RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
     family, and apparently closely related to the RZ/G2N and RZ/G2M
     models we already support but has a faster GPU and additional
     on-chip peripherals.
     It is added along with the HopeRun HiHope RZ/G2H development board
 
 A small number of new boards for already supported SoCs also debut:
 
  - Allwinner sunxi:
     Only one new machine, revision v1.2 of the Pine64 PinePhone
     (non-Android) smartphone, containing minor changes compared to
     earlier versions.
 
  - Amlogic Meson:
     WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box
 
  - Aspeed:
     EthanolX is AMD's EPYC data center rerence platform, using an
     ASpeed AST2600 baseboard management controller.
 
  - Mediatek:
     Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook
     based on the MT8183 (Helio P60t) SoC.
 
  - Nvidia Tegra:
     ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
     tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
     Thanks to PostmarketOS, these can now run mainline kernels
     and become useful again.
 
     The Jetson Xavier NX Developer Kit uses a SoM and carrier board
     for the Tegra194, their latest 64-bit chip based on Carmel CPU
     cores and Volta graphics.
 
  - NXP i.MX:
     Five new boards based on the 32-bit i.MX6 series are added:
     The MYiR MYS-6ULX single-board computer, and four different
     models of industrial computers from Protonic.
 
  - Qualcomm:
     MikroTik RouterBoard 3011 is a rackmounted router based on the
     32-bit IPQ8064 networking SoC
     Three older phones get added, the Snapdragon 808 (msm8992) based
     Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
     Windows Phone, and the Snapdragon 810 (msm8994) based Sony
     Xperia Z5.
 
  - Renesas:
     In addition to the HiHope RZ/G2H board mentioned above, we gain
     support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
     RZ/G2N reference boards.
     Beacon EmbeddedWorks adds another SoM+Carrier development board
     for RZ/G2M.
 
  - Rockchips:
     Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it
     is based on, using the high-end 32-bit rk3288 SoC.
 
 Notable updates to existing platforms are usually for added on-chip
 peripherals, including:
 
  - ASpeed AST2xxx (various)
 
  - Allwinner (cpufreq, thermal, Pinephone touchscreen)
 
  - Amlogic Meson (audio, gpu dvdfs, board updates)
 
  - Arm Versatile
 
  - Broadcom (board updates for switch ports, Raspberry pi clock updates)
 
  - Hisilicon (various)
 
  - Intel/Altera SoCFPGA (various)
 
  - Marvell Armada 7xxx/8xxx (smmu)
 
  - Marvell MMP (GPU on mmp2/mmp3)
 
  - Mediatek mt8183 (USB, pericfg)
 
  - NXP Layerscape (VPU, thermal, DSPI)
 
  - NXP i.MX (VPU, bindings, board updates)
 
  - Nvidia Tegra194 (GPU)
 
  - Qualcomm (GPU, Interconnect, ...)
 
  - Renesas R-Car (SPI, IPMMU, board updates)
 
  - STMicroelectronics STM32 (various)
 
  - Samsung Exynos (various)
 
  - Socionext Uniphier (updates to serial, and pcie)
 
  - TI K3 (serdes, usb3, audio, sd, chipid)
 
  - TI OMAP (IPU/DSP remoteproc changes, dropping platform data)
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "As usual, there are many patches addressing minor issues in existing
  DTS files, such as DTC warnings, or adding support for additional
  peripherals.

  There are three added SoCs in existing product families:

   - Amazon:

     Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
     otherwise known as AL73400 or first-generation Graviton, and
     following the already supported Cortex-A1`5 and Cortex-A57 based
     Alpine chips. This one is added together with the official
     Evaluation platform.

   - Qualcomm:

     The Snapdragon SDM630 platform is a family of mid-range mobile
     phone chips from 2017 based on Cortex-A53 or Kryo 260 CPUs. A total
     of five end-user products are added based on these, all Android
     phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra.

   - Renesas:

     RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
     family, and apparently closely related to the RZ/G2N and RZ/G2M
     models we already support but has a faster GPU and additional
     on-chip peripherals. It is added along with the HopeRun HiHope
     RZ/G2H development board

  A small number of new boards for already supported SoCs also debut:

   - Allwinner sunxi:

     Only one new machine, revision v1.2 of the Pine64 PinePhone
     (non-Android) smartphone, containing minor changes compared to
     earlier versions.

   - Amlogic Meson:

     WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box

   - Aspeed:

     EthanolX is AMD's EPYC data center rerence platform, using an
     ASpeed AST2600 baseboard management controller.

   - Mediatek:

     Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook based
     on the MT8183 (Helio P60t) SoC.

   - Nvidia Tegra:

     ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
     tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
     Thanks to PostmarketOS, these can now run mainline kernels and
     become useful again.

     The Jetson Xavier NX Developer Kit uses a SoM and carrier board for
     the Tegra194, their latest 64-bit chip based on Carmel CPU cores
     and Volta graphics.

   - NXP i.MX:

     Five new boards based on the 32-bit i.MX6 series are added: The
     MYiR MYS-6ULX single-board computer, and four different models of
     industrial computers from Protonic.

   - Qualcomm:

     MikroTik RouterBoard 3011 is a rackmounted router based on the
     32-bit IPQ8064 networking SoC

     Three older phones get added, the Snapdragon 808 (msm8992) based
     Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
     Windows Phone, and the Snapdragon 810 (msm8994) based Sony Xperia
     Z5.

   - Renesas:

     In addition to the HiHope RZ/G2H board mentioned above, we gain
     support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
     RZ/G2N reference boards. Beacon EmbeddedWorks adds another
     SoM+Carrier development board for RZ/G2M.

   - Rockchips:

     Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it is
     based on, using the high-end 32-bit rk3288 SoC.

  Notable updates to existing platforms are usually for added on-chip
  peripherals, including:

   - ASpeed AST2xxx (various)

   - Allwinner (cpufreq, thermal, Pinephone touchscreen)

   - Amlogic Meson (audio, gpu dvdfs, board updates)

   - Arm Versatile

   - Broadcom (board updates for switch ports, Raspberry pi clock updates)

   - Hisilicon (various)

   - Intel/Altera SoCFPGA (various)

   - Marvell Armada 7xxx/8xxx (smmu)

   - Marvell MMP (GPU on mmp2/mmp3)

   - Mediatek mt8183 (USB, pericfg)

   - NXP Layerscape (VPU, thermal, DSPI)

   - NXP i.MX (VPU, bindings, board updates)

   - Nvidia Tegra194 (GPU)

   - Qualcomm (GPU, Interconnect, ...)

   - Renesas R-Car (SPI, IPMMU, board updates)

   - STMicroelectronics STM32 (various)

   - Samsung Exynos (various)

   - Socionext Uniphier (updates to serial, and pcie)

   - TI K3 (serdes, usb3, audio, sd, chipid)

   - TI OMAP (IPU/DSP remoteproc changes, dropping platform data)"

* tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (605 commits)
  arm64: dts: meson: odroid-n2: add jack audio output support
  arm64: dts: meson: odroid-n2: enable audio loopback
  ARM: dts: berlin: Align L2 cache-controller nodename with dtschema
  arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
  arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree
  arm64: dts: qcom: msm8992: Add RPMCC node
  arm64: dts: qcom: msm8992: Add PSCI support.
  arm64: dts: qcom: msm8992: Add PMU node
  arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
  arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
  arm64: dts: qcom: msm8992: Add a SCM node
  arm64: dts: qcom: msm8992: Add a proper CPU map
  arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
  arm64: dts: qcom: bullhead: Add qcom,msm-id
  arm64: dts: qcom: msm8992: Fix SDHCI1
  arm64: dts: qcom: msm8992: Modernize the DTS style
  arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
  arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
  arm64: dts: qcom: msm8994: Add support for SMD RPM
  arm64: dts: qcom: msm8992: Add a label to rpm-requests
  ...
2020-08-03 19:19:34 -07:00
Linus Torvalds a7b36c2b13 Fix a suspend/resume regression (crash) on TI AM3/AM4 SoC's.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'timers-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into master

Pull timer fix from Ingo Molnar:
 "Fix a suspend/resume regression (crash) on TI AM3/AM4 SoC's"

* tag 'timers-urgent-2020-07-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4
2020-07-25 13:27:12 -07:00
Tony Lindgren 6cfcd5563b clocksource/drivers/timer-ti-dm: Fix suspend and resume for am3 and am4
Carlos Hernandez <ceh@ti.com> reported that we now have a suspend and
resume regresssion on am3 and am4 compared to the earlier kernels. While
suspend and resume works with v5.8-rc3, we now get errors with rtcwake:

pm33xx pm33xx: PM: Could not transition all powerdomains to target state
...
rtcwake: write error

This is because we now fail to idle the system timer clocks that the
idle code checks and the error gets propagated to the rtcwake.

Turns out there are several issues that need to be fixed:

1. Ignore no-idle and no-reset configured timers for the ti-sysc
   interconnect target driver as otherwise it will keep the system timer
   clocks enabled

2. Toggle the system timer functional clock for suspend for am3 and am4
   (but not for clocksource on am3)

3. Only reconfigure type1 timers in dmtimer_systimer_disable()

4. Use of_machine_is_compatible() instead of of_device_is_compatible()
   for checking the SoC type

Fixes: 52762fbd1c ("clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support")
Reported-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Carlos Hernandez <ceh@ti.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200713162601.6829-1-tony@atomide.com
2020-07-21 15:48:33 +02:00
Tony Lindgren 4254632dba bus: ti-sysc: Add missing quirk flags for usb_host_hs
Similar to what we have for the legacy platform data, we need to
configure SWSUP_SIDLE and SWSUP_MSTANDBY quirks for usb_host_hs.

These are needed to drop the legacy platform data for usb_host_hs.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-13 09:59:47 -07:00
Tony Lindgren a55de41222 bus: ti-sysc: Do not disable on suspend for no-idle
If we have "ti,no-idle" specified for a module we must not disable
the the module on suspend to keep things backwards compatible.

Fixes: 386cb76681 ("bus: ti-sysc: Handle missed no-idle property in addition to no-idle-on-init")
Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-02 13:57:57 -07:00
Tony Lindgren afe6f1eeb0 bus: ti-sysc: Fix sleeping function called from invalid context for RTC quirk
With CONFIG_DEBUG_ATOMIC_SLEEP enabled we can see the following with RTC probe:

BUG: sleeping function called from invalid context at drivers/bus/ti-sysc.c:1736
...
(sysc_quirk_rtc) from [<c060d01c>] (sysc_write_sysconfig+0x1c/0x60)
(sysc_write_sysconfig) from [<c060d9f4>] (sysc_enable_module+0x11c/0x274)
(sysc_enable_module) from [<c060f37c>] (sysc_probe+0xe9c/0x1380)
(sysc_probe) from [<c06e9384>] (platform_drv_probe+0x48/0x98)

Fixes: e8639e1c98 ("bus: ti-sysc: Handle module unlock quirk needed for some RTC")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-02 10:47:43 -07:00
Tony Lindgren 9f91139250 bus: ti-sysc: Fix wakeirq sleeping function called from invalid context
With CONFIG_DEBUG_ATOMIC_SLEEP enabled we can see the following with
wakeirqs and serial console idled:

BUG: sleeping function called from invalid context at drivers/bus/ti-sysc.c:242
...
(sysc_wait_softreset) from [<c0606894>] (sysc_enable_module+0x48/0x274)
(sysc_enable_module) from [<c0606c5c>] (sysc_runtime_resume+0x19c/0x1d8)
(sysc_runtime_resume) from [<c0606cf0>] (sysc_child_runtime_resume+0x58/0x84)
(sysc_child_runtime_resume) from [<c06eb7bc>] (__rpm_callback+0x30/0x12c)
(__rpm_callback) from [<c06eb8d8>] (rpm_callback+0x20/0x80)
(rpm_callback) from [<c06eb434>] (rpm_resume+0x638/0x7fc)
(rpm_resume) from [<c06eb658>] (__pm_runtime_resume+0x60/0x9c)
(__pm_runtime_resume) from [<c06edc08>] (handle_threaded_wake_irq+0x24/0x60)
(handle_threaded_wake_irq) from [<c01befec>] (irq_thread_fn+0x1c/0x78)
(irq_thread_fn) from [<c01bf30c>] (irq_thread+0x140/0x26c)

We have __pm_runtime_resume() call the sysc_runtime_resume() with spinlock
held and interrupts disabled.

Fixes: d46f9fbec7 ("bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-02 10:22:41 -07:00
Arnd Bergmann 5b75f16f13 Fixes for omaps for v5.8
The recent display subsystem (DSS) related platform data changes caused
 display related regressions for suspend and resume. Looks like I only
 tested suspend and resume before dropping the legacy platform data, and
 forgot to test it after dropping it. Turns out the main issue was that
 we no longer have platform code calling pm_runtime_suspend for DSS like
 we did for the legacy platform data case, and that fix is still being
 discussed on the dri-devel list and will get merged separately. The DSS
 related testing exposed a pile other other display related issues that
 also need fixing though:
 
 - Fix ti-sysc optional clock handling and reset status checks
   for devices that reset automatically in idle like DSS
 
 - Ignore ti-sysc clockactivity bit unless separately requested
   to avoid unexpected performance issues
 
 - Init ti-sysc framedonetv_irq to true and disable for am4
 
 - Avoid duplicate DSS reset for legacy mode with dts data
 
 - Remove LCD timings for am4 as they cause warnings now that we're
   using generic panels
 
 Then there is a pile of other fixes not related to the DSS:
 
 - Fix omap_prm reset deassert as we still have drivers setting the
   pm_runtime_irq_safe() flag
 
 - Flush posted write for ti-sysc enable and disable
 
 - Fix droid4 spi related errors with spi flags
 
 - Fix am335x USB range and a typo for softreset
 
 - Fix dra7 timer nodes for clocks for IPU and DSP
 
 - Drop duplicate mailboxes after mismerge for dra7
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Merge tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.8

The recent display subsystem (DSS) related platform data changes caused
display related regressions for suspend and resume. Looks like I only
tested suspend and resume before dropping the legacy platform data, and
forgot to test it after dropping it. Turns out the main issue was that
we no longer have platform code calling pm_runtime_suspend for DSS like
we did for the legacy platform data case, and that fix is still being
discussed on the dri-devel list and will get merged separately. The DSS
related testing exposed a pile other other display related issues that
also need fixing though:

- Fix ti-sysc optional clock handling and reset status checks
  for devices that reset automatically in idle like DSS

- Ignore ti-sysc clockactivity bit unless separately requested
  to avoid unexpected performance issues

- Init ti-sysc framedonetv_irq to true and disable for am4

- Avoid duplicate DSS reset for legacy mode with dts data

- Remove LCD timings for am4 as they cause warnings now that we're
  using generic panels

Then there is a pile of other fixes not related to the DSS:

- Fix omap_prm reset deassert as we still have drivers setting the
  pm_runtime_irq_safe() flag

- Flush posted write for ti-sysc enable and disable

- Fix droid4 spi related errors with spi flags

- Fix am335x USB range and a typo for softreset

- Fix dra7 timer nodes for clocks for IPU and DSP

- Drop duplicate mailboxes after mismerge for dra7

* tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  Revert "bus: ti-sysc: Increase max softreset wait"
  ARM: dts: am437x-epos-evm: remove lcd timings
  ARM: dts: am437x-gp-evm: remove lcd timings
  ARM: dts: am437x-sk-evm: remove lcd timings
  ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes
  ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks
  ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag
  ARM: dts: Fix am33xx.dtsi USB ranges length
  bus: ti-sysc: Increase max softreset wait
  ARM: OMAP2+: Fix legacy mode dss_reset
  bus: ti-sysc: Fix uninitialized framedonetv_irq
  bus: ti-sysc: Ignore clockactivity unless specified as a quirk
  bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
  ARM: dts: omap4-droid4: Fix spi configuration and increase rate
  bus: ti-sysc: Flush posted write on enable and disable
  soc: ti: omap-prm: use atomic iopoll instead of sleeping one

Link: https://lore.kernel.org/r/pull-1591889257-410830@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:41:55 +02:00
Tony Lindgren 07c7b547a7 Linux 5.8-rc1
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Merge tag 'v5.8-rc1' into fixes

Linux 5.8-rc1
2020-06-16 09:25:03 -07:00
Tony Lindgren e4a8fc0543 Revert "bus: ti-sysc: Increase max softreset wait"
This reverts commit 636338d796.

This patch is not a proper fixes the i2c2 timeouts are still
happening in some cases.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-10 15:31:54 -07:00
Tony Lindgren 636338d796 bus: ti-sysc: Increase max softreset wait
Otherwise we can get "OCP softreset timed out" warnings occasionally
at least for i2c2 on omap4 now that we check the OCP softreset completed
bit on enable.

Reported-by: Merlijn Wajer <merlijn@wizzup.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-03 14:51:06 -07:00
Tony Lindgren 085bc0e576 bus: ti-sysc: Fix uninitialized framedonetv_irq
We are currently only setting the framedonetv_irq disabled for the SoCs
that don't have it. But we are never setting it enabled for the SoCs that
have it. Let's initialized it to true by default.

Fixes: 7324a7a0d5 ("bus: ti-sysc: Implement display subsystem reset quirk")
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-03 10:12:19 -07:00
Tony Lindgren 08b91dd6e5 bus: ti-sysc: Ignore clockactivity unless specified as a quirk
We must ignore the clockactivity bit for most modules and not set it
unless specified for the module with SYSC_QUIRK_USE_CLOCKACT. Otherwise
the interface clock can be automatically gated constantly causing
unexpected performance issues.

Fixes: ae9ae12e9d ("bus: ti-sysc: Handle clockactivity for enable and disable")
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-03 10:12:19 -07:00
Tony Lindgren d46f9fbec7 bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
Some modules reset automatically when idled, and when re-enabled, we must
wait for the automatic OCP softreset to complete. And if optional clocks
are configured, we need to keep the clocks on while waiting for the reset
to complete.

Let's fix the issue by moving the OCP softreset code to a separate
function sysc_wait_softreset(), and call it also from sysc_enable_module()
with the optional clocks enabled.

This is based on what we're already doing for legacy platform data booting
in _enable_sysc().

Fixes: 7324a7a0d5 ("bus: ti-sysc: Implement display subsystem reset quirk")
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-06-03 10:12:19 -07:00
Tony Lindgren 5ce8aee81b bus: ti-sysc: Flush posted write on enable and disable
Looks like we're missing flush of posted write after module enable and
disable. I've seen occasional errors accessing various modules, and it
is suspected that the lack of posted writes can also cause random reboots.

The errors we can see are similar to the one below from spi for example:

44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4CFG (Read): Data Access
in User mode during Functional access
...
mcspi_wait_for_reg_bit
omap2_mcspi_transfer_one
spi_transfer_one_message
...

We also want to also flush posted write for disable. The clkctrl clock
disable happens after module disable, and we don't want to have the
module potentially stay active while we're trying to disable the clock.

Fixes: d59b60564c ("bus: ti-sysc: Add generic enable/disable functions")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-30 20:41:01 -07:00
Tony Lindgren 1a5428119b bus: ti-sysc: Timers no longer need legacy quirk handling
As timers no longer need legacy quirk handling, let's move them to
the CONFIG_DEBUG section to make it easier to see which drivers still
need more work.

Let's also add detection for few more older timer revisions while at
it as that makes CONFIG_DEBUG output easier to read with proper names.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19 09:38:05 -07:00
Tony Lindgren 4bba9bf08f bus: ti-sysc: Ignore timer12 on secure omap3
Some early omap3 boards use timer12 for system timer, but for secure
SoCs like on n900 it's not accessible. Likely we will be configuring
unavailable devices for other SoCs too based on runtime SoC detection,
so let's use a switch to start with.

Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-05-19 09:38:03 -07:00
Tony Lindgren aef067e8e9 Merge branch 'fix-lcdc-quirk' into omap-for-v5.7/ti-sysc 2020-03-10 09:06:02 -07:00
Tony Lindgren cfaf6051ec bus: ti-sysc: Fix quirk flags for lcdc on am335x
Commit adb72394e2 ("ARM: OMAP2+: Drop legacy platform data for am3
lcdc") dropped legacy platform data but we never added the quirks for
SWSUP_SIDLE and SWSUP_MSTANDBY for lcdc for ti-sysc driver.

This breaks suspend/resume. Let's fix the issue by enabling the same
quirks for ti-sysc driver as we had earlier with platform data.

Fixes: adb72394e2 ("ARM: OMAP2+: Drop legacy platform data for am3 lcdc")
Fixes: 23731eac98 ("bus: ti-sysc: Detect devices on am335x when DEBUG is enabled")
Reported-by: Keerthy <j-keerthy@ti.com>
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-09 09:41:14 -07:00
Suman Anna b2745d92bb bus: ti-sysc: Add support for PRUSS SYSC type
The PRU-ICSS present on AM33xx/AM43xx/AM57xx has a very unique
SYSCFG register. The register follows the OMAP4-style SYSC_TYPE3
for Master Standby and Slave Idle, but also has two additional
unique fields - STANDBY_INIT and SUB_MWAIT. The STANDBY_INIT is
a control bit that is used to initiate a Standby sequence (when
set) and trigger a MStandby request to the SoC's PRCM module. This
same bit is also used to enable the OCP master ports (when cleared)
to allow the PRU cores to access any peripherals or memory beyond
the PRU subsystem. The SUB_MWAIT is a ready status field for the
external access.

Add support for this SYSC type. The STANDBY_INIT has to be set
during suspend, without which it results in a hang in the resume
sequence on AM33xx/AM43xx boards and requires a board reset to
come out of the hang. Any PRU applications requiring external
access are supposed to clear the STANDBY_INIT bit. Note that
the PRUSS context is lost during a suspend sequence because the
PRUSS module is reset and/or disabled.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
[tony@atomide.com: updated quirk define number and to use -ENODEV]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 07:54:57 -08:00
Tony Lindgren 25bfaaa73c bus: ti-sysc: Detect EDMA and set quirk flags for tptc
In order to probe EDMA with ti-sysc interconnect target module and with
device tree data, we need to properly detect EDMA and set the flags for
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY for tptc.

We have these flags currently set for am4 and dra7, but not for am335x.
Let's set them for all the SoCs as the tptc module should behave the
same for all of them. It's likely that am335x was never tested to idle
EDMA tptc.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04 07:23:45 -08:00
Tony Lindgren 69e60903aa bus: ti-sysc: Fix wrong offset for display subsystem reset quirk
Commit 7324a7a0d5 ("bus: ti-sysc: Implement display subsystem reset
quirk") added support for DSS reset, but is using dispc offset also for
DSS also registers as reported by Tomi Valkeinen <tomi.valkeinen@ti.com>.
Also, we're not using dispc_offset for dispc IRQSTATUS register so let's
fix that too.

Fixes: 7324a7a0d5 ("bus: ti-sysc: Implement display subsystem reset quirk")
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-03 07:41:08 -08:00
Tony Lindgren 7324a7a0d5 bus: ti-sysc: Implement display subsystem reset quirk
The display subsystem (DSS) needs the child outputs disabled for reset.
In order to prepare to probe DSS without legacy platform data, let's
implement sysc_pre_reset_quirk_dss() similar to what we have for the
platform data with omap_dss_reset().

Note that we cannot directly use the old omap_dss_reset() without
platform data callbacks and updating omap_dss_reset() to understand
struct device. And we will be dropping omap_dss_reset() anyways when
all the SoCs are probing with device tree, so let's not mess with the
legacy code at all.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:03:36 -08:00
Tony Lindgren 77dfece2e6 bus: ti-sysc: Detect display subsystem related devices
In order to prepare probing display subsystem (DSS) with ti-sysc
interconnect target module driver and device tree data, let's
detect DSS related modules.

We need to also add reset quirk handling for DSS, but until that's
done, let's just enable the optional clock quirks for DSS and
omap4 HDMI. The rest is just naming of modules if CONFIG_DEBUG
is set.

Cc: Jyri Sarha <jsarha@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:03:35 -08:00
Tony Lindgren e8639e1c98 bus: ti-sysc: Handle module unlock quirk needed for some RTC
The RTC modules on am3 and am4 need quirk handling to unlock and lock
them for reset so let's add the quirk handling based on what we already
have for legacy platform data. In later patches we will simply drop the
RTC related platform data and the old quirk handling.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:03:35 -08:00
Tony Lindgren feaa8baee8 bus: ti-sysc: Implement SoC revision handling
We need to know SoC type and features for cases where the same SoC
may be installed in various versions on the same board and would need
a separate dts file otherwise for the different variants.

For example, am3703 is pin compatible with omap3630, but has sgx and
iva accelerators disabled. We must not try to access the sgx or iva
module registers on am3703, and need to set the unavailable devices
disabled early.

Let's also detect omap3430 as that is needed for display subsystem
(DSS) reset later on, and GP vs EMU or HS devices. Further SoC
specific disabled device detection can be added as needed, such as
dra71x vs dra76x rtc and usb4.

Cc: Adam Ford <aford173@gmail.com>
Cc: André Hentschel <nerv@dawncrow.de>
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:03:35 -08:00
Tony Lindgren 7320fd322f bus: ti-sysc: Don't warn about legacy property for nested ti-sysc devices
In some cases we can have nested ti-sysc instances that may still use the
legacy "ti,hwmods" property. Let's not warn if that's the case.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:03:35 -08:00
Tony Lindgren 590e15c76f bus: ti-sysc: Consider non-existing registers too when matching quirks
We are currently setting -1 for non-existing sysconfig related registers
for quirks, but setting -ENODEV elsewhere. And for matching the quirks,
we're now just ignoring the non-existing registers. This will cause issues
with misdetecting DSS registers as the hardware revision numbers can have
duplicates.

To avoid this, let's standardize on using -ENODEV also for the quirks
instead of -1. That way we can always just test for a match without adding
any more complicated logic.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:03:35 -08:00
Tony Lindgren ab4d309d87 bus: ti-sysc: Improve reset to work with modules with no sysconfig
At least display susbsystem (DSS) has modules with no sysconfig registers
and rely on custom function for module reset handling. Let's make reset
work with that too.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26 10:03:35 -08:00