Commit Graph

13 Commits

Author SHA1 Message Date
Robert Hancock 9b13ff4340 clk: si5341: Add sysfs properties to allow checking/resetting device faults
Add sysfs property files to allow viewing the current and latched states of
the input present and PLL lock bits, and allow resetting the latched fault
state. This allows manual checks or automated userspace polling for faults
occurring after initialization.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-10-robert.hancock@calian.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:15 -07:00
Robert Hancock 2f02c5e42a clk: si5341: Add silabs,iovdd-33 property
Add a property to allow specifying that the external I2C IO pins are using
3.3V voltage thresholds rather than 1.8V.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-9-robert.hancock@calian.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:15 -07:00
Robert Hancock ab89a3439f clk: si5341: Add silabs,xaxb-ext-clk property
Add a property to allow specifying that the device XA/XB pins are used for
an external clock input rather than for a clock crystal.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-8-robert.hancock@calian.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:14 -07:00
Robert Hancock b7bbf6ec49 clk: si5341: Allow different output VDD_SEL values
The driver was not previously programming the VDD_SEL values for each
output to indicate what external VDDO voltage was used for each. Add
ability to specify a regulator supplying the VDDO pin for each output of
the device. The voltage of the regulator is used to automatically set the
VDD_SEL value appropriately. If no regulator is specified and the chip is
being reconfigured, assume 2.5V which appears to be the chip default.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-7-robert.hancock@calian.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:14 -07:00
Robert Hancock 3c9b49b003 clk: si5341: Update initialization magic
Update the default register settings to include the VCO_RESET_CALCODE
settings (set by the SiLabs ClockBuilder software but not described in
the datasheet). Also update part of the initialization sequence to match
ClockBuilder and the datasheet.

Fixes: 3044a860fd ("clk: Add Si5341/Si5340 driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-6-robert.hancock@calian.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:14 -07:00
Robert Hancock 71dcc4d1f7 clk: si5341: Check for input clock presence and PLL lock on startup
After initializing the device, wait for it to report that the input
clock is present and the PLL has locked before declaring success.

Fixes: 3044a860fd ("clk: Add Si5341/Si5340 driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-5-robert.hancock@calian.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:14 -07:00
Robert Hancock 78f6f40602 clk: si5341: Avoid divide errors due to bogus register contents
If the Si5341 is being initially programmed and has no stored NVM
configuration, some of the register contents may contain unexpected
values, such as zeros, which could cause divide by zero errors during
driver initialization. Trap errors caused by zero registers or zero clock
rates which could result in divide errors later in the code.

Fixes: 3044a860fd ("clk: Add Si5341/Si5340 driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-4-robert.hancock@calian.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:14 -07:00
Robert Hancock 6e7d2de1e0 clk: si5341: Wait for DEVICE_READY on startup
The Si5341 datasheet warns that before accessing any other registers,
including the PAGE register, we need to wait for the DEVICE_READY register
to indicate the device is ready, or the process of the device loading its
state from NVM can be corrupted. Wait for DEVICE_READY on startup before
continuing initialization. This is done using a raw I2C register read
prior to setting up regmap to avoid any potential unwanted automatic PAGE
register accesses from regmap at this stage.

Fixes: 3044a860fd ("clk: Add Si5341/Si5340 driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Link: https://lore.kernel.org/r/20210325192643.2190069-3-robert.hancock@calian.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-27 19:58:14 -07:00
Krzysztof Kozlowski 84afc9ecf4 clk: si5341: drop unused 'err' variable
'err' is assigned but never read:

  /drivers/clk/clk-si5341.c: In function ‘si5341_output_get_parent’:
  drivers/clk/clk-si5341.c:886:6: warning: variable ‘err’ set but not used [-Wunused-but-set-variable]

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200916161740.14173-5-krzk@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-09-22 12:44:41 -07:00
Mike Looijmans f9eec2ea78 clk: clk-si5341: Add support for the Si5345 series
Add support for the Si5342, Si5344 and Si5345 chips. These are equivalent
to the Si5341 family, but with more clock input options (which are not
supported yet by this driver).

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Link: https://lkml.kernel.org/r/20200507061544.11388-1-mike.looijmans@topic.nl
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-05-28 21:00:51 -07:00
Mike Looijmans 692751879e clk, clk-si5341: Support multiple input ports
The Si5341 and Si5340 have multiple input clock options. So far, the driver
only supported the XTAL input, this adds support for the three external
clock inputs as well.

If the clock chip isn't programmed at boot, the driver will default to the
XTAL input as before. If there is no "xtal" clock input available, it will
pick the first connected input (e.g. "in0") as the input clock for the PLL.
One can use clock-assigned-parents to select a particular clock as input.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Link: https://lkml.kernel.org/r/20200107075340.14528-1-mike.looijmans@topic.nl
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-01-28 13:05:54 -08:00
Colin Ian King e2f2402f3b clk: Si5341/Si5340: remove redundant assignment to n_den
The variable n_den is initialized however that value is never read
as n_den is re-assigned a little later in the two paths of a
following if-statement.  Remove the redundant assignment.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lkml.kernel.org/r/20190701165020.19840-1-colin.king@canonical.com
Acked-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-07 14:23:24 -07:00
Mike Looijmans 3044a860fd clk: Add Si5341/Si5340 driver
Adds a driver for the Si5341 and Si5340 chips. The driver does not fully
support all features of these chips, but allows the chip to be used
without any support from the "clockbuilder pro" software.

If the chip is preprogrammed, that is, you bought one with some defaults
burned in, or you programmed the NVM in some way, the driver will just
take over the current settings and only change them on demand. Otherwise
the input must be a fixed XTAL in its most basic configuration (no
predividers, no feedback, etc.).

The driver supports dynamic changes of multisynth, output dividers and
enabling or powering down outputs and multisynths.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
[sboyd@kernel.org: Mark some things static, use BIT_ULL for big bits and
ULL for big constants]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-06-27 14:06:47 -07:00