Commit Graph

15 Commits

Author SHA1 Message Date
Quentin Schulz b9107d3798 ARM: sun5i: chip: enable battery power supply subnode
The NextThing Co. CHIP has an AXP209 PMIC with battery connector.

This enables the battery power supply subnode.

Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-14 08:32:32 +02:00
Quentin Schulz 3472307584 ARM: sun5i: chip: enable ACIN power supply subnode
The NextThing Co. CHIP has an AXP209 PMIC and can be power-supplied by
ACIN via the CHG-IN pin.

This enables the ACIN power supply subnode in the DT.

Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-27 13:40:00 +02:00
Maxime Ripard e6f50b223d ARM: sun5i: Rename UART3 flow control pins
The UART3 pin group for the CTS and RTS signals doesn't follow our usual
pattern. Rename it so that it matches.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-06 07:40:36 +01:00
Maxime Ripard 1edcd36fcb ARM: sunxi: Convert pinctrl nodes to generic bindings
Now that we can handle the generic pinctrl bindings, convert our DT to it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26 08:27:11 +01:00
Maxime Ripard 119c366aea ARM: sunxi: Remove useless allwinner,pull property
The allwinner,pull property set to NO_PULL was really considered our
default (and wasn't even changing the default value in the code).

Remove these properties to make it obvious that we do not set anything in
such a case.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26 08:24:50 +01:00
Maxime Ripard d312f6fb80 ARM: sunxi: Remove useless allwinner,drive property
The allwinner,drive property set to 10mA was really considered as our
default. Remove all those properties entirely to make that obvious.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-26 08:24:50 +01:00
Maxime Ripard 77df9d66b0 ARM: sun5i: chip: Add optional buses
The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not
explicitly dedicated to anything.

Add them to the DTS with the muxing already set, but keep them disabled.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-11-22 15:33:57 +01:00
Antoine Tenart 74194620ad ARM: sun5i: chip: add a node for the w1 gpio controller
The CHIP uses a 1-Wire bus to discover the DIPs. Enable the bus in the DT.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-22 15:33:54 +01:00
Maxime Ripard bb1ea8bf1b ARM: sun5i: chip: Enable Wi-Fi SDIO chip
The WiFi chip is powered through a GPIO and two regulators in parallel.
Since that case is not supported yet, just set them as always on before we
rework the regulator framework to deal with those.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-11-22 15:33:54 +01:00
Maxime Ripard 3d3f05e643 ARM: sun5i: chip: Add status LED
The CHIP has a status LED connected to one of the AXP GPIOs. Add the
gpio-leds node to be able to use the proper LED framework to control it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-22 15:16:49 +02:00
Boris Brezillon 5fc39d3472 ARM: sunxi/dt: make the CHIP inherit from allwinner,sun5i-a13
The sun4i-timer driver registers its sched_clock only if the machine is
compatible with "allwinner,sun5i-a13", "allwinner,sun5i-a10s" or
"allwinner,sun4i-a10".
Add the missing "allwinner,sun5i-a13" string to the machine compatible.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 465a225fb2 ("ARM: sun5i: Add C.H.I.P DTS")
Cc: <stable@vger.kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-06-16 09:56:36 +02:00
Maxime Ripard 8be0fca6dd ARM: sun5i: chip: Enable the TV Encoder
The CHIP has a composite output available muxed with the microphone in the
micro-jack plug.

Enable the composite output in its DTS.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-05-04 20:00:55 +02:00
Maxime Ripard db30fce1ee ARM: sun5i: chip: Add CPU regulator for cpufreq
The current DT doesn't have a phandle to the CPU regulator in the CPU node,
which disables the CPU voltage scaling entirely.

Add that phandle.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-01-25 00:01:21 +01:00
Maxime Ripard e54693ed82 ARM: sun5i: chip: Enable the audio codec
The CHIP v0.2 has a composite output on a mini-jack connector, the audio
part being provided by the on-SoC codec. Enable it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2015-10-22 10:55:53 +02:00
Maxime Ripard 465a225fb2 ARM: sun5i: Add C.H.I.P DTS
The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack
and two connectors to plug additional boards on top of it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2015-10-12 11:33:36 +02:00