Commit Graph

1574 Commits

Author SHA1 Message Date
Huang Rui 6bb6b2972d drm/amdgpu: add powercontainment module parameter
This patch makes powercontainment feature configurable. Currently, the
powercontainment is not very stable, so add a module parameter to
enable/disable it via user mode.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:55 -04:00
Christian König c5f74f7802 drm/amdgpu: fix and cleanup job destruction
Remove the job reference counting and just properly destroy it from a
work item which blocks on any potential running timeout handler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:54 -04:00
Christian König f42d20a942 drm/amdgpu: move locking into the functions who need it
Otherwise the locking becomes rather confusing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:53 -04:00
Christian König 0e51a772e2 drm/amdgpu: properly abstract scheduler timeout handling
The driver shouldn't mess with the scheduler internals.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:53 -04:00
Christian König 1e24e31f22 drm/amdgpu: remove use_shed hack in job cleanup
Remembering the code path in a variable to cleanup
differently is usually not a good idea at all.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:52 -04:00
Christian König 1ab0d211f3 drm/amdgpu: fix coding style in amdgpu_job_free
Ther should be a new line between code and decleration.
Also use amdgpu_ib_free() instead of releasing the member manually.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:52 -04:00
Christian König 20df080da2 drm/amdgpu: remove duplicated timeout callback
No need for double housekeeping here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:51 -04:00
Christian König 7392c329ee drm/amdgpu: remove begin_job/finish_job
Completely pointless and confusing to use a callback
to call into the same code file.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:50 -04:00
Christian König 16a7133f35 drm/amdgpu: fix coding style in the scheduler v2
v2: fix even more

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk.Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:50 -04:00
Eric Huang 3cc259112d drm/amdgpu: add the CI code to enable sclk OD(OverDrive)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:49 -04:00
Eric Huang 19fbc43a86 drm/amdgpu: add the CI code to enable clock level selection
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:48 -04:00
Eric Huang 8b2e574dc4 drm/amdgpu: add the new common pm code to support sclk OD
This extends OD (OverDrive) support to the non-Powerplay code paths.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:48 -04:00
Eric Huang c85e299ff9 drm/amdgpu: add the new common pm code to select the clock levels
This extends dpm clock level selection to the non-powerplay code paths.
This interface can be used to select individual clock levels.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:47 -04:00
Tom St Denis 9bf51b0719 drm/amdgpu/gfx8: Enable GFX PG on CZ
Based on Alex's patches this enables GFX PG on CZ.

Tested with xonotic-glx/glxgears/supertuxkart and idle desktop.
Also read-back registers via umr for verificiation that the bits
are truly enabled.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:47 -04:00
Alex Deucher 7ba0eb6df9 drm/amdgpu/gfx8: clean up polaris11 PG enable
Fix the logic for enabling/disabling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:46 -04:00
Alex Deucher 2c54716563 drm/amdgpu/gfx8: add powergating support for CZ/ST
This implements powergating support for CZ/ST asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:45 -04:00
Alex Deucher 6b0432b703 drm/amdgpu: add new GFX powergating types
Add some new GFX powergating flags.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:45 -04:00
Alex Deucher c2546f55dd drm/amdgpu/gfx8: rename some pg functions
So they can be shared with other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:44 -04:00
Alex Deucher fb16007bf0 drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating
This sets up the CP jump table and GDS buffer and sets the
PG state registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:44 -04:00
Alex Deucher e36091edd3 drm/amdgpu/gfx7: expand cp jt size to handle GDS as well
The size needs to handle the CP JT and GDS.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:42 -04:00
Eric Huang 09a0426404 drm/amd/powerplay: add sclk OD support on Polaris10
This implements sclk overdrive(OD) overclocking support for Polaris10,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:42 -04:00
Eric Huang 9ccd4e1346 drm/amd/powerplay: add sclk OD support on Tonga
This implements sclk overdrive(OD) overclocking support for Tonga,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:41 -04:00
Eric Huang decb5fb6f2 drm/amd/powerplay: add sclk OD support on Fiji
This implements sclk overdrive(OD) overclocking support for Fiji,
and the maximum overdrive percentage is 20.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:41 -04:00
Eric Huang 428bafa86c drm/amdgpu: add powerplay sclk OD support through sysfs (v2)
Add a new sysfs entry pp_sclk_od to support sclk overdrive(OD) overclocking,
the entry is read/write, the value of input/output is an integer which is the
over percentage of the highest sclk.

v2: drop extra semicolon

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:40 -04:00
Alex Deucher 2254c21982 drm/amdgpu: load different smc firmware on some CI variants
The power tables on some variants require different firmware.
This fixes stability issues on some newer CI parts.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91880

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:38 -04:00
Monk Liu cc7d8c7979 drm/amdgpu: clear RB at ring init
This help fix reloading driver hang issue of SDMA
ring.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:37 -04:00
Dave Airlie 542d972221 Linux 4.7-rc5
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 heKTli8X73gsFB25odeIbIt0jAoSiiMYWDrWqLNsuUV1tjEYVA8rH0SM94FiOC/5
 7WVWXLTuH+Rm7JHP18BnKxmMMbzrTFmwisLMqFKyfZRRSlS+/ix7iLUNO9AFa39B
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 =iLte
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Back-merge tag 'v4.7-rc5' into drm-next

Linux 4.7-rc5

The fsl-dcu pull needs -rc3 so go to -rc5 for now.
2016-07-02 15:56:01 +10:00
Daniel Vetter a104299b94 drm/amdkfd: Clean up inline handling
- inline functions need to be static inline, otherwise gcc can opt to
  not inline and the linker gets unhappy.
- no forward decls for inline functions, just include the right headers.

Cc: Oded Gabbay <oded.gabbay@gmail.com>
Cc: Ben Goz <ben.goz@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1466500235-21282-2-git-send-email-daniel.vetter@ffwll.ch
2016-06-21 21:32:52 +02:00
Rex Zhu 270d013659 drm/amd/powerplay: enable clock stretch feature for polaris
Power saving feature which reduces the amount of
voltage needed for specific engine clocks.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:42 -04:00
Rex Zhu 92d1576859 drm/amdgpu/gfx8: update golden setting for polaris10
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:42 -04:00
Rex Zhu 432c3a3ca7 drm/amd/powerplay: enable avfs feature for polaris
avfs feature is for voltage control based on
gpu system clock on polaris10

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:41 -04:00
Rex Zhu c11cb70483 drm/amdgpu/atombios: add avfs struct for Polaris10/11
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:41 -04:00
Rex Zhu 31b2124377 drm/amd/powerplay: add avfs related define for polaris
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:40 -04:00
Rex Zhu 9a3c1b342b drm/amd/powrplay: enable stutter_mode for polaris.
To minimize the dram power expenditure during static -screen

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:40 -04:00
Rex Zhu 40787ef21c drm/amd/powerplay: disable UVD SMU handshake for MCLK.
sync up with internal programming recommendations.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:39 -04:00
Rex Zhu a2fb4934e9 drm/amd/powerplay: initialize variables which were missed.
Missing pcie dpm settings.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:38 -04:00
Rex Zhu 919e334dec drm/amd/powerplay: enable PowerContainment feature for polaris10/11.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:38 -04:00
Rex Zhu 0a4fef559b drm/amd/powerplay: need to notify system bios pcie device ready
before request performance state.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-06-21 10:22:37 -04:00
Rex Zhu 576b4401b1 drm/amd/powerplay: fix bug that function parameter was incorect.
Wrong value passed to acpi_pcie_perf_request.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-06-21 10:22:37 -04:00
Rex Zhu 1d7b84d12a drm/amd/powerplay: fix logic error.
the error lead powerplay can't get display info in DGPU case.
store_cc6_data just implement in APU.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-06-21 10:22:29 -04:00
Nicolas Iooss 29b9c528b8 drm/amdgpu: initialize amdgpu_cgs_acpi_eval_object result value
amdgpu_cgs_acpi_eval_object() returned the value of variable "result"
without initializing it first.

This bug has been found by compiling the kernel with clang.  The
compiler complained:

    drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:972:14: error: variable
    'result' is used uninitialized whenever 'for' loop exits because its
    condition is false [-Werror,-Wsometimes-uninitialized]
            for (i = 0; i < count; i++) {
                        ^~~~~~~~~
    drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:1011:9: note: uninitialized
    use occurs here
            return result;
                   ^~~~~~
    drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:972:14: note: remove the
    condition if it is always true
            for (i = 0; i < count; i++) {
                        ^~~~~~~~~
    drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c:864:12: note: initialize the
    variable 'result' to silence this warning
            int result;
                      ^
                       = 0

Fixes: 3f1d35a03b ("drm/amdgpu: implement new cgs interface for acpi
function")
Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-20 17:09:39 -04:00
Dan Carpenter 48a70e1ca8 drm/amdgpu: precedence bug in amdgpu_device_init()
! has higher precedence than bitwise & so we need to add parenthesis
for this to work as intended.

Fixes: 048765ad5a ('amdgpu: fix asic initialization for virtualized environments (v2)')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-20 17:06:10 -04:00
Alex Deucher 0b10029d82 drm/amdgpu: fix num_rbs exposed to userspace (v2)
This was accidently broken for harvest cards when the
code was refactored for Polaris support.

v2: multiply by shader engines.  Noticed by Nicolai.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-06-17 14:25:46 -04:00
Dan Carpenter 041bf02255 drm/amdgpu: missing bounds check in amdgpu_set_pp_force_state()
There is no limit on high "idx" can go.  It should be less than
ARRAY_SIZE(data.states) which is 16.

The "data" variable wasn't declared in that scope so I shifted the code
around a bit to make it work.  Also I made "idx" unsigned.

Fixes: f3898ea12f ('drm/amd/powerplay: add some sysfs interfaces for powerplay.')
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-17 13:50:10 -04:00
Rex Zhu 871fd8403d drm/amd/powerplay: select samu dpm 0 as boot level on polaris.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-15 02:00:54 -04:00
Rex Zhu 3ff211270a drm/amd/powerplay: update powerplay table parsing
to handle pptable format change on Polaris boards

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-15 02:00:46 -04:00
Alex Deucher 7c4021d403 Revert "drm/amdgpu: add pipeline sync while vmid switch in same ctx"
This reverts commit 2ba272d7bd.

The issue fixed by this patch is specific to compute rings and the
previous patch was enough.  Additionally, this patch as been traced
to strange behavior on some CZ systems so we might as well drop it.
2016-06-13 18:59:17 -04:00
Alex Deucher 8b18300c13 drm/amdgpu/gfx7: fix broken condition check
Wrong operator.

Reported-by: David Binderman <linuxdev.baldrick@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-06-13 18:26:24 -04:00
Andres Rodriguez 048765ad5a amdgpu: fix asic initialization for virtualized environments (v2)
When executing in a PCI passthrough based virtuzliation environemnt, the
hypervisor will usually attempt to send a PCIe bus reset signal to the
ASIC when the VM reboots. In this scenario, the card is not correctly
initialized, but we still consider it to be posted. Therefore, in a
passthrough based environemnt we should always post the card to guarantee
it is in a good state for driver initialization.

However, if we are operating in SR-IOV mode it is up to the GIM driver
to manage the asic state, therefore we should not post the card (and
shouldn't be able to do it either).

v2: add missing semi-colon

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andres.rodriguez@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-13 15:25:20 -04:00
Gustavo Padovan 27377a1ce7 drm/amdgpu: use crtc directly in drm_crtc_vblank_put()
We don't need to use &amdgpu_crtc->base there as crtc is available
in the function.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1465308482-15104-9-git-send-email-gustavo@padovan.org
2016-06-13 18:38:06 +02:00