There is simply no reason to be manually setting the private driver
data to NULL in the remove/fail to probe cases. This is just extra
cruft code that can be removed.
A few notes:
* Nothing relies on drvdata being set to NULL.
* The __device_release_driver() function eventually calls
dev_set_drvdata(dev, NULL) anyway, so there's no need to do it
twice.
* I verified that there were no cases where xxx_get_drvdata() was
being called in these drivers and checking for / relying on the NULL
return value.
This could be cleaned up kernel-wide but for now just take the baby
step and remove from the i2c subsystem.
Reported-by: Wolfram Sang <wsa@the-dreams.de>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
TWI bit mask macros are moved to twi head file.
Depend on commit 61c16b5c74
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Current driver was developed based on BF537 0.2 HRM. In high system load, BUFRDERR error
interrupt may be raised if XMTSERV interrupt of last TX byte is not served in time
(set RSTART bit), which breaks restart tranfer as expected.
"Buffer Read Error (BUFRDERR)" description in Blackfin HRM only applys to BF537
rev. < 0.3. In later rev. and later announced Blackfin chips, such as BF527 and
BF548, a new TWI master feature "Clock Stretching" is added into the TWI controller,
BUFRDERR interrupt is not triggered after TX FIFO is empty.
This patch sets RSTART bit at the beginning of the first transfer. The SCL and SDA
is hold till XMTSERV interrupt of last TX byte is served. Restart transfer is not broken
in high system load.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
[wsa: fixed spaces around operators]
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
In order to mark I2C transfer fail when MEN bit in I2C controller is
reset unexpectedly in MCOMP interrupt, interrupt status bits XMTSERV or
RCVSERV should be checked.
Master Transfer Complete (MCOMP).
[1] The initiated master transfer has completed. In the absence of a
repeat start, the bus has been released.
[0] The completion of a transfer has not been detected.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
[wsa: fixed spaces around operators and typo in commit message]
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Some fault i2c device may hold the sda/scl line and cause i2c driver
wait in the BUS busy loop. The I2C framework already retry the
transfer loop before timeout. Return -EAGAIN instead of pull BUSBUSY
in the other loop.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
For transfer counts > 255 bytes i2c-bfin-twi sets the data
transfer counter DCNT to 0xFF indicating unlimited transfers.
It then uses a flag iface->manual_stop to manually issue the STOP
condition, once the required amount of bytes are received.
We found that on I2C receive operation issuing the STOP condition
together with a FULL RCV FIFO (2bytes) will cause SDA and SCL be
constantly driven low.
This patch stops receiving operation immediately in last rx interrupt.
This patch also wakes up waiting process when transfer completes.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
For transfer counts > 255 bytes i2c-bfin-twi sets the data
transfer counter DCNT to 0xFF indicating unlimited transfers.
It then uses a flag iface->manual_stop to manually issue the STOP
condition, once the required amount of bytes are received.
We found that on I2C receive operation issuing the STOP condition
together with a FULL RCV FIFO (2bytes) will cause SDA and SCL be
constantly driven low.
Temporary workaround until further investigation:
Discard the RCV FIFO before issuing the STOP condition.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Make the Blackfin On-Chip Two Wire Interface driver define its PM
callbacks through a struct dev_pm_ops object rather than by using
legacy PM hooks in struct platform_driver.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled
and we even check and yell when an interrupt handler
returns with interrupts enabled (see commit [b738a50a:
genirq: Warn when handler enables interrupts]).
So now this flag is a NOOP and can be removed.
Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Barry Song <21cnbao@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Sometimes, the first I2C transmit interrupt is not serviced in time (like
when higher priority interrupts take too long). Since the RESTART bit is
not set before the next I2C clock, when the TWI handler is finally called,
the I2C session is aborted (MEM bit is reset) and both SMITSERV and MCOMP
int status bits are set.
So when this happens, abort the transfer.
Reported-by: Isabelle Leonardi <i.leonardi@detracom.fr>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Some systems using this bus sometimes have very basic devices such as
regulators on the bus, so the I2C bus master needs to be loaded early.
This also matches the behavior of many other I2C bus master drivers.
Therefore initialize via subsys_initcall().
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Faulty slave devices might drive SDA low after a transfer finishes. So,
when this scenario is detected, have the master generate up to 9 extra
clocks until the SDA is properly released.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
A smbus quick transfer has no data after the address byte.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
i2c event of next read/write byte may trigger before current int state
is cleared in the interrupt handler. So, this should be done at the
beginning of interrupt handler to avoid losing new i2c events.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add some debug() code to decode the error register.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
There isn't much point in managing our own custom timeout timer when the
completion interface already includes support for it. This makes the
resulting code much simpler and robust.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
Calculation of the CLKDIV speed setting should be done using base 10 math
rather than base 2. We also avoid exceeding the spec due to integer
truncation and a 50% duty cycle.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This replace all instances in the i2c busses tree of
res->end - res->start + 1 with the handy macro resource_size(res)
from ioport.h (coming in from platform_device.h).
This was created with a simple
sed -i -e 's/\([a-z]*\)->end *- *[a-z]*->start *+ *1/resource_size(\1)/g'
Then manually replacing the PXA redefiniton of the same kind
of macro manually. Recompiled some ARM defconfigs I could find to
make a rough test so it shouldn't break anything, though I
couldn't see exactly which configs you need for all the drivers.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Rather than relying on some of the headers implicitly pulling in io.h,
pull it in explicitly our self for ioremap() and friends.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Some drivers need i2c_smbus_read_i2c_block_data() functionality, so add
support for it to the Blackfin I2C bus driver.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
[ben-linux@fluff.org: shortened subject]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We have a custom BF537 board with an I2C RTC (MAX DS3231) running
uclinux 2007R1 for some time. Recently during migration to 2008R1.5-RC3
we losted access to the RTC. The RTC driver calls 'i2c_transfer()' which
in turns calls 'bfin_twi_master_xfer()' in i2c-bfin-twi.c.
Compared with 2007R1, it looks like the 2008R1.5 version of i2c-bin-twi.c
has a new mode 'TWI_I2C-MODE_REPEAT' which corresponds to the Repeat Start
Condition described in the HRM. However, according to the HRM, at XMIT or
RECV interrupt and when the data count is 0, not only is the RESTART bit
supposed to be set, but MDIR must also be set if the next operation is a
receive sequence, and cleared if not. Currently there is no code that looks
at the I2C_M_RD bit in the flag from the next cur_msg and set/clear the MDIR
flag accordingly at the same time that the RSTART bit is set. Instead, MDIR
is set or cleared (by OR'ing with 0?) after the RESTART bit has been cleared
during handling of MCOMP interrupt.
It appears that this is causing our failure with reading the RTC, as a
quick patch to set/clear MDIR when RESTART is set seem to solve our problem.
Signed-off-by: Frank Shew <fshew@geometrics.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
[ben-linux@fluff.org: shorted subject]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Avoid rewrite TWI MASTER_CTL reg when issue next message
In i2c repeat transfer mode, byte count of next message should be filled
into part of the TWI MASTER_CTL reg when interrupt MCOMP of last
message transfer is triggered. But, other bits in this reg should
not be touched.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
[ben-linux@fluff.org: shorted subject]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Make sure we don't end up with an invalid CLKDIV=0 in case someone
specifies 20kHz SCL or less (5 * 1024 / 20 = 0x100).
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
[ben-linux@fluff.org: shortened subject line]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
I2C_CLASS_ALL is almost never what bus driver authors really want.
These i2c classes are really only about which devices must be probed,
not what devices can be present. As device drivers get converted to the
new i2c device driver model, only a few device types will keep relying
on probing.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Sonic Zhang <sonic.zhang@analog.com>
PM_SUSPEND_MEM: Blackfin does not maintain register state through
Hibernate. Save and restore peripheral base initialization during
PM transitions.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Since 43cc71eed1, the platform
modalias is prefixed with "platform:". Add MODULE_ALIAS() to the
hotpluggable I2C platform drivers, to allow module auto loading.
[ db: add some more drivers ]
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Blackfin TWI controller hardware pin should be requested from GPIO port controller
Before BF54x, there is no need to do this. But as long as BF54x and BF52x
are supported by this generic driver, the missing pin mux operation should be
added.
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
- Dynamic alloc the resource of TWI driver data according to board information
- TWI register read/write accessor based on dynamic regs_base
- Support TWI0/TWI1 for BF54x
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
- Create a new mode TWI_I2C_MODE_REPEAT.
- No change to smbus operation.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
All the users of this driver explicitly specify the I2C bus numbers
to be used in their platform data. Make the driver respect that.
Signed-off-by: Kalle Pokki <kalle.pokki@eke.fi>
Cc: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Remove this unneeded mutex. Indeed it was used to serialize access to
the hardware, but this is already done by the i2c-core layer, see
'bus_lock' mutex used by i2c_transfer().
Signed-off-by: Francis Moreau <francis.moro@gmail.com>
Acked-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
The i2c linux driver for blackfin architecture which supports blackfin
on-chip TWI controller i2c operation.
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Reviewed-by: Alexey Dobriyan <adobriyan@gmail.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Doug Anderson