'input-disable' is already used and supported by common pinctrl
bindings, so add it also here to fix warnings like:
arch/arm64/boot/dts/qcom/qrb5165-rb5.dtb: gpio@c000: lt9611-rst-state: 'oneOf' conditional failed, one must be fixed:
'input-disable' does not match any of the regexes: 'pinctrl-[0-9]+'
'function', 'input-disable', 'output-high', 'pins', 'power-source' do not match any of the regexes: '(pinconf|-pins)$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add missing 'gpio-line-names' property and describe its constraints for
all models except PM8226 (which seems not really used).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Matching PMIC GPIOs config nodes within a '-state' node by '.*' pattern
does not work as expected because of linux,phandle in the DTB:
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dtb: gpios@c000: divclk4-state: 'oneOf' conditional failed, one must be fixed:
'pins' is a required property
'function' is a required property
'pinconf' does not match any of the regexes: 'pinctrl-[0-9]+'
[[2]] is not of type 'object'
Make the schema stricter and expect such nodes to be either named
'pinconfig' or followed with '-pins' prefix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220507194913.261121-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pm6125 comes with 9 GPIOs, without holes.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220511220613.1015472-3-marijn.suijten@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add VTM bindings documentation. In the Voltage Thermal
Management Module(VTM), K3 J72XX supplies a voltage
reference and a temperature sensor feature that are gathered in the band
gap voltage and temperature sensor (VBGAPTS) module. The band
gap provides current and voltage reference for its internal
circuits and other analog IP blocks. The analog-to-digital
converter (ADC) produces an output value that is proportional
to the silicon temperature.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517172920.10857-2-j-keerthy@ti.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The Qualcomm SC8280XP platform has three instances of the tsens block,
add a compatible for these instances.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220503153436.960184-1-bjorn.andersson@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add compatible for the LMh blocks found in the Qualcomm sc8180x
platform.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220502164504.3972938-2-bjorn.andersson@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Document RZ/G2UL TSU bindings. The TSU block on RZ/G2UL is identical to one
found on RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rzg2l-tsu" will be used as a fallback.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220501081930.23743-1-biju.das.jz@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add compatibility string for the thermal sensors on MSM8960/APQ8064
platforms.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220406002648.393486-2-dmitry.baryshkov@linaro.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add documentation for PMIC5 Gen2 ADC_TM peripheral.
It is used for monitoring ADC channel thresholds for PMIC7-type
PMICs. It is present on PMK8350, like PMIC7 ADC and can be used
to monitor up to 8 ADC channels, from any of the PMIC7 PMICs
on a target, through PBS(Programmable Boot Sequence).
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1648991869-20899-2-git-send-email-quic_jprakash@quicinc.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Document RZ/V2L TSU bindings. The TSU block on RZ/V2L is identical to one
found on RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rzg2l-tsu" will be used as a fallback.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220308212315.4551-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.
Add DT properties to configure both pins.
Technically the phy also supports a recovered 125MHz clock for
synchronous ethernet. However SyncE should be configured dynamically at
runtime, so it is explicitly omitted in this binding.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Pull ARM SoC fixes from Arnd Bergmann:
"The SoC bug fixes have calmed down sufficiently, there is one minor
update for the MAINTAINERS file, and few bug fixes for dts
descriptions:
- Updates to the BananaPi R2-Pro (rk3568) dts to match production
hardware rather than the prototype version.
- Qualcomm sm8250 soundwire gets disabled on some machines to avoid
crashes
- A number of aspeed SoC specific fixes, addressing incorrect pin
cotrol settings, some values in the romed8hm board, and a revert
for an accidental removal of a DT node"
* 'arm/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: omap: remove me as a maintainer
ARM: dts: aspeed: Add video engine to g6
ARM: dts: aspeed: romed8hm3: Fix GPIOB0 name
ARM: dts: aspeed: romed8hm3: Add lm25066 sense resistor values
ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group
ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi
dt-bindings: pinctrl: aspeed-g6: add FWQSPI function/group
pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group
dt-bindings: pinctrl: aspeed-g6: remove FWQSPID group
pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl
ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi
arm64: dts: qcom: sm8250: don't enable rx/tx macro by default
arm64: dts: rockchip: Add gmac1 and change network settings of bpi-r2-pro
arm64: dts: rockchip: Change io-domains of bpi-r2-pro
This uses anyOf which is wrong. Use oneOf and move the items under the
description. Also drop allOf for $ref.
Reported-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/CAE-0n50KE9bkqZvCOLtCGiq3g1jYhK7zpVcVFBzinaguNhNaPw@mail.gmail.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Detailed description for this pull request:
1. Update devfreq core
- Add cpu based scaling support to passive governor. Some device like
cache might require the dynamic frequency scaling. But, it has very
tightly to cpu frequency. So that use passive governor to scale
the frequency according to current cpu frequency.
To decide the frequency of the device, the governor does one of the following:
: Derives the optimal devfreq device opp from required-opps property of
the parent cpu opp_table.
: Scales the device frequency in proportion to the CPU frequency. So, if
the CPUs are running at their max frequency, the device runs at its
max frequency. If the CPUs are running at their min frequency, the
device runs at its min frequency. It is interpolated for frequencies
in between.
2. Update devfreq driver
- Update rk3399_dmc.c as following:
: Convert dt-binding document to YAML and deprecate unused properties.
: Use Hz units for the device-tree properties of rk3399_dmc.
: rk3399_dmc is able to set the idle time before changing the dmc clock.
Specify idle time parameters by using nano-second unit on dt bidning.
: Add new disable-freq properties to optimize the power-saving feature
of rk3399_dmc.
: Disable devfreq-event device on remove() to fix unbalanced
enable-disable count.
: Use devm_pm_opp_of_add_table()
: Block PMU (Power-Management Unit) transitions when scaling frequency
by ARM Trust Firmware in order to fix the conflict between PMU and DMC
(Dynamic Memory Controller).
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Merge tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux
Pull devfreq changes for 5.19-rc1 from Chanwoo Choi:
"1. Update devfreq core
- Add cpu based scaling support to passive governor. Some device like
cache might require the dynamic frequency scaling. But, it has very
tightly to cpu frequency. So that use passive governor to scale
the frequency according to current cpu frequency.
To decide the frequency of the device, the governor does one of the following:
: Derives the optimal devfreq device opp from required-opps property of
the parent cpu opp_table.
: Scales the device frequency in proportion to the CPU frequency. So, if
the CPUs are running at their max frequency, the device runs at its
max frequency. If the CPUs are running at their min frequency, the
device runs at its min frequency. It is interpolated for frequencies
in between.
2. Update devfreq drivers
- Update rk3399_dmc.c as following:
: Convert dt-binding document to YAML and deprecate unused properties.
: Use Hz units for the device-tree properties of rk3399_dmc.
: rk3399_dmc is able to set the idle time before changing the dmc clock.
Specify idle time parameters by using nano-second unit on dt bidning.
: Add new disable-freq properties to optimize the power-saving feature
of rk3399_dmc.
: Disable devfreq-event device on remove() to fix unbalanced
enable-disable count.
: Use devm_pm_opp_of_add_table()
: Block PMU (Power-Management Unit) transitions when scaling frequency
by ARM Trust Firmware in order to fix the conflict between PMU and DMC
(Dynamic Memory Controller)."
* tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux:
PM / devfreq: passive: Keep cpufreq_policy for possible cpus
PM / devfreq: passive: Reduce duplicate code when passive_devfreq case
PM / devfreq: Add cpu based scaling support to passive governor
PM / devfreq: Export devfreq_get_freq_range symbol within devfreq
PM / devfreq: rk3399_dmc: Block PMU during transitions
soc: rockchip: power-domain: Manage resource conflicts with firmware
PM / devfreq: rk3399_dmc: Avoid static (reused) profile
PM / devfreq: rk3399_dmc: Use devm_pm_opp_of_add_table()
PM / devfreq: rk3399_dmc: Disable edev on remove()
PM / devfreq: rk3399_dmc: Support new *-ns properties
PM / devfreq: rk3399_dmc: Support new disable-freq properties
PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD
PM / devfreq: rk3399_dmc: Drop excess timing properties
PM / devfreq: rk3399_dmc: Drop undocumented ondemand DT props
dt-bindings: devfreq: rk3399_dmc: Add more disable-freq properties
dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanoseconds
dt-bindings: devfreq: rk3399_dmc: Fix Hz units
dt-bindings: devfreq: rk3399_dmc: Deprecate unused/redundant properties
dt-bindings: devfreq: rk3399_dmc: Convert to YAML
Add support for HPE GXP. The GXP is based on the cortex a9 processor and
supports arm7.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add support for the HPE GXP Timer and Watchdog. There are multiple
timers on the SoC but only one is enabled at this time.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
When the binding was converted it appeared necessary to set
'unevaluatedProperties: true' because of the switch devices on the
turris-mox board. Actually the error was because of the reg property
being incorrect causing the rest of the properties to be unevaluated.
After the reg properties are fixed for turris-mox we can set
'unevaluatedProperties: false' as is generally expected.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
These interconnects are modeled as clks, not interconnects, therefore
remove the compatibles from the binding as they're unused.
Cc: Alex Elder <elder@linaro.org>
Cc: Taniya Das <quic_tdas@quicinc.com>
Cc: Mike Tipton <quic_mdtipton@quicinc.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220415005828.1980055-3-swboyd@chromium.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
This contains a few fixes for the sc8180x interconnect provider driver to make
it functional.
* icc-sc8180x
dt-bindings: interconnect: Add SC8180X QUP0 virt provider
interconnect: qcom: sc8180x: Modernize sc8180x probe
interconnect: qcom: sc8180x: Fix QUP0 nodes
interconnect: qcom: sc8180x: Mark some BCMs keepalive
Link: https://lore.kernel.org/r/20220503211925.1022169-1-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Add compatible for the QUP0 BCM provider found in SC8180X.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220503211925.1022169-2-bjorn.andersson@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
The PCA85073A RTC has the same programming model as the PCF85063A.
Add a compatible entry for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20220419014445.341444-1-festevam@gmail.com
Convert rockchip,rk3368-cru.txt to YAML.
Changes against original bindings:
- Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220329180550.31043-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Convert rockchip,rk3228-cru.txt to YAML.
Changes against original bindings:
Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220330121923.24240-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Convert rockchip,rk3036-cru.txt to YAML.
Changes against original bindings:
Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220330114847.18633-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Convert rockchip,rk3308-cru.txt to YAML.
Changes against original bindings:
- Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220329184339.1134-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
If the ChromeOS board is a detachable, this cros-ec-keyb device won't
have a matrix keyboard but it may have some button switches, e.g. volume
buttons and power buttons. The driver still registers a keyboard though
and that leads to userspace confusion around where the keyboard is.
We tried to work around this by only registering the keyboard device when
rows/columns properties were specified for the device, but that led to
another problem where removing the rows/columns properties breaks the
existing binding. Technically before that commit the rows/columns
properties were required, otherwise the driver would fail to probe.
Removing the properties from devicetrees makes the driver fail to probe
unless the corresponding driver patch is present. Furthermore, this makes
requiring matrix keyboard properties for devices that really have a
keyboard impossible because the compatible drives the schema and now the
properties are optional.
Add a more specific compatible for this type of device that indicates to
the OS that there are only switches and no matrix keyboard present.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20220516183452.942008-2-swboyd@chromium.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Convert rockchip,px30-cru.txt to YAML.
Changes against original bindings:
Use compatible string: "rockchip,px30-pmucru"
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220330103923.11063-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Current dts files with RK3188/RK3066 'cru' nodes are manually verified.
In order to automate this process rockchip,rk3188-cru.txt has to be
converted to YAML.
Changed:
Add properties to fix notifications by clocks.yaml for example:
clocks
clock-names
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220329111323.3569-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Current dts files with RK3288 'cru' nodes are manually verified.
In order to automate this process rockchip,rk3288-cru.txt has to be
converted to YAML.
Changed:
Add properties to fix notifications by clocks.yaml for example:
clocks
clock-names
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220329113657.4567-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This documentation provides wrong node name for the Ethernet controller.
It should be "ethernet" instead of "smsc" as required by Ethernet
controller devicetree schema:
Documentation/devicetree/bindings/net/ethernet-controller.yaml
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517111505.929722-4-o.rempel@pengutronix.de
Create initial schema for Microchip/SMSC LAN95xx USB Ethernet controllers and
import some of currently supported USB IDs form drivers/net/usb/smsc95xx.c
These devices are already used in some of DTs. So, this schema makes it official.
NOTE: there was no previously documented txt based DT binding for this
controllers.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517111505.929722-3-o.rempel@pengutronix.de
Create schema for ASIX USB Ethernet controllers and import some of
currently supported USB IDs form drivers/net/usb/asix_devices.c
These devices are already used in some of DTs. So, this schema makes it official.
NOTE: there was no previously documented txt based DT binding for this
controllers.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220517111505.929722-2-o.rempel@pengutronix.de
No properly bus-type for DPI video bus, add bus-type 7 for it.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Xin Ji <xji@analogixsemi.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Convert the old text based dw9807-vcm chip DT bindings to json-schema.
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
The imx412 like many I2C camera sensors has three voltage rails which
depending on platform may be necessary to switch power onto directly.
Add in as optional rails so as not to break anything for existing users.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
The SCP co-processor can optionally be passed a reserved memory region
to use. Add this property in the dt-binding.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220511195452.871897-3-nfraprado@collabora.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Commit ca23ecfdbd ("remoteproc/mediatek: support L1TCM") added support
for the l1tcm memory region on the MT8192 SCP, adding a new da_to_va
callback that handles l1tcm while keeping the old one for
back-compatibility with MT8183. However, since the mt8192 compatible was
missing from the dt-binding, the accompanying dt-binding commit
503c64cc42 ("dt-bindings: remoteproc: mediatek: add L1TCM memory region")
mistakenly added this reg as if it were for mt8183. And later
it became common to all platforms as their compatibles were added.
Fix the dt-binding so that the l1tcm reg can be present only on the
supported platforms: mt8192 and mt8195.
Fixes: 503c64cc42 ("dt-bindings: remoteproc: mediatek: add L1TCM memory region")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220511195452.871897-2-nfraprado@collabora.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
The VOP2 driver relies on reg-names properties, but these are not
documented. Add the missing documentation and make reg-names mandatory.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220511082109.1110043-2-s.hauer@pengutronix.de
Since commit
| 1f9234401c ("dt-bindings: can: add can-controller.yaml")
there is a common CAN controller binding. Add this to the ctucanfd
binding.
Cc: Ondrej Ille <ondrej.ille@gmail.com>
Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
The Renesas R-Car CAN FD Controller always uses two or more interrupts.
Make the interrupt-names properties a required property, to make it
easier to identify the individual interrupts.
Update the example accordingly.
Link: https://lore.kernel.org/all/a68e65955e0df4db60233d468f348203c2e7b940.1651512451.git.geert+renesas@glider.be
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Add the missing power-domain property which is needed on all the
RZ/N1 SoC IPs.
Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20220513104957.257721-2-miquel.raynal@bootlin.com
The generic property, used in most of the drivers and defined in generic
dma-common DT bindings, is 'dma-channels'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220503065147.51728-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The "interrupt" property is optional because it is only necessary for
controllers supporting DMAs (Not implemented yet in the new driver).
Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Tested-by: Joel Stanley <joel@jms.id.au>
Tested-by: Tao Ren <rentao.bupt@gmail.com>
Tested-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20220509175616.1089346-3-clg@kaod.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Document the Ethernet AVB IP found on RZ/V2M SoC.
It includes the Ethernet controller (E-MAC) and Dedicated Direct memory
access controller (DMAC) for transferring transmitted Ethernet frames
to and received Ethernet frames from respective storage areas in the
RAM at high speed.
The AVB-DMAC is compliant with IEEE 802.1BA, IEEE 802.1AS timing and
synchronization protocol, IEEE 802.1Qav real-time transfer, and the
IEEE 802.1Qat stream reservation protocol.
R-Car has a pair of combined interrupt lines:
ch22 = Line0_DiA | Line1_A | Line2_A
ch23 = Line0_DiB | Line1_B | Line2_B
Line0 for descriptor interrupts (which we call dia and dib).
Line1 for error related interrupts (which we call err_a and err_b).
Line2 for management and gPTP related interrupts (mgmt_a and mgmt_b).
RZ/V2M hardware has separate interrupt lines for each of these.
It has 3 clocks; the main AXI clock, the AMBA CHI (Coherent Hub
Interface) clock and a gPTP reference clock.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
Convert rockchip,rv1108-cru.txt to YAML.
Changes against original bindings:
Add clocks and clock-names because the device has to have
at least one input clock.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220330131608.30040-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rk3568 cru requires a clock input and a phandle to the grf node. Add
these bindings to clear some dtbs_check warnings.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220511150117.113070-2-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The node names should be generic, so use "flash" for dataflash nodes and
for cfi-flash.
Suggested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220412105013.249793-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
- Add new Qualcomm device-tree compatible strings
- Add new Nvidia device-tree compatible string for Tegra234
- Fix UAF in SMMUv3 shared virtual addressing code
- Force identity-mapped domains for users of ye olde SMMU legacy binding
- Minor cleanups
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Merge tag 'arm-smmu-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/smmu
Arm SMMU updates for 5.19
- Add new Qualcomm device-tree compatible strings
- Add new Nvidia device-tree compatible string for Tegra234
- Fix UAF in SMMUv3 shared virtual addressing code
- Force identity-mapped domains for users of ye olde SMMU legacy binding
- Minor cleanups
For "st,stm32mp1-rcc-secure" schema, clocks and clock-names entries are now
required properties.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220511092559.4952-1-alexandre.torgue@foss.st.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
the video-decoder on rk3328.
RK3399 received some improvements and nodes for the memory controller.
Additional peripherals for PineNote, Gru and BananaPi-R2-Pro.
New boards are the Firefly Station M2, Pine64 SoQuartz SOM and
Quartz64 model B as well as the Radxa Rock3 model A.
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Merge tag 'v5.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New peripherals supported on rk356x: sfc, usb3, sata and
the video-decoder on rk3328.
RK3399 received some improvements and nodes for the memory controller.
Additional peripherals for PineNote, Gru and BananaPi-R2-Pro.
New boards are the Firefly Station M2, Pine64 SoQuartz SOM and
Quartz64 model B as well as the Radxa Rock3 model A.
* tag 'v5.19-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (32 commits)
arm64: dts: rockchip: enable otg/drd operation of usb_host0_xhci in rk356x
arm64: dts: rockchip: rename HDMI ref clock to 'ref' on rk3399
arm64: dts: rockchip: add dts for Firefly Station M2 rk3566
arm64: dts: rockchip: add SoQuartz CM4IO dts
arm64: dts: rockchip: add Pine64 Quartz64-B device tree
dt-bindings: arm: rockchip: Add Firefly Station M2
dt-bindings: arm: rockchip: Add Pine64 SoQuartz SoM
dt-bindings: arm: rockchip: Add Pine64 Quartz64 Model B
arm64: dts: rockchip: enable usb hub on the radxa rock3 model a
arm64: dts: rockchip: add usb3 support to the radxa rock3 model a
arm64: dts: rockchip: add rk356x sfc support
arm64: dts: rockchip: Add USB and TCPC to rk3566-pinenote
arm64: dts: rockchip: Add accelerometer to rk3566-pinenote
arm64: dts: rockchip: add an input enable pinconf to rk3399
arm64: dts: rockchip: Add vdec support for RK3328
arm64: dts: rockchip: Rename vdec_mmu node for RK3328
arm64: dts: rockchip: Enable dmc and dfi nodes on gru
arm64: dts: rockchip: Add dfi and dmc nodes to rk3399
arm64: dts: rockchip: add clocks property to cru nodes rk3399
arm64: dts: rockchip: use generic node name for pmucru on rk3399
...
Link: https://lore.kernel.org/r/7748558.DvuYhMxLoT@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Microchip XISC supports a bus width of 14 bits.
Add it to the supported bus widths.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Document the RK3328 compatible for rockchip-vdec. The driver shares
the same base functionality as the RK3399 hardware so make sure that
the RK3399 compatible is also included in the device tree.
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
The encoder node may be dependent on a power-domain. Add a property for
it.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
update documentation to correctly state the interrupt-cells to be 2.
Cc: stable@vger.kernel.org
Fixes: 4fd9bbc6e0 ("drivers/gpio: Altera soft IP GPIO driver devicetree binding")
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Adds dt-binding for a Generic MIDI Interface using a serial device.
Signed-off-by: Daniel Kaehn <kaehndan@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220509145933.1161526-2-kaehndan@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
MediaTek Cache Coherent Interconnect (CCI) uses software devfreq module
for scaling clock frequency and adjust voltage.
The phandle could be linked between CPU and MediaTek CCI for some
MediaTek SoCs, like MT8183 and MT8186.
The reason we need the link status between cpufreq and MediaTek cci is
cpufreq and mediatek cci could share the same regulator in some MediaTek
SoCs. Therefore, to prevent the issue of high frequency and low voltage,
we need to use this to make sure mediatek cci is ready.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
The snps,dw-pcie binds to a standalone driver. It is not fully
compatible with the Rockchip implementation and causes a hang if it
binds to the device.
Remove this binding as a valid fallback.
Link: https://lore.kernel.org/r/20220429123832.2376381-2-pgwipeout@gmail.com
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
- Fourcc modifier for tiled but not compressed layouts
- Support for userspace allocated IOVA (GPU virtual address)
- Devfreq clamp_to_idle fix
- DPU: DSC (Display Stream Compression) support
- DPU: inline rotation support on SC7280
- DPU: update DP timings to follow vendor recommendations
- DP, DPU: add support for wide bus (on newer chipsets)
- DP: eDP support
- Merge DPU1 and MDP5 MDSS driver, make dpu/mdp device the master
component
- MDSS: optionally reset the IP block at the bootup to drop
bootloader state
- Properly register and unregister internal bridges in the DRM framework
- Complete DPU IRQ cleanup
- DP: conversion to use drm_bridge and drm_bridge_connector
- eDP: drop old eDP parts again
- DPU: writeback support
- Misc small fixes
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvJCr_1D8d0dgmyQC5HD4gmXeZw=bFV_CNCfceZbpMxRw@mail.gmail.com
Add bindings documentation for Sunplus SP7021 SoC.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wells Lu <wellslutw@gmail.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This adds MDIO bus description on the IPQ6018 platform.
On MSM8916 the BAM-DMUX WWAN network device is added and the Huawei
Ascend G7 gains sound card definition and clarified installation
instructions.
MSM8992 and MSM8994 continues to be worked on, gaining multimedia clock
controller, on-chip memory, watchdog and various cleanup changes. The
Xiaomi Mi 4C gains CPU regulators and fixes to the framebuffer
definition, while Huawei Nexus 6P gains eMMC support.
On MSM8996 the modem and sensor remtoeprocs are added and enabled in the
Dragonboard 820c and the Xiaomi devices.
On MSM8998 a few newly added clocks related to the sensor subsystem bus
are marked as protected by default and the OnePlus devices gains NFC.
The SC7180 platform and devices thereon are further polished and
limozeen moves to using edp-panel for EDID-based detection, over
statically defined panels.
On SC7280 GPI DMA, WiFi remoteproc and network device, LPASS audio
clocks, resets for SDCC controllers and a new CRD revision are added. A
supply glitch on the PCIe power and a current leak for Bluetooth during
suspend are corrected. The Herobrine board gains eDP support and the IDP
gains backlight. USB is marked wakeup capable.
On SDM845 the IPA, WLED based backlight and second WiFi channel are
enabled for Xiaomi Pocophone F1, the firmware name is modified to not
conflict with other boards. On RB3 the CAN bus controller is added and
the WiFi calibration variant is defined to allow adding the board's
calibration information into linux-firmware.
SM6350 gains I2C busses, UFS and WiFi support, and the numbering of
uart9 is corrected.
On SM7225 and the Fairphone 4 UFS, WiFi and haptics are enabled.
On SM8150 PCIe, Ethernet and uSD card support is added, and enabled for
the SA8155p ADP board. The PDC interrupt controller is also added and
described as wakup interrupt parent for TLMM.
Camera subsystem and control interface are defined for SM8250. On the
Sony Xperia 1 II the audio amplifiers are enabled.
On SM8350 GPI DMA engines are added and linked to the I2C and SPI
serial engines. Surface Duo 2 gains battery charger support.
On SM8450 the two PCIe controller/PHYs are enabled, GPI DMA and QUP
serial engine instances are added. Remoteproc instances are enabled on
SM8450 HDK.
Last, but not least, a number of DeviceTree validation errors across
various boards are corrected.
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Merge tag 'qcom-arm64-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for v5.19
This adds MDIO bus description on the IPQ6018 platform.
On MSM8916 the BAM-DMUX WWAN network device is added and the Huawei
Ascend G7 gains sound card definition and clarified installation
instructions.
MSM8992 and MSM8994 continues to be worked on, gaining multimedia clock
controller, on-chip memory, watchdog and various cleanup changes. The
Xiaomi Mi 4C gains CPU regulators and fixes to the framebuffer
definition, while Huawei Nexus 6P gains eMMC support.
On MSM8996 the modem and sensor remtoeprocs are added and enabled in the
Dragonboard 820c and the Xiaomi devices.
On MSM8998 a few newly added clocks related to the sensor subsystem bus
are marked as protected by default and the OnePlus devices gains NFC.
The SC7180 platform and devices thereon are further polished and
limozeen moves to using edp-panel for EDID-based detection, over
statically defined panels.
On SC7280 GPI DMA, WiFi remoteproc and network device, LPASS audio
clocks, resets for SDCC controllers and a new CRD revision are added. A
supply glitch on the PCIe power and a current leak for Bluetooth during
suspend are corrected. The Herobrine board gains eDP support and the IDP
gains backlight. USB is marked wakeup capable.
On SDM845 the IPA, WLED based backlight and second WiFi channel are
enabled for Xiaomi Pocophone F1, the firmware name is modified to not
conflict with other boards. On RB3 the CAN bus controller is added and
the WiFi calibration variant is defined to allow adding the board's
calibration information into linux-firmware.
SM6350 gains I2C busses, UFS and WiFi support, and the numbering of
uart9 is corrected.
On SM7225 and the Fairphone 4 UFS, WiFi and haptics are enabled.
On SM8150 PCIe, Ethernet and uSD card support is added, and enabled for
the SA8155p ADP board. The PDC interrupt controller is also added and
described as wakup interrupt parent for TLMM.
Camera subsystem and control interface are defined for SM8250. On the
Sony Xperia 1 II the audio amplifiers are enabled.
On SM8350 GPI DMA engines are added and linked to the I2C and SPI
serial engines. Surface Duo 2 gains battery charger support.
On SM8450 the two PCIe controller/PHYs are enabled, GPI DMA and QUP
serial engine instances are added. Remoteproc instances are enabled on
SM8450 HDK.
Last, but not least, a number of DeviceTree validation errors across
various boards are corrected.
* tag 'qcom-arm64-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (150 commits)
arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi
arm64: dts: qcom: sc7180-trogdor: Simplify spi0/spi6 labeling
arm64: dts: qcom: sc7180-trogdor: Simplify trackpad enabling
arm64: dts: qcom: sc7280: eDP for herobrine boards
arm64: dts: qcom: sa8155p-adp: Disable multiple Tx and Rx queues for ethernet IP
arm64: dts: qcom: sm8150: Fix iommu sid value for SDC2 controller
arm64: dts: qcom: sm8350-duo2: enable battery charger
arm64: dts: qcom: Enable pm8350c pwm for sc7280-idp2
arm64: dts: qcom: pm8350c: Add pwm support
arm64: dts: qcom: sc7280-qcard: Configure CTS pin to bias-bus-hold for bluetooth
arm64: dts: qcom: sc7280-idp: Configure CTS pin to bias-bus-hold for bluetooth
arm64: dts: qcom: sc7180: Remove ipa interconnect node
arm64: dts: qcom: sc7280-idp: Enable GPI DMAs
arm64: dts: qcom: sc7280: Add GENI I2C/SPI DMA channels
arm64: dts: qcom: sc7280: Add GPI DMAengines
arm64: dts: qcom: sm8450: Fix qmp phy node (use phy@ instead of lanes@)
arm64: dts: qcom: db845c: Add support for MCP2517FD
arm64: dts: qcom: qrb5165-rb5: Fix can-clock node name
arm64: dts: qcom: sc7280: Add SAR sensors to herobrine crd
arm64: dts: qcom: sm8250: camss: Add CCI definitions
...
Link: https://lore.kernel.org/r/20220509204451.325675-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a long overdue overhaul of the MSM8974 DeviceTrees,
aligning the style, structure and naming with what we've learned since
the introduction of this platform.
On top of this the Sony Rhine platform gained I2C masters, NFC and
pstore support and the Fairphone 2 gained touchscreen support.
For the new SDX65 platform reserved-memory nodes, rpmpd, SPMI, CPU
clocks, SDHCI controller, SMMU and TCSR mutex was added. As was the
initial DeviceTree for the related PMX65 PMIC.
MSM8226 gained VADC and RTC support and support for the ASUS ZenWatch 2
was added.
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Merge tag 'qcom-dts-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM DT updates for v5.19
This contains a long overdue overhaul of the MSM8974 DeviceTrees,
aligning the style, structure and naming with what we've learned since
the introduction of this platform.
On top of this the Sony Rhine platform gained I2C masters, NFC and
pstore support and the Fairphone 2 gained touchscreen support.
For the new SDX65 platform reserved-memory nodes, rpmpd, SPMI, CPU
clocks, SDHCI controller, SMMU and TCSR mutex was added. As was the
initial DeviceTree for the related PMX65 PMIC.
MSM8226 gained VADC and RTC support and support for the ASUS ZenWatch 2
was added.
* tag 'qcom-dts-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (62 commits)
ARM: dts: qcom: msm8974-FP2: Add supplies for remoteprocs
ARM: dts: qcom: msm8974-FP2: Configure charger
ARM: dts: qcom: msm8974-FP2: Add support for touchscreen
ARM: dts: qcom: sdx55: Remove ipa interconnect node
ARM: dts: qcom: msm8974: Add missing license headers
ARM: dts: qcom: msm8974-FP2: Add mmc* aliases
ARM: dts: qcom: msm8974-FP2: We're msm8974pro
ARM: dts: qcom-msm8974*: Remove unnecessary include
ARM: dts: qcom-msm8974-rhine: Add pstore node
ARM: dts: qcom-msm8974-rhine: Add NFC and enable I2C hosts
ARM: dts: qcom-msm8974*: Clean up old GPIO declarations
ARM: dts: qcom-msm8974*: Consolidate I2C/UART/SDHCI
ARM: dts: qcom-msm8974*: Enable IMEM unconditionally
ARM: dts: qcom-msm8974: Sort and clean up nodes
ARM: dts: qcom-msm8974: Convert ADSP to a MMIO device
ARM: dts: qcom-msm8974pro-*: Use the 8974pro name in DT filenames
ARM: dts: qcom-msm8974pro: Use &labels
ARM: dts: qcom-msm8974-castor: Use &labels
ARM: dts: qcom-msm8974-{"hon","am"}ami: Commonize and modernize the DTs
ARM: dts: qcom-msm8974-klte: Use &labels
...
Link: https://lore.kernel.org/r/20220509172125.313259-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This converts a wide range of Qualcomm-related DeviceTree bindings to
YAML, in order to improve our ability to validate the DeviceTree source.
The RPMh power-domain driver gains support for the modem platform SDX65,
the compute platform SC8280XP and the automotive platform SA8540p. While
LLCC gains support for SC8180X and SC8280XP and gains a
MODULE_DEVICE_TABLE() to make it functional as a module.
It adds a driver for configuring the SSC bus, providing Linux access to
the hardware blocks in the sensor subsystem.
The socinfo driver gets confusion related to MSM8974 Pro sorted out and
adds new ids for SM8540 and SC7280.
The SCM driver gains support for MSM8974.
Add missing of_node_put() in smp2p and smsm drivers.
Stop using iterator after list_for_each_entry() and define static
definitions as such, in the PDR driver.
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Merge tag 'qcom-drivers-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.19
This converts a wide range of Qualcomm-related DeviceTree bindings to
YAML, in order to improve our ability to validate the DeviceTree source.
The RPMh power-domain driver gains support for the modem platform SDX65,
the compute platform SC8280XP and the automotive platform SA8540p. While
LLCC gains support for SC8180X and SC8280XP and gains a
MODULE_DEVICE_TABLE() to make it functional as a module.
It adds a driver for configuring the SSC bus, providing Linux access to
the hardware blocks in the sensor subsystem.
The socinfo driver gets confusion related to MSM8974 Pro sorted out and
adds new ids for SM8540 and SC7280.
The SCM driver gains support for MSM8974.
Add missing of_node_put() in smp2p and smsm drivers.
Stop using iterator after list_for_each_entry() and define static
definitions as such, in the PDR driver.
* tag 'qcom-drivers-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (33 commits)
soc: qcom: pdr: use static for servreg_* variables
soc: qcom: llcc: Add sc8180x and sc8280xp configurations
dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles
soc: qcom: rpmhpd: add sc8280xp & sa8540p rpmh power-domains
soc: qcom: rpmhpd: Don't warn about sparse rpmhpd arrays
dt-bindings: power: rpmpd: Add sc8280xp RPMh power-domains
spi: dt-bindings: qcom,spi-geni-qcom: convert to dtschema
soc: qcom: socinfo: Sort out 8974PRO names
dt-bindings: soc: qcom,smp2p: convert to dtschema
dt-bindings: qcom: geni-se: Update UART schema reference
dt-bindings: qcom: geni-se: Update I2C schema reference
dt-bindings: soc: qcom,rpmh-rsc: convert to dtschema
bus: add driver for initializing the SSC bus on (some) qcom SoCs
dt-bindings: bus: add device tree bindings for qcom,ssc-block-bus
dt-bindings: qcom: qcom,geni-se: refer to dtschema for SPI
dt-bindings: soc: qcom,smd: convert to dtschema
firmware: qcom_scm: Add compatible for MSM8976 SoC
dt-bindings: firmware: qcom-scm: Document msm8976 bindings
soc: qcom: smem: validate fields of shared structures
soc: qcom: smem: map only partitions used by local HOST
...
Link: https://lore.kernel.org/r/20220509181839.316655-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Lucas and Paul to update GPCv2 driver for i.MX8MP power
domains, and add HSIO and HDMI block control support.
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Merge tag 'imx-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.19:
- A series from Lucas and Paul to update GPCv2 driver for i.MX8MP power
domains, and add HSIO and HDMI block control support.
* tag 'imx-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: fix semicolon.cocci warnings
soc: imx: add i.MX8MP HDMI blk-ctrl
soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl
soc: imx: add i.MX8MP HSIO blk-ctrl
dt-bindings: power: imx8mp: add defines for HDMI blk-ctrl domains
dt-bindings: soc: Add i.MX8MP media block control DT bindings
soc: imx: imx8m-blk-ctrl: set power device name
soc: imx: gpcv2: add support for i.MX8MP power domains
soc: imx: gpcv2: add PGC control register indirection
Link: https://lore.kernel.org/r/20220508033843.2773685-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This reverts commit e056cf4341 ("ASoC: dt-bindings: mediatek: mt8192: Add
i2s-share properties") which was merged while the property name and
definition were still being discussed. Revert the commit for now and a
follow up commit will re-add the property after it is further discussed
and reviewed.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220509185625.580811-1-nfraprado@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit provides documentation entry for wm8940 codec.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20220509121313.31216-1-lukma@denx.de
Signed-off-by: Mark Brown <broonie@kernel.org>
The Arm Komeda (aka Mali-D71) is a display controller that scans out a
framebuffer and hands a signal to a digital encoder to generate a DVI
or HDMI signal. It supports up to two pipelines, each frame can be
composed of up to four layers.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-12-andre.przywara@arm.com
The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
out a framebuffer and hands the pixels over to a digital signal encoder.
It supports multiple layers, scaling and rotation.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-11-andre.przywara@arm.com
The Arm HDLCD is a display controller that scans out a framebuffer and
hands a signal to a digital encoder to generate a DVI or HDMI signal.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-10-andre.przywara@arm.com
The Arm PL110 and PL111 are IP blocks that provide a display engine with
an LCD interface, being able to drive a variety of LC panels.
Convert the binding over to DT schema, to the DTs can be automatically
checked.
This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
because this is used by several DTs in the tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[robh: make interrupts optional (not connected on Realview EB)]
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-9-andre.przywara@arm.com
The Arm Versatile Express system features a bridge device that provides
access to various smaller devices like clocks, reset gates and various
sensors.
Extract the second half of the informal vexpress-sysreg.txt binding and
make it proper DT schema compliant. This makes the old .txt binding
redundant, so remove it.
This describes both the actual parent configuration bridge, as well as
all the possible children devices.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-8-andre.przywara@arm.com
The Arm Versatile Express system control register block provides GPIO
functionality to some devices and is also used for board identification.
Extract the first half of the informal vexpress-sysreg.txt binding and
make it proper DT schema compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-7-andre.przywara@arm.com
The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is
a peripheral that provides communication with an audio CODEC.
Add a simple DT schema binding for it, so that DTs can be validated
automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-5-andre.przywara@arm.com
The Arm SP810 IP is a "system controller", providing clocks, timer and a
watchdog.
Convert the DT binding to DT schema, to allow automatic validation.
The existing .txt binding described all properties as required, but the
assigned-clock* and clock-output-names are actually not (from a hardware
perspective). The only existing driver I could find (in Linux) doesn't
require them either, so drop those properties from the "required" list.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-4-andre.przywara@arm.com
Convert the Arm Statisical Profiling Extension (SPE) binding to DT
schema.
Not much to see here, basically just the announcement that SPE is
integrated on the system level and where the IRQ is routed to.
Move it into the more suitable perf/ directory on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-3-andre.przywara@arm.com
The Page Request Interface (PRI) is an optional PCIe feature. As such, a
SMMU would not need to handle it if the PCIe host bridge or the SMMU
itself do not implement it. Also an SMMU could be connected to a platform
device, without any PRI functionality whatsoever.
In all cases there would be no SMMU PRI queue interrupt to be wired up
to an interrupt controller.
At the moment, with the "eventq,gerror,priq,cmdq-sync" order, we
would need to sacrifice the command queue sync interrupt as well, which
might not be desired.
Relax the binding to allow specifying certain useful combinations of
wired interrupts, for instance just the "gerror" interrupt, or omitting
both "pri" and "cmdq-sync".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220506140533.3566431-2-andre.przywara@arm.com
Trust Architecture (TA) 2.1 devices include the LS1012A, LS1021A,
LS1043A, and LS1046A. The SFP device on TA 2.1 devices is very similar
to the SFP on TA 3.0 devices. The primary difference is a few fields in
the control register. Add a compatible string.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220429162701.2222-15-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The TA_PROG_SFP supply must be enabled to program the fuses, and
disabled to read the fuses (such as at power-on-reset). On many boards,
this supply is controlled by a jumper. The user must manually insert or
remove it at the appropriate time in the programming process. However,
on other boards this supply is controlled by an FPGA or a GPIO. In
these cases, the driver can automatically enable and disable it as
necessary.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220429162701.2222-14-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To program fuses, it is necessary to set the fuse programming time. This
is determined based on the value of the platform clock. Add a clock
property.
Because this property is necessary for programming, it is made
mandatory. Since these bindings have not yet been present in a stable
release (though they are on track for 5.18), it is not an ABI break to
change them in this manner.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220429162701.2222-13-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
There is a small grammatical error in the description. Fix it.
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220429162701.2222-12-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Apple SoCs come with eFuses used to store factory-programmed data
such as calibration settings for the PCIe and Type-C PHY.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220429162701.2222-5-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The rt5682 codec can be pointed to through a sound-dai property to be
used as part of a machine sound driver. dtc expects #sound-dai-cells to
be defined in the codec's node in those cases, so add it in the
dt-binding and set it to 0.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220429203039.2207848-4-nfraprado@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The rt1015p codec can be pointed to through a sound-dai property to be
used as part of a machine sound driver. dtc expects #sound-dai-cells to
be defined in the codec's node in those cases, so add it in the
dt-binding and set it to 0.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220429203039.2207848-3-nfraprado@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The Mediatek AFE PCM controller for MT8192 allows sharing of an I2S bus
between two busses. Add a pattern for these properties in the
dt-binding.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220429203039.2207848-2-nfraprado@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Most Allwinner SoCs have just one input clock to drive the watchdog
peripheral. So far this is the 24 MHz "HOSC" oscillator, divided down
internally to 32 KHz.
The F1C100 series watchdog however uses the unchanged 32 KHz "LOSC" as
its only clock input, which has the same effect, but let's the binding
description mismatch.
Change the binding description to name the clocks more loosely, so both
the LOSC and divided HOSC match the description. As the fixed clock names
now make less sense, drop them from SoCs supporting just one clock
input, they were not used by any DT anyway.
For the newer SoCs, supporting a choice of two input clocks, we keep
both the description and clock-names requirement.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220317162349.739636-3-andre.przywara@arm.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
The F1C100 series actually features a newer generation watchdog IP, so
the compatible string was wrong.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220317162349.739636-2-andre.przywara@arm.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This adds the documentation for the devicetree bindings of the Sunplus
SP7021 watchdog driver, found from SP7021 SoCs and newer.
Signed-off-by: Xiantao Hu <xt.hu@cqplus1.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220324031805.61316-2-xt.hu@cqplus1.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Document RZ/V2L WDT bindings. RZ/V2L WDT is identical to one found
on the RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rzg2l-wdt" will be used as a fallback.
While at it, drop the comment "# RZ/G2L" for "renesas,rzg2l-wdt"
compatible string as this will avoid changing the line for every new
SoC addition.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220301122332.14796-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Converts watchdog/faraday,ftwdt010.txt to yaml.
This permits to detect missing properties like clocks and resets or
compatible like moxa,moxart-watchdog.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220211115528.3382374-1-clabbe@baylibre.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Parse compatible as expected for modern QCOMs.
Fixes warnings as:
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: watchdog@17980000: compatible: ['qcom,apss-wdt-sdm845', 'qcom,kpss-wdt'] is too long
From schema: Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: watchdog@17980000: compatible: Additional items are not allowed ('qcom,kpss-wdt' was unexpected)
From schema: Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220111212310.97566-1-david@ixit.cz
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
The wdog on i.MX93 is modified from i.MX8ULP with some changes,
it uses one compatible string, so add i.MX93 support.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220215081202.787853-1-peng.fan@oss.nxp.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This patch converts the leds-ktd2692.txt bindings to modern yaml
style device-tree bindings.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Updates the memory controller bindings to properly validate the number
of entries in the reg and reg-names properties.
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Merge tag 'tegra-for-5.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.19-rc1
Updates the memory controller bindings to properly validate the number
of entries in the reg and reg-names properties.
* tag 'tegra-for-5.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: memory: tegra: Update validation for reg and reg-names
Link: https://lore.kernel.org/r/20220506143005.3916655-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Document support for the R-Car V4H SoC and the White Hawk
development board stack,
- Document support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit
Board,
- Document SPI Multi I/O Bus Controller (RPC-IF) support for RZ/G2UL,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-dt-bindings-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.19 (take two)
- Document support for the R-Car V4H SoC and the White Hawk
development board stack,
- Document support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit
Board,
- Document SPI Multi I/O Bus Controller (RPC-IF) support for RZ/G2UL,
- Miscellaneous fixes and improvements.
* tag 'renesas-dt-bindings-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: soc: renesas: Move renesas,rzg2l-sysc from arm to soc
dt-bindings: memory: renesas,rpc-if: Document RZ/G2UL SoC
dt-bindings: arm: renesas: Document Renesas RZ/V2M SoC and EVK board
dt-bindings: power: renesas,rcar-sysc: Document r8a779g0 SYSC bindings
dt-bindings: reset: renesas,rst: Document r8a779g0 reset module
dt-bindings: arm: renesas: Document R-Car V4H White Hawk DT bindings
Link: https://lore.kernel.org/r/cover.1651828616.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The NVIDIA Tegra234 SoC comes with one single-instance ARM SMMU used by
isochronous memory clients and two dual-instance ARM SMMUs used by non-
isochronous memory clients.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20220429082243.496000-3-thierry.reding@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
On NVIDIA SoC's the ARM SMMU needs to interact with the memory
controller in order to map memory clients to the corresponding stream
IDs. Document how the nvidia,memory-controller property can be used to
achieve this.
Note that this is a backwards-incompatible change that is, however,
necessary to ensure correctness. Without the new property, most of the
devices would still work but it is not guaranteed that all will.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20220429082243.496000-2-thierry.reding@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
Add compatible for the Qualcomm SC8280XP platform to the ARM SMMU
DeviceTree binding.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220503163429.960998-2-bjorn.andersson@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
If you were to guess from the product names that CMN-650 and CMN-700 are
the next two evolutionary steps of Arm's enterprise-level interconnect
following on from CMN-600, you'd be pleasantly correct. Add them to the
DT binding.
CC: devicetree@vger.kernel.org
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
Link: https://lore.kernel.org/r/9b4dc0c82c91adff62b6f92eec5f61fb25b9db87.1650320598.git.robin.murphy@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Add device tree binding for the Bosch ACC board, based on i.MX6 Dual.
Signed-off-by: Philip Oberfichtner <pro@denx.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
ATSHA204 is predecessor of ATSHA204A which supports less features and some
of them are slightly different.
Introduce a new compatible string for ATSHA204 cryptochip "atmel,atsha204".
Current version of Linux kernel driver atmel-sha204a.c implements only hw
random number generator which is same in both ATSHA204 and ATSHA204A
cryptochips. So driver already supports also ATSHA204 hw generator, so just
simply extends list of compatible strings.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
1. Add display support for MT8186
2. Miscellaneous refinement and fixup.
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Merge tag 'mediatek-drm-next-5.19' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next
Mediatek DRM Next for Linux 5.19
1. Add display support for MT8186
2. Miscellaneous refinement and fixup.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1651702965-23630-1-git-send-email-chunkuang.hu@kernel.org
The qcom,gcc-apq8064.yaml was meant to describe only APQ8064 and APQ8084
should have slightly different bindings (without Qualcomm thermal sensor
device). Add new bindings for APQ8084.
Fixes: a469bf89a0 ("dt-bindings: clock: simplify qcom,gcc-apq8064 Documentation")
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220426064241.6379-1-krzysztof.kozlowski@linaro.org
Add the compatible for the adsp found in MSM8226.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220423155059.660387-1-luca@z3ntu.xyz
- Drop unused 'max-link-speed' in Apple PCIe
- More redundant 'maxItems/minItems' schema fixes
- Support values for pinctrl 'drive-push-pull' and 'drive-open-drain'
- Fix redundant 'unevaluatedProperties' in MT6360 LEDs binding
- Add missing 'power-domains' property to Cadence UFSHC
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Merge tag 'devicetree-fixes-for-5.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree fixes from Rob Herring:
- Drop unused 'max-link-speed' in Apple PCIe
- More redundant 'maxItems/minItems' schema fixes
- Support values for pinctrl 'drive-push-pull' and 'drive-open-drain'
- Fix redundant 'unevaluatedProperties' in MT6360 LEDs binding
- Add missing 'power-domains' property to Cadence UFSHC
* tag 'devicetree-fixes-for-5.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
dt-bindings: pci: apple,pcie: Drop max-link-speed from example
dt-bindings: Drop redundant 'maxItems/minItems' in if/then schemas
dt-bindings: pinctrl: Allow values for drive-push-pull and drive-open-drain
dt-bindings: leds-mt6360: Drop redundant 'unevaluatedProperties'
dt-bindings: ufs: cdns,ufshc: Add power-domains
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. Hence move its compatible value to the R-Car Gen4 section.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/c57ed00e85778380776330be6183c6861d843c22.1651497024.git.geert+renesas@glider.be
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. Hence move its compatible value to the R-Car Gen4 section.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/dd734aaa4e5e0b32864b038b79eafe72907fb99f.1651497024.git.geert+renesas@glider.be
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The bindings defined strict clocks but several variants do not use them
in such order. Split the clocks and clock-names per variants to match
current DTS usage. In few cases this might not be complete match, due
to incomplete DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220504131923.214367-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add compatibles for dedicated USB DWC3 blocks on Qualcomm IPQ8074,
MSM8994, QCS404 and SM6125. They differ against other variants in clock
and/or interrupts.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220504131923.214367-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The generic property, used in most of the drivers and defined in generic
dma-common DT bindings, is 'dma-channels'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220503065201.51818-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The generic property, used in most of the drivers and defined in generic
dma-common DT bindings, is 'dma-channels'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20220503065201.51818-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add binding to support the mtu3 driver on the MT8195 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://lore.kernel.org/r/20220426134106.242353-2-fparent@baylibre.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
- RTKit IPC library required to boot and communicate with
co-processors embedded inside Apple SoCs
- SART DMA address filter required to allow some DMA transactions for
the NVMe co-processor
- NVMe platform driver
The following minor changes since v3 on the mailing list have been
folded in:
- sart: %llx -> %pa for a phys_addr_t
- rtkit:/sart: Drop IS_ENABLED inside headers
- rtkit: Use EXPORT_SYMBOL_GPL instead of EXPORT_SYMBOL
- nvme: Set NVME_REQ_CANCELLED in the timeout handler
- nvme: Use DEFINE_SIMPLE_DEV_PM_OPS instead of #ifdef CONFIG_PM_SLEEP
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Merge tag 'asahi-soc-rtkit-sart-nvme-for-5.19' of https://github.com/AsahiLinux/linux into arm/drivers
Apple SoC NVMe driver and dependencies:
- RTKit IPC library required to boot and communicate with
co-processors embedded inside Apple SoCs
- SART DMA address filter required to allow some DMA transactions for
the NVMe co-processor
- NVMe platform driver
The following minor changes since v3 on the mailing list have been
folded in:
- sart: %llx -> %pa for a phys_addr_t
- rtkit:/sart: Drop IS_ENABLED inside headers
- rtkit: Use EXPORT_SYMBOL_GPL instead of EXPORT_SYMBOL
- nvme: Set NVME_REQ_CANCELLED in the timeout handler
- nvme: Use DEFINE_SIMPLE_DEV_PM_OPS instead of #ifdef CONFIG_PM_SLEEP
* tag 'asahi-soc-rtkit-sart-nvme-for-5.19' of https://github.com/AsahiLinux/linux:
nvme-apple: Add initial Apple SoC NVMe driver
dt-bindings: nvme: Add Apple ANS NVMe
soc: apple: Add SART driver
dt-bindings: iommu: Add Apple SART DMA address filter
soc: apple: Add RTKit IPC library
soc: apple: Always include Makefile
Link: https://lore.kernel.org/r/20220505154020.84638-1-sven@svenpeter.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The R329 and D1 SoCs each contain an LRADC with a programming interface
compatible to earlier LRADCs. However, the LRADC now has its own clock
gate and reset line, instead of being always active.
To support this, add clock/reset properties to the binding, and require
them for the variant in the new SoCs.
Acked-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220414002349.24332-1-samuel@sholland.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
for 5.19, please pull the following:
- Oleksij fixes the ethernet node name for the USB Ethernet adapter on
BCM283x (Raspberry Pi 1/2/3) platforms
- Kuldeep fixes the PL022 SPI controller clock names to conform to the
binding
- Rafal updates the various BCM5301X (Northstar) Device Tree include
files to be dtsschema conforming for pinctrl, NAND
- Arinc adds the Asus RT-AC88U binding, removes some unnecessary
properties of the Ethernet switch DT node, populates the correct PHY
interface for port 5 of the switch, adds support for fetching the MAC
address from the NVMEM provider and finally disables gmac0 on that
device which is unused
- Phil updates the Raspberry Pi 1/2/3 DTS files to have the latest gpio
line names conforming to the printed circuit board layout
- Krzysztof updates various Broadcom DTS files to have a conforming SPI
nor Device Tree node
- Takayoshi adds support for the Buffalo WZR-1166DHP/WZR-1166DHP2
wireless routers based on the BCM4708 SoC
- William adds support for the BCM47622 ARMv7 Broadband SoC and provides
a basic DTS to boot upstream Linux on such a system
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Merge tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.19, please pull the following:
- Oleksij fixes the ethernet node name for the USB Ethernet adapter on
BCM283x (Raspberry Pi 1/2/3) platforms
- Kuldeep fixes the PL022 SPI controller clock names to conform to the
binding
- Rafal updates the various BCM5301X (Northstar) Device Tree include
files to be dtsschema conforming for pinctrl, NAND
- Arinc adds the Asus RT-AC88U binding, removes some unnecessary
properties of the Ethernet switch DT node, populates the correct PHY
interface for port 5 of the switch, adds support for fetching the MAC
address from the NVMEM provider and finally disables gmac0 on that
device which is unused
- Phil updates the Raspberry Pi 1/2/3 DTS files to have the latest gpio
line names conforming to the printed circuit board layout
- Krzysztof updates various Broadcom DTS files to have a conforming SPI
nor Device Tree node
- Takayoshi adds support for the Buffalo WZR-1166DHP/WZR-1166DHP2
wireless routers based on the BCM4708 SoC
- William adds support for the BCM47622 ARMv7 Broadband SoC and provides
a basic DTS to boot upstream Linux on such a system
* tag 'arm-soc/for-5.19/devicetree' of https://github.com/Broadcom/stblinux: (22 commits)
ARM: dts: BCM5301X: Add DT for WZR-1166DHP,DHP2
ARM: dts: add dts files for bcmbca soc 47622
dt-bindings: arm: add bcmbca device tree binding document
ARM: dts: bcm283x: Align ETH_CLK GPIO line name
ARM: dts: bcm283x: Remove gpio line name NC
ARM: dts: bcm2835-rpi-b: Fix GPIO line names
ARM: dts: bcm2837-rpi-3-b-plus: Fix GPIO line name of power LED
ARM: dts: bcm2837-rpi-cm3-io3: Fix GPIO line names for SMPS I2C
ARM: dts: bcm2835-rpi-zero-w: Fix GPIO line name for Wifi/BT
ARM: dts: BCM5301X: Disable gmac0 and enable port@8 on Asus RT-AC88U
ARM: dts: broadcom: align SPI NOR node name with dtschema
dt-bindings: arm: bcm: add bindings for Asus RT-AC88U
ARM: dts: BCM5301X: Fix compatible strings for BCM53012 and BCM53016 SoC
dt-bindings: arm: bcm: create new description for BCM53016
dt-bindings: arm: bcm: fix BCM53012 and BCM53016 SoC strings
ARM: dts: BCM5301X: Retrieve gmac1 MAC address from NVRAM on Asus RT-AC88U
ARM: dts: BCM5301X: Add rgmii to port@5 of Broadcom switch on Asus RT-AC88U
ARM: dts: BCM5301X: Remove cell properties from srab ports on Asus RT-AC88U
ARM: dts: BCM5301X: Fix DTC warning for NAND node
ARM: dts: BCM5301X: Update pin controller node name
...
Link: https://lore.kernel.org/r/20220504210942.1838248-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The main and bulk of the change is the addition of new platform
Arm corstone1000(both FVP and FPGA versions). Also, there are
addition of Coresight Cross Trigger Interface(CTI) support on Juno,
fix for incorrect SCMI power domain IDs, addition of virtio-rng
on FVP which is default disabled as it works only on latest versions
of the FVP model.
Other miscellanous changes include dropping of useless
'dma-channels/requests' properties and updating virtio device
node names as per dtschema.
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Merge tag 'juno-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
Arm FVP/Juno device tree updates for v5.19
The main and bulk of the change is the addition of new platform
Arm corstone1000(both FVP and FPGA versions). Also, there are
addition of Coresight Cross Trigger Interface(CTI) support on Juno,
fix for incorrect SCMI power domain IDs, addition of virtio-rng
on FVP which is default disabled as it works only on latest versions
of the FVP model.
Other miscellanous changes include dropping of useless
'dma-channels/requests' properties and updating virtio device
node names as per dtschema.
* tag 'juno-updates-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: Drop useless 'dma-channels/requests' properties
arm64: dts: fvp: Align virtio device node names with dtschema
arm64: dts: fvp: Add virtio-rng support
arm64: dts: Add Arm corstone1000 platform support
dt-bindings: Add Arm corstone1000 platform
arm64: dts: juno: add CTI entries to device tree
arm64: dts: juno: Fix SCMI power domain IDs for ETF and CS funnel
Link: https://lore.kernel.org/r/20220504112917.3492009-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
-MCU:
-Fix pinctrl node names to match with pinctrl yaml.
- MPU:
-General:
- Fix pinctrl node names to match with pinctrl yaml.
- Add Protonics boards support based on STM32MP151A SoC:
- PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
TI and Micrel 10BaseT Phys and wifi support.
- PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
and CO2 sensors.
- PRTT1A - 10BaseT1L multi functional controller.
- ST boards:
- Add RTC support on stm32mp13.
- Add button and heartbit support on stm32mp13 DK board.
- Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
on OP-TEE OS and SCMI protocol.
- DH boards:
- Use MCO2 to generate PHY clock and ETHRX clock in order to release
internal PLL for a better SD card usage.
- Add 1ms PHY post-reset on Avenger96 board to match with PHY
requirements.
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Merge tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.19, round 1
Highlights:
----------
-MCU:
-Fix pinctrl node names to match with pinctrl yaml.
- MPU:
-General:
- Fix pinctrl node names to match with pinctrl yaml.
- Add Protonics boards support based on STM32MP151A SoC:
- PRTT1C - 10BaseT1L switch: mainly embeds a sja1105q switch with
TI and Micrel 10BaseT Phys and wifi support.
- PRTT1S - 10BaseT1L CO2 sensor board: mainly embeds I2C humidity
and CO2 sensors.
- PRTT1A - 10BaseT1L multi functional controller.
- ST boards:
- Add RTC support on stm32mp13.
- Add button and heartbit support on stm32mp13 DK board.
- Add a secure version of STM32MP15 ED1/EV1/DK1/DK2 boards based
on OP-TEE OS and SCMI protocol.
- DH boards:
- Use MCO2 to generate PHY clock and ETHRX clock in order to release
internal PLL for a better SD card usage.
- Add 1ms PHY post-reset on Avenger96 board to match with PHY
requirements.
* tag 'stm32-dt-for-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (24 commits)
ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
dt-bindings: arm: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
dt-bindings: reset: stm32mp15: rename RST_SCMI define
dt-bindings: clock: stm32mp15: rename CK_SCMI define
dt-bindings: clock: stm32mp1: describes clocks if "st,stm32mp1-rcc-secure"
dt-bindings: rcc: Add optional external ethernet RX clock properties
ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
ARM: dts: stm32: add support for Protonic PRTT1x boards
ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
dt-bindings: net: silabs,wfx: add prt,prtt1c-wfm200 antenna variant
dt-bindings: arm: stm32: Add compatible strings for Protonic T1L boards
dt-bindings: arm: stm32: correct blank lines
dt-bindings: arm: stm32: narrow DH STM32MP1 SoM boards
ARM: dts: stm32: enable RTC support on stm32mp135f-dk
ARM: dts: stm32: add RTC node on stm32mp131
ARM: dts: stm32: Fix PHY post-reset delay on Avenger96
ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
...
Link: https://lore.kernel.org/r/5818c943-882d-7e50-430d-ae3299a108ee@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add Meson-S4 SoC reset controller support to reset-meson, AST2600 LPC
reset controller support to reset-simple, and R9A07G054 USBPHY reset
controller support to reset-rzg2l-usbphy-ctrl. Add ACPI _RST support to
device_reset(), simplify the uniphier-glue reset driver using bulk API
and devres and clean up its dt-bindings docs. Convert most dt-bindings
docs from txt to yaml.
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Merge tag 'reset-for-v5.19' of git://git.pengutronix.de/pza/linux into arm/drivers
Reset controller updates for v5.19
Add Meson-S4 SoC reset controller support to reset-meson, AST2600 LPC
reset controller support to reset-simple, and R9A07G054 USBPHY reset
controller support to reset-rzg2l-usbphy-ctrl. Add ACPI _RST support to
device_reset(), simplify the uniphier-glue reset driver using bulk API
and devres and clean up its dt-bindings docs. Convert most dt-bindings
docs from txt to yaml.
* tag 'reset-for-v5.19' of git://git.pengutronix.de/pza/linux:
dt-bindings: reset: st,sti-powerdown: Convert to yaml
dt-bindings: reset: st,sti-picophyreset: Convert to yaml
dt-bindings: reset: socfpga: Convert to yaml
dt-bindings: reset: snps,axs10x-reset: Convert to yaml
dt-bindings: reset: nuvoton,npcm-reset: Convert to yaml
dt-bindings: reset: lantiq,reset: Convert to yaml
dt-bindings: reset: bitmain,bm1880-reset: Convert to yaml
dt-bindings: reset: berlin: Convert to yaml
dt-bindings: reset: ath79: Convert to yaml
dt-bindings: reset: amlogic,meson-axg-audio-arb: Convert to yaml
dt-bindings: reset: uniphier-glue: Clean up clocks, resets, and their names using compatible string
reset: Kconfig: Make RESET_RZG2L_USBPHY_CTRL depend on ARCH_RZG2L
reset: ACPI reset support
reset: simple: Add AST2600 compatible
reset: reset-meson: add support for the Meson-S4 SoC Reset Controller
dt-bindings: reset: add bindings for the Meson-S4 SoC Reset Controller
dt-bindings: reset: Add compatible for Meson-S4 Reset Controller
reset: uniphier-glue: Use devm_add_action_or_reset()
reset: uniphier-glue: Use reset_control_bulk API
Link: https://lore.kernel.org/r/20220503160057.46625-1-p.zabel@pengutronix.de
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The NXP PCA5608 is the 8-bit version of PCA5616.
Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Document the device tree binding for the Renesas RZ/V2M (r9a09g011) SoC.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20220503115557.53370-4-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The Renesas RZ/{G2L,V2L} System Controller (SYSC) DT binding is not
really a power-related DT binding, hence it does not belong under
Documentation/devicetree/bindings/power/.
Move it to Documentation/devicetree/bindings/soc/renesas/.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/a47015888f99476a5206a556dce93503494d9a73.1651495078.git.geert+renesas@glider.be
Document RZ/G2UL RPC-IF bindings. RZ/G2UL RPC-IF is identical to one found
on the RZ/G2L SoC. No driver changes are required as generic compatible
string "renesas,rzg2l-rpc-if" will be used as a fallback.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220501082508.25511-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This allows to group multiple PWM-connected monochrome LEDs into
multicolor LEDs, e.g. RGB LEDs.
Signed-off-by: Sven Schwermer <sven.schwermer@disruptive-technologies.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
The unit address does not make sense in all cases the multi-led node is
used, e.g. for the upcoming PWM multi-color LED driver.
Signed-off-by: Sven Schwermer <sven.schwermer@disruptive-technologies.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
The regulator is a LED connected directly to a regulator and with
its brightness controlled by the voltage of the regulator.
Cc: devicetree@vger.kernel.org
Cc: Antonio Ospite <ao2@ao2.it>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
The generic properties, used in most of the drivers and defined in
generic dma-common DT bindings, are 'dma-channels' and 'dma-requests'.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
In commit 4fdabd509d ("dt-bindings: net: lan966x: remove PHY reset")
the PHY reset was removed, but I failed to remove it from the example.
Fix it.
Fixes: 4fdabd509d ("dt-bindings: net: lan966x: remove PHY reset")
Reported-by: Rob Herring <robh@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220503132038.2714128-1-michael@walle.cc
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation
Board from Engicam.
i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.
Add bindings for it.
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the board ls1021a-iot in the binding docuemnt.
Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT compatible string for board based on the Toradex Verdin iMX8M
Mini SoM, the MX8Menlo. The board is a compatible replacement for
i.MX53 M53Menlo and features USB, multiple UARTs, ethernet, LEDs,
SD and eMMC.
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This eval board features an IMX8MN UltraLite and has DDR3L RAM. The
product part number is 8MNANOD3L-EVK.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add bindings for Aster, Iris and Iris V2 carrier boards our
Colibri iMX6S/DL may be mated with.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The dedicated device tree for V1.1 modules has been dropped. Remove
its bindings too.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add toradex,verdin-imx8mp for the Verdin iMX8M Plus modules, its nonwifi
and wifi variants and the carrier boards (both Dahlia and the Verdin
Development Board) they may be mated in.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add comment regarding the i.MX53 based Menlo board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level
peripheral providing access to the NoC and ensuring proper power
sequencing of the peripherals within the MEDIAMIX domain. Add DT
bindings for it.
There is already a driver for block controls of other SoCs in the i.MX8M
family, so these bindings will expand upon that.
Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
TQMa6ULx is a SOM family using NXP i.MX6UL CPU family.
TQMa6ULLx is a SOM family using NXP i.MX6ULL CPU family.
Both are available as a socket type as well as an LGA type.
For both variants there are the mainboards MBa6ULx and MBa6ULxL, trailing
'L' is LGA version.
Finally there is the possibility to use the socket module with an LGA
adapter on the MBa6ULxL.
The SOM needs a mainboard, therefore we provide compatibles using this
naming schema:
"tq,imx6ul-<SOM>" for the module and
"tq,imx6ul-<SOM>-<SBC>" for when mounted on the mainboard.
The i.MX6ULL version is done similar.
Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT compatible string for Data Modul i.MX8M Mini eDM SBC board
into YAML DT binding document. This system is an evaluation board
for various custom display units.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the DT binding for the HDMI blk-ctrl found on the i.MX8MP SoC.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We no longer use these since 111659c2a5 (and they never worked
anyway); drop them from the example to avoid confusion.
Fixes: 111659c2a5 ("arm64: dts: apple: t8103: Remove PCIe max-link-speed properties")
Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220502091308.28233-1-marcan@marcan.st
The additional nodes in the example referenced from the pinctrl node
'aspeed,external-nodes' properties are either incorrect (aspeed,ast2500-lpc)
or not documented with a schema (aspeed,ast2500-gfx). There's no need to
show these nodes as part of the pinctrl example, so just remove them.
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220422192139.2592632-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Another round of removing redundant minItems/maxItems when 'items' list is
specified. This time it is in if/then schemas as the meta-schema was
failing to check this case.
If a property has an 'items' list, then a 'minItems' or 'maxItems' with the
same size as the list is redundant and can be dropped. Note that is DT
schema specific behavior and not standard json-schema behavior. The tooling
will fixup the final schema adding any unspecified minItems/maxItems.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for IIO
Link: https://lore.kernel.org/r/20220503162738.3827041-1-robh@kernel.org
A few platforms, at91 and tegra, use drive-push-pull and
drive-open-drain with a 0 or 1 value. There's not really a need for values
as '1' should be equivalent to no value (it wasn't treated that way) and
drive-push-pull disabled is equivalent to drive-open-drain. So dropping the
value can't be done without breaking existing OSs. As we don't want new
cases, mark the case with values as deprecated.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220429194610.2741437-1-robh@kernel.org
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. I2C on R-Car V3U also supports some extra features (e.g. Slave
Clock Stretch Select), which are supported by other R-Car Gen4 SoCs, but
not by any other R-Car Gen3 SoC.
Hence move its compatible value to the R-Car Gen4 section.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Add compatibles for the SC8180X and SC8280XP platforms to the existing
LLCC binding.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220502215406.612967-2-bjorn.andersson@linaro.org
A common mistake when writing a device tree for a platform that is using
GICv3 with ancient CPUs is to overlook the MMIO frames that implement
the GICv2 compatibility feature, because this feature is implemented by
the CPUs and not by the GIC itself.
The compatibility feature itself is optional (all the modern
implementations have dropped it), but is present in all the ARM Ltd
implementations of the ARMv8.0 architecture (A3x, A53, A57, A72, A73),
and many others from various implementers.
Make it explicit that GICC, GICH and GICV are required for these CPUs.
Also take this opportunity to update my email address, as people keep
sending them to the wrong place...
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220409101617.268796-1-maz@kernel.org
The PMR735A comes with vdd-l7-bob-supply supply which was previously not
documented.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220426105501.73200-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The RPMH regulator binding covers several devices with different
regulator supplies, so it uses patterns matching broad range of these
supplies. This works fine but is not specific and might miss actual
mistakes when a wrong supply property is used for given variant.
Describe the supplies depending on the compatible, using a defs-allOf
method.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220426105501.73200-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
David Collins' email bounces ("Recipient address rejected: undeliverable
address: No such user here").
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220426105501.73200-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
The MT6315 PMIC dt-binding should enforce that one of the valid
regulator-compatible is set in each regulator node. However it was
mistakenly matching against regulator-name instead.
Fix the typo. This not only fixes the compatible verification, but also
lifts the regulator-name restriction, so that more meaningful names can
be set for each platform.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220429201325.2205799-1-nfraprado@collabora.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Current port description doesn't cover all possible cases. It currently
expects one single port with two endpoints.
When the HDMI connector is described in the device tree there can be two
ports, first one going to the VOP and the second one going to the connector.
Also on SoCs which only have a single VOP there will be only one
endpoint instead of two.
This patch addresses both issues. With this there can either be a single
port ("port") , or two of them ("port@0", "port@1") when the connector
is also in the device tree. Also the first or only port can either have
one endpoint ("endpoint") for single VOP SoCs or two ("endpoint@0",
"endpoint@1") for dual VOP SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-25-s.hauer@pengutronix.de
The VOP2 is found on newer Rockchip SoCs like the rk3568 or the rk3566.
The binding differs slightly from the existing VOP binding, so add a new
binding file for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-24-s.hauer@pengutronix.de
The SDHCI controller on SDX65 is based on MSM SDHCI v5 IP. Hence, document
the compatible with "qcom,sdhci-msm-v5" as the fallback.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1651480665-14978-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Cleanup indentation and order of entries in example DTS. The most
important when reading the DTS are compatible and reg. By convention
they are usually to first entries. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220428081817.35382-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Krzysztof Kozlowski