Commit Graph

1315 Commits

Author SHA1 Message Date
Padmavathi Venna 1241ef94cc clk: samsung: register audio subsystem clocks using common clock framework
Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can control i2s0 and
pcm0 clocks. This patch registers the audio subsystem clocks
with the common clock framework on Exynos family.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-06-19 03:28:41 +09:00
Jingchang Lu 1f2c5fd5f0 ARM: imx: add VF610 clock support
Add clock support for Vybrid VF610. It uses dtc macro support to
define all clock IDs in vf610-clock.h to keep clock IDs coherence
between kernel and DT.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 15:45:15 +08:00
Shawn Guo 45fe681034 ARM: imx: add clock support for imx6sl
Add clock support for i.MX6 SoloLite.  It uses the dtc marco support to
define all clock IDs in imx6sl-clock.h, which will be included by both
clock driver and device tree sources, so that the data will stay sync
all the time between kernel and DT.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 15:45:11 +08:00
Heiko Stübner d3e5116119 pinctrl: add pinctrl driver for Rockchip SoCs
This driver adds support the Cortex-A9 based SoCs from Rockchip,
so at least the RK2928, RK3066 (a and b) and RK3188.
Earlier Rockchip SoCs seem to use similar mechanics for gpio
handling so should be supportable with relative small changes.
Pull handling on the rk3188 is currently a stub, due to it being
a bit different to the earlier SoCs.

Pinmuxing as well as gpio (and interrupt-) handling tested on
a rk3066a based machine.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-06-16 11:57:32 +02:00
Olof Johansson ef0a3402cc Again some nice DT updates for AT91:
- DMA binding update with one patch shared with slave-dma tree
 - more SPI DT activation
 - enable the USB gadget HS for DT platforms
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Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt

From Nicolas Ferre:
Again some nice DT updates for AT91:
- DMA binding update with one patch shared with slave-dma tree
- more SPI DT activation
- enable the USB gadget HS for DT platforms

* tag 'at91-dt' of git://github.com/at91linux/linux-at91:
  ARM: at91: sam9m10g45ek add udc DT support
  ARM: at91: sam9g45 add udc DT support
  ARM: at91: sam9x5ek add udc DT support
  ARM: at91: sam9x5 add udc DT support
  ARM: at91: dt: at91sam9x5: add SPI DMA client infos
  ARM: at91: dt: switch DMA DT bindings to pre-processor
  ARM: at91: dt: add header to define at_hdmac configuration
2013-06-14 18:51:21 -07:00
Olof Johansson 36d29fb57c ARM: tegra: device tree updates
This branch contains all device tree updates for Tegra boards.
 
 The changes are:
 
 * Converted all DT files to use the C pre-processor, to support the use
   of named constants. This included use of defines for GPIO, IRQ, and
   clock constants.
 * Enabling new features such as:
   - SPI on Dalmore.
   - Audio on Dalmore and Beaver.
   - gpio-leds on Beaver.
   - Power-supply/batter linkage on Dalmore.
 * A minor fix to the RAM size node on Beaver.
 
 It is based on previous pull request tegra-for-3.11-deps-for-usb
 followed by a merge of tegra-for-3.11-deps-for-clk.
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Merge tag 'tegra-for-3.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt

From Stephen Warren:
ARM: tegra: device tree updates

This branch contains all device tree updates for Tegra boards.

The changes are:

* Converted all DT files to use the C pre-processor, to support the use
  of named constants. This included use of defines for GPIO, IRQ, and
  clock constants.
* Enabling new features such as:
  - SPI on Dalmore.
  - Audio on Dalmore and Beaver.
  - gpio-leds on Beaver.
  - Power-supply/batter linkage on Dalmore.
* A minor fix to the RAM size node on Beaver.

It is based on previous pull request tegra-for-3.11-deps-for-usb
followed by a merge of tegra-for-3.11-deps-for-clk.

* tag 'tegra-for-3.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (21 commits)
  ARM: tegra: enable audio on Beaver
  ARM: tegra: enable audio on Dalmore
  ARM: tegra: add power-supplies link between battery and charger
  ARM: tegra: add audio-related nodes to Tegra114 DT
  ARM: tegra114: convert device tree files to use CLK defines
  ARM: tegra30: convert device tree files to use CLK defines
  ARM: tegra20: convert device tree files to use CLK defines
  ARM: tegra: Add charger subnode to tps65090 node
  ARM: tegra: convert device tree files to use IRQ defines
  ARM: tegra: convert device tree files to use GPIO defines
  ARM: tegra: create a DT header defining GPIO IDs
  ARM: tegra: use #include for all device trees
  ARM: tegra: Add gpio-leds to Tegra30 Beaver
  ARM: tegra: fix memory size on Beaver
  ARM: tegra: enable spi4 on Dalmore
  ARM: tegra114: create a DT header defining CLK IDs
  ARM: tegra30: create a DT header defining CLK IDs
  ARM: tegra20: create a DT header defining CLK IDs
  ARM: tegra: update device trees for USB binding rework
  ARM: tegra: modify ULPI reset GPIO properties
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-14 18:09:41 -07:00
Ludovic Desroches ca79522c3f ARM: at91: dt: add header to define at_hdmac configuration
DMA-cell content is a concatenation of several values. In order to keep this
stuff human readable, macros are introduced.

The values for the FIFO configuration are not the same as the ones used in the
configuration register in order to keep backward compatibility. Most devices
use the half FIFO configuration but USART ones have to use the ASAP
configuration. This parameter was not initially planed to be into the at91 dma
dt binding. The third cell will be used to store this parameter, it will
become a concatenation of the FIFO configuration and of the peripheral ID. In
order to keep backward compatibility i.e. FIFO configuration is equal to 0, we
have to perform a translation since the value to put in the register to set
half FIFO is 1.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-06-15 00:12:30 +02:00
Stephen Warren 9798e47ff2 ARM: tegra: create a DT header defining GPIO IDs
All Tegra GPIOs are named after the GPIO bank and GPIO number within
the bank. Define a macro to calculate the GPIO ID based on those
parameters. Make the macro available via all Tegra .dtsip files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Hiroshi Doyu 992bb598f6 ARM: tegra114: create a DT header defining CLK IDs
Create a header file to define the clock IDs used by the Tegra114 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.

This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:11:11 -06:00
Hiroshi Doyu 9513109df8 ARM: tegra30: create a DT header defining CLK IDs
Create a header file to define the clock IDs used by the Tegra30 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.

This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:10:53 -06:00
Hiroshi Doyu ec23ad67f6 ARM: tegra20: create a DT header defining CLK IDs
Create a header file to define the clock IDs used by the Tegra20 clock
binding. Remove the list of definitions from the binding documentation,
and refer the reader to the header file.

This will allow the same header to be used by both device tree files,
and drivers implementing this binding, which guarantees that the two
stay in sync. This also makes device trees more readable by using names
instead of magic numbers.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, add header to clock/ instead of clk/ to match binding location]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:10:39 -06:00
Jean-Christophe PLAGNIOL-VILLARD 0e4686e6e6 ARM: at91: dt: add pinctrl pre-processor define
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-05-17 11:34:39 +02:00
Stephen Warren 4be505d4fc ARM: dt: create a DT header for the GIC
The ARM GIC binding defines a few custom cells and flags for its IRQ
specifier. Provide names for those.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
2013-04-05 12:23:24 -06:00
Stephen Warren 840ef8b7cc ARM: dt: add header to define IRQ flags
Many IRQ device tree bindings use the same flags. Create a header to
define those.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
2013-04-05 12:23:19 -06:00
Stephen Warren 71fab21fee ARM: dt: add header to define GPIO flags
Many GPIO device tree bindings use the same flags. Create a header to
define those.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
2013-04-05 12:23:14 -06:00