- Document core support for the R-Car V3U (R8A779A0) SoC and the
Renesas Falcon CPU and BreakOut boards.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCX2SgdwAKCRCKwlD9ZEnx
cMZwAQCE2jD6gvS56pI2k7zDyX5r8mbhHgxXfw2PpHFV1O831QEAjQ9/PET1JbaS
McoeM3Yumhg1vizNqrpmupnb0ujP/Qw=
=VWF0
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-bindings-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.10
- Document core support for the R-Car V3U (R8A779A0) SoC and the
Renesas Falcon CPU and BreakOut boards.
* tag 'renesas-dt-bindings-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Document Renesas Falcon boards
dt-bindings: reset: renesas,rst: Document r8a779a0 reset module
dt-bindings: power: renesas,rcar-sysc: Document r8a779a0 SYSC bindings
dt-bindings: arm: renesas: Document R-Car V3U SoC DT bindings
Link: https://lore.kernel.org/r/20200918124800.15555-5-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
- PCIe endpoint support for the RZ/G2H SoC,
- SATA support for the HopeRun HiHope RZ/G2H board,
- Increase support (CAN, LED, SPI NOR, VIN, VSP) for the RZ/G1H SoC on
the iWave Qseven board (G21D), and its camera add-on board,
- Initial support for the R-Car V3U SoC on the Falcon CPU and BreakOut
boards,
- HDMI display and sound support for the R-Car M3-W+ SoC on the
Salvator-XS board,
- Digital Radio Interface (DRIF) support for the R-Car E3 SoC,
- Minor fixes and cleanups.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCX2SkmQAKCRCKwlD9ZEnx
cIXNAP0XqvKJP7xGjQ1ORyePB1nWZtebVqGoQFxpvqwznMNZlAD7BIRlATo4LYpu
LNMya5sk85WAhZNbpkHwR++3/8m+mgE=
=Va2A
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.10 (take two)
- PCIe endpoint support for the RZ/G2H SoC,
- SATA support for the HopeRun HiHope RZ/G2H board,
- Increase support (CAN, LED, SPI NOR, VIN, VSP) for the RZ/G1H SoC on
the iWave Qseven board (G21D), and its camera add-on board,
- Initial support for the R-Car V3U SoC on the Falcon CPU and BreakOut
boards,
- HDMI display and sound support for the R-Car M3-W+ SoC on the
Salvator-XS board,
- Digital Radio Interface (DRIF) support for the R-Car E3 SoC,
- Minor fixes and cleanups.
* tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits)
arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Add DRIF support
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DB
ARM: dts: r8a7742: Add VSP support
arm64: dts: renesas: Drop superfluous pin configuration containers
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Sound support
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Display support
arm64: dts: renesas: r8a77961: Add HDMI device nodes
arm64: dts: renesas: r8a77961: Add DU device nodes
arm64: dts: renesas: r8a77961: Add VSP device nodes
arm64: dts: renesas: r8a77961: Add FCP device nodes
arm64: dts: renesas: Fix pin controller node names
ARM: dts: renesas: Fix pin controller node names
arm64: dts: renesas: Add Renesas Falcon boards support
arm64: dts: renesas: Add Renesas R8A779A0 SoC support
ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication
ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier board
ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support
ARM: dts: r8a7742: Add VIN DT nodes
...
Link: https://lore.kernel.org/r/20200918124800.15555-2-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
The Synopsys DesignWare APB GPIO controller port must have gpio-cells
property, as pointed by dtschema:
arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000: gpio-controller@0: '#gpio-cells' is a required property
Link: https://lore.kernel.org/r/20200917165040.22908-2-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
Link: https://lore.kernel.org/r/20200917165040.22908-1-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dt.yaml: gpio@20000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
Link: https://lore.kernel.org/r/20200917164909.22490-1-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add the s6e63m0 display to the Golden device
- Add the KTD253 backlight to the Skomer device
- Update the LP5521 LED DTS entries for binding changes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl9h/zEACgkQQRCzN7AZ
XXNUlw//Zl3PjaGA2Uer0Wn1JGNJmtNmnMP1c8+bWh6kYqop4L1tn7kUmq6Wgc7i
GlFrmX4NwsRRYA5CnYNsqUGYRXqjSHrjssUdHMllLcQPijvLE/POa/0rLwrVZjuZ
4R73Bn3qyIi1LiJKx8KEnMfYeIpizv5WNGWukumyNQueg7Uzj1iayvnOQUHjxk4G
PbNo5IbKLmU5XbVVzy06vfzPw5DwoPYB8L8PwAP5MrxDTH6FJ5ClleA14MovaDpI
eYd2RzPkOG2QfLVPOgC/j6JaVR+p5q7SyKqmTGNgPz0pcA1FSCJNpxS5/8OlhTdm
7G6U743jIQHMu09OVKKKjja7DMAVefgVp+/V4/dJplI2njyxLZtRb7MCfW4FFOzY
mJpJ/oI6yrWSeEjNkCoYgSbmdQDLokLPqMYIeARDviY8YjbUHOV/+oOrw8V0Toyz
2+bj5e6hoojCvKmjHvTH0cG6ATntVLPx8jGfVRRB4x87S46jC/zWfprsJGIvNKTh
BGo4urhNVN6bt1kxMKOtowME3nzOQk4wFLxi1bEc4mrCr3oRHRkHOmg0FANq0lVP
Il1lAWJ4BOLOxLhdEpT29MtU8hIFglzB/e9WGlXQFX1pRaqgDm+uroxBpaCft88X
v/38mzNkIVM2119KSvCIdPJKhGCUqrdtdV78anVaZUZstKVDIII=
=jwb5
-----END PGP SIGNATURE-----
Merge tag 'ux500-dts-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into arm/dt
Ux500 DTS updates for the v5.10 kernel cycle:
- Add the s6e63m0 display to the Golden device
- Add the KTD253 backlight to the Skomer device
- Update the LP5521 LED DTS entries for binding changes
* tag 'ux500-dts-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ste-href: Add reg property to the LP5521 channel nodes
ARM: dts: ux500-skomer: Add KTD253 backlight
ARM: dts: ux500-golden: Add S6E63M0 DSI display
Link: https://lore.kernel.org/r/CACRpkda=-cgFjN7K2vBU5x4uSYrohrZSbjqMnSFb3Qe2Az1W5g@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add public repo to MAINTAINERS
- Add SPI controller and devices
- Add eMMC controller and devices
- Add temperature sensor
-----BEGIN PGP SIGNATURE-----
iJEEABYIADkWIQQaBzOicklHovJvajA3MaYaSgcc9AUCX2HdrxscbGFycy5wb3Zs
c2VuQG1pY3JvY2hpcC5jb20ACgkQNzGmGkoHHPSyFgD8CeApRk+Nft2RMt72TyLW
A/sGGCdqnhQqp7Sswpf625wA/idFqzcEfwQNVar29MBJ3A6Uu213DK4b/lnkw9cm
Mg4E
=Ln9n
-----END PGP SIGNATURE-----
Merge tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream into arm/dt
Sparx5 DT updates for Linux 5.10
- Add public repo to MAINTAINERS
- Add SPI controller and devices
- Add eMMC controller and devices
- Add temperature sensor
* tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream:
arm64: dts: sparx5: Add spi-nand devices
arm64: dts: sparx5: Add spi-nor support
arm64: dts: sparx5: Add SPI controller and associated mmio-mux
MAINTAINERS: Add git tree for Sparx5
arm64: dts: sparx5: Add hwmon temperature sensor
arm64: dts: sparx5: Add Sparx5 eMMC support
Link: https://lore.kernel.org/r/878sda2dj0.fsf@microchip.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update the SP804 nodes to have the correct clocks and
clock names for the hi3620 SoC
- Update the SP805 nodes to have the correct clocks and
clock names for the hix5hd2 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJfYWhGAAoJEAvIV27ZiWZc1uwP/3gqVG7MQGWQfYde6wA/2xYw
LLBF981m2893EXPO2R7VppBVdpXEe6no3hxqn5IQzhKKD2jGUABn9LuJv8mcsoV9
+jsU7N6DtVKjdEQC5N8WokL032gccOwRWuCjYea39bt8bAZdLWO4LAqoacdgT78c
Oh/QrtveSCdlEHN5/jzeedWGCumDR0c0KCOtx+0Uma9NHlxAu9xH6DRalfpU1tOf
GOUzd4GzMa8dBYRXfuXxYTJJ92ivaGNPv6Q0ohIh2tnET7Ew7j5AaIvh1MDzj2NW
8j/XIZTxN9El4MnLXuEnGNEm/MRNNSvz+XtgjGCA0/zy5BHlGWXDEe/Hi1BJPXev
6faCMesvpe2Du5yKcWXhfZdiQaVmNQ2odtzQZhtDSHsxv0hXRt/XySM8LswoCVXT
aTduBOc57KKG4bNIrNkN2wCtkG1Lht0c0eo+ihSUKx8MHDHfjqh6kiaukJACx/yX
C6qdgEMyzQBvxW0Ii8lhBnP/CeVUTQPEx5m2cruitQ0mx+eDESw4rSR2jJZwG6hB
Njmf6w1ilYI3naiQVzFIl8YOKxbUI9mtGXIbtwKe0ux3kBctvq5d9d/J/KF7ceSS
fYyB8aDCPFS6BUQjWX9SOE8V/HkFiheR3UTqBS+WkNzLJ3SBF5Spzhbp3e3QD04F
ZZFX3iXZAMQZoR0Kism6
=WbPu
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10
- Update the SP804 nodes to have the correct clocks and
clock names for the hi3620 SoC
- Update the SP805 nodes to have the correct clocks and
clock names for the hix5hd2 SoC
* tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Fix SP805 clocks
ARM: dts: hisilicon: Fix SP804 users
Link: https://lore.kernel.org/r/5F617209.90003@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- Change the status properties from "ok" to "okay" for
all the hisilicon SoCs
- Update the SP805 nodes to have the correct clocks and
clock names for the hi3660 and hi6220 SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJfYWmLAAoJEAvIV27ZiWZcOhgP+gNhGuy1F1+P1LnvKDo5Hi/g
a2mf6NfySPhm9Cg/2qSQkI5F1LnQayTBWEv850oL21CzqKZ8cpifs4HuQRZDwV4V
L2MIB9/cQRKfj9cONOuRYjNNc7CZl+FmVWCIn/WV34x4xYs7QmH04n4VwBXP2VRx
6UgZ96tMsT0LB+ni9qLdxBn8F8loF7YgJCcncOeViGic+TEa8qw9kDvXcqibuXIF
R5LbhLfE1zZCBi1gveLHXIN6kAF+Zk27sZU+MwouhuYC2kp1EQ06bb0XJ8abiT93
iLiUQXvPfj9tcsZ4P6XRGODgOkrl/JU/mtxCyNziBXOU5fgnBi8TniQQVn/+0Oy5
XMtgWMFphRY5q/rnHCLgDVvp8At6mIOFjXx8+CBxoxhXEglpo2P5JQ3IXDOt/ZXA
vm/68IbE9PDm/O0bzN2gOIbVBZAttydU+oL6Otpo4l1W1xETDUskH6kGt5SYeiO2
HsTTfcKvORXmRmtfBoWMO3WfO3uRlSCtj5DygxBPn7cCNcdaaBWc9N1yVkMhhT2x
FoDU2uA4q7T8DJRaHSArhdZJk0LHdgGmaT8C8ksMkQ+4aAPQi/lzqq9KG4LuyO7p
j+F+7sKAsvOGiMcucpGilMX2QCCuicZRYs+d7QPslaiOywihHFwb3f/1c5BMpTam
4D38UFWUX3RxNV8nyBWe
=/Wrz
-----END PGP SIGNATURE-----
Merge tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10
- Change the status properties from "ok" to "okay" for
all the hisilicon SoCs
- Update the SP805 nodes to have the correct clocks and
clock names for the hi3660 and hi6220 SoCs
* tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Fix SP805 clocks
arm64: dts: hisilicon: replace status value "ok" by "okay"
Link: https://lore.kernel.org/r/5F617134.3050705@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Summit SMB3xx series is a Programmable Switching Li+ Battery Charger.
This patch adds device-tree binding for Summit SMB345, SMB347 and SMB358
chargers.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PMC found on Tegra234 is mostly similar to the one on Tegra194 but
supports slightly different I/O pads and wake events.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra234 FUSE block is very similar to that on prior chips but not
completely compatible. Document the new compatible string.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The NVIDIA Tegra234 VDK is a simulation platform for the Orin SoC. It
supports a subset of the peripherals that will be available in the final
chip and serves as a bootstrapping platform.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The MISC block found on Tegra234 is mostly similar to the one on
Tegra194 but supports slightly different register sets that make
it incompatible.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the missing compatible string for the Tegra194 MISC block.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The compatible string for the Tegra210 APBMISC block was missing from
the bindings. Add it and while at it, rewrite the description of the
compatible string to make it clearer.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be
used with SYS-DMAC0 on R-Car E3.
Fixes: 8517042060 ("arm64: dts: renesas: r8a77990: Add DMA properties to MSIOF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200917132117.8515-2-geert+renesas@glider.be
Having the pinctrl-names property in the dtsi leads to dtbs_check warnings
when the board dts doesn't define pinctrl-0. Instead, move the property to
the board dts actually using the mmc node.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200831171129.3886857-5-alexandre.belloni@bootlin.com
Add the DRIF controller nodes for the r8a77990 (a.k.a. R-Car E3).
Please note that R-Car E3 has register BITCTR located at offset
0x80 (this register is not available on the r8a77960 and r8a77951,
whose support has already been upstreamed), and even though it is
not dealt with just yet within the driver, we have to keep that
into account with our device tree nodes.
Also, please note that while testing it has emerged that the
HW User Manual has the wrong DMA details for DRIF2 and DRIF3
on E3, as they are only allowed SYS-DMAC0 rather than SYS-DMAC1
and SYS-DMAC2. An errata addressing this issue will be available
soon.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911121259.5669-1-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This patch enables CAN0 interface exposed through connector J4 on the
camera DB.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911083615.17377-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
As the pin configuration child nodes for EtherAVB on the Draak and Ebisu
boards contain only a single configuration, there is no need to wrap
them in additional grandchild containers. Hence remove the superfluous
level.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200819123910.19606-1-geert+renesas@glider.be
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The SP804 binding only specifies one or three clocks, but does not allow
just two clocks.
The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave
one "apb_pclk" clock-name to appease the primecell bus driver.
Extend the clocks by duplicating the first clock to the end of the clock
list, and add two dummy clock-names to make the primecell driver happy.
I don't know what the real APB clock for the IP is, but with the current
DT the first timer clock was used for that, so this change keeps the
current status.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
please pull the following:
- Adrian changes the status properties from "ok" to "okay"
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for the Northstar 2 platform
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl9Zj0kACgkQh9CWnEQH
BwRDcRAAyDCykidY8pkamoGnfYZQDGmrKedBlXYuTGRjRtIR0BwBZ7EmkLgVp5uT
KJ5pKUeL7Zx1w5+v2njAF7qxW+pdLYsp6UYHtxpb33FSwhkPV5jwNmPq1/kXdyPm
lud7qSzx5DPlD21bKsNwwnMS3fsqsF8OWX8kqdxabkNgwgvHGVc6S+xma+WI3fVY
P6zZBxMfU/oE7xS4ZpHxA2o4z+Yvl/6BPOvqIB+Ic+2rIc11ZcYG3P4l/dfuuY3y
sDYDmCTy7J1unRlVkGTAWVBQpEuoWnqyZVP7BqhzG/dx4GADyDbdn1XX7VM2wwru
kW+Xrpae3Ar1p6ZvlwGbBs9+aHWqe2fAYKNrMzp5d1at9mFEs/i9Wswz8usHaFZ5
je7nKTrhpf3QAXPvSsZwmkqcd59yC+6BhDczI3NUZ4IBKQNtcGVJo9RT/jNgDfar
TbJ7u1yYEh5TLQPPWDIWMOUPhtI4ZnFjzSIFmJVFaM77KvJFNCJSjF0lYjno4s1m
i7GW8U871waVp77TpfP5u6Beg5ClqBgnXFq8ceCJ4jJLODEEXYAjqP6omrpJxUSg
9FNRo6m2CJVMbaodL0dBH5S/X+J3jiSPLp6gYkMQRMpA7qZa168Mhh5DJq4Rcm3G
ks4oigW7G+/jcfyxUiNu3GuhOci5XVpenVDgRkc4Bveh5b/MfDA=
=d42J
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.10/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoCs changes for 5.10,
please pull the following:
- Adrian changes the status properties from "ok" to "okay"
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for the Northstar 2 platform
* tag 'arm-soc/for-5.10/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: Fix SP805 clock-names
arm64: dts: broadcom: replace status value "ok" by "okay"
Link: https://lore.kernel.org/r/20200912032153.1216354-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
please pull the following:
- Christian adds support for the Cisco Meraki MR32 which is based on the
BCM53016 SoC, this requires specifying the PWM, second UART and third
PCIe controller in Device Tree before finally adding support for the
board.
- Adrian updates the status properties from "ok" to "okay".
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for both the Cygnus and Northstar Plus (NSP). He does the
same thing with the SP804 timer node which was missing an
"arm,primecell" compatible string.
- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
DRM changes are ready.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl9b6asACgkQh9CWnEQH
BwRg8A//d/jxSv6PFEwZzKbzmRCw38e4hUxROUWGVLdELAkF6jywmDDVIFbOKZvH
m4bUDsUUZrXk8YnyiR2dvlwt+Qy55UgxIZEB0On8kNK+1aCHsThnVXzbK9gRsrMb
dS89BcuMK0msMVeqU/hZ01efd0O1C0Oe0UPiRvDZ6q4s/qH5RIUK/8Hx3hJGtXUY
2dMcfRLyqN8a1qqpGm5CbYJROD4L8rkg/AaaHAq71iz5uMR3r/PyCCEeT+UIV7yT
TFMsdUe//SyHPYYrbYAIqRW8mEzMEFEGvv2zlG42EroGxapPP4+fe5vGlnPGQwXk
lBLAEaZ3xTZ4p6G6s8YNWS06FM/ARRM5wsp/ZWlU5NNg/UCCUTqVOdH7Sr6fsJbV
NysQYrPf9vYfcANWmHQTZcQRHCWG9hkIoOfYbdI834z5MBMN2W2JCtOiG/fawSwM
Ir1lQpKYhQmIkp6dShB0B52EufgFdrL50N92vOBczlJWWOjcxfA6hGKKF/SxhBia
r3gMPYN3sjPAtA2Q36FiP+LOr32K9wzQZSIklSVUlcdzr15VHG/f/mKP1erWwTVS
+dVdQg9Jzm0KsPWMJ4suJocDuerZPH8BZoK6T2C9lmLD7RocKvR4keEEvVI1tdOn
DWXQ3TaJW9QM+QzavU/F4HOhK4bYyiYGIGlyhKZm32vC/jM+bw0=
=EBR/
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:
- Christian adds support for the Cisco Meraki MR32 which is based on the
BCM53016 SoC, this requires specifying the PWM, second UART and third
PCIe controller in Device Tree before finally adding support for the
board.
- Adrian updates the status properties from "ok" to "okay".
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for both the Cygnus and Northstar Plus (NSP). He does the
same thing with the SP804 timer node which was missing an
"arm,primecell" compatible string.
- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
DRM changes are ready.
* tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: broadcom: Fix SP804 node
ARM: dts: NSP: Fix SP805 clock-names
ARM: dts: Cygnus: Fix SP805 clocks
ARM: dts: NSP: replace status value "ok" by "okay"
ARM: BCM5301X: Add DT for Meraki MR32
ARM: dts: bcm2711: Enable the display pipeline
ARM: dts: BCM5301X: Specify pcie2 in the DT
ARM: dts: BCM5301X: Specify uart2 in the DT
ARM: dts: BCM5301X: Specify PWM in the DT
dt-bindings: ARM: add bindings for the Meraki MR32
Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
- New machines
* Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server
* Facebook Wedge400, an AST2500 BMC system which we can assume is 4
times better than the existing Wedge100 top of rack network switch
- Add a new device, the IBM Operation Panel
- Fixes for Facebook's collection of BMCs
- eMMC and vuart fixes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAl9bD9MACgkQa3ZZB4FH
cJ7KJA/+N7Vqo5WtSZjGOXtB+qHBH/Wv4rdmlV363FN7uqm7M22wuMUYMltam4ge
x8m4xGslkWn5ckOC6kqQSPRRy65U++I27RxrEDuykrPpLv0IzuVmmhonZbcZnTeF
q4KIWDzcITjzJsHqsn/en/50KiAaErgnikTvmaX3T/GdGTplUX+X7XODDEtJLrac
mY8d98J3wHcg/YA4D6aQ5gLmiRlx7Zm8v1NYkHcIwc0AydV8g8wnR67bwZBwVROW
aT8a9JCfADKKuZJMwDgU/WC6ZelBAZhwKAMBtzBKxYeSMYt/m1i43keW0aqpsWgc
hnqEPYj0tlt4pGgFQLfXu3WPFdKhGGx5KkeJWwBtMrudY9DAc7tis9VopqM4/2d/
vhPjaVD1qIyBP4ekL29RKD2gVSOmq3kEIuXnUcr2GQiUTkr5AY02oUIMSBfh/S8Z
pzBCwfV4g/Na4ohFBhrqTw8HnnSt65LHTFUeT8+twGoot3Ugl5b+5ooM/UnschaG
Ute7GgCvRcaarrFnDYY0O3qBdFd3TPc/Fvh54J1+n7pETabcVO2Qc9lNlN1HbtYv
0agccoKoCMEt36Buhjx+Hmwh3UH8g1mQo/D2NHJp4Eh9pYHDuOZCpY1DINQdlQQP
WiRv3mwAbe6n5hceE3dlLWqLA0akKJ+lQBZo+v9frpSKZadO8mg=
=C32V
-----END PGP SIGNATURE-----
Merge tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt
ASPEED device tree updates for 5.10
- New machines
* Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server
* Facebook Wedge400, an AST2500 BMC system which we can assume is 4
times better than the existing Wedge100 top of rack network switch
- Add a new device, the IBM Operation Panel
- Fixes for Facebook's collection of BMCs
- eMMC and vuart fixes
* tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Mowgli BMC platform
ARM: dts: rainier: Disable internal pull-downs on eMMC pins
ARM: aspeed: g5: Do not set sirq polarity
ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
ARM: dts: aspeed: rainier: Enable XDMA engine
ARM: dts: aspeed: wedge40: Update UART4 pin settings
ARM: dts: aspeed: wedge40: Update FMC flash0 label
ARM: dts: aspeed: Add Facebook Wedge400 BMC
ARM: dts: aspeed: minipack: Update 64MB FMC flash layout
ARM: dts: aspeed: yamp: Set 32MB FMC flash layout
ARM: dts: aspeed: cmm: Set 32MB FMC flash layout
ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi
Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAl9XhykACgkQAEG6vDF+
4pjOBQ/+J658DPN6oca2KfhBWrtbTf2tqHcxbrcOJOHrBgZ+ssF1RsQbaw0iEzKE
L3gKVVofafpInTjimImNg3BiLV2vqu4WEVzHBV0sF7TfnSD+b6g5FOHLq4Im45WY
lphR/dup/bmzD8jxEGbg//589DCMBQNTCfJ9+0FT5q9fBF7EimMXF3xZKPYcRly/
f+/dqK9M4zTNOqKNEzUrX8ceevAHJUtSgZIBcZ5gFKkDUTiCOo8lrN3mv3KP1EIz
xRJbcVr19vYRBfECUp4gM2XVWbTdLGb5tEcMYWZzfLZnHHuQEBa5XsYGeJXGOeny
0bgoG+D8AvgJmFJQodRy+pAFAvzVvJwcalRN0hL/kvOxCMOt3L0oL7jiCZSTUd69
P3cDwOi+5eVReJWF0vQA7uyvOqbYwJKd4FkQqS4MF350Fx0xcogRVIHkNjTE2tKw
JgA9E30vuIbgdo/0wjsToWXrTi2mUHKUB0HsDzTUCmG3/pjfpLmcsXPmEia4Js2l
aW/u9CcCJ4Wvi35X2Sccqj5TmXi5DAQ2bCQD8pPUq58akY9tlKzRChvXFz8/jETG
PMIdQLxbFhiuoqoOM9VKWmZR2pGq4qfXeK0d5oTAIfHwBx/EOaqjfT0lGCahpQn6
QhgCrWWgHMnXA2W/cnXKaNYstW/8RA/yDuYPDYAO6yu6brP8rA8=
=93Pt
-----END PGP SIGNATURE-----
Merge tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt
ARMv8 Juno/Vexpress/Fast Models updates for v5.10
A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.
* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: arm: Fix SP805 clock-names
ARM: dts: arm: Fix SP805 clocks
ARM: dts: arm: Fix SP804 users
Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
Cleanup of Exynos DTS to fix as many dtschema warnings as possible.
This includes adding missing compatibles and using non-deprecated
properties. Changes should not have a visible impact.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl9WFicQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD179JD/9PRZpxEb0TFsh+60LMepzHufXHOSitWuBo
rTOTvYnGRo1i6TaE7F8sWoSGZxNUhFouAWyLlw90mma1DP9cQaCTINM77W5oXJ1e
dWQEgKLnKkg9f3kskVPTkBNfX9z+isQNX7mmoIENqGdWIvmQihaR/RkVDJPvZHaY
2z9Pj2AsUtOSfeWLHCNOMCvU3Pmqriz3sAzmb1b905SqnoUVIVZo/FVEMnvk2T9j
AKS8lDBsmuAdB7L63mGwjKJT2oBGC8bW68tq0mJWP+D8HV0cLyHbAxhxkZ6QAJlj
s+Vf9VZ6X7MQNuu+kUUDrdn3fGMqaGnBtBvW/5C09OlpI932RpNgRoHF94e0DlP3
LswlZURL3GBGRhsUlwAQXS5A0I1nzt+9r3u/0eo76K4i3Ovo7opn9vnspUWlN0yX
mxaVSTV+OFlQdU6JImNjFqTmXxDgiJAa+h+gNEPR0/mzK10F50Rcx/cR+SriMgn5
jTLc392iK6w8vlMLoKSAutc8mGRUShE68+FKsCUaO9jaiamx+MhN16jNO8EjVbcY
ytuIiaweSXOoVcBYJSO9Ko2eyWvjFaJYVJShM4BNERWkVT2KGrsHapSRExzghrcP
x5Ggv2gxe2KRsbzczhvCXzMcrUSPkQimk09QBiXKOnQTsiF6+nrgp71fgyIWfDYQ
BIZIppYrCA==
=3V+q
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.10
Cleanup of Exynos DTS to fix as many dtschema warnings as possible.
This includes adding missing compatibles and using non-deprecated
properties. Changes should not have a visible impact.
* tag 'samsung-dt64-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add compatibles to sysreg nodes
arm64: dts: exynos: Replace deprecated "gpios" i2c-gpio property in Exynos5433
Link: https://lore.kernel.org/r/20200907150425.11077-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
possible. This includes adding missing properties (thus e.g.
enabling S3C RTC clock), correcting existing nodes, renaming of
nodes and using non-deprecated properties or compatibles. Except
mentioned bring up of S3C RTC, this should not have visible
effect.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl9WFUUQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+i0D/4w31PjRh194E9ChPvrOuuHUw2zia4GANAh
mKu6Rep+bZ0QhotA/wzqis1W/jAJrn/3w0o86ozOgBJ97ZlQbGmN0i0+kYAnNWe6
SZXMqPSYUGR//Ex+U7XxCqWIWGMocrlRAR69F+Zwgi7xznNirfTXdURORHpDbumG
rhQFet+E9bNElcyhkmyGehV3OlCTNta62kW6TMZGHNqXLlnyn64evI5SwJS5/5ea
edIlvKxC4vlVwMYV4qZwdlXCFgTrrHofo2+OwXrbR4kTr/rCdphfxwYy0jlYaTQf
q0TH+2CBpJ1qiNm0e4kSVFfAQEKiNiw547cRVI2FWMZmkEz5iaPVCKPNv2PtdRBD
+wwOXnBQ7DLgPkDdZYtTNWFF6AlCzNiLM7GA9sqOTmc5rBicndTeZ4v/2N+zWCfb
7/vF1Hg4GD9EmHYPLhjRd3PapvIys3kg5TUNwWqSk/U+Z1MxAgL/55wzr3YJIvs0
MpChCTHCpjvQ4IwkIj8qw4rOebZSiarZCQhy/Uf+SUXple8f+0jl9ID1T0xfJROb
M4dw/dnza+rl7fqgk6c1SOen5fGjPAPYjYhbFQZSQv9FkPbaFUnVOvft7P2egnp/
Sjo+uY2KsSfnN0tD5xM3gvcltKHNRska8ulIgQHD7KecWPh+XvWUaatuUqW37ypp
HrL1R4iZ8Q==
=V1Fr
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.10
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
possible. This includes adding missing properties (thus e.g.
enabling S3C RTC clock), correcting existing nodes, renaming of
nodes and using non-deprecated properties or compatibles. Except
mentioned bring up of S3C RTC, this should not have visible
effect.
* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
ARM: dts: exynos: Override thermal by label in Exynos5250
ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5 GIC
ARM: dts: s5pv210: Enable audio on Aries boards
ARM: dts: exynos: Correct whitespace and indentation issues
ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
ARM: dts: exynos: Add CPU cooling in Tiny4412
ARM: dts: exynos: Add CPU cooling in SMDK4412
...
Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
- Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board, and its display panel expansion board,
- Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
and Qseven board (G21D),
- SATA support for the HopeRun HiHope RZ/G2N board,
- PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
- Audio support for the R-Car M3-W+ SoC.
- Minor fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCX1IGJwAKCRCKwlD9ZEnx
cKjGAPkB8Jcd9TsR5PGsuZ829aTqVVKZqh3A3rOwWZ3rsRwD3AD8DYKVolrsTA0d
VbbGki8kpE8uihvqS/9xSHnfLiC7jQ8=
=iYmH
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.10
- Increase support for the RZ/G2H SoC on the HopeRun HiHope RZ/G2H
board, and its display panel expansion board,
- Increase support for the RZ/G1H SoC on the iWave RainboW SoM (G21M)
and Qseven board (G21D),
- SATA support for the HopeRun HiHope RZ/G2N board,
- PCIe endpoint support for the RZ/G2M, RZ/G2E, and RZ/G2H SoCs,
- Audio support for the R-Car M3-W+ SoC.
- Minor fixes and improvements.
* tag 'renesas-arm-dt-for-v5.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (39 commits)
arm64: dts: renesas: Add HiHope RZ/G2H board with idk-1110wr display
arm64: dts: renesas: r8a774e1: Add cpuidle support for CA5x cores
arm64: dts: renesas: r8a774e1: Add FDP1 device nodes
ARM: dts: r8a7742-iwg21d-q7: Enable PCIe Controller
ARM: dts: r8a7742: Add IPMMU DT nodes
arm64: dts: renesas: r8a77961: Enable Sound / Audio-DMAC
arm64: dts: renesas: r8a774e1: Add PWM device nodes
ARM: dts: r8a7742-iwg21m: Add SPI NOR support
arm64: dts: renesas: r8a774e1-hihope-rzg2h: Enable HS400 mode
ARM: dts: r8a7742-iwg21m: Add RTC support
ARM: dts: r8a7742-iwg21m: Sort the nodes alphabetically
ARM: dts: r8a7742: Add CAN support
arm64: dts: renesas: r8a774c0: Add PCIe EP node
arm64: dts: renesas: r8a774b1: Add PCIe EP nodes
arm64: dts: renesas: r8a774a1: Add PCIe EP nodes
ARM: dts: r8a7742: Add QSPI support
arm64: dts: renesas: r8a774e1-hihope-rzg2h: Setup DU clocks
arm64: dts: renesas: r8a774e1: Add LVDS device node
arm64: dts: renesas: r8a774e1: Populate HDMI encoder node
arm64: dts: renesas: r8a774e1: Populate DU device node
...
Link: https://lore.kernel.org/r/20200904114819.30254-3-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
- Use a known good SGX clockrate for 4430, this is not needed as a fix
as the closed source SGX driver is out of tree
- Prepare DSI panels for upcoming changes to use generic driver code
- Add common support for MOXA UC-8100 series
- Add ocp label for l3 interconnect for board specific dts files to
reference
- Configure CPU thermal properties for omap3
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl9QtcgRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMkUA/+JgCHkzQtZ0/UfSv8A3vXAaGmdGT0MxhP
6fdWs/fJUN1Z8Ixgb5bt7IF8rTrcsq8H4jmSq3XKtmLe0TrYbOE6wB6gp3TOwC6v
jkGvQg1n48MthDOezZ9wy5Ut+9HGNOsFpu/t6wzsrCI44dgTB8mc2sfk3JEZF6ha
UyV4sH2KxKRt/wbxQ+b7PrSz2RdAHysdqZKFOaMue24o9ysnI9kFn7gkvedqdWCO
FxYqd1tyOE455L+2HhRrDrmOcbYpSGW2ha2cTcnCRACFq1lHzM0myNI/TLmLF/7g
wSVcgCZ82wZ/A3Q4P6jocOH3zigEIqBnKDPib7AX1l95vLZ8AKqfD2vpzceuCacG
sTkTOJdbWOqnua+nWMz9DMmCE1m2zq5sMrEbsHOcrGoMTeKrqwGYifL3e9D9JNIY
wzqg5LjJ300HuLm4KZtn9Rpo/HdMT842sLNJBhlyUEbK7YnAZSJL2hxQh6D9kuhn
vAzMrbUolaRJg7t6cU642pM+BS2cl/HCq79SfdZajd51pNK7k/8qYosY1yV38fc+
a1bYmcbAgOK7VoDR7626zuI4zmVloqeqp1Xa8yaVOIW6I09ViewqfQeuJC7W0Y82
XcJpaFRcPZmW7Djq59oRFDqNf4Vs2xH1RYuuXGLDecLiP7xf1xnmMDVolzCQfXAF
ZOzULmFBMTs=
=jmbK
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.10
- Use a known good SGX clockrate for 4430, this is not needed as a fix
as the closed source SGX driver is out of tree
- Prepare DSI panels for upcoming changes to use generic driver code
- Add common support for MOXA UC-8100 series
- Add ocp label for l3 interconnect for board specific dts files to
reference
- Configure CPU thermal properties for omap3
* tag 'omap-for-v5.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap3: Add cpu trips and cooling map for omap34/36 families
ARM: dts: am33xx: add ocp label
ARM: dts: am335x: add common dtsi for MOXA UC-8100 series
ARM: dts: omap4-droid4: add panel orientation
ARM: dts: omap4-droid4: add panel compatible
ARM: dts: omap: add channel to DSI panels
ARM: dts: omap4: Fix sgx clock rate for 4430
ARM: dts: omap5: Fix DSI base address and clocks
ARM: dts: logicpd-som-lv-baseboard: Fix missing video
ARM: dts: logicpd-som-lv-baseboard: Fix broken audio
ARM: dts: logicpd-torpedo-baseboard: Fix broken audio
ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm()
Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix dtschema validator warnings like:
gic@fb001000: $nodename:0:
'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Olof Johansson