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Author SHA1 Message Date
Ralf Baechle 4dcfadb18e MIPS: lantiq: Replace ltq_boot_select() with dummy implementation. 
This will only be used until the last usage of ltq_boot_select() has been
removed.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2017-09-04 21:19:02 +02:00
Hauke Mehrtens 333b2707a0 MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select() 
Do not export the ltq_reset_cause() and ltq_boot_select() function any
more. ltq_reset_cause() was accessed by the watchdog driver before to
see why the last reset happened, this is now done through direct access
of the register over regmap. The bits in this register are anyway
different between the xrx200 and the falcon SoC.
ltq_boot_select() is not used any more and was used by the flash
drivers to check if the system was booted from this flash type, now the
drivers should depend on the device tree only.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: john@phrozen.org
Cc: robh@kernel.org
Cc: andy.shevchenko@gmail.com
Cc: p.zabel@pengutronix.de
Cc: kishon@ti.com
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17126/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2017-09-04 21:19:02 +02:00
Hauke Mehrtens ba735155b9 MIPS: Lantiq: Fix mask of GPE frequency 
The hardware documentation says bit 11:10 are used for the GPE
frequency selection. Fix the mask in the define to match these bits.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Thomas Langer <thomas.langer@intel.com>
Cc: linux-mips@linux-mips.org
Cc: john@phrozen.org
Patchwork: https://patchwork.linux-mips.org/patch/14648/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-12-11 11:20:25 +01:00
John Crispin 97b921087f MIPS: Change my email address 
The old address is no longer valid. Use the my new one instead.

Signed-off-by: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13201/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2016-05-13 14:02:18 +02:00
John Crispin 9bc7ebcbf1 MIPS: lantiq: add missing spi clock on falcon SoC 
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8050/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-11-24 07:45:18 +01:00
John Crispin eb5dbd22b6 MIPS: lantiq: the detection of the gpe clock is broken 
The code to detect unfused SoCs was broken due to missing register masking.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8049/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-11-24 07:45:18 +01:00
Masanari Iida 1a84db567a treewide: fix errors in printk 
This patch fix spelling typo in printk.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
 2014-09-01 11:18:25 +02:00
Thomas Langer df8b5bed1b MIPS: Lantiq: Falcon: fix asc clock definition 
The clocks of the serial ports were not setup properly.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5659/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2013-09-03 23:22:16 +02:00
John Crispin 740c606e8e MIPS: lantiq: adds static clock for PP32 
The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/
 2013-02-17 00:15:17 +01:00
John Crispin 3a6ac5004c MIPS: lantiq: falcon clocks were not enabled properly 
As a result of a non populated ->bits field inside the clock struct, the clock
domains were never powered on the Falcon. Until now we only used domains that
were also used and powered by the bootloader.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4234/
 2012-08-23 00:08:18 +02:00
John Crispin f8cd170dab MIPS: lantiq: adds support for nmi and ejtag bootrom vectors 
Register nmi and ejtag bootrom vectors for FALC-ON SoC.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4238/
 2012-08-23 00:08:17 +02:00
John Crispin d41ced01f2 MIPS: lantiq: implement support for FALCON soc 
Adds support for the FALCON SoC. This SoC is from the FTTH/GPON SoC family.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3814/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-05-21 14:31:55 +01:00