Commit Graph

1410 Commits

Author SHA1 Message Date
Linus Torvalds 8ca302e9c6 ARM: SoC platform updates
SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
 for a few platforms:
 
 - Andres Färber adds initial support for the Actions Semi S500 (a.k.a.
   'owl') platform, a close relative of the S900 platform he adds for arm64.
 
 - in mach-omap2, we remove more legacy code
 
 - Rockchips gains support for the RV1108 SoC designed for camera
   applications.
 
 - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)
 
 - Minor updates for other platforms, including davinci, s3c64xx,
   prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
  for a few platforms:

   - Andres Färber adds initial support for the Actions Semi S500 (aka
     'owl') platform, a close relative of the S900 platform he adds for
     arm64.

   - in mach-omap2, we remove more legacy code

   - Rockchips gains support for the RV1108 SoC designed for camera
     applications.

   - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)

   - Minor updates for other platforms, including davinci, s3c64xx,
     prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
  ARM: owl: smp: Drop bogus holding pen
  ARM: owl: Drop custom machine
  ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3
  soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
  soc: actions: Add Owl SPS
  dt-bindings: power: Add Owl SPS power domains
  MAINTAINERS: Update Actions Semi section with SPS
  ARM: owl: Implement CPU enable-method for S500
  MAINTAINERS: Add Actions Semi Owl section
  ARM: Prepare Actions Semi S500
  ARM: socfpga: Increase max number of GPIOs
  ARM: stm32: Introduce MACH_STM32F469 flag
  ARM: prima2: remove redundant select CPU_V7
  ARM: davinci: fix const warnings
  ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON
  ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
  ARM: OMAP4: hwmod data: add des
  ARM: OMAP4: hwmod data: add aes2
  ARM: OMAP4: hwmod data: add aes1
  ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
  ...
2017-07-04 14:34:51 -07:00
Linus Torvalds f4dd029ee0 Char/Misc patches for 4.13-rc1
Here is the "big" char/misc driver patchset for 4.13-rc1.
 
 Lots of stuff in here, a large thunderbolt update, w1 driver header
 reorg, the new mux driver subsystem, google firmware driver updates, and
 a raft of other smaller things.  Full details in the shortlog.
 
 All of these have been in linux-next for a while with the only reported
 issue being a merge problem with this tree and the jc-docs tree in the
 w1 documentation area.  The fix should be obvious for what to do when it
 happens, if not, we can send a follow-up patch for it afterward.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc updates from Greg KH:
 "Here is the "big" char/misc driver patchset for 4.13-rc1.

  Lots of stuff in here, a large thunderbolt update, w1 driver header
  reorg, the new mux driver subsystem, google firmware driver updates,
  and a raft of other smaller things. Full details in the shortlog.

  All of these have been in linux-next for a while with the only
  reported issue being a merge problem with this tree and the jc-docs
  tree in the w1 documentation area"

* tag 'char-misc-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (147 commits)
  misc: apds990x: Use sysfs_match_string() helper
  mei: drop unreachable code in mei_start
  mei: validate the message header only in first fragment.
  DocBook: w1: Update W1 file locations and names in DocBook
  mux: adg792a: always require I2C support
  nvmem: rockchip-efuse: add support for rk322x-efuse
  nvmem: core: add locking to nvmem_find_cell
  nvmem: core: Call put_device() in nvmem_unregister()
  nvmem: core: fix leaks on registration errors
  nvmem: correct Broadcom OTP controller driver writes
  w1: Add subsystem kernel public interface
  drivers/fsi: Add module license to core driver
  drivers/fsi: Use asynchronous slave mode
  drivers/fsi: Add hub master support
  drivers/fsi: Add SCOM FSI client device driver
  drivers/fsi/gpio: Add tracepoints for GPIO master
  drivers/fsi: Add GPIO based FSI master
  drivers/fsi: Document FSI master sysfs files in ABI
  drivers/fsi: Add error handling for slave
  drivers/fsi: Add tracepoints for low-level operations
  ...
2017-07-03 20:55:59 -07:00
Linus Torvalds 03ffbcdd78 Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
 "The irq department delivers:

   - Expand the generic infrastructure handling the irq migration on CPU
     hotplug and convert X86 over to it. (Thomas Gleixner)

     Aside of consolidating code this is a preparatory change for:

   - Finalizing the affinity management for multi-queue devices. The
     main change here is to shut down interrupts which are affine to a
     outgoing CPU and reenabling them when the CPU comes online again.
     That avoids moving interrupts pointlessly around and breaking and
     reestablishing affinities for no value. (Christoph Hellwig)

     Note: This contains also the BLOCK-MQ and NVME changes which depend
     on the rework of the irq core infrastructure. Jens acked them and
     agreed that they should go with the irq changes.

   - Consolidation of irq domain code (Marc Zyngier)

   - State tracking consolidation in the core code (Jeffy Chen)

   - Add debug infrastructure for hierarchical irq domains (Thomas
     Gleixner)

   - Infrastructure enhancement for managing generic interrupt chips via
     devmem (Bartosz Golaszewski)

   - Constification work all over the place (Tobias Klauser)

   - Two new interrupt controller drivers for MVEBU (Thomas Petazzoni)

   - The usual set of fixes, updates and enhancements all over the
     place"

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (112 commits)
  irqchip/or1k-pic: Fix interrupt acknowledgement
  irqchip/irq-mvebu-gicp: Allocate enough memory for spi_bitmap
  irqchip/gic-v3: Fix out-of-bound access in gic_set_affinity
  nvme: Allocate queues for all possible CPUs
  blk-mq: Create hctx for each present CPU
  blk-mq: Include all present CPUs in the default queue mapping
  genirq: Avoid unnecessary low level irq function calls
  genirq: Set irq masked state when initializing irq_desc
  genirq/timings: Add infrastructure for estimating the next interrupt arrival time
  genirq/timings: Add infrastructure to track the interrupt timings
  genirq/debugfs: Remove pointless NULL pointer check
  irqchip/gic-v3-its: Don't assume GICv3 hardware supports 16bit INTID
  irqchip/gic-v3-its: Add ACPI NUMA node mapping
  irqchip/gic-v3-its-platform-msi: Make of_device_ids const
  irqchip/gic-v3-its: Make of_device_ids const
  irqchip/irq-mvebu-icu: Add new driver for Marvell ICU
  irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP
  dt-bindings/interrupt-controller: Add DT binding for the Marvell ICU
  genirq/irqdomain: Remove auto-recursive hierarchy support
  irqchip/MSI: Use irq_domain_update_bus_token instead of an open coded access
  ...
2017-07-03 16:50:31 -07:00
Arnd Bergmann ffe3744a59 Actions Semi SoC drivers for 4.13
This adds clock source and power domain drivers for S500/S900.
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Merge tag 'actions-drivers-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers

Pull "Actions Semi SoC drivers for 4.13" from Andreas Färber:

This adds clock source and power domain drivers for S500/S900.

* tag 'actions-drivers-for-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
  soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
  soc: actions: Add Owl SPS
  dt-bindings: power: Add Owl SPS power domains
  clocksource: owl: Add S900 support
  clocksource: Add Owl timer
2017-06-29 17:34:57 +02:00
Arnd Bergmann 6d599c8d35 Amlogic 64-bit DT changes for v4.13 (round 2)
- support new SPI controller driver
 - several more leaf clocks exposed to DT
 - New board: S905x LibreTech CC board
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Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64

Pull "Amlogic 64-bit DT changes for v4.13 (round 2)" from Kevin Hilman:

- support new SPI controller driver
- several more leaf clocks exposed to DT
- New board: S905x LibreTech CC board

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-gxl: Add Libre Technology CC support
  dt-bindings: arm: amlogic: Add Libre Technology CC board
  dt-bindings: add Libre Technology vendor prefix
  ARM64: dts: meson-gx: Add SPICC nodes
  clk: meson-gxbb: un-export the CPU clock
  clk: meson-gxbb: expose UART clocks
  clk: meson-gxbb: expose SPICC gate
  clk: meson-gxbb: expose spdif master clock
  clk: meson-gxbb: expose i2s master clock
  clk: meson-gxbb: expose spdif clock gates
2017-06-29 16:59:54 +02:00
Arnd Bergmann 1964babb26 Amlogic 32-bit DT changes for v4.13 (round 2)
- greatly expands DT clock support for meson8b
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Merge tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Merge "Amlogic 32-bit DT changes for v4.13 (round 2)" from Kevin Hilman:

- greatly expands DT clock support for meson8b

* tag 'amlogic-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (22 commits)
  ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b
  ARM: dts: meson8b: add the SCU device node
  ARM: dts: meson: add USB support on Meson8 and Meson8b
  ARM: dts: meson: add the hardware random number generator
  ARM: dts: meson8: add reserved memory zones
  ARM: dts: meson: add the SAR ADC
  ARM: dts: meson8: add the pins for the SDIO controller
  ARM: dts: meson8: add the PWM_E and PWM_F pins
  ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macros
  ARM: dts: meson: use C preprocessor friendly include syntax
  ARM: dts: meson8: fix the IR receiver pins
  clk: meson8b: export the ethernet gate clock
  clk: meson8b: export the USB clocks
  clk: meson8b: export the gate clock for the HW random number generator
  clk: meson8b: export the SDIO clock
  clk: meson8b: export the SAR ADC clocks
  clk: meson-gxbb: un-export the CPU clock
  clk: meson-gxbb: expose UART clocks
  clk: meson-gxbb: expose SPICC gate
  clk: meson-gxbb: expose spdif master clock
  ...
2017-06-29 16:58:33 +02:00
Andreas Färber 4ca3fbd981 dt-bindings: power: Add Owl SPS power domains
Define power domains for all non-reserved S500 power gates.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2017-06-23 17:42:31 +02:00
Thomas Petazzoni e0de91a977 irqchip/irq-mvebu-icu: Add new driver for Marvell ICU
The Marvell ICU unit is found in the CP110 block of the Marvell Armada
7K and 8K SoCs. It collects the wired interrupts of the devices located
in the CP110 and turns them into SPI interrupts in the GIC located in
the AP806 side of the SoC, by using a memory transaction.

Until now, the ICU was configured in a static fashion by the firmware,
and Linux was relying on this static configuration. By having Linux
configure the ICU, we are more flexible, and we can allocate dynamically
the GIC SPI interrupts only for devices that are actually in use.

The driver was initially written by Hanna Hawa <hannah@marvell.com>.

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-06-23 09:14:57 +01:00
Jiancheng Xue 0d84659619 clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
Add usb2 clocks for hi3798cv200 SoC.

Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-21 10:46:45 -07:00
Sandeep Tripathy 25146e1e8f dt-bindings: clk: Extend binding doc for Stingray SOC
Update iproc clock dt-binding documentation with
Stingray pll and clock details.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:45 -07:00
Sean Wang 567bf2ed86 clk: mediatek: export cpu multiplexer clock for MT8173 SoCs
The patch enables CPU multiplexer clock on MT8173 SoC which fixes up
cpufreq driver fails at acquiring intermediate clock source when driver
probe is called.

Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:44 -07:00
Sean Wang 43ed50ee5a clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs
The patch enables CPU multiplexer clock on MT2701/MT7623 SoC which fixes
up cpufreq driver fails at acquiring intermediate clock source when driver
probe is called.

Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:44 -07:00
Zhangfei Gao 3ff77275f7 clk: hi6220: add acpu clock
Add acpu clock, including sft clock controlling hi6220 coresight module

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:42 -07:00
Shawn Guo 6454504c80 clk: zx296718: export I2S mux clocks
Export I2S mux clocks, so that device tree can refer to them for setting
a better parent clock for I2S work clock.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:42 -07:00
Stefan Agner 22039d150f clk: imx7d: create clocks behind rawnand clock gate
The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
and NAND_CLK_ROOT. However, the gate has been in the chain of the
latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
only, e.g. as required by APBH-Bridge-DMA.

Add new clocks which represent the clock after the gate, and use a
shared clock gate to correctly model the hardware.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 19:02:41 -07:00
Chen Jun 9357c150e6 clk: hi3660: add clocks for video encoder, decoder and ISP
This patch adds more clocks for hi3660, including:
 - video encoder and decoder
 - ISP (Image Signal Processing)

Signed-off-by: Chen Jun <chenjun14@huawei.com>
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 18:00:34 -07:00
Abhishek Sahu bcb486f026 clk: qcom: Add DT bindings for ipq8074 gcc clock controller
Add the compatible strings and the include file for ipq8074 gcc
clock controller.

Acked-by: Rob Herring <robh@kernel.org> (bindings)
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 17:29:39 -07:00
Linus Walleij 8b979d6258 clk: add DT bindings header for Gemini clock controller
This adds the DT binding macros used by the clock controller.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 17:25:01 -07:00
Linus Walleij d8e349af86 reset: add DT bindings header for Gemini reset controller
This adds the DT binding macros used by the reset controller.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 17:24:58 -07:00
Olof Johansson 1161a0d50a Second Round of Renesas ARM Based SoC DT Bindings Updates for v4.13
* Document:
   - Add Renesas H3-based Salvator-XS board DT bindings
   - Add iW-RainboW-G20D-Qseven-RZG1M board
   - Add iW-RainboW-G20M-Qseven-RZG1M system on module
   - Update R-Car Gen3 ULCB board part numbers
 * Add clock bit definitions for r7s72100 SoC
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Merge tag 'renesas-dt-bindings2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM Based SoC DT Bindings Updates for v4.13

* Document:
  - Add Renesas H3-based Salvator-XS board DT bindings
  - Add iW-RainboW-G20D-Qseven-RZG1M board
  - Add iW-RainboW-G20M-Qseven-RZG1M system on module
  - Update R-Car Gen3 ULCB board part numbers
* Add clock bit definitions for r7s72100 SoC

* tag 'renesas-dt-bindings2-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Document Renesas H3-based Salvator-XS board DT bindings
  ARM: shmobile: Update R-Car Gen3 ULCB board part numbers
  ARM: shmobile: document iW-RainboW-G20D-Qseven-RZG1M board
  ARM: shmobile: document iW-RainboW-G20M-Qseven-RZG1M system on module
  ARM: dts: r7s72100: add clock bit definitions

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-18 22:50:49 -07:00
Olof Johansson 7a699a85e1 - enhance scpsys to support mt6797
- add mt6797 support to scpsys
 - fix error path in pmic-wrapper
 - fix possible NULL pointer dereference in pmic-wrapper
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Merge tag 'v4.12-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers

- enhance scpsys to support mt6797
- add mt6797 support to scpsys
- fix error path in pmic-wrapper
- fix possible NULL pointer dereference in pmic-wrapper

* tag 'v4.12-next-soc' of https://github.com/mbgg/linux-mediatek:
  soc: mediatek: PMIC wrap: Fix possible NULL derefrence.
  soc: mediatek: PMIC wrap: Fix error handling
  soc: mediatek: add MT6797 scpsys support
  soc: mediatek: add vdec item for scpsys
  soc: mediatek: avoid using fixed spm power status defines

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-18 19:35:48 -07:00
Olof Johansson 63a677bca2 A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
 improvements for the rk3228/rk3229 socs (tsadc, operating points,
 usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
 rename and adc buttons for the rk3288 firefly boards.
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Merge tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

A bunch of changes including mali gpu nodes for rk3288 boards
following (and including) the new Mali Midgard binding; a lot of
improvements for the rk3228/rk3229 socs (tsadc, operating points,
usb, clock-rates, pinctrl, watchdog); finalizing the rk1108->rv1108
rename and adc buttons for the rk3288 firefly boards.

* tag 'v4.13-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: enable usb for rk3229 evb board
  ARM: dts: rockchip: add usb nodes on rk322x
  ARM: dts: rockchip: add adc button for Firefly
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-veyron
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-firefly
  ARM: dts: rockchip: enable ARM Mali GPU on rk3288-rock2-som
  ARM: dts: rockchip: add ARM Mali GPU node for rk3288
  dt-bindings: gpu: add bindings for the ARM Mali Midgard GPU
  ARM: dts: rockchip: set a sane frequence for tsadc on rk322x
  ARM: dts: rockchip: add operating-points-v2 for cpu on rk322x
  ARM: dts: rockchip: set default rates for core clocks on rk322x
  ARM: dts: rockchip: add second uart2 pinctrl on rk322x
  ARM: dts: rockchip: correct rk322x uart2 pinctrl
  ARM: dts: rockchip: add watchdog device node on rk322x
  clk: rockchip: add clock-ids for more rk3228 clocks
  clk: rockchip: add ids for camera on rk3399
  ARM: dts: rockchip: fix rk322x i2s1 pinctrl error
  ARM: dts: rockchip: rename RK1108-evb to RV1108-evb
  ARM: dts: rockchip: rename core dtsi from RK1108 to RV1108
  ARM: dts: rockchip: Setup usb vbus-supply on rk3288-rock2

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-18 19:07:25 -07:00
Stephen Boyd 4dea04c1f1 * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH)
* Add new compatible to the meson8 clock controller for meson8b
 * Add missing parents to gxbb clk81
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Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into clk-next

Pull Amlogic clk driver updates from Jerome Brunet:

 * Expose more clock gate on meson8 (SAR ADC, RNG, USB, SDIO, ETH)
 * Add new compatible to the meson8 clock controller for meson8b
 * Add missing parents to gxbb clk81

* tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson:
  clk: meson: gxbb: add all clk81 parents
  clk: meson: meson8b: add compatibles for Meson8 and Meson8m2
  clk: meson8b: export the ethernet gate clock
  clk: meson8b: export the USB clocks
  clk: meson8b: export the gate clock for the HW random number generator
  clk: meson8b: export the SDIO clock
  clk: meson8b: export the SAR ADC clocks
2017-06-16 15:01:46 -07:00
Stephen Boyd ef748cb39d Merge branch 'for-4.13-ti-clkctrl' of https://github.com/t-kristo/linux-pm into clk-next
* 'for-4.13-ti-clkctrl' of https://github.com/t-kristo/linux-pm:
  clk: ti: omap4: add clkctrl clock data
  dt-bindings: clk: add omap4 clkctrl definitions
  clk: ti: add support for clkctrl clocks
  Documentation: dt-bindings: Add binding documentation for TI clkctrl clocks
2017-06-16 14:52:02 -07:00
Stephen Boyd 8a02fcf8a0 Allwinner clock patches for 4.13
Some new clock units are supported, for the display clocks unsed in the
 newer SoCs, and the A83T PRCM.
 
 There is also a bunch of minor fixes for clocks that are not used by
 anyone, and reworks needed by drivers that will land in 4.13.
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Merge tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next

Pull Allwinner clock patches from Maxime Ripard:

Some new clock units are supported, for the display clocks unsed in the
newer SoCs, and the A83T PRCM.

There is also a bunch of minor fixes for clocks that are not used by
anyone, and reworks needed by drivers that will land in 4.13.

* tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
  clk: sunxi-ng: Move all clock types to a library
  clk: sunxi-ng: a83t: Add support for A83T's PRCM
  dt-bindings: clock: sunxi-ccu: Add compatible string for A83T PRCM
  clk: sunxi-ng: select SUNXI_CCU_MULT for sun8i-a83t
  clk: sunxi-ng: a83t: Fix audio PLL divider offset
  clk: sunxi-ng: a83t: Fix PLL lock status register offset
  clk: sunxi-ng: Add driver for A83T CCU
  clk: sunxi-ng: Support multiple variable pre-dividers
  dt-bindings: clock: sunxi-ccu: Add compatible string for A83T CCU
  clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()
  clk: sunxi-ng: sun5i: Export video PLLs
  clk: sunxi-ng: mux: Re-adjust parent rate
  clk: sunxi-ng: mux: Change pre-divider application function prototype
  clk: sunxi-ng: mux: split out the pre-divider computation code
  clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENT
  clk: sunxi-ng: div: Switch to divider_round_rate
  clk: sunxi-ng: Pass the parent and a pointer to the clocks round rate
  clk: divider: Make divider_round_rate take the parent clock
  clk: sunxi-ng: explicitly include linux/spinlock.h
  clk: sunxi-ng: add support for DE2 CCU
  ...
2017-06-16 14:45:27 -07:00
Tero Kristo 70ab980fb1 dt-bindings: clk: add omap4 clkctrl definitions
Contains offsets for all omap4 clkctrl main and optional clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
2017-06-15 10:47:59 +03:00
Stephen Boyd 9c861f3328 Merge branch 'clk-fixes' into clk-next
* clk-fixes:
  clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
  clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
  dt-bindings: clock: sunxi-ccu: Add pll-periph to PRCM's needed clocks
  clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM
  clk: sunxi-ng: v3s: Fix usb otg device reset bit
  clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset
2017-06-14 16:48:21 -07:00
Stephen Boyd 7f274d54bb clk/samsung updates for 4.13
- conversion to the clk_hw API
  - definitions and fixes of exynos5420 SoC audio subsystem
    related clocks
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Merge tag 'clk-v4.13-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk into clk-next

Pull samsung clk driver updates from Sylwester Nawrocki

 - conversion to the clk_hw API
 - definitions and fixes of exynos5420 SoC audio subsystem
   related clocks

* tag 'clk-v4.13-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk:
  clk: samsung: exynos542x: Add EPLL rate table
  clk: samsung: Add missing exynos5420 audio related clocks
  clk: samsung: Add enable/disable operation for PLL36XX clocks
  clk: samsung: s5pv210-audss: Convert to the new clk_hw API
  clk: samsung: exynos-clkout: Convert to the new clk_hw API
  clk: samsung: exynos-audss: Convert to the new clk_hw API
  clk: samsung: Convert common drivers to the new clk_hw API
  clk: samsung: Add local variable to match its purpose
  clk: samsung: Remove dead code
2017-06-14 10:36:30 -07:00
Stephen Boyd c96da4dd39 One new clock controller for the rk3128 soc, a fixup for the rk3228 cpuclk
table and the usual bunch of some new clock-ids and some clocks marked as
 critical.
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Merge tag 'v4.13-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

One new clock controller for the rk3128 soc, a fixup for the rk3228 cpuclk
table and the usual bunch of some new clock-ids and some clocks marked as
critical.

* tag 'v4.13-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: mark some special clk as critical on rk3368
  clk: rockchip: mark noc and some special clk as critical on rk3288
  clk: rockchip: mark noc and some special clk as critical on rk3228
  clk: rockchip: mark pclk_ddrupctl as critical_clock on rk3036
  clk: rockchip: add clock controller for rk3128
  dt-bindings: add bindings for rk3128 clock controller
  clk: rockchip: export more rk3228 clocks ids
  clk: rockchip: add ids for rk3399 testclks used for camera handling
  clk: rockchip: add dt-binding header for rk3128
  clk: rockchip: fix up the RK3228 clk cpu setting table
  clk: rockchip: add clock-ids for more rk3228 clocks
  clk: rockchip: add ids for camera on rk3399
2017-06-14 10:33:04 -07:00
Martin Blumenstingl c22f06d3c0 clk: meson8b: export the ethernet gate clock
Export the ethernet gate clock to the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:45 +00:00
Martin Blumenstingl 677f6af5d6 clk: meson8b: export the USB clocks
Export the USB related clocks (for the USB controller and the USB2 PHYs)
so they can be used in the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:44 +00:00
Martin Blumenstingl 06eff6a792 clk: meson8b: export the gate clock for the HW random number generator
This exports the clock so it can be used in the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:43 +00:00
Martin Blumenstingl e2e5f3211f clk: meson8b: export the SDIO clock
Export the SDIO clock so it can be used in the dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:42 +00:00
Martin Blumenstingl 70ad0d0351 clk: meson8b: export the SAR ADC clocks
Export the clocks for the SAR ADC so they can be used in the
dt-bindings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-06-12 07:30:41 +00:00
Sylwester Nawrocki 8a9cf26e30 clk: samsung: Add missing exynos5420 audio related clocks
This patch adds missing definitions of mux clocks required for using
EPLL as the audio subsystem root clock on exynos5420/exynos5422 SoCs.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2017-06-09 13:12:54 +02:00
Chen-Yu Tsai 05359be117 clk: sunxi-ng: Add driver for A83T CCU
The A83T clock control unit is a hybrid of some new style clock designs
from the A80, and old style layout from the other Allwinner SoCs.

Like the A80, the SoC does not have a low speed 32.768 kHz oscillator.
Unlike the A80, there is no clock input either. The only low speed clock
available is the internal oscillator which runs at around 16 MHz,
divided by 512, yielding a low speed clock around 31.250 kHz.

Also, the MMC2 module clock supports switching to a "new timing" mode.
This mode divides the clock output by half, and disables the CCU based
clock delays. The MMC controller must be configure to the same mode,
and then use its internal clock delays.

This driver does not support runtime switching of the timing modes.
Instead, the new timing mode is enforced at probe time. Consumers can
check which mode is active by trying to get the current phase delay
of the MMC2 phase clocks, which will return -ENOTSUPP if the new
timing mode is active.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:32:16 +02:00
Maxime Ripard 0adad031ef clk: sunxi-ng: sun5i: Export video PLLs
The video PLLs are used directly by the HDMI controller. Export them so
that we can use them in our DT node.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-06-07 15:32:14 +02:00
Icenowy Zheng ed74f8a8a6 dt-bindings: add binding for the Allwinner DE2 CCU
Allwinner "Display Engine 2.0" contains some clock controls in it.

In order to add them as clock drivers, we need a device tree binding.
Add the binding here.

Also add the device tree binding headers.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:32:12 +02:00
Pramod Kumar 8aa428cc1e arm64: dts: Add pinctrl DT nodes for Stingray SOC
This patch adds pinctrl and pinmux related DT nodes for
Stingray SOC.

For manageability, pinctrl and pinmum DT nodes are added
as separate DTSi file and included in main DTSi file.

Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-05 19:07:17 -07:00
Sandeep Tripathy 24db8c9194 dt-bindings: clk: Extend binding doc for Stingray SOC
Update iproc clock dt-binding documentation with
Stingray pll and clock details.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-05 19:07:15 -07:00
Chris Brandt fe811e1de3 ARM: dts: r7s72100: add clock bit definitions
Add the remaining bit locations for the module stop clock registers.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-05 15:39:13 +02:00
Peter Rosin 256ac03750 dt-bindings: document devicetree bindings for mux-controllers and gpio-mux
Allow specifying that a single multiplexer controller can be used to
control several parallel multiplexers, thus enabling sharing of the
multiplexer controller by different consumers.

Add a binding for a first mux controller in the form of a GPIO based mux
controller.

Acked-by: Jonathan Cameron <jic23@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03 19:25:40 +09:00
Stephen Boyd f6b3130919 Amlogic clock driver updates for 4.13
* Expose more i2s and spdif output clocks
 * Expose EE uart and SPICC gate clocks
 * Remove cpu_clk from to gxbb
 * Mark clk81 as critical on gxbb
 * Add CEC EE clocks
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Merge tag 'meson-clk-for-4.13' of git://github.com/BayLibre/clk-meson into clk-next

Pull Amlogic clock driver updates from Jerome Brunet:

 * Expose more i2s and spdif output clocks
 * Expose EE uart and SPICC gate clocks
 * Remove cpu_clk from to gxbb
 * Mark clk81 as critical on gxbb
 * Add CEC EE clocks

* tag 'meson-clk-for-4.13' of git://github.com/BayLibre/clk-meson:
  clk: meson-gxbb: Add EE 32K Clock for CEC
  clk: gxbb: remove CLK_IGNORE_UNUSED from clk81
  clk: meson: meson8b: mark clk81 as critical
  clk: meson: gxbb: remove the "cpu_clk" from the GXBB and GXL driver
  clk: meson-gxbb: un-export the CPU clock
  clk: meson-gxbb: expose UART clocks
  clk: meson-gxbb: expose SPICC gate
  clk: meson-gxbb: expose spdif master clock
  clk: meson-gxbb: expose i2s master clock
  clk: meson-gxbb: expose spdif clock gates
2017-06-02 10:51:41 -07:00
Elaine Zhang b20841b9e0 clk: rockchip: add dt-binding header for rk3128
Add the dt-bindings header for the rk3128,
that gets shared between the clock controller and
the clock references in the dts.
Add softreset ID for rk3128.
And it also applies to the RK3126 SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-06-02 14:17:05 +02:00
Richard Gong cae285ea12 dt-bindings: reset: Add reset manager offsets for Stratix10
There are several changes in reset manager offsets from Arria10 to
Stratix10. This patch is based on one from Arria10 and adds offset
updates for Stratix10

Signed-off-by: Richard Gong <richard.gong@intel.com>
2017-06-01 19:16:06 +02:00
Chen-Yu Tsai d85da227c3 clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-31 21:57:30 +02:00
Chen-Yu Tsai c4be8c68e6 clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-31 21:57:27 +02:00
Martin Blumenstingl f40a8ce96a clk: meson-gxbb: un-export the CPU clock
The CPU clock defined in the Meson GX clock driver is actually a
left-over from the Meson8b clock controller. Un-export the clock so we
can remove it from the driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-05-29 12:33:19 +00:00
Helmut Klein 9dc6bd7678 clk: meson-gxbb: expose UART clocks
Expose the clock ids of the three none AO uarts to the dt-bindings

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Helmut Klein <hgkr.klein@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[tidy the commit message to match similar change]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-05-29 12:33:08 +00:00
Neil Armstrong 34f267f162 clk: meson-gxbb: expose SPICC gate
Expose the SPICC gate clock to enable the SPICC controller.

Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[tidy commit message to match similar changes]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-05-29 12:31:26 +00:00
Jerome Brunet 0420dbb5ac clk: meson-gxbb: expose spdif master clock
Expose the spdif master clock and the mux to select the appropriate spdif
clock parent depending on the data source.

Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-05-29 12:15:22 +00:00
Jerome Brunet b4d44cdcaf clk: meson-gxbb: expose i2s master clock
Expose cts_amclk in the device tree bindings

Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-05-29 12:15:11 +00:00
Jerome Brunet c5aee2bc99 clk: meson-gxbb: expose spdif clock gates
Expose the clock gates required for the spdif output

Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-05-29 12:15:01 +00:00
Charles Keepax 05f479bf7d gpio: Add new flags to control sleep status of GPIOs
Add new flags to allow users to specify that they are not concerned with
the status of GPIOs whilst in a sleep/low power state.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 11:07:55 +02:00
Linus Walleij 128987916f reset: add DT bindings header for Gemini reset controller
This adds the DT binding macros used by the reset controller.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-05-24 10:46:12 +02:00
Geert Uytterhoeven 0ea86f5a90 clk: renesas: Add r8a7794 CPG Core Clock Definitions
Add all R-Car E2 Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2d ("List of Clocks [R-Car E2]") of the R-Car Gen2 Hardware
User's Manual rev. 2.00.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2017-05-24 10:19:53 +02:00
Geert Uytterhoeven 77d2e30d16 clk: renesas: Add r8a7793 CPG Core Clock Definitions
Add all R-Car M2-N Clock Pulse Generator Core Clock Outputs, as listed
in Table 7.2b ("List of Clocks [R-Car M2-W/M2-N]") of the R-Car Gen2
Hardware User's Manual rev. 2.00.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2017-05-24 10:19:50 +02:00
Geert Uytterhoeven 34806f1265 clk: renesas: Add r8a7792 CPG Core Clock Definitions
Add all R-Car V2H Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2c ("List of Clocks [R-Car V2H]") of the R-Car Gen2 Hardware
User's Manual rev. 2.00.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2017-05-24 10:19:47 +02:00
Geert Uytterhoeven 27e154b2b6 clk: renesas: Add r8a7791 CPG Core Clock Definitions
Add all R-Car M2-W Clock Pulse Generator Core Clock Outputs, as listed
in Table 7.2b ("List of Clocks [R-Car M2-W/M2-N]") of the R-Car Gen2
Hardware User's Manual rev. 2.00.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2017-05-24 10:19:45 +02:00
Geert Uytterhoeven cedd162b4d clk: renesas: Add r8a7790 CPG Core Clock Definitions
Add all R-Car H2 Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2a ("List of Clocks [R-Car H2]") of the R-Car Gen2 Hardware
User's Manual rev. 2.00.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2017-05-24 10:19:42 +02:00
Elaine Zhang a1e10b50ce clk: rockchip: add clock-ids for more rk3228 clocks
This patch exports related BUS/VPU/RGA/HDCP/IEP/TSP/WIFI/
VIO/USB/EFUSE/GPU/CRYPTO clocks for dts reference.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-05-17 19:47:44 +02:00
Eddie Cai f22e4359cd clk: rockchip: add ids for camera on rk3399
we use SCLK_TESTCLKOUT1 and SCLK_TESTCLKOUT2 for camera, so add those ids.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-05-17 19:46:17 +02:00
Mars Cheng 36c310f55b soc: mediatek: add MT6797 scpsys support
This adds scpsys support for MT6797

Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-05-15 10:47:25 +02:00
Chris Brandt 40c9bbea14 ARM: dts: r7s72100: add USB bit definitions
Add the bit locations that correspond to the USB clocks.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-15 09:02:37 +02:00
Jacopo Mondi 62c2f988d7 ARM: dts: r7s72100: add Renesas RZ/A1 pinctrl header
Add dt-bindings for Renesas r7s72100 pin controller header file.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-15 09:02:37 +02:00
Marek Vasut a56a2fe711 ARM: dts: r8a7791: add GyroADC clock
Add the GyroADC clock to the R8A7791 device tree.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-15 09:02:37 +02:00
Linus Torvalds b5a53b61a2 Sort of on the quieter side this time, which is probably due more
to me not catching up as quickly on patch review than anything else.
 Overall it seems normal though, a few small changes to the core, mostly
 small non-critical fixes here and there as well as driver updates for new
 and existing hardware support. The biggest things are the TI clk driver
 rework to lay the groundwork for clkctrl support in the next merge window
 and the AmLogic audio/graphics clk support.
 
 Core:
  * clk_possible_parents debugfs file so we know which parents a clk
    could possibly have
  * Fix to make clk rate change notifiers stop on the first failure instead
    of continuing
 
 New Drivers:
  * Mediatek MT6797 SoCs
  * hi655x PMIC clks
  * AmLogic Meson SoC i2s and spdif audio clks and Mali graphics clks
  * Allwinner H5 SoCs and PRCM hardware
 
 Updates:
  * Nvidia Tegra T210 cleanups and non-critical fixes
  * TI OMAP cleanups in preparation for clkctrl support
  * Trivial fixes like kcalloc(), devm_* conversions, and seq_puts()
  * ZTE zx296718 SoC VGA clks
  * Rockchip clk-ids, fixups, and rename of rk1108 to rv1108
  * Support for IDT VersaClock 5P49V5935
  * Renesas R-Car H3 and M3-W IMR clks and ES2.0 rev of R-Car H3 support
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "Sort of on the quieter side this time, which is probably due more to
  me not catching up as quickly on patch review than anything else.
  Overall it seems normal though, a few small changes to the core,
  mostly small non-critical fixes here and there as well as driver
  updates for new and existing hardware support.

  The biggest things are the TI clk driver rework to lay the groundwork
  for clkctrl support in the next merge window and the AmLogic
  audio/graphics clk support.

  Core:
   - clk_possible_parents debugfs file so we know which parents a clk
     could possibly have
   - Fix to make clk rate change notifiers stop on the first failure
     instead of continuing

  New Drivers:
   - Mediatek MT6797 SoCs
   - hi655x PMIC clks
   - AmLogic Meson SoC i2s and spdif audio clks and Mali graphics clks
   - Allwinner H5 SoCs and PRCM hardware

  Updates:
   - Nvidia Tegra T210 cleanups and non-critical fixes
   - TI OMAP cleanups in preparation for clkctrl support
   - trivial fixes like kcalloc(), devm_* conversions, and seq_puts()
   - ZTE zx296718 SoC VGA clks
   - Rockchip clk-ids, fixups, and rename of rk1108 to rv1108
   - IDT VersaClock 5P49V5935 support
   - Renesas R-Car H3 and M3-W IMR clks and ES2.0 rev of R-Car H3
     support"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (151 commits)
  clk: x86: pmc-atom: Checking for IS_ERR() instead of NULL
  clk: ti: divider: try to fix ti_clk_register_divider
  clk: mvebu: Use kcalloc() in two functions
  clk: mvebu: Use kcalloc() in of_cpu_clk_setup()
  clk: nomadik: Delete error messages for a failed memory allocation in two functions
  clk: nomadik: Use seq_puts() in nomadik_src_clk_show()
  clk: Improve a size determination in two functions
  clk: Replace four seq_printf() calls by seq_putc()
  clk: si5351: Delete an error message for a failed memory allocation in si5351_i2c_probe()
  clk: si5351: Use devm_kcalloc() in si5351_i2c_probe()
  clk: at91: Use kcalloc() in of_at91_clk_pll_get_characteristics()
  reset: mediatek: Add MT2701 ethsys reset controller include file
  clk: mediatek: add mt2701 ethernet reset
  clk: hi6220: Add the hi655x's pmic clock
  clk: ti: fix building without legacy omap3
  clk: ti: fix linker error with !SOC_OMAP4
  clk: hi3620: Fix a typo in one variable name
  clk: hi3620: Delete error messages for a failed memory allocation in two functions
  clk: hi3620: Use kcalloc() in hi3620_mmc_clk_init()
  clk: hisilicon: Delete error messages for failed memory allocations in hisi_clk_init()
  ...
2017-05-10 13:38:18 -07:00
Linus Torvalds c6778ff813 ARM: 64-bit DT updates
Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch of smaller
 changes, but also some new platforms that are worth mentioning:
 
  * Rockchip RK3399 platforms for Chromebooks, including Samsung Chromebook
    Plus (Kevin)
  * Orange Pi PC2 (Allwinner H5)
  * Freescale LS2088A and LS1088A SoCs
  * Expanded support for Nvidia Tegra186 (and Jetson TX2)
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Olof Johansson:
 "Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch
  of smaller changes, but also some new platforms that are worth
  mentioning:

   - Rockchip RK3399 platforms for Chromebooks, including Samsung
     Chromebook Plus (Kevin)

   - Orange Pi PC2 (Allwinner H5)

   - Freescale LS2088A and LS1088A SoCs

   - Expanded support for Nvidia Tegra186 (and Jetson TX2)"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits)
  arm64: dts: Add basic DT to support Spreadtrum's SP9860G
  arm64: dts: exynos: Use - instead of @ for DT OPP entries
  arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board
  arm64: dts: juno: add information about L1 and L2 caches
  arm64: dts: juno: fix few unit address format warnings
  arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB
  arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB
  arm64: marvell: dts: add crypto engine description for 7k/8k
  arm64: dts: marvell: add sdhci support for Armada 7K/8K
  arm64: dts: marvell: add eMMC support for Armada 37xx
  arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
  arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
  arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
  arm64: dts: hisi: add SAS nodes for the hip07 SoC
  arm64: dts: hisi: add RoCE nodes for the hip07 SoC
  arm64: dts: hisi: add network related nodes for the hip07 SoC
  arm64: dts: hisi: add mbigen nodes for the hip07 SoC
  arm64: dts: rockchip: fix the memory size of PX5 Evaluation board
  arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
  dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
  ...
2017-05-09 10:07:33 -07:00
Linus Torvalds 0160e00ae8 ARM: SoC driver updates
Driver updates for ARM SoCs.
 
 * Reset subsystem, merged through arm-soc by tradition:
  - Make bool drivers explicitly non-modular
  - New support for i.MX7 and Arria10 reset controllers
 
 * PATA driver for Palmchip BK371 (acked by Tejun)
 
 * Power domain drivers for i.MX (GPC, GPCv2)
  - Moved out of mach-imx for GPC
  - Bunch of tweaks, fixes, etc
 
 * PMC support for Tegra186
 
 * SoC detection support for Renesas RZ/G1H and RZ/G1N
 
 * Move Tegra flow controller driver from mach directory to drivers/soc
  - (Power management / CPU power driver)
 
 * Misc smaller tweaks for other platforms
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Driver updates for ARM SoCs:

  Reset subsystem, merged through arm-soc by tradition:
   - Make bool drivers explicitly non-modular
   - New support for i.MX7 and Arria10 reset controllers

  PATA driver for Palmchip BK371 (acked by Tejun)

  Power domain drivers for i.MX (GPC, GPCv2)
   - Moved out of mach-imx for GPC
   - Bunch of tweaks, fixes, etc

  PMC support for Tegra186

  SoC detection support for Renesas RZ/G1H and RZ/G1N

  Move Tegra flow controller driver from mach directory to drivers/soc
   - (Power management / CPU power driver)

  Misc smaller tweaks for other platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (60 commits)
  soc: pm-domain: Fix the mangled urls
  soc: renesas: rcar-sysc: Add support for R-Car H3 ES2.0
  soc: renesas: rcar-sysc: Add support for fixing up power area tables
  soc: renesas: Register SoC device early
  soc: imx: gpc: add workaround for i.MX6QP to the GPC PD driver
  dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible
  soc: imx: gpc: add defines for domain index
  soc: imx: Add GPCv2 power gating driver
  dt-bindings: Add GPCv2 power gating driver
  ARM/clk: move the ICST library to drivers/clk
  ARM: plat-versatile: remove stale clock header
  ARM: keystone: Drop PM domain support for k2g
  soc: ti: Add ti_sci_pm_domains driver
  dt-bindings: Add TI SCI PM Domains
  PM / Domains: Do not check if simple providers have phandle cells
  PM / Domains: Add generic data pointer to genpd data struct
  soc/tegra: Add initial flowctrl support for Tegra132/210
  soc/tegra: flowctrl: Add basic platform driver
  soc/tegra: Move Tegra flowctrl driver
  ARM: tegra: Remove unnecessary inclusion of flowctrl header
  ...
2017-05-09 10:01:15 -07:00
Linus Torvalds 85d604902e ARM: Device-tree updates
Device-tree continues to see lots of updates. The majority of patches
 here are smaller changes for new hardware on existing platforms, and
 there are a few larger changes worth pointing out.
 
 Major new platforms:
 
  - Gemini has been ported to DT, so a handful of "new" platforms moved over
    from board files
  - Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288 SoM and RDK
  - A bunch of embedded platforms, several Linksys platforms, Synology DS116,
  - Motorola Droid4 (really old OMAP-based phone) support is added.
 
 Some refactorings, i.e. Allwinner H3/H5 support is commonalized.
 
 And lots of smaller changes, cleanups, etc. See shortlog for more description
 
 We're adding ability to cross-include DT files between arm and arm64,
 by creating appropriate links in the dt-include directory, and using arm/
 and arm64/ as include prefixes. This will avoid other local hacks such as
 per-file links between the two arch trees (this broke for external mirroring
 of DT contents). Now they can just provide their own appropriate dt-include
 hierarcy per platform.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Device-tree updates from Olof Johansson:
 "Device-tree continues to see lots of updates. The majority of patches
  here are smaller changes for new hardware on existing platforms, and
  there are a few larger changes worth pointing out.

  Major new platforms:

   - Gemini has been ported to DT, so a handful of "new" platforms moved
     over from board files

   - Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288
     SoM and RDK

   - A bunch of embedded platforms, several Linksys platforms, Synology
     DS116,

   - Motorola Droid4 (really old OMAP-based phone) support is added.

  Some refactorings, i.e. Allwinner H3/H5 support is commonalized.

  And lots of smaller changes, cleanups, etc. See shortlog for more
  description

  We're adding ability to cross-include DT files between arm and arm64,
  by creating appropriate links in the dt-include directory, and using
  arm/ and arm64/ as include prefixes. This will avoid other local hacks
  such as per-file links between the two arch trees (this broke for
  external mirroring of DT contents). Now they can just provide their
  own appropriate dt-include hierarcy per platform"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits)
  ARM: dts: exynos: Use - instead of @ for DT OPP entries
  arm: spear6xx: add DT description of the ADC on SPEAr600
  arm: spear6xx: remove unneeded pinctrl properties in spear600-evb
  arm: spear6xx: switch spear600-evb to the new flash partition DT binding
  arm: spear6xx: fix spaces in spear600-evb.dts
  arm: spear6xx: use node labels in spear600-evb.dts
  arm: spear6xx: add labels to various nodes in spear600.dtsi
  ARM: dts: vexpress: fix few unit address format warnings
  ARM: dts: at91: sama5d3_xplained: not all ADC channels are available
  ARM: dts: at91: sama5d3_xplained: fix ADC vref
  ARM: dts: at91: add envelope detector mux to the Axentia TSE-850
  ARM: dts: armada-38x: label USB and SATA nodes
  ARM: dts: imx6q-utilite-pro: add hpd gpio
  ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
  ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
  ARM: dts: imx: add Gateworks Ventana GW5903 support
  ARM: dts: i.MX25: add AIPS control registers
  ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
  ARM: dts: imx7-colibri: remove 1.8V fixed regulator
  ARM: dts: imx7-colibri: allow to disable Ethernet rail
  ...
2017-05-09 09:54:39 -07:00
Linus Torvalds 2bd8040174 This is the bulk of GPIO changes for the v4.12 kernel cycle:
Core changes
 
 - Return NULL from gpiod_get_optional() when GPIOLIB is disabled.
   This was a much discussed change. It affects use cases where people
   write drivers that might or might not be using GPIO resources.
   I have decided that this is the lesser evil right now.
 
 - Make gpiod_count() behave consistently across different hardware
   descriptions.
 
 - Fix the syntax around open drain/open source to not infer active
   high/low semantics.
 
 New drivers
 
 - A new single-register fixed-direction framework driver for hardware
   that have lines controlled by a single register that just work in
   one direction (out or in), including IRQ support.
 
 - Support the Fintek F71889A GPIO SuperIO controller.
 
 - Support the National NI 169445 MMIO GPIO.
 
 - Support for the X-Gene derivative of the DWC GPIO controller
 
 - Support for the Rohm BD9571MWV-M PMIC GPIO controller.
 
 - Refactor the Gemini GPIO driver to a generic Faraday FTGPIO driver
   and replace both the Gemini and the Moxa ART custom drivers with
   this driver.
 
 Driver improvements
 
 - A whole slew of drivers have their spinlocks chaned to raw spinlocks
   as they provide irqchips, and thus we are progressing on realtime
   compliance.
 
 - Use devm_irq_alloc_descs() in a slew of drivers, getting managed
   resources.
 
 - Support for the embedded PWM controller inside the MVEBU driver.
 
 - Debounce, open source and open drain support for the Aspeed driver.
 
 - Misc smaller fixes like spelling and syntax and whatnot.
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Merge tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v4.12 kernel cycle.

  Core changes:

   - Return NULL from gpiod_get_optional() when GPIOLIB is disabled.
     This was a much discussed change. It affects use cases where people
     write drivers that might or might not be using GPIO resources. I
     have decided that this is the lesser evil right now.

   - Make gpiod_count() behave consistently across different hardware
     descriptions.

   - Fix the syntax around open drain/open source to not infer active
     high/low semantics.

  New drivers:

   - A new single-register fixed-direction framework driver for hardware
     that have lines controlled by a single register that just work in
     one direction (out or in), including IRQ support.

   - Support the Fintek F71889A GPIO SuperIO controller.

   - Support the National NI 169445 MMIO GPIO.

   - Support for the X-Gene derivative of the DWC GPIO controller

   - Support for the Rohm BD9571MWV-M PMIC GPIO controller.

   - Refactor the Gemini GPIO driver to a generic Faraday FTGPIO driver
     and replace both the Gemini and the Moxa ART custom drivers with
     this driver.

  Driver improvements:

   - A whole slew of drivers have their spinlocks chaned to raw
     spinlocks as they provide irqchips, and thus we are progressing on
     realtime compliance.

   - Use devm_irq_alloc_descs() in a slew of drivers, getting managed
     resources.

   - Support for the embedded PWM controller inside the MVEBU driver.

   - Debounce, open source and open drain support for the Aspeed driver.

   - Misc smaller fixes like spelling and syntax and whatnot"

* tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (77 commits)
  gpio: f7188x: Add a missing break
  gpio: omap: return error if requested debounce time is not possible
  gpio: Add ROHM BD9571MWV-M PMIC GPIO driver
  gpio: gpio-wcove: fix GPIO IRQ status mask
  gpio: DT bindings, move tca9554 from pcf857x to pca953x
  gpio: move tca9554 from pcf857x to pca953x
  gpio: arizona: Correct check whether the pin is an input
  gpio: Add XRA1403 DTS binding documentation
  dt-bindings: add exar to vendor prefixes list
  gpio: gpio-wcove: fix irq pending status bit width
  gpio: dwapb: use dwapb_read instead of readl_relaxed
  gpio: aspeed: Add open-source and open-drain support
  gpio: aspeed: Add debounce support
  gpio: aspeed: dt: Add optional clocks property
  gpio: aspeed: dt: Fix description alignment in bindings document
  gpio: mvebu: Add limited PWM support
  gpio: Use unsigned int for interrupt numbers
  gpio: f7188x: Add F71889A GPIO support.
  gpio: core: Decouple open drain/source flag with active low/high
  gpio: arizona: Correct handling for reading input GPIOs
  ...
2017-05-04 12:05:32 -07:00
Linus Torvalds 68fed41e0f This is the bulk of pin control changes for the v4.12 cycle:
Core changes:
 
 - Add bi-directional and output-enable pin configurations to
   the generic bindings and generic pin controlling core.
 
 New drivers or subdrivers:
 
 - Armada 37xx SoC pin controller and GPIO support.
 
 - Axis ARTPEC-6 SoC pin controller support.
 
 - AllWinner A64 R_PIO controller support, and opening up the
   AllWinner sunxi driver for ARM64 use.
 
 - Rockchip RK3328 support.
 
 - Renesas R-Car H3 ES2.0 support.
 
 - STM32F469 support in the STM32 driver.
 
 - Aspeed G4 and G5 pin controller support.
 
 Improvements:
 
 - A whole slew of realtime improvements to drivers implementing
   irqchips: BCM, AMD, SiRF, sunxi, rockchip.
 
 - Switch meson driver to get the GPIO ranges from the device
   tree.
 
 - Input schmitt trigger support on the Rockchip driver.
 
 - Enable the sunxi (AllWinner) driver to also be used on ARM64
   silicon.
 
 - Name the Qualcomm QDF2xxx GPIO lines.
 
 - Support GMMR GPIO regions on the Intel Cherryview. This
   fixes a serialization problem on these platforms.
 
 - Pad retention support for the Samsung Exynos 5433.
 
 - Handle suspend-to-ram in the AT91-pio4 driver.
 
 - Pin configuration support in the Aspeed driver.
 
 Cleanups:
 
 - The final name of Rockchip RK1108 was RV1108 so rename the
   driver and variables to stay consistent.
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Merge tag 'pinctrl-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.12 cycle.

  The extra week before the merge window actually resulted in some of
  the type of fixes that usually arrive after the merge window already
  starting to trickle in from eager developers using -next, I'm
  impressed.

  I have recruited a Samsung subsubsystem maintainer (Krzysztof) to deal
  with the onset of Samsung patches. It works great.

  Apart from that it is a boring round, just incremental updates and
  fixes all over the place, no serious core changes or anything exciting
  like that. The most pleasing to see is Julia Cartwrights work to audit
  the irqchip-providing drivers for realtime locking compliance. It's
  one of those "I should really get around to looking into that" things
  that have been on my TODO list since forever.

  Summary:

  Core changes:

   - add bi-directional and output-enable pin configurations to the
     generic bindings and generic pin controlling core.

  New drivers or subdrivers:

   - Armada 37xx SoC pin controller and GPIO support.

   - Axis ARTPEC-6 SoC pin controller support.

   - AllWinner A64 R_PIO controller support, and opening up the
     AllWinner sunxi driver for ARM64 use.

   - Rockchip RK3328 support.

   - Renesas R-Car H3 ES2.0 support.

   - STM32F469 support in the STM32 driver.

   - Aspeed G4 and G5 pin controller support.

  Improvements:

   - a whole slew of realtime improvements to drivers implementing
     irqchips: BCM, AMD, SiRF, sunxi, rockchip.

   - switch meson driver to get the GPIO ranges from the device tree.

   - input schmitt trigger support on the Rockchip driver.

   - enable the sunxi (AllWinner) driver to also be used on ARM64
     silicon.

   - name the Qualcomm QDF2xxx GPIO lines.

   - support GMMR GPIO regions on the Intel Cherryview. This fixes a
     serialization problem on these platforms.

   - pad retention support for the Samsung Exynos 5433.

   - handle suspend-to-ram in the AT91-pio4 driver.

   - pin configuration support in the Aspeed driver.

  Cleanups:

   - the final name of Rockchip RK1108 was RV1108 so rename the driver
     and variables to stay consistent"

* tag 'pinctrl-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
  pinctrl: mediatek: Add missing pinctrl bindings for mt7623
  pinctrl: artpec6: Fix return value check in artpec6_pmx_probe()
  pinctrl: artpec6: Remove .owner field for driver
  pinctrl: tegra: xusb: Silence sparse warnings
  ARM: at91/at91-pinctrl documentation: fix spelling mistake: "contoller" -> "controller"
  pinctrl: make artpec6 explicitly non-modular
  pinctrl: aspeed: g5: Add pinconf support
  pinctrl: aspeed: g4: Add pinconf support
  pinctrl: aspeed: Add core pinconf support
  pinctrl: aspeed: Document pinconf in devicetree bindings
  pinctrl: Add st,stm32f469-pinctrl compatible to stm32-pinctrl
  pinctrl: stm32: Add STM32F469 MCU support
  Documentation: dt: Remove ngpios from stm32-pinctrl binding
  pinctrl: stm32: replace device_initcall() with arch_initcall()
  pinctrl: stm32: add possibility to use gpio-ranges to declare bank range
  pinctrl: armada-37xx: Add gpio support
  pinctrl: armada-37xx: Add pin controller support for Armada 37xx
  pinctrl: dt-bindings: Add documentation for Armada 37xx pin controllers
  pinctrl: core: Make pinctrl_init_controller() static
  pinctrl: generic: Add bi-directional and output-enable
  ...
2017-05-02 17:59:33 -07:00
Sean Wang 1aa2faf52f pinctrl: mediatek: Add missing pinctrl bindings for mt7623
Add missing pinctrl binding these which would be used in
devicetree related files.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-28 09:54:41 +02:00
Arnd Bergmann b6942b68f8 Merge branch 'for_4.12/soc-pmdomain-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers
Pull "Keystone mangled URLs fixed" from Santosh Shilimkar

* 'for_4.12/soc-pmdomain-p2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: pm-domain: Fix the mangled urls
2017-04-27 21:49:14 +02:00
Santosh Shilimkar 7574f67eb4 soc: pm-domain: Fix the mangled urls
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-04-24 14:17:35 -07:00
John Crispin 7c2adaf110 reset: mediatek: Add MT2701 ethsys reset controller include file
Add the missing reset bits of the ethsys core to the mt2701-reset include
file, so that we can reference them from within a devicetree file.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-21 19:20:34 -07:00
Stephen Boyd ddc34434e4 Merge branch 'clk-mt6797' into clk-next
* clk-mt6797:
  clk: mediatek: add mt6797 clock IDs
2017-04-19 09:16:59 -07:00
Mars Cheng df0225a45a clk: mediatek: add mt6797 clock IDs
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-19 09:15:33 -07:00
Stephen Boyd 8062b4aafc Allwinner clock patches for 4.12
Support for the new H5 SoC and the PRCM block found in a number of SoCs as
 well, plus the usual chunk of fixes and minor enhancements.
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Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-next

Pull Allwinner clock patches for 4.12 from Maxime Ripard:

Support for the new H5 SoC and the PRCM block found in a number of SoCs as
well, plus the usual chunk of fixes and minor enhancements.

* tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: Display index when clock registration fails
  clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factor
  clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocks
  clk: sunxi-ng: mult: Support PLL lock detection
  clk: sunxi-ng: add support for PRCM CCUs
  dt-bindings: update device tree binding for Allwinner PRCM CCUs
  clk: sunxi-ng: sun5i: Fix mux width for csi clock
  clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCs
  clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver
  clk: sunxi-ng: gate: Support common pre-dividers
2017-04-19 09:02:00 -07:00
Olof Johansson 32d8b52b90 Renesas ARM Based SoC Sysc Updates for v4.12
* Add support for R-Car H3 ES2.0
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Merge tag 'renesas-sysc-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Renesas ARM Based SoC Sysc Updates for v4.12

* Add support for R-Car H3 ES2.0

* tag 'renesas-sysc-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-sysc: Add support for R-Car H3 ES2.0
  soc: renesas: rcar-sysc: Add support for fixing up power area tables
  soc: renesas: Register SoC device early
  base: soc: Allow early registration of a single SoC device
  base: soc: Let soc_device_match() return no match when called too early

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19 06:56:18 -07:00
Olof Johansson a51ed6cfb2 Second Round of Renesas ARM Based SoC DT Updates for v4.12
Corrections:
 * Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
 * Correct Z clock for r8a7792 SoC
 * Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
 * Correct ethernet clock parent on r7s72100 SoC
 * Correct DU clock for r8a7794/silk board
 
 Cleanups:
 * Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs
 
 Enhancements:
 * Enable rtc r7s72100/genmai board
 * Add Z2 clock for r8a7794 SoC
 * Add DU clock for r8a7794 SoC
 * Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
 * Add reset control properties for r8a774[35] SoCs
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Merge tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM Based SoC DT Updates for v4.12

Corrections:
* Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
* Correct Z clock for r8a7792 SoC
* Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
* Correct ethernet clock parent on r7s72100 SoC
* Correct DU clock for r8a7794/silk board

Cleanups:
* Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs

Enhancements:
* Enable rtc r7s72100/genmai board
* Add Z2 clock for r8a7794 SoC
* Add DU clock for r8a7794 SoC
* Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
* Add reset control properties for r8a774[35] SoCs

* tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (22 commits)
  ARM: dts: r8a7791: Drop _clk suffix from external CAN clock node name
  ARM: dts: r8a7790: Drop _clk suffix from external CAN clock node name
  ARM: dts: genmai: Enable rtc and rtc_x1 clock
  ARM: dts: rskrza1: add rtc DT support
  ARM: dts: rskrza1: set rtc_x1 clock value
  ARM: dts: r7s72100: add rtc to device tree
  ARM: dts: r7s72100: add RTC_X clock inputs to device tree
  ARM: dts: r7s72100: add rtc clock to device tree
  ARM: dts: koelsch: Correct clock frequency of X2 DU clock input
  ARM: dts: r8a7794: Add Z2 clock
  ARM: dts: r8a7792: Correct Z clock
  ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
  ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
  ARM: dts: r8a7790: Correct parent of SSI[0-9] clocks
  ARM: dts: r7s72100: fix ethernet clock parent
  ARM: dts: silk: Correct clock of DU1
  ARM: dts: alt: Correct clock of DU1
  ARM: dts: r8a7794: Correct clock of DU1
  ARM: dts: r8a7794: Add DU1 clock to device tree
  ARM: dts: r7s72100: add power-domains to sdhi
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19 06:43:08 -07:00
Olof Johansson 912c9fbe66 i.MX drivers updates for 4.12:
- A series from Lucas Stach which partly rewrites the imx gpc driver
    to support multiple power domains, and moves the related code from
    imx platform into drivers folder.
  - A series from Dong Aisheng which fixes the issues with Lucas' code
    changes and improves things.
  - Add workaround for i.MX6QP hardware erratum ERR009619 that is PRE
    clocks may be stalled during the power up sequencing of the PU power
    domain.
  - Add imx-gpcv2 driver to support power domains managed by GPCv2 IP
    block found on i.MX7 series of SoCs.
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Merge tag 'imx-drivers-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

i.MX drivers updates for 4.12:
 - A series from Lucas Stach which partly rewrites the imx gpc driver
   to support multiple power domains, and moves the related code from
   imx platform into drivers folder.
 - A series from Dong Aisheng which fixes the issues with Lucas' code
   changes and improves things.
 - Add workaround for i.MX6QP hardware erratum ERR009619 that is PRE
   clocks may be stalled during the power up sequencing of the PU power
   domain.
 - Add imx-gpcv2 driver to support power domains managed by GPCv2 IP
   block found on i.MX7 series of SoCs.

* tag 'imx-drivers-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpc: add workaround for i.MX6QP to the GPC PD driver
  dt-bindings: imx-gpc: add i.MX6 QuadPlus compatible
  soc: imx: gpc: add defines for domain index
  soc: imx: Add GPCv2 power gating driver
  dt-bindings: Add GPCv2 power gating driver
  soc: imx: gpc: remove unnecessary readable_reg callback
  dt-bindings: imx-gpc: correct the DOMAIN_INDEX using
  soc: imx: gpc: keep PGC_X_CTRL name align with reference manual
  soc: imx: gpc: fix comment when power up domain
  soc: imx: gpc: fix imx6sl gpc power domain regression
  soc: imx: gpc: fix domain_index sanity check issue
  soc: imx: gpc: fix the wrong using of regmap cache
  soc: imx: gpc: fix gpc clk get error handling
  soc: imx: move PGC handling to a new GPC driver
  dt-bindings: add multidomain support to i.MX GPC DT binding

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19 06:38:32 -07:00
Olof Johansson 08fd8c9567 ARM64: DT: Hisilicon SoC DT updates for 4.12
- Reset the hi6220 mmc hosts to avoid hang
 - Add the binding for the hi3798cv200 SoC and the poplar board
 - Add basic dts files to support the hi3798cv200 poplar board
 - Enable the Mbigen, XGE, RoCE and SAS for the hip07 d05 board
 - Add driver strength MACRO for the hi3660 SoC
 - Add the pinctrl dtsi file for hikey960 board to configure the pins
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Merge tag 'hisi-arm64-dt-for-4.12' of git://github.com/hisilicon/linux-hisi into next/dt64

ARM64: DT: Hisilicon SoC DT updates for 4.12

- Reset the hi6220 mmc hosts to avoid hang
- Add the binding for the hi3798cv200 SoC and the poplar board
- Add basic dts files to support the hi3798cv200 poplar board
- Enable the Mbigen, XGE, RoCE and SAS for the hip07 d05 board
- Add driver strength MACRO for the hi3660 SoC
- Add the pinctrl dtsi file for hikey960 board to configure the pins

* tag 'hisi-arm64-dt-for-4.12' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
  arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
  arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
  arm64: dts: hisi: add SAS nodes for the hip07 SoC
  arm64: dts: hisi: add RoCE nodes for the hip07 SoC
  arm64: dts: hisi: add network related nodes for the hip07 SoC
  arm64: dts: hisi: add mbigen nodes for the hip07 SoC
  arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
  dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
  arm64: dts: hi6220: Reset the mmc hosts

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19 06:33:20 -07:00
Olof Johansson fe8fee6901 ARM SOC PM domain support for 4.12
Dave Gerlach (5):
       PM / Domains: Add generic data pointer to genpd data struct
       PM / Domains: Do not check if simple providers have phandle cells
       dt-bindings: Add TI SCI PM Domains
       soc: ti: Add ti_sci_pm_domains driver
       ARM: keystone: Drop PM domain support for k2g
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Merge tag 'arm-soc-pmdomain' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers

ARM SOC PM domain support for 4.12

Dave Gerlach (5):
      PM / Domains: Add generic data pointer to genpd data struct
      PM / Domains: Do not check if simple providers have phandle cells
      dt-bindings: Add TI SCI PM Domains
      soc: ti: Add ti_sci_pm_domains driver
      ARM: keystone: Drop PM domain support for k2g

* tag 'arm-soc-pmdomain' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: keystone: Drop PM domain support for k2g
  soc: ti: Add ti_sci_pm_domains driver
  dt-bindings: Add TI SCI PM Domains
  PM / Domains: Do not check if simple providers have phandle cells
  PM / Domains: Add generic data pointer to genpd data struct

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19 05:58:02 -07:00
Olof Johansson dd85108475 Amlogic 64-bit DT updates for v4.12
- pinctrl: new pins for audio
 - clocks: more clocks exposed for GFX, audio
 - new board: Khadas Vim (S905X)
 - new board: HwaCom AmazeTV (S905X)
 - ethernet phy: add GPIO resets
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Merge tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64

Amlogic 64-bit DT updates for v4.12
- pinctrl: new pins for audio
- clocks: more clocks exposed for GFX, audio
- new board: Khadas Vim (S905X)
- new board: HwaCom AmazeTV (S905X)
- ethernet phy: add GPIO resets

* tag 'amlogic-dt64-redo' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (41 commits)
  ARM64: dts: meson-gx: Add support for HDMI output
  ARM64: dts: meson-gx: Add shared CMA dma memory pool
  ARM64: dts: meson-gxbb-odroidc2: Enable SARADC node
  dt-bindings: clock: gxbb-clkc: Add GXL compatible variant
  clk: meson-gxbb: Expose GP0 dt-bindings clock id
  clk: meson-gxbb: Add MALI clock IDS
  dt-bindings: clk: gxbb: expose i2s output clock gates
  ARM64: dts: meson-gxl: add spdif output pins
  ARM64: dts: meson-gxl: add i2s output pins
  ARM64: dts: meson-gxbb: add spdif output pins
  ARM64: dts: meson-gxbb: add i2s output pins
  ARM64: dts: meson-gxbb: Add USB Hub GPIO hog
  ARM: dts: meson8b: Add gpio-ranges properties
  ARM: dts: meson8: Add gpio-ranges properties
  ARM64: dts: meson-gxl: Add gpio-ranges properties
  ARM64: dts: meson-gxbb: Add gpio-ranges properties
  ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL
  ARM64: dts: meson-gxl: Add missing pinctrl pins groups
  ARM64: dts: meson-gx: Prepend GX generic compatible like other nodes
  ARM64: dts: meson-gx: empty line cleanup
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19 05:29:37 -07:00
Olof Johansson ed50c4855e STM32 DT updates for v4.12, round 1
Highlights:
 ----------
 
  - ADD RTC support on STM32F746 MCU
  - Enable RTC on STM32F746 Eval board
  - Enable clocks on STM32F746 MCU
  - Enable DMA, pwm1 and pwm3 on STM32F429I Eval
  - Add support of STM32H743 MCU and his Eval board
  - Enable USB HS and FS on STM32F469 Disco board
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Merge tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

STM32 DT updates for v4.12, round 1

Highlights:
----------

 - ADD RTC support on STM32F746 MCU
 - Enable RTC on STM32F746 Eval board
 - Enable clocks on STM32F746 MCU
 - Enable DMA, pwm1 and pwm3 on STM32F429I Eval
 - Add support of STM32H743 MCU and his Eval board
 - Enable USB HS and FS on STM32F469 Disco board

* tag 'stm32-dt-for-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  dt-bindings: Document the STM32 USB OTG DWC2 core binding
  ARM: dts: stm32: Enable USB HS in FS mode (embedded phy) on stm32f429-disco
  ARM: dts: stm32: Enable USB FS on stm32f469-disco
  ARM: dts: stm32: Add USB FS support for STM32F429 MCU
  ARM: dts: stm32: Add STM32H743 MCU and STM32H743i-EVAL board
  ARM: dts: stm32: Enable pwm1 and pwm3 on stm32f429i-eval
  ARM: dts: stm32: Enable dma by default on stm32f4 adc
  ARM: dts: stm32: enable RTC on stm32746g-eval
  ARM: dts: stm32: Add RTC support for STM32F746 MCU
  ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f746
  dt-bindings: mfd: Add STM32F7 RCC numeric constants into DT include file
  ARM: dts: stm32: Enable clocks for STM32F746 MCU

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-04-19 05:22:29 -07:00
Michael Turquette 0d7a5328db Amlogic clock driver updates for v4.12
- meson8: add some new PLLs
 - new clocks for Mali
 - misc fixes.
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Merge tag 'amlogic-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into clk-next

Same great taste as the previous pull request, but now with 50% less DT
bikeshedding!

Amlogic clock driver updates for v4.12
- meson8: add some new PLLs
- new clocks for Mali
- misc fixes.
2017-04-12 18:51:43 +02:00
Michael Turquette 72be2d5f4a clk: tegra: Changes for v4.12-rc1
This contains a bunch of fixes and cleanups, mostly to the Tegra210
 clock driver.
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Merge tag 'tegra-for-4.12-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next

Pull Tegra clk driver updates from Thierry Reding:

This contains a bunch of fixes and cleanups, mostly to the Tegra210
clock driver.

* tag 'tegra-for-4.12-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (24 commits)
  clk: tegra: Don't reset PLL-CX if it is already enabled
  clk: tegra: Add missing Tegra210 clocks
  clk: tegra: Propagate clk_out_x rate to parent
  clk: tegra: Fix build warnings on Tegra20/Tegra30
  clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on
  clk: tegra: Add SATA seq input control
  clk: tegra: Add Tegra210 special resets
  clk: tegra: Rework pll_u
  clk: tegra: Implement reset control reset
  clk: tegra: Fix disable unused for clocks sharing enable bit
  clk: tegra: Handle UTMIPLL IDDQ
  clk: tegra: Add aclk
  clk: tegra: Add super clock mux/divider
  clk: tegra: Define Tegra210 DMIC clocks
  clk: tegra: Fix constness for peripheral clocks
  clk: tegra: Define Tegra210 DMIC sync clocks
  clk: tegra: Add CEC clock
  clk: tegra: Fix type for m field
  clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation
  clk: tegra: Don't warn for PLL defaults unnecessarily
  ...
2017-04-12 18:51:01 +02:00
Michael Turquette 5579836026 General rockchip clock changes for 4.12. Contains some new clock-ids
as well as fixups of the clock-ids on rk3368 timers, which were unused
 and completely wrong (more and differently named timers).
 Also there is one new clock on rk3328 using the muxgrf type, a fix for
 pll enablement which should wait for the pll to lock before continuing,
 some more critical clocks and the rename of the rk1108 to rv1108, as the
 soc seems to have been using a preliminary name before its actual release.
 The plan is to have the driver changes (pinctrl, clk) go through the
 respective maintainer trees and once everything landed in mainline do
 the rename of the devicetree files. With the dts-include change in the
 clock rename, we also keep everything compiling and thus bisectability.
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Merge tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull rockchip clk driver updates from Heiko Stuebner:

  General rockchip clock changes for 4.12. Contains some new clock-ids
  as well as fixups of the clock-ids on rk3368 timers, which were unused
  and completely wrong (more and differently named timers).
  Also there is one new clock on rk3328 using the muxgrf type, a fix for
  pll enablement which should wait for the pll to lock before continuing,
  some more critical clocks and the rename of the rk1108 to rv1108, as the
  soc seems to have been using a preliminary name before its actual release.
  The plan is to have the driver changes (pinctrl, clk) go through the
  respective maintainer trees and once everything landed in mainline do
  the rename of the devicetree files. With the dts-include change in the
  clock rename, we also keep everything compiling and thus bisectability.

* tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: add pll_wait_lock for pll_enable
  clk: rockchip: rename RK1108 to RV1108
  dt-bindings: rk1108-cru: rename RK1108 to RV1108
  clk: rockchip: mark some rk3368 core-clks as critical
  clk: rockchip: export SCLK_TIMERXX id for timers on rk3368
  clk: rockchip: describe clk_gmac using the new muxgrf type on rk3328
  clk: rockchip: add clock ids for timer10-15 of RK3368 SoCs
  clk: rockchip: fix up rk3368 timer-ids
  clk: rockchip: add rk3328 clk_mac2io_ext ID
  clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399
2017-04-12 18:50:34 +02:00
Michael Turquette 0d4ae36062 clk: renesas: Updates for v4.12 (take two)
- Add support for the Clock Pulse Generator / Module Standby and
     Software Reset module on revision ES2.0 of the R-Car H3 SoC, which
     differs from ES1.x in some areas.
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Merge tag 'clk-renesas-for-v4.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Pull Renesas clk driver updates from Geert Uytterhoeven:

  - Add support for the Clock Pulse Generator / Module Standby and
    Software Reset module on revision ES2.0 of the R-Car H3 SoC, which
    differs from ES1.x in some areas.
  - Add IMR clocks for R-Car H3 and M3-W,
  - Add workaround for PLL0/2/4 errata on R-Car H3 ES1.0,
  - Small fixes and cleanups.

* tag 'clk-renesas-for-v4.12-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0
  clk: renesas: r8a7795: Add support for R-Car H3 ES2.0
  clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions
  clk: renesas: cpg-mssr: Add support for fixing up clock tables
  clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0
  clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()
  clk: renesas: r8a7796: Reformat core clock table
  clk: renesas: r8a7795: Reformat core clock table
  clk: renesas: r8a7796: Correct name of watchdog clock
  clk: renesas: r8a7795: Correct name of watchdog clock
  clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACs
  clk: renesas: r8a7796: Add IMR clocks
  clk: renesas: r8a7795: Add IMR clocks
2017-04-12 18:49:36 +02:00
Leo Yan b0459491ca clk: hi6220: add debug APB clock
The debug APB clock is absent in hi6220 driver, so this patch is to add
support for it.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2017-04-12 18:07:31 +02:00
Wang Xiaoyin 5a7e4774fd arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
Extend drive strength levels of the pins for Hi3660 Soc.

Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-04-10 23:34:23 +08:00
Geert Uytterhoeven fcb8708726 soc: renesas: rcar-sysc: Add support for R-Car H3 ES2.0
Power area A2VC0 was removed in revision ES2.0, cfr. R-Car Gen3 Hardware
User's Manual rev. 0.53E.

Hence remove it from the power area table when not running on ES1.x.

This is in line with the goal to:
  1. Support both the ES1.x and ES2.0 SoC revisions in a single binary
     for now,
  2. Make it clear which code supports ES1.x, so it can easily be
     identified and removed later, when production SoCs are deemed
     ubiquitous.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-07 13:53:41 -04:00
Andrey Smirnov 2d9eb1dd58 dt-bindings: Add GPCv2 power gating driver
Add DT bindings for power domain driver for GPCv2 IP block found in
i.MX7 SoCs.

Cc: yurovsky@gmail.com
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <dongas86@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-07 19:36:37 +08:00
Laxman Dewangan 4c0facddb7 gpio: core: Decouple open drain/source flag with active low/high
Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.

The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.

In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.

In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.

With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.

Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.

Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-04-07 12:23:29 +02:00
Neil Armstrong 7d33d60b0c clk: meson-gxbb: Expose GP0 dt-bindings clock id
This patch exposes the GP0 PLL clock id in the dt bindings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1490178747-14837-5-git-send-email-narmstrong@baylibre.com
2017-04-04 11:00:06 -07:00
Neil Armstrong 5c65eec3d9 clk: meson-gxbb: Add MALI clock IDS
Add missing MALI clock IDs and expose the muxes and gates in the dt-bindings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1490177935-9646-2-git-send-email-narmstrong@baylibre.com
2017-04-04 11:00:05 -07:00
Jerome Brunet 28f6c58367 dt-bindings: clk: gxbb: expose i2s output clock gates
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20170309104154.28295-10-jbrunet@baylibre.com
2017-04-04 11:00:05 -07:00
Chris Brandt 929ded3dd7 ARM: dts: r7s72100: add rtc clock to device tree
Add the realtime clock functional clock source.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-04 12:57:24 -04:00
Dave Gerlach 7cc119f29b dt-bindings: Add TI SCI PM Domains
Add a generic power domain implementation, TI SCI PM Domains, that
will hook into the genpd framework and allow the TI SCI protocol to
control device power states.

Also, provide macros representing each device index as understood
by TI SCI to be used in the device node power-domain references.
These are identifiers for the K2G devices managed by the PMMC.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-04-04 08:59:27 -07:00
Icenowy Zheng cdb8b80b60 clk: sunxi-ng: add support for PRCM CCUs
SoCs after A31 has a clock controller module in the PRCM part.

Support the clock controller module on H3/5 and A64 now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-04 17:43:52 +02:00
Peter De Schrijver 88da44c5ed clk: tegra: Add missing Tegra210 clocks
iqc1, iqc2, tegra_clk_pll_a_out_adsp, tegra_clk_pll_a_out0_out_adsp, adsp
and adsp neon were not modelled. dp2 wasn't modelled for Tegra210.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-04-04 16:03:00 +02:00
Geert Uytterhoeven 7b39e985cf ARM: dts: r8a7792: Correct Z clock
Unlike other R-Car Gen2 SoCs with Cortex-A15 CPU cores, R-Car V2H does
not have a programmable Z clock (Cortex-A15 CPU core clock), but uses a
fixed divider.
This is similar to the Z2 clock (Cortex-A7 CPU core clock) on R-Car E2.

Hence:
  - Remove the Z clock output from the cpg_clocks node, as this implied
    a programmable clock,
  - Add the Z clock as a fixed factor clock,
  - Let the first CPU node point to the new Z clock,
  - Remove the Z clock index from the bindings (this definition was used
    by r8a7792.dtsi only, and was not a contract between DT and driver).

Fixes: 7c4163aae3 ("ARM: dts: r8a7792: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-04-03 06:33:23 -04:00
Geert Uytterhoeven 89f1b1c614 clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions
Add all R-Car H3 ES2.0 Clock Pulse Generator Core Clock Outputs, as
listed in Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3
Hardware User's Manual rev. 0.53E.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-03-30 13:25:43 +02:00
Geert Uytterhoeven 1764f8081f ARM: dts: r8a7794: Add DU1 clock to device tree
Add the missing module clock for the second channel of the display unit.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-28 14:17:51 +02:00
Herbert Xu 2e6d603e51 Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
Merging 4.11-rc3 to pick up md5 removal from /dev/random.
2017-03-24 21:58:58 +08:00
Gabriel Fernandez 156fdf11ae dt-bindings: mfd: Add STM32F7 RCC numeric constants into DT include file
This patch lists STM32F7's RCC numeric constants.
It will be used by clock and reset drivers, and DT bindings.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-03-23 18:18:36 +01:00
Andy Yan 7e2a9035c1 clk: rockchip: rename RK1108 to RV1108
Rockchip finally named the SOC as RV1108, so change it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

[include rename in rk1108.dtsi to prevent compile errors]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-22 18:03:04 +01:00
Olof Johansson 8855e14d61 Renesas ARM Based SoC DT Updates for v4.12
Cleanup:
 * Drop superfluous status update for frequency override on various boards
 * Always use status "okay" to enable devices on porger board
 * Add INTC-SYS clock to device tree of various SoCs
 * Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
 * Remove unit-address and reg from integrated cache on various SoCs
 * Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
 * Fix SCIFB0 dmas indentation on r8a774[35] SoCs
 
 Enhancements:
 * Add watchdog timer to r7s72100 SoC
 * Update sdhi clock bindings on r7s72100 SoC
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Merge tag 'renesas-dt-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.12

Cleanup:
* Drop superfluous status update for frequency override on various boards
* Always use status "okay" to enable devices on porger board
* Add INTC-SYS clock to device tree of various SoCs
* Tidyup Audio-DMAC channel for DVC on r8a779[013] SoCs
* Remove unit-address and reg from integrated cache on various SoCs
* Switch from ARCH_SHMOBILE_MULTI to ARCH_RENESAS
* Fix SCIFB0 dmas indentation on r8a774[35] SoCs

Enhancements:
* Add watchdog timer to r7s72100 SoC
* Update sdhi clock bindings on r7s72100 SoC

* tag 'renesas-dt-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (31 commits)
  ARM: dts: silk: Drop superfluous status update for frequency override
  ARM: dts: alt: Drop superfluous status update for frequency override
  ARM: dts: gose: Drop superfluous status update for frequency override
  ARM: dts: porter: Drop superfluous status update for frequency override
  ARM: dts: koelsch: Drop superfluous status updates for frequency overrides
  ARM: dts: lager: Drop superfluous status update for frequency override
  ARM: dts: marzen: Drop superfluous status update for frequency override
  ARM: dts: bockw: Drop superfluous status update for frequency override
  ARM: dts: porter: Always use status "okay" to enable devices
  ARM: dts: r8a7793: Add INTC-SYS clock to device tree
  ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
  ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
  ARM: dts: r8a7794: Add INTC-SYS clock to device tree
  ARM: dts: r8a7792: Add INTC-SYS clock to device tree
  ARM: dts: r8a7791: Add INTC-SYS clock to device tree
  ARM: dts: r8a7790: Add INTC-SYS clock to device tree
  ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
  ARM: dts: r7s72100: Add watchdog timer
  ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
  ARM: dts: r8a7794: Remove unit-address and reg from integrated cache
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-03-21 17:35:06 -07:00
Olof Johansson a618a7349f Reset controller changes for v4.12
- make reset drivers with bool Kconfig options explicitly non-modular
 - fix uniphier non-static symbol warnings
 - fix socfpga nr_resets property
 - new drivers for the Arria10 and i.MX7 system reset controllers
 - fix sunxi 64-bit compilation
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Merge tag 'reset-for-4.12-1' of git://git.pengutronix.de/git/pza/linux into next/drivers

Reset controller changes for v4.12

- make reset drivers with bool Kconfig options explicitly non-modular
- fix uniphier non-static symbol warnings
- fix socfpga nr_resets property
- new drivers for the Arria10 and i.MX7 system reset controllers
- fix sunxi 64-bit compilation

* tag 'reset-for-4.12-1' of git://git.pengutronix.de/git/pza/linux:
  reset: sunxi: fix for 64-bit compilation
  reset: Add Altera Arria10 SR Reset Controller
  dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets
  reset: Add i.MX7 SRC reset driver
  reset-socfpga: Fix nr_resets property
  reset: uniphier: fix non static symbol warnings
  reset: pistachio: make it explicitly non-modular
  reset: ath79: make it explicitly non-modular
  reset: oxnas: make it explicitly non-modular
  reset: meson: make it explicitly non-modular

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-03-21 17:33:38 -07:00
Peter De Schrijver 68d724cedc clk: tegra: Add Tegra210 special resets
Tegra210 has 2 special resets which don't follow the normal pattern:
DVCO and ADSP. Add them in this patch.

Changelog:

v2: add DT bindings file

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-20 14:20:42 +01:00
Peter De Schrijver 24c3ebef1a clk: tegra: Add aclk
This clock clocks the ADSP Cortex-A9.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-20 14:07:48 +01:00
Peter De Schrijver 319af7975c clk: tegra: Define Tegra210 DMIC sync clocks
Tegra210 has 3 DMIC inputs which can be clocked from the recovered clock
of several other audio inputs (eg. i2s0, i2s1, ...). To model this, we
add a 3 new clocks similar to the audio* clocks which handle the same
function for the I2S and SPDIF clocks.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-20 14:06:33 +01:00
Peter De Schrijver bfa34832df clk: tegra: Add CEC clock
This clock is used to clock the HDMI CEC interface.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-20 14:06:23 +01:00
Peter De Schrijver 34ac2c278b clk: tegra: Fix ISP clock modelling
The 2 ISP clocks (ispa and ispb) share a mux/divider control. So model
this as 1 mux/divider clock and child gate clocks.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-03-20 14:04:45 +01:00
Heiner Kallweit eff041553d clk: meson-gxbb: expose clock CLKID_RNG0
Expose clock CLKID_RNG0 which is needed for the HW random number generator.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-03-16 17:58:46 +08:00
Thor Thayer 843fc75af8 dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets
The Arria10 System Resource Chip reset controller handles the
Arria10 peripheral PHYs. This patch adds the offsets for
these PHYs.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-15 12:19:10 +01:00
Andrey Smirnov abf97755ae reset: Add i.MX7 SRC reset driver
Add reset controller driver exposing various reset faculties,
implemented by System Reset Controller IP block.

Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-03-15 12:18:49 +01:00
Geert Uytterhoeven 2f25c2d1cd ARM: dts: r8a7793: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-13 10:15:31 +01:00
Elaine Zhang 710fbd769c clk: rockchip: add clock ids for timer10-15 of RK3368 SoCs
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-10 11:18:19 +01:00
Elaine Zhang a4fa90d24b clk: rockchip: fix up rk3368 timer-ids
The timer-ids are wrong compared to the manual, probably due a simple
copy-paste mistake from the otherwise very similar rk3288. And there
are even more timers in the system than the ones wrongly listed here.

Timer-Ids were unused both in clock-driver as well as devicetree
till now, so fixing them won't break anything.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-10 11:17:04 +01:00
Elaine Zhang bdc7dd67e7 clk: rockchip: add rk3328 clk_mac2io_ext ID
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-10 11:12:59 +01:00
Geert Uytterhoeven 133a3f1a19 ARM: dts: r8a7794: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:21:10 +01:00
Geert Uytterhoeven 90dce5428a ARM: dts: r8a7792: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:20:25 +01:00
Geert Uytterhoeven c2f2e266ac ARM: dts: r8a7791: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:20:13 +01:00
Geert Uytterhoeven 9e58523624 ARM: dts: r8a7790: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:20:02 +01:00
Geert Uytterhoeven c11333cc2e ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
so it can be power managed using that clock in the future.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-10 10:19:50 +01:00
Masahiro Yamada 505d3085d7 scripts/spelling.txt: add "overide" pattern and fix typo instances
Fix typos and add the following to the scripts/spelling.txt:

  overide||override

While we are here, fix the doubled "address" in the touched line
Documentation/devicetree/bindings/regulator/ti-abb-regulator.txt.

Also, fix the comment block style in the touched hunks in
drivers/media/dvb-frontends/drx39xyj/drx_driver.h.

Link: http://lkml.kernel.org/r/1481573103-11329-21-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2017-03-09 17:01:09 -08:00
Icenowy Zheng 9be1c8afb4 clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver
Allwinner H5 is a SoC that features a design which keeps the peripheral
compatible with H3, so that it have also a CCU like the one on H3 --
only one bus gate/reset is added, and the mmc sample/output phases are
removed because of MMC controller update.

Add its support in our existing H3 CCU driver.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-06 10:25:56 +01:00
Chris Brandt 3d2abda02a ARM: dts: r7s72100: update sdhi clock bindings
The SDHI controller in the RZ/A1 has 2 clock sources per channel and both
need to be enabled/disabled for proper operation. This fixes the fact that
the define for R7S72100_CLK_SDHI1 was not correct to begin with (typo), and
that all 4 clock sources need to be defined an used.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-03-06 10:06:49 +01:00
Linus Torvalds a1a0db36d8 ARM: SoC: late DT updates for v4.11
These updates have been kept in a separate branch mostly because
 they rely on updates to the respective clk drivers to keep the
 shared header files in sync.
 
 This includes two branches for arm64 dt updates, both following up
 on earlier changes for the same platforms that are already merged:
 
 Samsung:
   - add USB3 support in Exynos7
   - minor PM related updates
 
 Amlogic:
   - new machines: WeTek Set-top-boxes
   - various devices added to DT
 
 There are also a couple of bugfixes that trickled in since the
 start of the merge window:
 
 - The moxart_defconfig was not building the intended platform
 - CPU-hotplug was broken on ux500
 - Coresight was broken on Juno (never worked)
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late DT updates from Arnd Bergmann:
 "These updates have been kept in a separate branch mostly because they
  rely on updates to the respective clk drivers to keep the shared
  header files in sync.

  This includes two branches for arm64 dt updates, both following up on
  earlier changes for the same platforms that are already merged:

  Samsung:
   - add USB3 support in Exynos7
   - minor PM related updates

  Amlogic:
   - new machines: WeTek Set-top-boxes
   - various devices added to DT

  There are also a couple of bugfixes that trickled in since the start
  of the merge window:

   - The moxart_defconfig was not building the intended platform
   - CPU-hotplug was broken on ux500
   - Coresight was broken on Juno (never worked)"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
  ARM: deconfig: fix the moxart defconfig
  ARM: ux500: resume the second core properly
  arm64: dts: juno: update definition for programmable replicator
  arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
  arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
  arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
  pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
  arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
  ARM64: dts: meson-gxbb-p200: add ADC laddered keys
  ARM64: dts: meson: meson-gx: add the SAR ADC
  ARM64: dts: meson-gxl: add the pwm_ao_b pin
  ARM64: dts: meson-gx: add the missing pwm_AO_ab node
  clk: gxbb: fix CLKID_ETH defined twice
  ARM64: dts: meson-gxl: rename Nexbox A95x for consistency
  clk: gxbb: add the SAR ADC clocks and expose them
  dt-bindings: amlogic: Add WeTek boards
  ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play
  dt-bindings: vendor-prefix: Add wetek vendor prefix
  ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
  ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
  ...
2017-03-03 16:15:48 -08:00
Arnd Bergmann d4b80d9aac Merge branch 'next/late' with mainline
* next/late: (25 commits)
  arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
  arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
  arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
  pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
  arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
  ARM64: dts: meson-gxbb-p200: add ADC laddered keys
  ARM64: dts: meson: meson-gx: add the SAR ADC
  ARM64: dts: meson-gxl: add the pwm_ao_b pin
  ARM64: dts: meson-gx: add the missing pwm_AO_ab node
  clk: gxbb: fix CLKID_ETH defined twice
  clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
  clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
  ARM64: dts: meson-gxl: rename Nexbox A95x for consistency
  clk: gxbb: add the SAR ADC clocks and expose them
  dt-bindings: amlogic: Add WeTek boards
  ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play
  dt-bindings: vendor-prefix: Add wetek vendor prefix
  ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
  ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
  ARM64: dts: meson-gxbb-vega-s95: Add LED
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-02 17:52:44 +01:00
Linus Torvalds 5d8a00eee2 The usual collection of new drivers, non-critical fixes, and updates
to existing clk drivers. The bulk of the work is on Allwinner and
 Rockchip SoCs, but there's also an Intel Atom driver in here too.
 
 New Drivers:
  - Tegra BPMP firmware
  - Hisilicon hi3660 SoCs
  - Rockchip rk3328 SoCs
  - Intel Atom PMC
  - STM32F746
  - IDT VersaClock 5P49V5923 and 5P49V5933
  - Marvell mv98dx3236 SoCs
  - Allwinner V3s SoCs
 
 Removed Drivers:
  - Samsung Exynos4415 SoCs
 
 Updates:
  - Migrate ABx500 to OF
  - Qualcomm IPQ4019 CPU clks and general PLL support
  - Qualcomm MSM8974 RPM
  - Rockchip non-critical fixes and clk id additions
  - Samsung Exynos4412 CPUs
  - Socionext UniPhier NAND and eMMC support
  - ZTE zx296718 i2s and other audio clks
  - Renesas CAN and MSIOF clks for R-Car M3-W
  - Renesas resets for R-Car Gen2 and Gen3 and RZ/G1
  - TI CDCE913, CDCE937, and CDCE949 clk generators
  - Marvell Armada ap806 CPU frequencies
  - STM32F4* I2S/SAI support
  - Broadcom BCM2835 DSI support
  - Allwinner sun5i and A80 conversion to new style clk bindings
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The usual collection of new drivers, non-critical fixes, and updates
  to existing clk drivers. The bulk of the work is on Allwinner and
  Rockchip SoCs, but there's also an Intel Atom driver in here too.

  New Drivers:
   - Tegra BPMP firmware
   - Hisilicon hi3660 SoCs
   - Rockchip rk3328 SoCs
   - Intel Atom PMC
   - STM32F746
   - IDT VersaClock 5P49V5923 and 5P49V5933
   - Marvell mv98dx3236 SoCs
   - Allwinner V3s SoCs

  Removed Drivers:
   - Samsung Exynos4415 SoCs

  Updates:
   - Migrate ABx500 to OF
   - Qualcomm IPQ4019 CPU clks and general PLL support
   - Qualcomm MSM8974 RPM
   - Rockchip non-critical fixes and clk id additions
   - Samsung Exynos4412 CPUs
   - Socionext UniPhier NAND and eMMC support
   - ZTE zx296718 i2s and other audio clks
   - Renesas CAN and MSIOF clks for R-Car M3-W
   - Renesas resets for R-Car Gen2 and Gen3 and RZ/G1
   - TI CDCE913, CDCE937, and CDCE949 clk generators
   - Marvell Armada ap806 CPU frequencies
   - STM32F4* I2S/SAI support
   - Broadcom BCM2835 DSI support
   - Allwinner sun5i and A80 conversion to new style clk bindings"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (130 commits)
  clk: renesas: mstp: ensure register writes complete
  clk: qcom: Do not drop device node twice
  clk: mvebu: adjust clock handling for the CP110 system controller
  clk: mvebu: Expand mv98dx3236-core-clock support
  clk: zte: add i2s clocks for zx296718
  clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()
  clk: sunxi-ng: select SUNXI_CCU_MULT for sun5i
  clk: sunxi-ng: Check kzalloc() for errors and cleanup error path
  clk: tegra: Add BPMP clock driver
  clk: uniphier: add eMMC clock for LD11 and LD20 SoCs
  clk: uniphier: add NAND clock for all UniPhier SoCs
  ARM: dts: sun9i: Switch to new clock bindings
  clk: sunxi-ng: Add A80 Display Engine CCU
  clk: sunxi-ng: Add A80 USB CCU
  clk: sunxi-ng: Add A80 CCU
  clk: sunxi-ng: Support separately grouped PLL lock status register
  clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
  clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
  clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
  clk: qcom: SDHCI enablement on Nexus 5X / 6P
  ...
2017-02-25 14:28:06 -08:00
Linus Torvalds b2e3c4319d ARM: SoC driver updates
Driver updates for ARM SoCs.
 
 A handful of driver changes this time around. The larger changes are:
 
  - Reset drivers for hi3660 and zx2967
  - AHCI driver for Davinci, acked by Tejun and brought in here due to
    platform dependencies
  - Cleanups of atmel-ebi (External Bus Interface)
  - Tweaks for Rockchip GRF (General Register File) usage (kitchensink misc
    register range on the SoCs)
  - PM domains changes for support of two new ZTE SoCs (zx296718 and zx2967)
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs.

  A handful of driver changes this time around. The larger changes are:

   - Reset drivers for hi3660 and zx2967

   - AHCI driver for Davinci, acked by Tejun and brought in here due to
     platform dependencies

   - Cleanups of atmel-ebi (External Bus Interface)

   - Tweaks for Rockchip GRF (General Register File) usage (kitchensink
     misc register range on the SoCs)

   - PM domains changes for support of two new ZTE SoCs (zx296718 and
     zx2967)"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
  soc: samsung: pmu: Add register defines for pad retention control
  reset: make zx2967 explicitly non-modular
  reset: core: fix reset_control_put
  soc: samsung: pm_domains: Read domain name from the new label property
  soc: samsung: pm_domains: Remove message about failed memory allocation
  soc: samsung: pm_domains: Remove unused name field
  soc: samsung: pm_domains: Use full names in subdomains registration log
  sata: ahci-da850: un-hardcode the MPY bits
  sata: ahci-da850: add a workaround for controller instability
  sata: ahci: export ahci_do_hardreset() locally
  sata: ahci-da850: implement a workaround for the softreset quirk
  sata: ahci-da850: add device tree match table
  sata: ahci-da850: get the sata clock using a connection id
  soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register
  memory: atmel-ebi: Enable the SMC clock if specified
  soc: samsung: pmu: Remove unused and duplicated defines
  memory: atmel-ebi: Properly handle multiple reference to the same CS
  memory: atmel-ebi: Fix the test to enable generic SMC logic
  soc: samsung: pm_domains: Add new Exynos5433 compatible
  soc: samsung: pmu: Add dummy support for Exynos5433 SoC
  ...
2017-02-23 15:57:04 -08:00
Linus Torvalds c61c15e08a ARM: 64-bit DT updates for v4.11
ARM64 DT updates are fairly small this time, only two new SoCs and a handful
 of new machines get added, all of them similar to other hardware we already
 support.
 
 New SoC:
   - HiSilicon Kirin960/Hi3660 and HiKey960 development board
   - NXP LS1012a with three reference boards
     http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A
 
 New development board:
   - Banana Pi M64, based on Allwinner A64
     http://www.banana-pi.org/m64.html
   - SolidRun MACCHIATOBin based on Marvell Armada 8K
     https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/
   - Broadcom BCM958712DxXMC NorthStar2 reference board (another one)
 
 A lot of platforms improve support for existing machines by adding
 extra devices for which a binding and driver is availabe:
 
 Allwinner: MMC, USB
 ARM Juno: Coresight, STM
 Broadcom: NS2 GICv2m irqchip and PCIe
 Marvell: Armada 3700 SPI, I2C, ethernet switch
 Mediatek: MT8173 thermal
 NXP i.MX: LS1046A thermal
 Qualcomm: coresight on MSM8916, HDMI, WCNSS, SCM
 Renesas: r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd
 Rockchip: thermal, eDP, pinctrl enhancements
 Samsung: TM2 touchkey, Exynos5433 HDMI and power management improvements
 UniPhier: SD reset, eMMC controller
 ZTE: oppv2 cpufreq
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "ARM64 DT updates are fairly small this time, only two new SoCs and a
  handful of new machines get added, all of them similar to other
  hardware we already support.

  New SoC:

   - HiSilicon Kirin960/Hi3660 and HiKey960 development board

   - NXP LS1012a with three reference boards:
        http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A

  New development board:

   - Banana Pi M64, based on Allwinner A64:
        http://www.banana-pi.org/m64.html

   - SolidRun MACCHIATOBin based on Marvell Armada 8K:
        https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/

   - Broadcom BCM958712DxXMC NorthStar2 reference board (another one)

  A lot of platforms improve support for existing machines by adding
  extra devices for which a binding and driver is availabe:

  Allwinner:
   - MMC, USB

  ARM Juno:
   - Coresight, STM

  Broadcom:
   - NS2 GICv2m irqchip and PCIe

  Marvell:
   - Armada 3700 SPI, I2C, ethernet switch

  Mediatek:
   - MT8173 thermal

  NXP i.MX:
   - LS1046A thermal

  Qualcomm:
   - coresight on MSM8916, HDMI, WCNSS, SCM

  Renesas:
   - r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd

  Rockchip:
   - thermal, eDP, pinctrl enhancements

  Samsung:
   - TM2 touchkey, Exynos5433 HDMI and power management improvements

  UniPhier:
   - SD reset, eMMC controller

  ZTE:
   - oppv2 cpufreq"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits)
  arm64: dts: qcom: Add msm8916 CoreSight components
  arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon
  arm64: allwinner: add BananaPi-M64 support
  arm64: allwinner: a64: add UART1 pin nodes
  arm64: allwinner: pine64: add MMC support
  arm64: allwinner: a64: Increase the MMC max frequency
  arm64: allwinner: a64: Add MMC pinctrl nodes
  arm64: allwinner: a64: Add MMC nodes
  dt-bindings: clockgen: Add compatible string for LS1012A
  Documentation: DT: add LS1012A compatible for SCFG and DCFG
  Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
  arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
  arm64: tegra: Use symbolic reset identifiers
  arm64: dts: r8a7796: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: tidyup audma definition order
  arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7796: Add R-Car Gen3 thermal support
  arm64: dts: r8a7795: Add R-Car Gen3 thermal support
  ...
2017-02-23 15:52:14 -08:00
Linus Torvalds 195849ea13 ARM: DT updates for v4.11
A total of 380 patches this time, mostly adding support for more hardware
 in the device tree descriptions. There is not much exciting here for 4.11,
 but I've tried my best to condense the information from the pull requests
 I got into a readable summary.
 
 Noteworthy changes to existing platforms include:
   - The GIC memory map was a bit wrong almost everywhere and now
     gets fixed up
   - The Allwinner platforms convert to the generic pinmux properties
   - The Marvell EBU platforms now use the new DSA binding
   - Samsung Exynos4212 was unused and gets removed
   - The Renesas power management got improved
 
 New production machines:
   - Lego Mindstorms EV3
     https://www.lego.com/en-us/mindstorms/about-ev3
   - Beelink X2 Android media box
     http://linux-sunxi.org/Beelink_X2
   - "Romulus" baseboard management controller for OpenPower
   - Axentia TSE-850 Data Radio Channel (DARC) encoder
     http://www.axentia.se/db/equipment.html
   - Luxul XAP-1410 and XWR-1200 wireless access points
     https://luxul.com/xap-1410
 
 New SoCs:
   - Allwinner H2+ and V3s, both minor variations of already
     supported chips
     http://www.allwinnertech.com/index.php?c=product&a=index&id=38
   - Marvell Prestera DX packet processors based on Armada XP architecture
     http://www.marvell.com/switching/prestera-dx/
   - Samsung Exynos4412 Prime gets added, a minor variation of Exynos4412
 
 New developer and reference boards:
   - Lichee Pi One, Lichee Pi Zero and Orange Pi Zero,
     all based on Allwinner SoCs
     http://linux-sunxi.org/LicheePi_One
     http://www.orangepi.org/orangepizero/
   - SAMA5d36ek Reference platform
     http://www.atmel.com/tools/sama5d36-ek.aspx
   - Beaglebone Green Wireless and Black Wireless
     https://beagleboard.org/black-wireless
     https://beagleboard.org/green-wireless
   - phyCORE-AM335x System on Module
     http://phytec.com/products/system-on-modules/phycore/am335x/
   - New revision of "vf610-zii" Zodiac Inflight Innovations board
   - Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam i.Core
     http://www.opossom.com/english/index.html
     http://www.savageboard.org/
     http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ul
     http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q
   - Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is
 
 Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas, qcom,
     rockchip, sti, stm32 and tegra
 
 New device supports added to some boards and SoCs, briefly by platform:
   - Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU
   - Aspeed: network, ipmi bt, gpio, pinmux
   - Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc
   - TI DaVinci: gpio, lcdc, usb, video-in, uart
   - TI Keystone 2: MSM RAM, power/reset, uart
   - Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal
   - Marvell EBU: ethernet switch on Turris Omnia
   - NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic,
     eeprom, mmc, nand
   - TI OMAP:
   - Qualcomm: coresight, gyro/accelerometer, hdmi
   - Renesas: pmic, soc-id
   - Rockchip: qos
   - Samsung: audio on Odroid-X
   - Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor
   - STi: video in/out
   - STM32: timer, pwm, i2c, rtc, add, i2s
   - NVIDIA Tegra: tpm
   - Uniphier: mmc/sd pinmux
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "A total of 380 patches this time, mostly adding support for more
  hardware in the device tree descriptions. There is not much exciting
  here for 4.11, but I've tried my best to condense the information from
  the pull requests I got into a readable summary.

  Noteworthy changes to existing platforms include:

   - The GIC memory map was a bit wrong almost everywhere and now gets
     fixed up

   - The Allwinner platforms convert to the generic pinmux properties

   - The Marvell EBU platforms now use the new DSA binding

   - Samsung Exynos4212 was unused and gets removed

   - The Renesas power management got improved

  New production machines:

   - Lego Mindstorms EV3:
        https://www.lego.com/en-us/mindstorms/about-ev3

   - Beelink X2 Android media box:
        http://linux-sunxi.org/Beelink_X2

   - "Romulus" baseboard management controller for OpenPower

   - Axentia TSE-850 Data Radio Channel (DARC) encoder:
        http://www.axentia.se/db/equipment.html

   - Luxul XAP-1410 and XWR-1200 wireless access points:
        https://luxul.com/xap-1410

  New SoCs:

   - Allwinner H2+ and V3s, both minor variations of already supported
     chips:
        http://www.allwinnertech.com/index.php?c=product&a=index&id=38

   - Marvell Prestera DX packet processors based on Armada XP
     architecture:
        http://www.marvell.com/switching/prestera-dx/

   - Samsung Exynos4412 Prime gets added, a minor variation of
     Exynos4412

  New developer and reference boards:

   - Lichee Pi One, Lichee Pi Zero and Orange Pi Zero, all based on
     Allwinner SoCs:
        http://linux-sunxi.org/LicheePi_One
        http://www.orangepi.org/orangepizero/

   - SAMA5d36ek Reference platform:
        http://www.atmel.com/tools/sama5d36-ek.aspx

   - Beaglebone Green Wireless and Black Wireless:
        https://beagleboard.org/black-wireless
        https://beagleboard.org/green-wireless

   - phyCORE-AM335x System on Module:
        http://phytec.com/products/system-on-modules/phycore/am335x/

   - New revision of "vf610-zii" Zodiac Inflight Innovations board

   - Various i.MX System-on-Module: Is.IoT MX6UL, SavageBoard, Engicam
     i.Core:
        http://www.opossom.com/english/index.html
        http://www.savageboard.org/
        http://www.engicam.com/en/products/embedded/som/sodimm/is-iot-mx6ul
        http://www.engicam.com/en/products/embedded/som/sodimm/i-core-m6s-dl-d-q

   - Liebherr (LWN) monitor 6 based on i.MX6 Quad, no idea what this is

   - Cleanups and bugfixes on at91, bcm53xx, i.MX, mvebu, omap, oxnas,
     qcom, rockchip, sti, stm32 and tegra

  New device supports added to some boards and SoCs, briefly by platform:

   - Allwinner: SPDIF, A33 cpufreq, A33 Mali GPU

   - Aspeed: network, ipmi bt, gpio, pinmux

   - Broadcom: video encoder for raspberry pi, qspi, ethernet, sd/mmc

   - TI DaVinci: gpio, lcdc, usb, video-in, uart

   - TI Keystone 2: MSM RAM, power/reset, uart

   - Mediatek MT2701: clocks, iommu, spi, nand, adc, thermal

   - Marvell EBU: ethernet switch on Turris Omnia

   - NXP i.MX: otp ram, USB, wifi, bluetooth, spdif, spi, pmic, eeprom,
     mmc, nand

   - TI OMAP:

   - Qualcomm: coresight, gyro/accelerometer, hdmi

   - Renesas: pmic, soc-id

   - Rockchip: qos

   - Samsung: audio on Odroid-X

   - Socfpga: FPGA manager, i2c, led, can, watchdog, nand, power monitor

   - STi: video in/out

   - STM32: timer, pwm, i2c, rtc, add, i2s

   - NVIDIA Tegra: tpm

   - Uniphier: mmc/sd pinmux"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (380 commits)
  ARM: dts: armada-385-linksys: fix DSA compatible property
  ARM: dts: Fix typo in armada-xp-98dx4251
  ARM: DTS: Fix register map for virt-capable GIC
  dt-bindings: arm,gic: Fix binding example for a virt-capable GIC
  ARM: dts: sun8i: sinlinx: Enable audio nodes
  ARM: dts: sun8i: parrot: Enable audio nodes
  ARM: dts: sun8i: Add audio codec, dai and card for A33
  ARM: dts: Add EMAC AXI settings for Arria10
  ARM: dts: am335x-chiliboard: Support charger
  ARM: dts: am335x-chiliboard: Support power button
  ARM: sun8i: dt: Add mali node
  dt-bindings: gpu: Add Mali Utgard bindings
  ARM: dts: stm32: Add I2C1 support for STM32429 eval board
  ARM: dts: stm32: Add I2C1 support for STM32F429 SoC
  ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
  dt-bindings: mfd: stm32f4: Add missing binding definition
  dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
  ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
  ARM: dts: stm32: add Timers driver for stm32f429 MCU
  ARM: dts: add the AB8500 sysclk to the device trees
  ...
2017-02-23 15:46:25 -08:00
Linus Torvalds af8999f672 ARM: SoC non-urgent fixes for merge window
We sometimes collect non-critical fixes that come in during the later part
 of the merge window in a branch for the next release instead, and this is
 that contents for v4.11.
 
 Most of these are OMAP fixes, dealing with OMAP36/37 detection, quirks
 and setup. There's also some fixes for Davinci and a Kconfig fix for SCPI
 to only enable on ARM{,64}.
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Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-urgent fixes from Arnd Bergmann:
 "We sometimes collect non-critical fixes that come in during the later
  part of the merge window in a branch for the next release instead, and
  this is that contents for v4.11.

  Most of these are OMAP fixes, dealing with OMAP36/37 detection, quirks
  and setup. There's also some fixes for Davinci and a Kconfig fix for
  SCPI to only enable on ARM{,64}"

* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  firmware: arm_scpi: Add hardware dependencies
  ARM: OMAP3: Fix SoC detection of OMAP36/37 Family
  ARM: OMAP5: Add HWMOD_SWSUP_SIDLE_ACT flag for UART
  ARM: dts: Fix compatible for ti81xx uarts for 8250
  ARM: dts: Fix am335x and dm814x scm syscon to probe children
  ARM: OMAP2+: Fix init for multiple quirks for the same SoC
  ARM: dts: Fix omap3 off mode pull defines
  bus: da850-mstpri: fix my e-mail address
  ARM: davinci: da850: fix da850_set_pll0rate()
  ARM: davinci: da850: coding style fix
2017-02-23 15:28:04 -08:00
Linus Torvalds 3051bf36c2 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:
 "Highlights:

   1) Support TX_RING in AF_PACKET TPACKET_V3 mode, from Sowmini
      Varadhan.

   2) Simplify classifier state on sk_buff in order to shrink it a bit.
      From Willem de Bruijn.

   3) Introduce SIPHASH and it's usage for secure sequence numbers and
      syncookies. From Jason A. Donenfeld.

   4) Reduce CPU usage for ICMP replies we are going to limit or
      suppress, from Jesper Dangaard Brouer.

   5) Introduce Shared Memory Communications socket layer, from Ursula
      Braun.

   6) Add RACK loss detection and allow it to actually trigger fast
      recovery instead of just assisting after other algorithms have
      triggered it. From Yuchung Cheng.

   7) Add xmit_more and BQL support to mvneta driver, from Simon Guinot.

   8) skb_cow_data avoidance in esp4 and esp6, from Steffen Klassert.

   9) Export MPLS packet stats via netlink, from Robert Shearman.

  10) Significantly improve inet port bind conflict handling, especially
      when an application is restarted and changes it's setting of
      reuseport. From Josef Bacik.

  11) Implement TX batching in vhost_net, from Jason Wang.

  12) Extend the dummy device so that VF (virtual function) features,
      such as configuration, can be more easily tested. From Phil
      Sutter.

  13) Avoid two atomic ops per page on x86 in bnx2x driver, from Eric
      Dumazet.

  14) Add new bpf MAP, implementing a longest prefix match trie. From
      Daniel Mack.

  15) Packet sample offloading support in mlxsw driver, from Yotam Gigi.

  16) Add new aquantia driver, from David VomLehn.

  17) Add bpf tracepoints, from Daniel Borkmann.

  18) Add support for port mirroring to b53 and bcm_sf2 drivers, from
      Florian Fainelli.

  19) Remove custom busy polling in many drivers, it is done in the core
      networking since 4.5 times. From Eric Dumazet.

  20) Support XDP adjust_head in virtio_net, from John Fastabend.

  21) Fix several major holes in neighbour entry confirmation, from
      Julian Anastasov.

  22) Add XDP support to bnxt_en driver, from Michael Chan.

  23) VXLAN offloads for enic driver, from Govindarajulu Varadarajan.

  24) Add IPVTAP driver (IP-VLAN based tap driver) from Sainath Grandhi.

  25) Support GRO in IPSEC protocols, from Steffen Klassert"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1764 commits)
  Revert "ath10k: Search SMBIOS for OEM board file extension"
  net: socket: fix recvmmsg not returning error from sock_error
  bnxt_en: use eth_hw_addr_random()
  bpf: fix unlocking of jited image when module ronx not set
  arch: add ARCH_HAS_SET_MEMORY config
  net: napi_watchdog() can use napi_schedule_irqoff()
  tcp: Revert "tcp: tcp_probe: use spin_lock_bh()"
  net/hsr: use eth_hw_addr_random()
  net: mvpp2: enable building on 64-bit platforms
  net: mvpp2: switch to build_skb() in the RX path
  net: mvpp2: simplify MVPP2_PRS_RI_* definitions
  net: mvpp2: fix indentation of MVPP2_EXT_GLOBAL_CTRL_DEFAULT
  net: mvpp2: remove unused register definitions
  net: mvpp2: simplify mvpp2_bm_bufs_add()
  net: mvpp2: drop useless fields in mvpp2_bm_pool and related code
  net: mvpp2: remove unused 'tx_skb' field of 'struct mvpp2_tx_queue'
  net: mvpp2: release reference to txq_cpu[] entry after unmapping
  net: mvpp2: handle too large value in mvpp2_rx_time_coal_set()
  net: mvpp2: handle too large value handling in mvpp2_rx_pkts_coal_set()
  net: mvpp2: remove useless arguments in mvpp2_rx_{pkts, time}_coal_set
  ...
2017-02-22 10:15:09 -08:00
Linus Torvalds 5ab356626f Pin control bulk changes for the v4.11 kernel cycle:
Core changes:
 
 - Switch the generic pin config argument from 16 to 24 bits,
   only use 8 bits for the configuration type. We might need to
   encode more information about a certain setting than we need
   to encode different generic settings.
 
 - Add a cross-talk API to the pin control GPIO back-end,
   utilizing pinctrl_gpio_set_config() from GPIO drivers that
   want to set up a certain pin configuration in the back-end.
   This also includes the .set_config() refactoring of the
   GPIO chips, so that they pass a generic configuration for
   things like debouncing and single ended (typically open
   drain). This change has also been merged in an immutable
   branch to the GPIO tree.
 
 - Take hogs with a delayed work, so that we finalize probing
   a pin controller before trying to get any hogs.
 
 - For pin controllers putting all group and function definitions
   into the device tree, we now have generic code to deal with
   this and it is used in two drivers so far.
 
 - Simplifications of the pin request conflict check.
 
 - Make dt_free_map() optional.
 
 Updates to drivers:
 
 - pinctrl-single now use the generic helpers to generate dynamic
   group and function tables from the device tree.
 
 - Texas Instruments IOdelay configuration driver add-on to
   pinctrl-single.
 
 - i.MX: use radix trees to store groups and functions, use the new
   generic group and function helpers to manage them.
 
 - Intel: add support for hardware debouncing and 1K pull-down.
   New subdriver for the Gemini Lake SoC.
 
 - Renesas SH-PFC: drive strength and bias support, CAN bus muxing,
   MSIOF, SDHI, HSCIF for r8a7796. Gyro-ADC supporton r8a7791.
 
 - Aspeed: use syscon cross-dependencies to set up related bits in
   the LPC host controller and display controller.
 
 - Aspeed: finalize G4 and G5 support. Fix mux configuration on
   GPIOs. Add banks Y, Z, AA, AB and AC.
 
 - AMD: support additional GPIO.
 
 - STM32: set this controller to strict muxing mode.
   STM32H743 MCU support.
 
 - Allwinner sunxi: deep simplifications on how to support
   subvariants of SoCs without adding to much SoC-specific data
   for each subvariant, especially for sun5i variants. New driver
   for V3s SoCs. New driver for the H5 SoC. Support A31/A31s
   variants with the new variant framework.
 
 - Mvebu: simplifications to use a MMIO and regmap abstraction.
   New subdrivers for the 98DX3236, 98DX5241 SoCs.
 
 - Samsung Exynos: delete Exynos4415 support. Add crosstalk to the
   SoC driver to access regmaps. Add infrastructure for pin-bank
   retention control. Clean out the pin retention control from
   arch/arm/mach-exynos and arch/arm/mach-s5p and put it properly
   in the Samsung pin control driver(s).
 
 - Meson: add HDMI HPD/DDC pins. Add pwm_ao_b pin.
 
 - Qualcomm: use raw spinlock variants: this makes the qualcomm
   driver realtime-safe.
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Merge tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Pin control bulk changes for the v4.11 kernel cycle.

  Core changes:

   - Switch the generic pin config argument from 16 to 24 bits, only use
     8 bits for the configuration type. We might need to encode more
     information about a certain setting than we need to encode
     different generic settings.

   - Add a cross-talk API to the pin control GPIO back-end, utilizing
     pinctrl_gpio_set_config() from GPIO drivers that want to set up a
     certain pin configuration in the back-end.

     This also includes the .set_config() refactoring of the GPIO chips,
     so that they pass a generic configuration for things like
     debouncing and single ended (typically open drain). This change has
     also been merged in an immutable branch to the GPIO tree.

   - Take hogs with a delayed work, so that we finalize probing a pin
     controller before trying to get any hogs.

   - For pin controllers putting all group and function definitions into
     the device tree, we now have generic code to deal with this and it
     is used in two drivers so far.

   - Simplifications of the pin request conflict check.

   - Make dt_free_map() optional.

  Updates to drivers:

   - pinctrl-single now use the generic helpers to generate dynamic
     group and function tables from the device tree.

   - Texas Instruments IOdelay configuration driver add-on to
     pinctrl-single.

   - i.MX: use radix trees to store groups and functions, use the new
     generic group and function helpers to manage them.

   - Intel: add support for hardware debouncing and 1K pull-down. New
     subdriver for the Gemini Lake SoC.

   - Renesas SH-PFC: drive strength and bias support, CAN bus muxing,
     MSIOF, SDHI, HSCIF for r8a7796. Gyro-ADC supporton r8a7791.

   - Aspeed: use syscon cross-dependencies to set up related bits in the
     LPC host controller and display controller.

   - Aspeed: finalize G4 and G5 support. Fix mux configuration on GPIOs.
     Add banks Y, Z, AA, AB and AC.

   - AMD: support additional GPIO.

   - STM32: set this controller to strict muxing mode. STM32H743 MCU
     support.

   - Allwinner sunxi: deep simplifications on how to support subvariants
     of SoCs without adding to much SoC-specific data for each
     subvariant, especially for sun5i variants. New driver for V3s SoCs.
     New driver for the H5 SoC. Support A31/A31s variants with the new
     variant framework.

   - Mvebu: simplifications to use a MMIO and regmap abstraction. New
     subdrivers for the 98DX3236, 98DX5241 SoCs.

   - Samsung Exynos: delete Exynos4415 support. Add crosstalk to the SoC
     driver to access regmaps. Add infrastructure for pin-bank retention
     control. Clean out the pin retention control from
     arch/arm/mach-exynos and arch/arm/mach-s5p and put it properly in
     the Samsung pin control driver(s).

   - Meson: add HDMI HPD/DDC pins. Add pwm_ao_b pin.

   - Qualcomm: use raw spinlock variants: this makes the qualcomm driver
     realtime-safe"

* tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (111 commits)
  pinctrl: samsung: Fix return value check in samsung_pinctrl_get_soc_data()
  pinctrl: intel: unlock on error in intel_config_set_pull()
  pinctrl: berlin: make bool drivers explicitly non-modular
  pinctrl: spear: make bool drivers explicitly non-modular
  pinctrl: mvebu: make bool drivers explicitly non-modular
  pinctrl: sunxi: make sun5i explicitly non-modular
  pinctrl: sunxi: Remove stray printk call in sun5i driver's probe function
  pinctrl: samsung: mark PM functions as __maybe_unused
  pinctrl: sunxi: Remove redundant A31s pinctrl driver
  pinctrl: sunxi: Support A31/A31s with pinctrl variants
  pinctrl: Amend bindings for STM32 pinctrl
  pinctrl: Add STM32 pinctrl driver DT bindings
  pinctrl: stm32: Add STM32H743 MCU support
  include: dt-bindings: Add STM32H7 pinctrl DT defines
  gpio: aspeed: Remove dependence on GPIOF_* macros
  pinctrl: stm32: fix bad location of gpiochip_lock_as_irq
  drivers: pinctrl: add driver for Allwinner H5 SoC
  pinctrl: intel: Add Intel Gemini Lake pin controller support
  pinctrl: intel: Add support for 1k additional pull-down
  pinctrl: intel: Add support for hardware debouncer
  ...
2017-02-21 16:34:22 -08:00
Linus Torvalds 507b500726 hwmon updates for v4.11
- new driver for stts751
 - it87: Added support for IT8622E and IT8792E; improved support for other chips
 - lm70: Added support for TMP122/124
 - use permission-specific DEVICE_ATTR variants where possible
 - fixed overflows in various drivers
 - minor improvements in various drivers
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Merge tag 'hwmon-for-linus-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging

Pull hwmon updates from Guenter Roeck:

 - new driver for stts751

 - it87: Added support for IT8622E and IT8792E; improved support for
   other chips

 - lm70: Added support for TMP122/124

 - use permission-specific DEVICE_ATTR variants where possible

 - fixed overflows in various drivers

 - minor improvements in various drivers

* tag 'hwmon-for-linus-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (95 commits)
  hwmon: (sht15) Add device tree support
  devicetree: add lm90 thermal_zone sensor support
  hwmon: (it87) Add support for IT8792E
  hwmon: (it87) Do not overwrite bit 2..6 of pwm control registers
  hwmon: (it87) Fix pwm4 detection for IT8620 and IT8628
  hwmon: (it87) Ensure that pwm control cache is current before updating values
  hwmon: (it87) Improve IT8622 support
  hwmon: (it87) Add support for IT8622E
  hwmon: (it87) Add feature flag indicating that VIN3 is connected to 5V
  DT: add binding documentation for STTS751
  hwmon: new driver for ST stts751 thermal sensor
  hwmon: Register thermal zone only if 'dev' parameter was provided
  hwmon: Relax name attribute validation for new APIs
  hwmon: Update documentation to clarify rules for the 'name' attribute
  hwmon: Make name attribute mandatory for new APIs
  hwmon: (lm70) Add support for TI TMP122/124
  hwmon: (lm70) Utilize dev_warn instead of pr_warn
  hwmon: (ltc4151) Export OF device ID table as module aliases
  hwmon: (adc128d818) Preserve operation mode
  hwmon: (adc128d818) Support operation modes 1-3
  ...
2017-02-20 09:52:08 -08:00
Arnd Bergmann 3e011039a3 Amlogic DT updates for v4.11, round 2
- add SAR ADC driver
 - add ADC laddered keys to meson-gxbb-p200 board
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Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic DT updates for v4.11, round 2" from Kevin Hilman:

- add SAR ADC driver
- add ADC laddered keys to meson-gxbb-p200 board

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-gxbb-p200: add ADC laddered keys
  ARM64: dts: meson: meson-gx: add the SAR ADC
  ARM64: dts: meson-gxl: add the pwm_ao_b pin
  ARM64: dts: meson-gx: add the missing pwm_AO_ab node
  clk: gxbb: fix CLKID_ETH defined twice
  ARM64: dts: meson-gxl: rename Nexbox A95x for consistency
  clk: gxbb: add the SAR ADC clocks and expose them
  dt-bindings: amlogic: Add WeTek boards
  ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play
  dt-bindings: vendor-prefix: Add wetek vendor prefix
  ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency
  ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes
  ARM64: dts: meson-gxbb-vega-s95: Add LED
  ARM64: dts: meson-gx: add the serial CTS and RTS pin groups
  ARM64: dts: meson-gx: add the missing uart_AO_B
  clk: meson-gxbb: Export HDMI clocks
  ARM64: dts: meson-gxm: add SCPI configuration for GXM
  ARM64: dts: meson-gx: move the SCPI and SRAM nodes to meson-gx
2017-02-16 17:50:04 +01:00
Arnd Bergmann d0f7de9258 Samsung DeviceTree ARM64 update for v4.11, third round:
1. Add necessary initial configuration for clocks of display subsystem.
    Till now it worked mostly thanks to bootloader.
 2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
 3. Enable USB 3.0 (DWC3) on Exynos7.
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Merge tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late

Pull "Samsung DeviceTree ARM64 update for v4.11, third round" from Krzysztof Kozłowski:

1. Add necessary initial configuration for clocks of display subsystem.
   Till now it worked mostly thanks to bootloader.
2. Use macro definitions instead of hard-coded values for pinctrl on Exynos7.
3. Enable USB 3.0 (DWC3) on Exynos7.

* tag 'samsung-dt64-4.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (27 commits)
  arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost
  arm64: dts: exynos: Add USB 3.0 controller node for Exynos7
  arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7
  pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
  arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e
  clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
  clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
  arm64: dts: exynos: Add clocks to Exynos5433 LPASS module
  arm64: dts: exynos: set LDO7 regulator as always on
  arm64: dts: exynos: configure TV path clocks for Ultra HD modes
  arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions
  arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs
  arm64: dts: exynos: Add TM2 touchkey node
  arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes
  arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
  arm64: dts: exynos: Add HDMI node to Exynos5433
  arm64: dts: exynos: Add DECON_TV node to Exynos5433
  arm64: dts: exynos: Fix addresses in node names on Exynos5433
  arm64: dts: exynos: Make TM2 and TM2E independent from each other
  arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
  ...
2017-02-16 17:46:52 +01:00
Christian Lamparter 87d08b11b1 devicetree: add lm90 thermal_zone sensor support
This patch updates the LM90's devicetree definition to
include the #thermal-sensor-cells property as well as
the sensor constants in include/dt-bindings/thermal/lm90.h.

Cc: Wei Ni <wni@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2017-02-10 21:35:08 -08:00
Raju Lakkaraju 04d8a0a5f3 net: phy: Add LED mode driver for Microsemi PHYs.
LED Mode:
Microsemi PHY support 2 LEDs (LED[0] and LED[1]) to display different
status information that can be selected by setting LED mode.

LED Mode parameter (vsc8531, led-0-mode) and (vsc8531, led-1-mode) get
from Device Tree.

Signed-off-by: Raju Lakkaraju <Raju.Lakkaraju@microsemi.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-02-08 13:29:04 -05:00
Arnd Bergmann 4b5f4835d1 STM32 DT updates for v4.11, round 2.
Highlights:
 ----------
 
  - ADD Timers support on STM32F429 MCU
  - Enable PWM1 & PWM3 on STM32F469 Disco board
  - Fix STM32F4_X_CLOCK macro
  - Use STM32F4_X_CLOCK macro in STM32 device tree
  - Add I2C1 support for STM32F429 MCU
  - Enable I2C1 on STM32F429 eval board
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Merge tag 'stm32-dt-for-v4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

Pull "STM32 DT updates for v4.11, round 2" from Alexandre Torgue:

Highlights:
----------

 - ADD Timers support on STM32F429 MCU
 - Enable PWM1 & PWM3 on STM32F469 Disco board
 - Fix STM32F4_X_CLOCK macro
 - Use STM32F4_X_CLOCK macro in STM32 device tree
 - Add I2C1 support for STM32F429 MCU
 - Enable I2C1 on STM32F429 eval board

* tag 'stm32-dt-for-v4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: Add I2C1 support for STM32429 eval board
  ARM: dts: stm32: Add I2C1 support for STM32F429 SoC
  ARM: dts: stm32: Use clock DT binding definition on stm32f429 family
  dt-bindings: mfd: stm32f4: Add missing binding definition
  dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
  ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco
  ARM: dts: stm32: add Timers driver for stm32f429 MCU
2017-02-07 15:25:19 +01:00
Alexandre TORGUE 63b8482781 include: dt-bindings: Add STM32H7 pinctrl DT defines
Adds common pinctrl device tree defines for STM32H743 and
STM32H753 MCU.

Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-02-06 09:37:44 +01:00
Stephen Boyd 5775a4c76f Non-critical fix for the pclk_edp divider on rk3399, one new clock-id
and making niu (interconnect) clocks critical on rk3288, as
 CLK_IGNORE_UNUSED is not enough to keep them running all the time
 when more users access particular clock subtrees.
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Merge tag 'v4.11-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk updates from Heiko Stuebner:

  "Non-critical fix for the pclk_edp divider on rk3399, one new
  clock-id and making niu (interconnect) clocks critical on
  rk3288, as CLK_IGNORE_UNUSED is not enough to keep them running
  all the time when more users access particular clock subtrees."

* tag 'v4.11-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: rk3288: make all niu clocks critical
  clk: rockchip: use rk3288 vip_out clock ids
  clk: rockchip: add rk3288 vip_out clock id
  clk: rockchip: fix the incorrect pclk_edp div width for RK3399
2017-02-03 12:07:35 -08:00
Stephen Boyd 2fbae64aad Allwinner clock changes for 4.11
- Support for one new SoC, the V3s
   - Convertion of two old SoCs to the new framework, the old sun5i family
     and the A80
   - A bunch of fixes
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Merge tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock updates from Maxime Ripard:

  - Support for one new SoC, the V3s
  - Conversion of two old SoCs to the new framework, the old sun5i family
    and the A80
  - A bunch of fixes

* tag 'sunxi-clk-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (25 commits)
  ARM: dts: sun9i: Switch to new clock bindings
  clk: sunxi-ng: Add A80 Display Engine CCU
  clk: sunxi-ng: Add A80 USB CCU
  clk: sunxi-ng: Add A80 CCU
  clk: sunxi-ng: Support separately grouped PLL lock status register
  clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT
  clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag
  clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers
  clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPU
  clk: sunxi-ng: Call divider_round_rate if we only have a single parent
  ARM: gr8: Convert to CCU
  ARM: sun5i: Convert to CCU
  clk: sunxi-ng: Add sun5i CCU driver
  clk: sunxi-ng: Implement global pre-divider
  clk: sunxi-ng: Implement multiplier maximum
  clk: sunxi-ng: mult: Fix minimum in round rate
  clk: sunxi-ng: Implement factors offsets
  clk: sunxi-ng: multiplier: Add fractional support
  clk: sunxi-ng: add support for V3s CCU
  dt-bindings: add device binding for the CCU of Allwinner V3s
  ...
2017-02-03 11:47:47 -08:00
Krzysztof Kozlowski 7633a727b0 Defines for GPIO drive strengths on Exynos5433 and Exynos7, used in Device Tree
sources.
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Merge tag 'samsung-pinctrl-4.11' into next/dt64

Merge the pinctrl header before its usage.

Defines for GPIO drive strengths on Exynos5433 and Exynos7, used in Device Tree
sources.
2017-02-02 19:07:56 +02:00
Pankaj Dubey 860ac88abe pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions
Exynos7 SoC pinctrl configurations are similar to existing Exynos4/5 except
for FSYS1 pinctrl drive strengths. So adding Exynos7 specific FSYS1 blocks
pinctrl driver strength related macros which will be used in Exynos7
DTSi files.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-02-02 18:59:49 +02:00
Gabriel Fernandez 2cfb397b15 dt-bindings: mfd: stm32f4: Add missing binding definition
This patch adds missing binding definition (backupram, ethernet, otg,
qspi, adc & dsi)

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-02-01 17:01:36 +01:00
Gabriel Fernandez 982b159297 dt-bindings: mfd: stm32f4: Fix STM32F4_X_CLOCK() macro
Macro to select a clock was not correct.

Offset of enable register starts at 0x30, then calculation to select a bit is:
(@enable_reg - 0x30) / 4 * 32 + bit_to_select

Tested-by: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-02-01 17:01:33 +01:00
Krzysztof Kozlowski 67707c78f5 Exporting clocks for MIPI DSI DPHY and the display PLL
frequency list update for Exynos5433 SoC.
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Merge tag 'clk-v4.11-samsung-dphy' of git://linuxtv.org/snawrocki/samsung into next/dt64

Exporting clocks for MIPI DSI DPHY and the display PLL
frequency list update for Exynos5433 SoC.
2017-01-31 21:36:52 +02:00
Chen-Yu Tsai 783ab76ae5 clk: sunxi-ng: Add A80 Display Engine CCU
With the A80 SoC, Allwinner grouped and moved some subsystem specific
clock controls to a separate address space, and possibly separate
hardware block.

One such subsystem is the display engine. The main clock control unit
now only has 1 set of bus gate, dram gate, module clock, and reset
control for the entire display subsystem. These feed into a secondary
clock control unit, which has controls for each individual module
of the display pipeline. This block is not documented in the user
manual. Allwinner's kernel was used as the reference.

Add support for the display engine clock controls found on the A80.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-30 08:38:30 +01:00
Chen-Yu Tsai 439b65c4bb clk: sunxi-ng: Add A80 USB CCU
Add support for the USB clock controls found on the A80.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-30 08:37:51 +01:00
Chen-Yu Tsai b8eb71dcdd clk: sunxi-ng: Add A80 CCU
Add support for the main clock unit found in the A80. Some clocks were
not documented in the released user manual, but were found in the
official kernel from Allwinner. These include controls for the I2S,
SPDIF, SATA, and eDP blocks.

Note that on the A80, some subsystems have separate clock controllers
downstream of the main clock unit. These include the MMC, USB, and
display engine subsystems.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-30 08:37:30 +01:00
Olof Johansson 2a742e1b18 ZTE PM domain driver support for 4.11:
- It includes a series which adds DT bindings and PM domain driver for
    PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
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Merge tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

ZTE PM domain driver support for 4.11:
 - It includes a series which adds DT bindings and PM domain driver for
   PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.

* tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: zte: pm_domains: Add support for zx296718
  soc: zte: pm_domains: Prepare for supporting ARMv8 zx2967 family
  soc: zte: Add header for PM domains specifiers
  MAINTAINERS: add zx2967 SoC drivers to ARM ZTE architecture
  dt-bindings: zte: add bindings document for zx2967 power domain controller

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29 21:17:24 -08:00
Olof Johansson 18e738d767 Second Round of Renesas ARM Based SoC DT Updates for v4.11
Enhancements:
 * Add power-domains to mmcif on r7s72100 SoC
 * Add OSTM to rskrza1/r7s72100
 * Link ARM GIC to clock and clock domain on r8a774[35] SoCs
 
 Clean-up:
 * Correct SATA device status on r8a7779/marzen
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Merge tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM Based SoC DT Updates for v4.11

Enhancements:
- Add power-domains to mmcif on r7s72100 SoC
- Add OSTM to rskrza1/r7s72100
- Link ARM GIC to clock and clock domain on r8a774[35] SoCs

Clean-up:
- Correct SATA device status on r8a7779/marzen

* tag 'renesas-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: dts: r7s72100: add power-domains to mmcif
  ARM: dts: rskrza1: add ostm DT support
  ARM: dts: r7s72100: add ostm to device tree
  ARM: dts: r7s72100: add ostm clock to device tree
  ARM: dts: r8a7745: Link ARM GIC to clock and clock domain
  ARM: dts: r8a7743: Link ARM GIC to clock and clock domain
  ARM: dts: r8a7779, marzen: Fix sata device status

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29 20:54:31 -08:00
Olof Johansson 61c5e4927b Some extensions to the power-domain driver to support domains in
hiword registers (write-mask in upper 16bit) and domain-definitions
 for the rk3328 soc.
 
 Secondly a "driver" that attaches to the already existing grf nodes
 and is able to set static defaults for settings that cannot really
 be attached to any specific subsystem.
 Most GRF settings can already be set from drivers using them, but there
 are some behavioural settings like the mmc/jtag switch that cannot.
 
 As the commit message states this is really meant as a last line
 of defence for things that neither belong to a subsystem nor to the
 
 Having this here allows arm64 socs to have this as well and also
 moves another bit of code out of the arm32 mach-rockchip.
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Merge tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers

Some extensions to the power-domain driver to support domains in
hiword registers (write-mask in upper 16bit) and domain-definitions
for the rk3328 soc.

Secondly a "driver" that attaches to the already existing grf nodes
and is able to set static defaults for settings that cannot really
be attached to any specific subsystem.
Most GRF settings can already be set from drivers using them, but there
are some behavioural settings like the mmc/jtag switch that cannot.

As the commit message states this is really meant as a last line
of defence for things that neither belong to a subsystem nor to the

Having this here allows arm64 socs to have this as well and also
moves another bit of code out of the arm32 mach-rockchip.

* tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: rockchip: drop rk3288 jtag/mmc switch handling
  soc: rockchip: add driver handling grf setup
  dt-bindings: add used but undocumented rockchip grf compatible values
  soc: rockchip: power-domain: add power domain support for rk3328
  dt-bindings: add binding for rk3328 power domains
  dt-bindings: power: add RK3328 SoCs header for idle-request
  soc: rockchip: power-domain: Support domain control in hiword-registers

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29 14:32:07 -08:00
Jeremy McNicoll 6eeaf8ff2f dt-bindings: qcom: clk: Add missing binding for SDCHI enablement on Nexus 5X/6P
AHB clock branch is needed in order to enable SDHCI
on msm899(2/4).

Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-27 13:33:03 -08:00
Stephen Boyd 1955595069 Exporting clock IDs for Exynos5433 SoC MIPI DSI DPHY,
Exynos PLL code updates and overall minor clean-ups.
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Merge tag 'clk-v4.11-samsung-2' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull Samsung clk driver updates from Sylwester Nawrocki:

 - Exporting clock IDs for Exynos5433 SoC MIPI DSI DPHY
 - Exynos PLL code updates and overall minor clean-ups

* tag 'clk-v4.11-samsung-2' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: mark s3c...._clk_sleep_init() as __init
  clk: samsung: Add enable/disable support for PLL35XX clocks
  clk: samsung: exynos5433: Correct typos in SoC name
  clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates
  clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
2017-01-27 11:53:06 -08:00
Marek Szyprowski 5ccb58968b clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks
Add missing identifiers for phyclk_mipidphy0_bitclkdiv8_phy and
phyclk_mipidphy0_rxclkesc0_phy clocks. Access to those clocks is needed
to setup initial clock configuration for display subsystem in device tree
in order to avoid dependency on the configuration left by the bootloader.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2017-01-27 11:33:59 +01:00
Stephen Boyd de9b5a2404 Merge branch 'clk-ux500' into clk-next
* clk-ux500:
  clk: ux500: Convert ABx500 clocks to use OF probing
  clk: ux500: Add device tree bindings for ABx500 clocks
  clk: ux500: move AB8500 sysclk over to PRCMU clk driver
2017-01-26 16:10:57 -08:00
Linus Walleij 55921ce276 clk: ux500: Convert ABx500 clocks to use OF probing
These clocks have been broken for a long time unfortunately, a
hurdle of misc problems made them stop working at some point
breaking USB and audio on Ux500.

The platform as such and all "regular" clocks are migrated to
OF/device tree, so let's migrate also this driver.

With this patch and the corresponding DTS fixes, and a bunch
of probe deferral fixes, audio starts working again on Ux500.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-26 16:10:02 -08:00
Stephen Boyd 0875dd5938 Merge branch 'clk-stm32f4' into clk-next
* clk-stm32f4:
  clk: stm32f7: Add stm32f7 clock DT bindings for STM32F746 boards
2017-01-26 15:52:55 -08:00
Stephen Boyd 645ebb1daa Merge branch 'clk-imx7', 'clk-bcm2835' into clk-next
* clk-imx7:
  clk: imx7d: Add the OCOTP clock

* clk-bcm2835:
  clk: bcm2835: Add leaf clock measurement support, disabled by default
  clk: bcm2835: Register the DSI0/DSI1 pixel clocks.
  clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL dividers.
2017-01-26 15:52:37 -08:00
Chris Brandt cfddd3db08 ARM: dts: r7s72100: add ostm clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-01-24 13:25:04 +01:00
Martin Blumenstingl 33d0fcdfe0 clk: gxbb: add the SAR ADC clocks and expose them
The HHI_SAR_CLK_CNTL contains three SAR ADC specific clocks:
- a mux clock to choose between different ADC reference clocks (this is
  2-bit wide, but the datasheet only lists the parents for the first
  bit)
- a divider for the input/reference clock
- a gate which enables the ADC clock

Additionally this exposes the ADC core clock (CLKID_SAR_ADC) and
CLKID_SANA (which seems to enable the analog inputs, but unfortunately
there is no documentation for this - we just mimic what the vendor
driver does).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-01-23 10:18:21 -08:00
Maxime Ripard 5e73761786 clk: sunxi-ng: Add sun5i CCU driver
The Allwinner A10s, A13, R8 and NextThing GR8 are all based on the same
silicon, and all share the same clocks.

However, they're not packaged in the same way, and therefore not all the
controllers are actually available on all these SoCs.

Introduce a clock controller driver for all these SoCs with different
compatibles to take that into account.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-23 11:45:29 +01:00
Jacob Chen db86dadf18 clk: rockchip: add rk3288 vip_out clock id
Add clock-ids for the vip block of the rk3288

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-22 17:07:03 +01:00
Gabriel Fernandez 52af8557bb clk: stm32f7: Add stm32f7 clock DT bindings for STM32F746 boards
This patch introduces the stm32f7 clock DT bindings.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-20 16:37:43 -08:00
Fabio Estevam 6847c4c296 clk: imx7d: Add the OCOTP clock
Add the OCOTP so that this hardware block can be used.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-20 16:27:19 -08:00
Eric Anholt 8a39e9fa57 clk: bcm2835: Register the DSI0/DSI1 pixel clocks.
The DSI pixel clocks are muxed from clocks generated in the analog phy
by the DSI driver.  In order to set them as parents, we need to do the
same name lookup dance on them as we do for our root oscillator.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-20 16:22:55 -08:00
Stephen Boyd 060982670b A new clock-type for the 1-2 muxes per soc that are for whatever reason
controlled through the General Register Files, support for the rk3328
 clock-controller (including a new pll-type) and the usual clock ids and
 some fixes.
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Merge tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk updates from Heiko Stuebner:

A new clock-type for the 1-2 muxes per soc that are for whatever reason
controlled through the General Register Files, support for the rk3328
clock-controller (including a new pll-type) and the usual clock ids and
some fixes.

* tag 'v4.11-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: clk: add rockchip,grf property for RK3399
  clk: rockchip: use clock ids for memory controller parts on rk3066/rk3188
  clk: rockchip: use rk3288 isp_in clock ids
  clk: rockchip: add clock ids for memory controller parts on rk3066/rk3188
  clk: rockchip: add rk3288 isp_in clock ids
  clk: rockchip: Remove useless init of "grf" to -EPROBE_DEFER
  clk: rockchip: add clock controller for rk3328
  dt-bindings: add bindings for rk3328 clock controller
  clk: rockchip: add dt-binding header for rk3328
  clk: rockchip: add new pll-type for rk3328
  clk: rockchip: describe aclk_vcodec using the new muxgrf type on rk3288
  clk: rockchip: add a clock-type for muxes based in the grf
2017-01-20 15:51:55 -08:00
Stephen Boyd d07ed23f4c clk/samsung updates for v4.11:
- addition of the CPU clock configuration data for Exynos4412
    Prime SoC variant,
  - removal of driver for deprecated Exynos4415 SoC,
  - switching from the syscore to regular system sleep PM ops
    in the audio subsystem clocks controller driver,
  - updates of the definitions of some "Network On Chip" related
    clocks.
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Merge tag 'clk-v4.11-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next

Pull Samsung clk updates from Sylwester Nawrocki:

 - addition of the CPU clock configuration data for Exynos4412
   Prime SoC variant,
 - removal of driver for deprecated Exynos4415 SoC,
 - switching from the syscore to regular system sleep PM ops
   in the audio subsystem clocks controller driver,
 - updates of the definitions of some "Network On Chip" related
   clocks.

* tag 'clk-v4.11-samsung' of git://linuxtv.org/snawrocki/samsung:
  clk: samsung: Remove Exynos4415 driver (SoC not supported anymore)
  clk: samsung: exynos-audss: Replace syscore PM with platform device PM
  clk: samsung: exynos5433: Set NoC (Network On Chip) clocks as critical
  clk: samsung: Add CPU clk configuration data for Exynos4412 Prime
2017-01-20 15:49:47 -08:00
Icenowy Zheng d0f11d14b0 clk: sunxi-ng: add support for V3s CCU
V3s has a similar but cut-down CCU to H3. Some muxes, especially clocks
about CSI, are different, which makes it to need a new CCU driver.

Add such a new driver for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-01-20 21:39:03 +01:00
Alexandre TORGUE 232aa35e1b Merge commit 'f8b5036361412a27c07a4ac9c3a4b80678cbd1e1' into stm32-dt-for-v4.11 2017-01-20 14:48:23 +01:00
Neil Armstrong 5a582cff47 clk: meson-gxbb: Export HDMI clocks
Export HDMI clock from internal to dt-bindings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-01-18 10:17:53 -08:00
Olof Johansson c2b360449e STM32 DT updates for v4.11, round 1.
Highlights:
 ----------
 
  - ADD RTC support on STM32F429 MCU
  - Enable RTC on STM32F469and STM32F429 boards
  - ADD ADC support on STM32F429 MCU
  - Enable ADC on STM32F429 Eval board
  - Add I2S external clock
  - Fix memory size for STM32F429 Disco
 
 Note:
 -----
 First patch "clk: stm32f4: Update DT bindings documentation")
 has already been merged in clock tree.
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Merge tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

STM32 DT updates for v4.11, round 1.

Highlights:
----------

 - ADD RTC support on STM32F429 MCU
 - Enable RTC on STM32F469and STM32F429 boards
 - ADD ADC support on STM32F429 MCU
 - Enable ADC on STM32F429 Eval board
 - Add I2S external clock
 - Fix memory size for STM32F429 Disco

Note:
-----
First patch "clk: stm32f4: Update DT bindings documentation")
has already been merged in clock tree.

* tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: enable RTC on stm32429i-eval
  ARM: dts: stm32: enable RTC on stm32f469-disco
  ARM: dts: stm32: enable RTC on stm32f429-disco
  ARM: dts: stm32: Add RTC support for STM32F429 MCU
  ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f429
  ARM: dts: stm32: Include auxiliary stm32fx clock definition
  ARM: dts: stm32: Add external I2S clock on stm32f429 MCU
  ARM: dts: stm32: enable ADC on stm32f429i-eval board
  ARM: dts: stm32: Add ADC support to stm32f429
  ARM: dts: stm32: Add missing USART3 pin config to stm32f469-disco board
  ARM: dts: stm32: Fix memory size from 8MB to 16MB on stm32f469-disco board
  clk: stm32f4: Update DT bindings documentation

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-16 22:47:51 -08:00
Olof Johansson 127e0ee0e5 Samsung DeviceTree ARM64 update for v4.11:
1. Add bus frequency and voltage scalling on Exynos5433 TM2 device (along with
    necessary bus nodes and Platform Performance Monitoring Unit on Exynos5433).
 2. Use macros for pinctrl settings on Exynos5433.
    This contains necessary header with bindings.
 3. Minor cleanups in Exynos5433 DTSI and boards using it.
 4. Create common DTSI betweem Exynos5433 TM2E and TM2E.
 5. Add HDMI/TV to Exynos5433 TM2.
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Merge tag 'samsung-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64

Samsung DeviceTree ARM64 update for v4.11:
1. Add bus frequency and voltage scalling on Exynos5433 TM2 device (along with
   necessary bus nodes and Platform Performance Monitoring Unit on Exynos5433).
2. Use macros for pinctrl settings on Exynos5433.
   This contains necessary header with bindings.
3. Minor cleanups in Exynos5433 DTSI and boards using it.
4. Create common DTSI betweem Exynos5433 TM2E and TM2E.
5. Add HDMI/TV to Exynos5433 TM2.

* tag 'samsung-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Enable HDMI/TV path on Exynos5433-TM2
  arm64: dts: exynos: Add HDMI node to Exynos5433
  arm64: dts: exynos: Add DECON_TV node to Exynos5433
  arm64: dts: exynos: Fix addresses in node names on Exynos5433
  arm64: dts: exynos: Make TM2 and TM2E independent from each other
  arm64: dts: exynos: Fix wrong values for ldo23 and ldo25 on TM2/TM2E
  arm64: dts: exynos: Remove unsupported regulator-always-off property from TM2E
  arm64: dts: exynos: Comply to the samsung pinctrl naming convention in TM2
  arm64: dts: exynos: Use macros for pinctrl configuration on Exynos5433
  pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
  arm64: dts: exynos: Add support of bus frequency using VDD_INT on Exynos5433 TM2
  arm64: dts: exynos: Add bus nodes using VDD_INT for Exynos5433
  arm64: dts: exynos: Add PPMU node to Exynos5433

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-16 22:31:07 -08:00
Krzysztof Kozlowski cb4ac949ea clk: samsung: Remove Exynos4415 driver (SoC not supported anymore)
Support for Exynos4415 is going away because there are no internal nor
external users.

Since commit 46dcf0ff0d ("ARM: dts: exynos: Remove exynos4415.dtsi"),
the platform cannot be instantiated so remove also the drivers.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2017-01-16 11:33:38 +01:00
Heiko Stuebner 4688708271 clk: rockchip: add clock ids for memory controller parts on rk3066/rk3188
Add clock ids for the upctl and publ controllers used for ddr control.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-13 17:10:02 +01:00
Jacob Chen 6547653050 clk: rockchip: add rk3288 isp_in clock ids
Add clock-ids for the isp block of the rk3288.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-13 16:42:16 +01:00
Baoyou Xie eea1d99b90 soc: zte: Add header for PM domains specifiers
This patch adds header with values used for ZTE 2967
SoC's power domain driver.

Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-01-11 16:21:06 +08:00
Gabriel Fernandez be20fe159d clk: stm32f4: Update DT bindings documentation
Creation of dt include file for specific stm32f4 clocks.
These specific clocks are not derived from system clock (SYSCLOCK)
We should use index 1 to use these clocks in DT.
e.g. <&rcc 1 CLK_LSI>

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
2017-01-10 11:40:40 +01:00
Zoran Markovic 8e18d06589 clk: mdm9615: Add EBI2 clock
Add definition of EBI2 clock used by MDM9615 NAND controller.

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Zoran Markovic <zmarkovic@sierrawireless.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[sboyd@codeaurora.org: ebi2_clk halt bit is 24 not 23]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-09 16:33:26 -08:00
Stephen Boyd a2d6ef3a23 Merge branch 'clk-hi3660' into clk-next
* clk-hi3660:
  clk: hisilicon: Add clock driver for hi3660 SoC
  dt-bindings: Document the hi3660 clock bindings
2017-01-09 16:26:30 -08:00
Zhangfei Gao d374e6fd50 clk: hisilicon: Add clock driver for hi3660 SoC
Add clock drivers for hi3660 SoC, this driver controls the SoC
registers to supply different clocks to different IPs in the SoC.

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
[sboyd@codeaurora.org: Simplify probe with function pointer]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-09 16:20:38 -08:00
Avaneesh Kumar Dwivedi 4263499a6e clk: qcom: Add GCC_MSS_RESET support
Add support to use reset control framework for resetting MSS
with hexagon v56 1.5.0.

Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-09 16:06:43 -08:00
Stephen Boyd 2df2b82b7e Merge branches 'clk-qcom-rpm8974', 'clk-stm32f4', 'clk-ipq4019' and 'clk-fixes' into clk-next
* clk-qcom-rpm8974:
  clk: qcom: smd-rpmcc: Add msm8974 clocks

* clk-stm32f4:
  clk: stm32f4: SDIO & 48Mhz clock management for STM32F469 board
  clk: stm32f4: Add SAI clocks
  clk: stm32f4: Add I2S clock
  clk: stm32f4: Add lcd-tft clock
  clk: stm32f4: Add post divisor for I2S & SAI PLLs
  clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards
  clk: stm32f4: Update DT bindings documentation

* clk-ipq4019:
  clk: qcom: ipq4019: Add the cpu clock frequency change notifier
  clk: qcom: ipq4019: Add all the frequencies for apss cpu
  clk: qcom: ipq4019: correct sdcc frequency and parent name
  clk: qcom: ipq4019: Add the nodes for pcnoc
  clk: qcom: ipq4019: Add the apss cpu pll divider clock node
  clk: qcom: ipq4019: remove fixed clocks and add pll clocks

* clk-fixes:
  clk: stm32f4: Use CLK_OF_DECLARE_DRIVER initialization method
  clk: renesas: mstp: Support 8-bit registers for r7s72100
2017-01-09 16:06:11 -08:00
Tony Lindgren d97556c801 ARM: dts: Fix omap3 off mode pull defines
We need to also have OFFPULLUDENABLE bit set to use the off mode pull values.
Otherwise the line is pulled down internally if no external pull exists.

This is has some documentation at:

http://processors.wiki.ti.com/index.php/Optimizing_OMAP35x_and_AM/DM37x_OFF_mode_PAD_configuration

Note that the value is still glitchy during off mode transitions as documented
in spz319f.pdf "Advisory 1.45". It's best to use external pulls instead of
relying on the internal ones for off mode and even then anything pulled up
will get driven down momentarily on off mode restore for GPIO banks other
than bank1.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-01-06 08:54:11 -08:00
Andi Shyti eba7e6c6e5 pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433
Commit 5db7e3bb87 ("pinctrl: dt-bindings: samsung: Add header with
values used for configuration") has added a header file for defining the
pinctrl values in order to avoid hardcoded settings in the Exynos
DTS related files.

Extend samsung.h to the Exynos5433 for drive strength values
which are strictly related to the particular SoC and may defer
from others.

Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-01-06 08:51:06 +02:00
Elaine Zhang 9540480b71 dt-bindings: power: add RK3328 SoCs header for idle-request
According to a description from TRM, add all the idle request.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-05 14:31:24 +01:00
Elaine Zhang 6cc1aef0ad clk: rockchip: add dt-binding header for rk3328
Add the dt-bindings header for the rk3328, that gets shared between
the clock controller and the clock references in the dts.
Add softreset ID for rk3328.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-05 13:06:03 +01:00
Milo Kim be53e38f0d dt-bindings: mfd: Remove TPS65217 interrupts
Interrupt numbers are from the datasheet, so no need to keep them in
the ABI. Use the number in the DT file.

Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-12-27 10:06:00 -08:00
Gabriel Fernandez f8b5036361 clk: stm32f4: Update DT bindings documentation
Creation of dt include file for specific stm32f4 clocks.
These specific clocks are not derived from system clock (SYSCLOCK)
We should use index 1 to use these clocks in DT.
e.g. <&rcc 1 CLK_LSI>

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-21 16:06:48 -08:00
Bjorn Andersson 685dc94b7d clk: qcom: smd-rpmcc: Add msm8974 clocks
This adds all RPM based clocks for msm8974, except cxo and
gfx3d_clk_src.

Tested-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-21 16:04:35 -08:00
Abhishek Sahu 5c1a96935f clk: qcom: ipq4019: Add the nodes for pcnoc
The current ipq4019 clock driver does not have the node for
PCNOC so this patch adds and registers the PCNOC clock nodes.
This PCNOC clock is critical and should not be turned off so
setting CRITICAL flag also.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-21 15:57:27 -08:00
Abhishek Sahu d83dcacea1 clk: qcom: ipq4019: Add the apss cpu pll divider clock node
The current ipq4019 clock driver does not have support for all
the frequency supported by APSS CPU. APSS CPU frequency is
provided with APSS CPU PLL divider which divides down the VCO
frequency. This divider is nonlinear and specific to IPQ4019
so the standard divider code cannot be used for this.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-21 15:57:26 -08:00
Abhishek Sahu 4577aa01a5 clk: qcom: ipq4019: remove fixed clocks and add pll clocks
The current ipq4019 clock driver registered the PLL clocks and
dividers as fixed clock. These fixed clock needs to be removed
from driver probe function and same need to be registered with
clock framework. These PLL clocks should be programmed only
once and the same are being programmed already by the boot
loader so the set rate operation is not required for these
clocks. Only the rate can be calculated by clock operations
in clock driver file so this patch adds the same.

The PLL takes the reference clock from XO and generates the
intermediate VCO frequency. This VCO frequency will be divided
down by different PLL internal dividers. Some of the PLL
internal dividers are fixed while other are programmable.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-21 15:57:25 -08:00
jbrunet 308d3165d8 dt: bindings: net: use boolean dt properties for eee broken modes
The patches regarding eee-broken-modes was merged before all people
involved could find an agreement on the best way to move forward.

While we agreed on having a DT property to mark particular modes as broken,
the value used for eee-broken-modes mapped the phy register in very direct
way. Because of this, the concern is that it could be used to implement
configuration policies instead of describing a broken HW.

In the end, having a boolean property for each mode seems to be preferred
over one bit field value mapping the register (too) directly.

Cc: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-12-20 13:50:50 -05:00
Linus Torvalds 991688bfc6 ARM: SoC driver updates for v4.10
Driver updates for ARM SoCs, including a couple of newly added drivers:
 
 - A new driver for the power management controller on TI Keystone
 - Support for the prerelease "SCPI" firmware protocol that ended up
   being shipped by Amlogic in their GXBB SoC.
 - A soc_device can now be matched using a glob from inside the
   kernel, when another driver wants to know the specific chip
   it is running on and cannot find out from DT, firmware or hardware.
 - Renesas SoCs now support identification through the soc_device
   interface, both in user space and kernel.
 - Renesas r8a7743 and r8a7745 gain support for their system controller
 - A new checking module for the ARM "PSCI" (not to be confused
   with "SCPI" mentioned above) firmware interface.
 - A new driver for the Tegra GMI memory interface
 - Support for the Tegra firmware interfaces with their
   power management controllers
 
 As usual, the updates for the reset controller framework are merged
 here, as they tend to touch multiple SoCs as well, including a new
 driver for the Oxford (now Broadcom) OX820 chip and the Tegra
 bpmp interface.
 
 The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
 Rockchips SoCs see some further updates.
 
 Conflicts:
 - ARCH_RENESAS now selects SOC_BUS, but no longer needs GPIOLIB
 - drivers/soc/renesas/Makefile: multiple files got added, keep
   all in logical sorting
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs, including a couple of newly added
  drivers:

   - A new driver for the power management controller on TI Keystone

   - Support for the prerelease "SCPI" firmware protocol that ended up
     being shipped by Amlogic in their GXBB SoC.

   - A soc_device can now be matched using a glob from inside the
     kernel, when another driver wants to know the specific chip it is
     running on and cannot find out from DT, firmware or hardware.

   - Renesas SoCs now support identification through the soc_device
     interface, both in user space and kernel.

   - Renesas r8a7743 and r8a7745 gain support for their system
     controller

   - A new checking module for the ARM "PSCI" (not to be confused with
     "SCPI" mentioned above) firmware interface.

   - A new driver for the Tegra GMI memory interface

   - Support for the Tegra firmware interfaces with their power
     management controllers

  As usual, the updates for the reset controller framework are merged
  here, as they tend to touch multiple SoCs as well, including a new
  driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
  interface.

  The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
  Rockchips SoCs see some further updates"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
  misc: sram: remove useless #ifdef
  drivers: psci: Allow PSCI node to be disabled
  drivers: psci: PSCI checker module
  soc: renesas: Identify SoC and register with the SoC bus
  firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
  firmware: qcom: scm: Remove core, iface and bus clocks dependency
  dt-bindings: firmware: scm: Add MSM8996 DT bindings
  memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
  bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
  ARM: shmobile: Document DT bindings for Product Register
  soc: renesas: rcar-sysc: add R8A7745 support
  reset: Add Tegra BPMP reset driver
  dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
  dt-bindings: Add power domains to Tegra BPMP firmware
  firmware: tegra: Add BPMP support
  firmware: tegra: Add IVC library
  dt-bindings: firmware: Add bindings for Tegra BPMP
  mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
  mailbox: Add Tegra HSP driver
  firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
  ...
2016-12-15 16:03:25 -08:00
Linus Torvalds 786a72d791 ARM: DT updates for v4.10
Lots of changes as usual, so I'm trying to be brief here. Most of the
 new hardware support has the respective driver changes merged through
 other trees or has had it available for a while, so this is where things
 come together.
 
 We get a DT descriptions for a couple of new SoCs, all of them variants
 of other chips we already support, and usually coming with a new
 evaluation board:
 
 - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
 - Qualcomm MDM9615 LTE baseband
 - NXP imx6ull, the latest and smallest i.MX6 application processor variant
 - Renesas RZ/G (r8a7743 and r8a7745) application processors
 - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
 - Rockchip rk1108 single-core application processor
 - ST stm32f746 Cortex-M7 based microcontroller
 - TI DRA71x automotive processors
 
 These are commercially available consumer platforms we now support:
 - Motorola Droid 4 (xt894) mobile phone
 - Rikomagic MK808 Android TV stick based on Rockchips rx3066
 - Cloud Engines PogoPlug v3 based on OX820
 - Various Broadcom based wireless devices:
   - Netgear R8500 router
   - Tenda AC9 router
   - TP-LINK Archer C9 V1
   - Luxul XAP-1510 Access point
 - Turris Omnia open hardware router based on Armada 385
 
 And a couple of new boards targeted at developers, makers
 or industrial integration:
 - Macnica Sodia development platform for Altera socfpga (Cyclone V)
 - MicroZed board based on Xilinx Zynq FPGA platforms
 - TOPEET itop/elite based on exynos4412
 - WP8548 MangOH Open Hardware platform for IOT, based on
   Qualcomm MDM9615
 - NextThing CHIP Pro gadget
 - NanoPi M1 development board
 - AM571x-IDK industrial board based on TI AM5718
 - i.MX6SX UDOO Neo
 - Boundary Devices Nitrogen6_SOM2 (i.MX6)
 - Engicam i.CoreM6
 - Grinn i.MX6UL liteSOM/liteBoard
 - Toradex Colibri iMX6 module
 
 Other changes:
 - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
   mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
   mvebu, allwinner, broadcom, exynos, zynq
 
 - Continued fixes for W=1 dtc warnings
 
 - The old STiH415/416 SoC support gets removed, these never made it into
   products and have served their purpose in the kernel as a template
   for teh newer chips from ST
 
 - The exynos4415 dtsi file is removed as nothing uses it.
 
 - Intel PXA25x can now be booted using devicetree
 
 Conflicts:
 arch/arm/boot/dts/r8a*.dtsi: a node was added
 the clk tree, keep both sides and watch out for git
 dropping the required '};' at the end of each side.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Arnd Bergmann:
 "Lots of changes as usual, so I'm trying to be brief here. Most of the
  new hardware support has the respective driver changes merged through
  other trees or has had it available for a while, so this is where
  things come together.

  We get a DT descriptions for a couple of new SoCs, all of them
  variants of other chips we already support, and usually coming with a
  new evaluation board:

   - Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
   - Qualcomm MDM9615 LTE baseband
   - NXP imx6ull, the latest and smallest i.MX6 application processor variant
   - Renesas RZ/G (r8a7743 and r8a7745) application processors
   - Rockchip PX3, a variant of the rk3188 chip used in Android tablets
   - Rockchip rk1108 single-core application processor
   - ST stm32f746 Cortex-M7 based microcontroller
   - TI DRA71x automotive processors

  These are commercially available consumer platforms we now support:

   - Motorola Droid 4 (xt894) mobile phone
   - Rikomagic MK808 Android TV stick based on Rockchips rx3066
   - Cloud Engines PogoPlug v3 based on OX820
   - Various Broadcom based wireless devices:
      - Netgear R8500 router
      - Tenda AC9 router
      - TP-LINK Archer C9 V1
      - Luxul XAP-1510 Access point
   - Turris Omnia open hardware router based on Armada 385

  And a couple of new boards targeted at developers, makers or
  industrial integration:

   - Macnica Sodia development platform for Altera socfpga (Cyclone V)
   - MicroZed board based on Xilinx Zynq FPGA platforms
   - TOPEET itop/elite based on exynos4412
   - WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
   - NextThing CHIP Pro gadget
   - NanoPi M1 development board
   - AM571x-IDK industrial board based on TI AM5718
   - i.MX6SX UDOO Neo
   - Boundary Devices Nitrogen6_SOM2 (i.MX6)
   - Engicam i.CoreM6
   - Grinn i.MX6UL liteSOM/liteBoard
   - Toradex Colibri iMX6 module

  Other changes:

   - added peripherals on renesas, davinci, stm32f429, uniphier, sti,
     mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
     mvebu, allwinner, broadcom, exynos, zynq

   - Continued fixes for W=1 dtc warnings

   - The old STiH415/416 SoC support gets removed, these never made it
     into products and have served their purpose in the kernel as a
     template for teh newer chips from ST

   - The exynos4415 dtsi file is removed as nothing uses it.

   - Intel PXA25x can now be booted using devicetree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
  arm: dts: zynq: Add MicroZed board support
  ARM: dts: da850: enable high speed for mmc
  ARM: dts: da850: Add node for pullup/pulldown pinconf
  ARM: dts: da850: enable memctrl and mstpri nodes per board
  ARM: dts: da850-lcdk: Add ethernet0 alias to DT
  ARM: dts: artpec: add pcie support
  ARM: dts: add support for Turris Omnia
  devicetree: Add vendor prefix for CZ.NIC
  ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
  ARM: dts: berlin2q-marvell-dmp: fix regulators' name
  ARM: dts: Add xo to sdhc clock node on qcom platforms
  ARM: dts: r8a7794: Add device node for PRR
  ARM: dts: r8a7793: Add device node for PRR
  ARM: dts: r8a7792: Add device node for PRR
  ARM: dts: r8a7791: Add device node for PRR
  ARM: dts: r8a7790: Add device node for PRR
  ARM: dts: r8a7779: Add device node for PRR
  ARM: dts: r8a73a4: Add device node for PRR
  ARM: dts: sk-rzg1e: add Ether support
  ARM: dts: sk-rzg1e: initial device tree
  ...
2016-12-15 15:50:24 -08:00
Linus Torvalds ce38207f16 sound updates for 4.10-rc1
No dramatic changes are found in this development cycle, but as usual,
 many commits are applied in a wide range of drivers.
 
 Most of big changes are in ASoC, where a few bits of framework work
 and quite a lot of cleanups and improvements to existing code have
 been done.  The rest are usual stuff, a few HD-audio and USB-audio
 quirks and fixes, as well as the drop of kthread usages in the whole
 subsystem.
 
 Below are some highlights:
 
 ASoC:
 - Support for stereo DAPM controls
 - Some initial work on the of-graph sound card
 - regmap conversions of the remaining AC'97 drivers
 - A new version of the topology ABI; this should be backward compatible
 - Updates / cleanups of rsnd, sunxi, sti, nau8825, samsung, arizona,
   Intel skylake, atom-sst
 - New drivers for Cirrus Logic CS42L42, Qualcomm MSM8916-WCD, and
   Realtek RT5665
 
 USB-audio:
 - Yet another race fix at disconnection
 - Tolerated packet size calculation for some Android devices
 - Quirks for Axe-Fx II, QuickCam, TEAC 501/503
 
 HD-audio:
 - Improvement of Dell pin fixup mapping
 - Quirks for HP Z1 Gen3, Alienware 15 R2 2016 and ALC622 headset mic
 
 Misc:
 - Replace all kthread usages with simple works
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Merge tag 'sound-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "No dramatic changes are found in this development cycle, but as usual,
  many commits are applied in a wide range of drivers.

  Most of big changes are in ASoC, where a few bits of framework work
  and quite a lot of cleanups and improvements to existing code have
  been done. The rest are usual stuff, a few HD-audio and USB-audio
  quirks and fixes, as well as the drop of kthread usages in the whole
  subsystem.

  Below are some highlights:

  ASoC:
   - support for stereo DAPM controls
   - some initial work on the of-graph sound card
   - regmap conversions of the remaining AC'97 drivers
   - a new version of the topology ABI; this should be backward
     compatible
   - updates / cleanups of rsnd, sunxi, sti, nau8825, samsung, arizona,
     Intel skylake, atom-sst
   - new drivers for Cirrus Logic CS42L42, Qualcomm MSM8916-WCD, and
     Realtek RT5665

  USB-audio:
   - yet another race fix at disconnection
   - tolerated packet size calculation for some Android devices
   - quirks for Axe-Fx II, QuickCam, TEAC 501/503

  HD-audio:
   - improvement of Dell pin fixup mapping
   - quirks for HP Z1 Gen3, Alienware 15 R2 2016 and ALC622 headset mic

  Misc:
   - replace all kthread usages with simple works"

* tag 'sound-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (296 commits)
  ALSA: hiface: Fix M2Tech hiFace driver sampling rate change
  ALSA: usb-audio: Eliminate noise at the start of DSD playback.
  ALSA: usb-audio: Add native DSD support for TEAC 501/503 DAC
  ASoC: wm_adsp: wm_adsp_buf_alloc should use kfree in error path
  ASoC: topology: avoid uninitialized kcontrol_type
  ALSA: usb-audio: Add QuickCam Communicate Deluxe/S7500 to volume_control_quirks
  ALSA: usb-audio: add implicit fb quirk for Axe-Fx II
  ASoC: zte: spdif: correct ZX_SPDIF_CLK_RAT define
  ASoC: zte: spdif and i2s drivers are not zx296702 specific
  ASoC: rsnd: setup BRGCKR/BRRA/BRRB when starting
  ASoC: rsnd: enable/disable ADG when suspend/resume timing
  ASoC: rsnd: tidyup ssi->usrcnt counter check in hw_params
  ALSA: cs46xx: add a new line
  ASoC: Intel: update bxt_da7219_max98357a to support quad ch dmic capture
  ASoC: nau8825: disable sinc filter for high THD of ADC
  ALSA: usb-audio: more tolerant packetsize
  ALSA: usb-audio: avoid setting of sample rate multiple times on bus
  ASoC: cs35l34: Simplify the logic to set CS35L34_MCLK_CTL setting
  ALSA: hda - Gate the mic jack on HP Z1 Gen3 AiO
  ALSA: hda: when comparing pin configurations, ignore assoc in addition to seq
  ...
2016-12-14 11:14:28 -08:00
Linus Torvalds b8d2798f32 This is a fairly quiet release. We don't have any patches to the core
framework. The only patch that can even be considered "core" adds another
 clk_get() variant. The rest of the changes are in drivers for various SoCs, and
 we have a few bits for ARM shmobile architecture code (dts and mach) due to the
 dependency we're breaking between shmobile architecture code and its clk
 driver. Those shmobile bits have also been pulled into arm-soc tree. Here's the
 summary:
 
 Core:
 
  - Support for devm_get_clk_from_child() used with DT bindings that have
    subnodes with the 'clocks' property
 
 New Drivers:
 
  - Allwinner A64 (sun50i)
  - i.MX imx6ull
  - Socionext's UniPhier SoC CPUs
  - Mediatek MT2701 SoCs
  - Rockchip rk1108 SoCs
  - Qualcomm MSM8994/MSM8992 SoCS
  - Qualcomm RPM Clocks
  - Hisilicon Hi3516CV300 and Hi3798CV200 CRG
  - Oxford Semiconductor OX820 and OX810SE SoCs
  - Renesas RZ/G1M and RZ/GIE SoCs
  - Renesas R-Car RST driver for mode pin states
 
 Updates:
 
  - Four Allwinner SoCs are migrated to the new style clk driver
  - Rockchip rk3399,rk3066 PLL optimizations
  - i.MX LVDS display glitch fixes and AV PLL precision improvements
  - Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL support
  - Explicit demodularization of always builtin drivers
  - Freescale Qoriq ls1012a and ls1046a support
  - Exynos 5433 parent typo fix and critical clock tagging
  - Renesas r8a7743/r8a7745 CPG
  - Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
  - stm32f4* LSI, LSE, RTC, and QSPI clocks
  - pxa27x and pxa25x cpufreq as clks
  - TI omap36xx sprz319 advisory 2.1 workaround
  - Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This is a fairly quiet release. We don't have any patches to the core
  framework. The only patch that can even be considered "core" adds
  another clk_get() variant. The rest of the changes are in drivers for
  various SoCs, and we have a few bits for ARM shmobile architecture
  code (dts and mach) due to the dependency we're breaking between
  shmobile architecture code and its clk driver. Those shmobile bits
  have also been pulled into arm-soc tree. Here's the summary:

  Core:

   - Support for devm_get_clk_from_child() used with DT bindings that
     have subnodes with the 'clocks' property

  New Drivers:

   - Allwinner A64 (sun50i)
   - i.MX imx6ull
   - Socionext's UniPhier SoC CPUs
   - Mediatek MT2701 SoCs
   - Rockchip rk1108 SoCs
   - Qualcomm MSM8994/MSM8992 SoCS
   - Qualcomm RPM Clocks
   - Hisilicon Hi3516CV300 and Hi3798CV200 CRG
   - Oxford Semiconductor OX820 and OX810SE SoCs
   - Renesas RZ/G1M and RZ/GIE SoCs
   - Renesas R-Car RST driver for mode pin states

  Updates:

   - Four Allwinner SoCs are migrated to the new style clk driver
   - Rockchip rk3399,rk3066 PLL optimizations
   - i.MX LVDS display glitch fixes and AV PLL precision improvements
   - Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL
     support
   - Explicit demodularization of always builtin drivers
   - Freescale Qoriq ls1012a and ls1046a support
   - Exynos 5433 parent typo fix and critical clock tagging
   - Renesas r8a7743/r8a7745 CPG
   - Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
   - stm32f4* LSI, LSE, RTC, and QSPI clocks
   - pxa27x and pxa25x cpufreq as clks
   - TI omap36xx sprz319 advisory 2.1 workaround
   - Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
  clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate()
  clk: add devm_get_clk_from_child() API
  clk: st: clk-flexgen: Unmap region obtained by of_iomap
  clk: keystone: pll: Unmap region obtained by of_iomap
  clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and of_iomap
  clk:mmp:clk-of-pxa910: Free memory and Unmap region obtained by kzmalloc and of_iomap
  clk: mmp: clk-of-pxa1928: Free memory obtained by kzalloc
  clk: cdce925: Fix limit check
  clk: bcm: Make COMMON_CLK_IPROC into a library
  clk: qoriq: added ls1012a clock configuration
  clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message
  clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
  clk: bcm: Support rate change propagation on bcm2835 clocks
  clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
  clk: ti: omap36xx: Work around sprz319 advisory 2.1
  clk: clk-wm831x: fix a logic error
  clk: uniphier: add cpufreq data for LD11, LD20 SoCs
  clk: uniphier: add CPU-gear change (cpufreq) support
  clk: qcom: Put venus core0/1 gdscs to hw control mode
  clk: qcom: gdsc: Add support for gdscs with HW control
  ...
2016-12-13 08:54:27 -08:00
Linus Torvalds 20d5ba4928 Bulk pin control changes for the v4.10 kernel cycle:
No core changes this time. Mainly gradual improvement and
 feature growth in the drivers.
 
 New drivers:
 
 - New driver for TI DA850/OMAP-L138/AM18XX pinconf
 
 - The SX150x was moved over from the GPIO subsystem and
   reimagined as a pin control driver with GPIO support
   in a joint effort by three independent users of this
   hardware. The result was amazingly good!
 
 - New subdriver for the Oxnas OX820
 
 Improvements:
 
 - The sunxi driver now supports the generic pin control
   bindings rather than the sunxi-specific. Add debouncing
   support to the driver.
 
 - Simplifications in pinctrl-single adding a generic parser.
 
 - Two downstream fixes and move the Raspberry Pi BCM2835 over
   to use the generic GPIOLIB_IRQCHIP.
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Merge tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pinctrl updates from Linus Walleij:
 "Bulk pin control changes for the v4.10 kernel cycle:

  No core changes this time. Mainly gradual improvement and
  feature growth in the drivers.

  New drivers:

   - New driver for TI DA850/OMAP-L138/AM18XX pinconf

   - The SX150x was moved over from the GPIO subsystem and reimagined as
     a pin control driver with GPIO support in a joint effort by three
     independent users of this hardware. The result was amazingly good!

   - New subdriver for the Oxnas OX820

  Improvements:

   - The sunxi driver now supports the generic pin control bindings
     rather than the sunxi-specific. Add debouncing support to the
     driver.

   - Simplifications in pinctrl-single adding a generic parser.

   - Two downstream fixes and move the Raspberry Pi BCM2835 over to use
     the generic GPIOLIB_IRQCHIP"

* tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (92 commits)
  pinctrl: sx150x: use new nested IRQ infrastructure
  pinctrl: sx150x: handle missing 'advanced' reg in sx1504 and sx1505
  pinctrl: sx150x: rename 'reg_advance' to 'reg_advanced'
  pinctrl: sx150x: access the correct bits in the 4-bit regs of sx150[147]
  pinctrl: mt8173: set GPIO16 to usb iddig mode
  pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP
  pinctrl: New driver for TI DA850/OMAP-L138/AM18XX pinconf
  devicetree: bindings: pinctrl: Add binding for ti,da850-pupd
  Documentation: pinctrl: palmas: Add ti,palmas-powerhold-override property definition
  pinctrl: intel: set default handler to be handle_bad_irq()
  pinctrl: sx150x: add support for sx1501, sx1504, sx1505 and sx1507
  pinctrl: sx150x: sort chips by part number
  pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508)
  pinctrl: imx: fix imx_pinctrl_desc initialization
  pinctrl: sx150x: support setting multiple pins at once
  pinctrl: sx150x: various spelling fixes and some white-space cleanup
  pinctrl: mediatek: use builtin_platform_driver
  pinctrl: stm32: use builtin_platform_driver
  pinctrl: sunxi: Testing the wrong variable
  pinctrl: nomadik: split up and comments MC0 pins
  ...
2016-12-13 07:59:10 -08:00
Stephen Boyd e3f4358e23 Merge tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner:

A new clock controller for the rk1108 soc (single-core Cortex-A7+DSP),
a fix making sure the cpuclk rate is actually valid, before trying to
set it and a copy-paste fix for the rk3399's testclk.

* tag 'v4.10-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: add clock controller for rk1108
  dt-bindings: add documentation for rk1108 cru
  clk: rockchip: add dt-binding header for rk1108
  clk: rockchip: fix copy-paste error in rk3399 testclk
  clk: rockchip: validity should be checked prior to cpu clock rate change
2016-12-06 15:17:26 -08:00
Arnd Bergmann bb2d850778 A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.
 
 And one new soc, the rk1108 combining a single-core Cortex-A7
 with a separate DSP core.
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Merge tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "Rockchip dts32 changes for 4.10" from Heiko Stübner:

A bit of attention for the rk3066, fixed tsadc reset node
as well as enabling the dma for uart and mmc controllers.

And one new soc, the rk1108 combining a single-core Cortex-A7
with a separate DSP core.

* tag 'v4.10-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add the sdmmc pinctrl for rk1108
  ARM: dts: rockchip: add rockchip RK1108 Evaluation board
  ARM: dts: rockchip: add basic support for RK1108 SOC
  clk: rockchip: add dt-binding header for rk1108
  dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
  ARM: dts: rockchip: enable dma for uart and mmc on rk3066a
  ARM: dts: rockchip: fix TSADC reset node for rk3066a
2016-11-30 23:36:38 +01:00
Arnd Bergmann bb986384d1 This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:
 
 - Rafal adds support for the Netgear R8500 routers, adds basic support
   for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
   A7). He also enables the UART on the Netgear R8000 and restructures the
   include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
   which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
   support for the TP-LINK Archer C9 V1 router.
 
 - Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
   the bcm958625k reference board to have it enabled
 
 - Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
   a BCM47094)
 
 - Scott fixes the pinctrl names in the Cygnus DTS files
 
 - Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
   SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
   the node for the OTP controller found on Cygnus SoCs
 
 - Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
 
 - Eric defines standard pinctrl groups in the BCM2835 GPIO node
 
 - Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
   to use their appropriate pinctrl functions
 
 - Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
 
 - Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
 
 - Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
   Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
   adds names for the Raspberry Zero GPIO lines
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Merge tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux into next/dt

Pull "Broadcom devicetree changes for 4.10" from Florian Fainelli:

This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:

- Rafal adds support for the Netgear R8500 routers, adds basic support
  for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
  A7). He also enables the UART on the Netgear R8000 and restructures the
  include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
  which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
  support for the TP-LINK Archer C9 V1 router.

- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
  the bcm958625k reference board to have it enabled

- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
  a BCM47094)

- Scott fixes the pinctrl names in the Cygnus DTS files

- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
  SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
  the node for the OTP controller found on Cygnus SoCs

- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs

- Eric defines standard pinctrl groups in the BCM2835 GPIO node

- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
  to use their appropriate pinctrl functions

- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet

- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block

- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
  Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
  adds names for the Raspberry Zero GPIO lines

* tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux: (29 commits)
  ARM: bcm2835: Add names for the RPi Zero GPIO lines
  ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines
  ARM: dts: enable GPIO-b for Broadcom NSP
  ARM: BCM5301X: Add DT for TP-LINK Archer C9 V1
  ARM: dts: Add node for Broadcom OTP controller driver
  ARM: dts: Enable interrupt support for cygnus crmu gpio driver
  ARM: dts: Enable Broadcom iProc mailbox controller
  ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
  ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
  dt: bindings: add thermal device driver for bcm2835
  ARM: dts: bcm283x: fix typo in mailbox address
  DT: binding: bcm2835-mbox: fix address typo in example
  ARM: dts: cygnus: fix naming of pinctrl node
  ARM: BCM53573: Specify PMU and its ILP clock in the DT
  ARM: BCM5301X: Add DT for Luxul XWR-3100
  ARM: BCM5301X: Add DT for Luxul XAP-1510
  ARM: BCM5301X: Specify USB 3.0 PHY in DT
  ARM: BCM5301X: Enable UART on Netgear R8000
  ARM: BCM5301X: Add separated DTS include file for BCM47094
  ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes
  ...
2016-11-30 17:53:03 +01:00
Arnd Bergmann 9de194ff11 Second Round of Renesas ARM Based SoC DT Updates for v4.10
Enhancements:
 * Add device nodes for PRR
 * Add r8a7745 SoC and sk-rzg1e board
 * Add r8a7743 SoC and sk-rzg1m board
 * Enable SDR-104 and I2C demuxer on alt, koelsch and lager boards
 
 Corrections:
 * Use SYSC "always-on" PM Domain for sound on r8a7794 SoC
 * Correct hsusb parent clock on r8a7794 SoC
 * Correct PFC names for DU on alt board
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Merge tag 'renesas-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.10" from Simon Horman:

Enhancements:
* Add device nodes for PRR
* Add r8a7745 SoC and sk-rzg1e board
* Add r8a7743 SoC and sk-rzg1m board
* Enable SDR-104 and I2C demuxer on alt, koelsch and lager boards

Corrections:
* Use SYSC "always-on" PM Domain for sound on r8a7794 SoC
* Correct hsusb parent clock on r8a7794 SoC
* Correct PFC names for DU on alt board

* tag 'renesas-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
  ARM: dts: r8a7794: Add device node for PRR
  ARM: dts: r8a7793: Add device node for PRR
  ARM: dts: r8a7792: Add device node for PRR
  ARM: dts: r8a7791: Add device node for PRR
  ARM: dts: r8a7790: Add device node for PRR
  ARM: dts: r8a7779: Add device node for PRR
  ARM: dts: r8a73a4: Add device node for PRR
  ARM: dts: sk-rzg1e: add Ether support
  ARM: dts: sk-rzg1e: initial device tree
  ARM: dts: r8a7745: add IRQC support
  ARM: dts: r8a7745: add Ether support
  ARM: dts: r8a7745: add [H]SCIF{|A|B} support
  ARM: dts: r8a7745: add SYS-DMAC support
  ARM: dts: r8a7745: initial SoC device tree
  ARM: dts: sk-rzg1m: add Ether support
  ARM: dts: sk-rzg1m: initial device tree
  ARM: dts: r8a7743: add IRQC support
  ARM: dts: r8a7743: add Ether support
  ARM: dts: r8a7743: add [H]SCIF{A|B} support
  ARM: dts: r8a7743: add SYS-DMAC support
  ...
2016-11-30 16:44:12 +01:00
Arnd Bergmann 0b4160976f Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions
Shared by clock drivers, and DTS files.
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Merge tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into next/dt

Pull "Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions" from Geert Uytterhoeven:

Shared by clock drivers, and DTS files.

* tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: Add r8a7745 CPG Core Clock Definitions
  clk: renesas: Add r8a7743 CPG Core Clock Definitions
2016-11-30 16:43:10 +01:00
Arnd Bergmann d319fc6dc1 Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10
* Add support for the r8a7745 SoC to rcar-sysc
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Merge tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Pull "Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10" from Simon Horman:

* Add support for the r8a7745 SoC to rcar-sysc

* tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-sysc: add R8A7745 support
  ARM: shmobile: r8a7745: add power domain index macros

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-11-30 16:39:48 +01:00
jbrunet 1fc31357ad dt-bindings: net: add EEE capability constants
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Yegor Yefremov <yegorslists@googlemail.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2016-11-29 19:38:31 -05:00
Simon Horman 028289536c Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions
Shared by clock drivers, and DTS files.
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Merge tag 'rzg-clock-defs-tag1'; commit '538321bd9718'; commit '97ca8402997c' into dt-for-v4.10

Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions

Shared by clock drivers, and DTS files.
2016-11-23 20:51:44 +01:00
Sergei Shtylyov 97ca840299 ARM: shmobile: r8a7745: add power domain index macros
Add macros usable by the device tree sources to reference R8A7745 SYSC power
domains by index.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23 14:06:21 +01:00
Olof Johansson e40719dd01 firmware: Add Tegra IVC and BPMP support
IVC is an inter-processor communication protocol that uses shared memory
 to exchange data between processors. The BPMP driver makes use of this
 to communicate with the Boot and Power Management Processor (BPMP) and
 uses an additional hardware synchronization primitive from the HSP block
 to signal availability of new data (doorbell).
 
 Firmware running on the BPMP implements a number of services such as the
 control of clocks and resets within the system, or the ability to ungate
 or gate power partitions.
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Merge tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

firmware: Add Tegra IVC and BPMP support

IVC is an inter-processor communication protocol that uses shared memory
to exchange data between processors. The BPMP driver makes use of this
to communicate with the Boot and Power Management Processor (BPMP) and
uses an additional hardware synchronization primitive from the HSP block
to signal availability of new data (doorbell).

Firmware running on the BPMP implements a number of services such as the
control of clocks and resets within the system, or the ability to ungate
or gate power partitions.

* tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
  dt-bindings: Add power domains to Tegra BPMP firmware
  firmware: tegra: Add BPMP support
  firmware: tegra: Add IVC library
  dt-bindings: firmware: Add bindings for Tegra BPMP

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-18 18:28:14 -08:00
Olof Johansson dd3eedd338 mailbox: Add Tegra HSP driver
This contains the device tree bindings and a driver for the Tegra HSP, a
 hardware block that provides hardware synchronization primitives and is
 the foundation for inter-processor communication between CPU and BPMP.
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Merge tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

mailbox: Add Tegra HSP driver

This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.

* tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
  mailbox: Add Tegra HSP driver
  dt-bindings: mailbox: Add Tegra HSP binding
  soc/tegra: Add Tegra186 support

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-18 18:23:06 -08:00
Olof Johansson a90a6f9c3d Device tree changes for omaps for v4.10 merge window:
- A series of patches to configure tps65217 PMIC interrupts for
   power button, charger and usb and use them on am335x
 
 - Configure EEPROM, LEDs and USR1 button for omap5 boards
 
 - Add tscadc DMA properites for am33xx and am4372
 
 - Configure baltos-ir5221 both musb channels to host mode
 
 - Configure internal and external RTC clocks for am335x boards
 
 - Don't reset gpio3 block on baltos
 
 - Remove pinmux for dra72-evm for erratum i869, fix the regulators
   and seprate out tps65917 support
 
 - Add dra718-evm support
 
 - Add minimal droid 4 xt894 support
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Merge tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Device tree changes for omaps for v4.10 merge window:

- A series of patches to configure tps65217 PMIC interrupts for
  power button, charger and usb and use them on am335x

- Configure EEPROM, LEDs and USR1 button for omap5 boards

- Add tscadc DMA properites for am33xx and am4372

- Configure baltos-ir5221 both musb channels to host mode

- Configure internal and external RTC clocks for am335x boards

- Don't reset gpio3 block on baltos

- Remove pinmux for dra72-evm for erratum i869, fix the regulators
  and seprate out tps65917 support

- Add dra718-evm support

- Add minimal droid 4 xt894 support

* tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
  ARM: dts: Add minimal support for motorola droid 4 xt894
  ARM: dts: Add support for dra718-evm
  ARM: dts: dra72: Add separate dtsi for tps65917
  ARM: dts: dra72-evm: Fix modelling of regulators
  ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
  ARM: dts: am335x-baltos: don't reset gpio3 block
  ARM: dts: AM335X-evmsk: Add the internal and external clock nodes for rtc
  ARM: dts: AM335X-evm: Add the internal and external clock nodes for rtc
  ARM: dts: AM335X-bone-common: Add the internal and external clock nodes for rtc
  ARM: dts: am335x-baltos-ir5221: use both musb channels in host mode
  ARM: dts: am4372: add DMA properties for tscadc
  ARM: dts: am33xx: add DMA properties for tscadc
  ARM: dts: omap5 uevm: add USR1 button
  ARM: dts: omap5 uevm: add LEDs
  ARM: dts: omap5 uevm: add EEPROM
  ARM: dts: am335x: Add the power button interrupt
  ARM: dts: am335x: Add the charger interrupt
  dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
  ARM: dts: am335x: Support the PMIC interrupt
  ARM: dts: tps65217: Add the power button device
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-18 16:43:19 -08:00
Olof Johansson 78d375b97e Reset controller changes for v4.10
- remove obsolete STiH41[56] platform support
 - add Oxford Semiconductor OX820 support
 - add reset index include files for OX810SE and OX820
 - make drivers with boolean Kconfig options explicitly
   non-modular
 - allow shared pulsed resets via reset_control_reset, which
   in this case means that the reset must have been triggered
   once, but possibly earlier, after the function returns, and
   is never triggered again for the lifetime of the reset
   control
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Merge tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux into next/drivers

Reset controller changes for v4.10

- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
  non-modular
- allow shared pulsed resets via reset_control_reset, which
  in this case means that the reset must have been triggered
  once, but possibly earlier, after the function returns, and
  is never triggered again for the lifetime of the reset
  control

* tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux:
  reset: allow using reset_control_reset with shared reset
  reset: lpc18xx: make it explicitly non-modular
  reset: zynq: make it explicitly non-modular
  reset: sunxi: make it explicitly non-modular
  reset: socfpga: make it explicitly non-modular
  reset: berlin: make it explicitly non-modular
  dt-bindings: reset: oxnas: Update for OX820
  dt-bindings: reset: oxnas: Add include file with reset indexes
  reset: oxnas: Add OX820 support
  reset: sti: softreset: Remove obsolete platforms from dt binding doc.
  reset: sti: Remove STiH415/6 reset support

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-18 16:17:45 -08:00
Stephen Warren ad7cb19824 dt-bindings: Add power domains to Tegra BPMP firmware
The Tegra186 BPMP is also a provider of power domains. Enhance the
device tree binding to describe this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-18 14:33:43 +01:00
Joseph Lo d55865608f dt-bindings: firmware: Add bindings for Tegra BPMP
The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
process as well as to offload power management tasks (such as clocks,
resets, powergates, ...).

The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-18 14:33:41 +01:00
Olof Johansson d2e7d59028 - Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
 - Add nodes needed by clock controller for mt2701
 - Use clocks from the clock controller for the uart of mt2701
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Merge tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt

- Add bindings for mtk-scpsys for mt2701
- Add clocks for auxadc on mt8173-evb
- Add nodes needed by clock controller for mt2701
- Use clocks from the clock controller for the uart of mt2701

* tag 'v4.9-next-dts' of https://github.com/mbgg/linux-mediatek:
  arm: dts: mt2701: Use real clock for UARTs
  arm: dts: mt2701: Add clock controller device nodes
  arm64: dts: mt8173: Fix auxadc node
  soc: mediatek: Add MT2701 power dt-bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:45:25 -08:00
Olof Johansson 5589d62484 Qualcomm ARM Based Driver Updates for v4.10
* Fixup QCOM SCM to use devm_reset_controller_register
 * Add QCOM pinctrl to Qualcomm MAINTAINERS entry
 * Add PM8994 regulator definitions
 * Add stub for WCNSS_CTRL API
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Merge tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Qualcomm ARM Based Driver Updates for v4.10

* Fixup QCOM SCM to use devm_reset_controller_register
* Add QCOM pinctrl to Qualcomm MAINTAINERS entry
* Add PM8994 regulator definitions
* Add stub for WCNSS_CTRL API

* tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  firmware: qcom: scm: Use devm_reset_controller_register()
  MAINTAINERS: add drivers/pinctrl/qcom to ARM/QUALCOMM SUPPORT
  pinctrl: pm8994: add pad voltage regulator defines
  soc: qcom: wcnss_ctrl: Stub wcnss_ctrl API

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:38:27 -08:00
Olof Johansson e99b4c970b 32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
 optimizations allowing for better performance on rk3066, the usage of
 pin constants to bridge between the two numbering schemes used (gpio
 controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
 and UHS/HS modes for the mmc controllers on the popmetal board.
 
 Two new boards, the PX3-based evaluation board, with the PX3 being an
 industrial variant of the rk3188 soc and the Rikomagic MK808 board
 based around the rk3066 are also added.
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Merge tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

32bit devicetree changes for Rockchip including removal of skeleton.dtsi
inclusion, missing unit names for memory nodes, various frequency
optimizations allowing for better performance on rk3066, the usage of
pin constants to bridge between the two numbering schemes used (gpio
controllers using 0-31 and pins being labeled A0-A7,..., D0-D7)
and UHS/HS modes for the mmc controllers on the popmetal board.

Two new boards, the PX3-based evaluation board, with the PX3 being an
industrial variant of the rk3188 soc and the Rikomagic MK808 board
based around the rk3066 are also added.

* tag 'v4.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (21 commits)
  ARM: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
  ARM: dts: rockchip: Set sdmmc frequency at boot time for rk3066a
  ARM: dts: rockchip: use pin constants to describe gpios on Popmetal-RK3288
  include: dt-bindings: Add GPIO pin index definition for rockchip pinctrl
  ARM: dts: rockchip: Add rk3066 MK808 board
  devicetree: Add vendor prefix for Rikomagic
  ARM: dts: rockchip: initialize rk3066 PLL clock rate
  clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
  ARM: dts: rockchip: enable HS200/DDR52 mode for emmc on rk3288-popmetal
  ARM: dts: rockchip: Support UHS mode for SD card on PopMetal-RK3288 board
  ARM: dts: rockchip: remove always-on and boot-on from vcc_sd for px3-evb
  ARM: dts: rockchip: update compatible strings for Rockchip efuse
  ARM: dts: rockchip: add rockchip PX3 Evaluation board
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3xxx boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3288 boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk322x boards
  ARM: dts: rockchip: Add missing unit name to memory nodes in rk3036 boards
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3xxx.dtsi
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk3288.dtsi
  ARM: dts: rockchip: Remove skeleton.dtsi inclusion in rk322x.dtsi
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:31:55 -08:00
Olof Johansson a4a1fb15c5 STi dts update:
Change sound card name for B2120
 Enable sound card for B2260
 Remove stih415-clks.h
 Identify critical clocks for STiH407
 Fix typo in stih407-pinctrl.dtsi
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Merge tag 'sti-dt-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/dt

STi dts update:

Change sound card name for B2120
Enable sound card for B2260
Remove stih415-clks.h
Identify critical clocks for STiH407
Fix typo in stih407-pinctrl.dtsi

* tag 'sti-dt-for-4.10-round2' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: dts: STiHxxx-b2120: change sound card name
  ARM: dts: STiH410-B2260: enable sound card
  ARM: dts: remove stih415-clks.h
  ARM: dts: stih407-clocks: Identify critical clocks
  ARM: dts: STiH407: DT fix s/interrupts-names/interrupt-names/

Signed-off-by: Olof Johansson <olof@lixom.net>
2016-11-17 23:28:45 -08:00
Stephen Boyd 54fd1b3bc4 clk: renesas: Updates for v4.10 (take two)
- Add R-Car RST driver for obtaining mode pin state, and move the
     related functionality from platform code to DT,
   - Add r8a7743 and r8a7745 CPG Core Clock Definitions.
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Merge tag 'clk-renesas-for-v4.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next

Pull Renesas clk driver updates from Geerty Uytterhoeven:

  - Add R-Car RST driver for obtaining mode pin state, and move the
    related functionality from platform code to DT,
  - Add r8a7743 and r8a7745 CPG Core Clock Definitions.

The commits here are intermingled with arm-soc material because
of the hard dependency we're breaking between mach code and
driver code. We're replacing that with a driver dependency
between the soc driver and the clk driver.

* tag 'clk-renesas-for-v4.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (25 commits)
  clk: renesas: Add r8a7745 CPG Core Clock Definitions
  clk: renesas: Add r8a7743 CPG Core Clock Definitions
  clk: renesas: rcar-gen2: Remove obsolete rcar_gen2_clocks_init()
  clk: renesas: r8a7779: Remove obsolete r8a7779_clocks_init()
  clk: renesas: r8a7778: Remove obsolete r8a7778_clocks_init()
  ARM: shmobile: rcar-gen2: Stop passing mode pins state to clock driver
  ARM: shmobile: r8a7779: Stop passing mode pins state to clock driver
  ARM: shmobile: r8a7778: Stop passing mode pins state to clock driver
  clk: renesas: rcar-gen3-cpg: Remove obsolete rcar_gen3_read_mode_pins()
  clk: renesas: r8a7796: Obtain mode pin values from R-Car RST driver
  clk: renesas: r8a7795: Obtain mode pin values from R-Car RST driver
  clk: renesas: rcar-gen2: Obtain mode pin values using RST driver
  clk: renesas: r8a7779: Obtain mode pin values from R-Car RST driver
  clk: renesas: r8a7778: Obtain mode pin values using R-Car RST driver
  arm64: renesas: r8a7796 dtsi: Add device node for RST module
  arm64: renesas: r8a7795 dtsi: Add device node for RST module
  ARM: dts: r8a7794: Add device node for RST module
  ARM: dts: r8a7793: Add device node for RST module
  ARM: dts: r8a7792: Add device node for RST module
  ARM: dts: r8a7791: Add device node for RST module
  ...
2016-11-17 13:31:07 -08:00
Stephen Boyd 38320181c7 Allwinner clock changes for 4.10
The usual patches from us, but most notably the introduction of the A64
 clocks unit.
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Merge tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next

Pull Allwinner clock changes from Maxime Ripard:

The usual patches from us, but most notably the introduction of the A64
clocks unit.

* tag 'sunxi-clk-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
  clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks
  clk: sunxi-ng: Add A64 clocks
  clk: sunxi-ng: Implement minimum for multipliers
  clk: sunxi-ng: Add minimums for all the relevant structures and clocks
  clk: sunxi-ng: Finish to convert to structures for arguments
  clk: sunxi-ng: Remove the use of rational computations
  clk: sunxi-ng: Rename the internal structures
  clk: sunxi: mod0: improve function-level documentation
2016-11-16 11:19:20 -08:00
Stephen Boyd c284a7ba72 i.MX clock updates for 4.10:
- A patch series to fix the long standing issue with glitchy parent
    mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
    is sourced from ldb_di_clk.
  - A patch to add imx6ull clock support on top of imx6ul clock driver.
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Merge tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next

Pull i.MX clock updates from Shawn Guo:

 - A patch series to fix the long standing issue with glitchy parent
   mux of ldb_di_clk, which can hang up LVDS display when ipu_di_clk
   is sourced from ldb_di_clk.
 - A patch to add imx6ull clock support on top of imx6ul clock driver.

* tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  clk: imx: clk-imx6ul: add clk support for imx6ull
  clk: imx6: Fix procedure to switch the parent of LDB_DI_CLK
  clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-only
  clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podf
2016-11-16 11:16:07 -08:00
Heiko Stuebner a6a1685346 Merge branch 'v4.10-shared/clkids' into v4.10-armsoc/dts32 2016-11-16 12:47:38 +01:00
Shawn Lin 5fababc161 clk: rockchip: add dt-binding header for rk1108
Add the dt-bindings header for the rk1108, that gets shared
between the clock controller and the clock references in the dts.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-11-16 12:18:58 +01:00
Joseph Lo e983940270 dt-bindings: mailbox: Add Tegra HSP binding
Add DT binding for the Hardware Synchronization Primitives (HSP). The
HSP is designed for the processors to share resources and communicate
with one another. A set of hardware synchronization primitives for
interprocessor communication (IPC) is provided. IPC protocols can use
use these hardware synchronization primitives when operating between
processors in an AMP configuration.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-15 15:52:58 +01:00
Stephen Boyd 09d5dc586b PLL initialization for PLLs having both an integral and fractional mode
(rk3036, rk3399) does now take into account the mode that the PLL is
 actually running at.
 As always also some additional and optimized PLL rates for rk3066 and
 rk3399, some additional clock ids for rk3066 and some additional clocks
 on rk3399 are now sucessfully handled inside their respective driver.
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Merge tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next

Pull Rockchip clk driver updates from Heiko Stuebner:

PLL initialization for PLLs having both an integral and fractional mode
(rk3036, rk3399) does now take into account the mode that the PLL is
actually running at.

As always also some additional and optimized PLL rates for rk3066 and
rk3399, some additional clock ids for rk3066 and some additional clocks
on rk3399 are now sucessfully handled inside their respective driver.

* tag 'v4.10-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: Ignore frac divisor for PLL equivalence when it's unused
  clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree
  clk: rockchip: add 400MHz to rk3066 clock rates table
  clk: rockchip: optimize 800MHz and 1GHz pll rates on RK3399
  clk: rockchip: Use clock ids for cpu and peri clocks on rk3066
  clk: rockchip: Add binding ids for cpu and peri clocks on rk3066
  clk: rockchip: add 533.25MHz to rk3399 clock rates table
2016-11-14 18:38:35 -08:00
Bai Ping 73cd5e53ca clk: imx: clk-imx6ul: add clk support for imx6ull
imx6ull is the derived SoC from imx6ul

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2016-11-15 08:55:36 +08:00
Stephen Boyd c60df0a42b Merge branch 'clk-hisi' into clk-next
* clk-hisi:
  clk: hisilicon: add CRG driver for Hi3516CV300 SoC
  clk: hisilicon: add CRG driver for Hi3798CV200 SoC
2016-11-14 14:25:11 -08:00
Pan Wen c80dfd9bf5 clk: hisilicon: add CRG driver for Hi3516CV300 SoC
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Pan Wen <wenpan@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-14 12:04:39 -08:00
Jiancheng Xue 707d33cb0b clk: hisilicon: add CRG driver for Hi3798CV200 SoC
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.

Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-11 15:43:49 -08:00
Stephen Boyd 81ab3279c5 Merge branch 'clk-qcom-rpm' into clk-next
* clk-qcom-rpm:
  clk: qcom: Add support for RPM Clocks
  clk: qcom: Add support for SMD-RPM Clocks
  clk: qcom: Always add factor clock for xo clocks
2016-11-10 16:50:16 -08:00
Georgi Djakov 872f91b5ea clk: qcom: Add support for RPM Clocks
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 16:46:56 -08:00
Georgi Djakov 00f64b5887 clk: qcom: Add support for SMD-RPM Clocks
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.

The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems via shared memory
and accepts clock requests, aggregates the requests and turns
the clocks on/off or scales them on demand.

This driver is based on the codeaurora.org driver:
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
[sboyd@codeaurora.org: Remove useless braces for single line if]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 16:37:55 -08:00
Stephen Boyd b0e031c94a Merge branch 'clk-qcom-8994' into clk-next
* clk-qcom-8994:
  clk: qcom: Add support for msm8994 global clock controller
  dt-bindings: qcom: clocks: Add msm8994 clock bindings
2016-11-10 15:47:56 -08:00
Jeremy McNicoll 49e2828243 dt-bindings: qcom: clocks: Add msm8994 clock bindings
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Dropped unused and incorrect GDSC defines]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-10 14:27:29 -08:00
Patrice Chotard 226226994c ARM: dts: remove stih415-clks.h
Since v4.8, STiH415/416 clock support has
been removed [1], these platform doesn't boot.
We can remove DTS files related to these socs.

[1] https://patchwork.kernel.org/patch/9157571/

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2016-11-10 09:52:47 +01:00
Milo Kim 98af595804 dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
TPS65217 supports three interrupt sources. This patch enables assigning
each IRQ number in the charger and power button node. Then corresponding
IRQ will be requested by each driver.

Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-11-09 14:31:43 -07:00
James Schulman 2c394ca796 ASoC: Add support for CS42L42 codec
Add support for Cirrus Logic CS42L42 codec. SoundWire support
is not enabled. Features support for I2C control and I2S audio.

Signed-off-by: James Schulman <james.schulman@cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-09 13:50:14 +00:00
Sergei Shtylyov 1fa8a875df clk: renesas: Add r8a7745 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7745
CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of
the RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:13:30 +01:00
Sergei Shtylyov 4e195933de clk: renesas: Add r8a7743 CPG Core Clock Definitions
Add macros usable by the device tree sources to reference the R8A7743 CPG
clocks by index. The data comes from Table 7.2b in revision 1.00 of the
RZ/G Series User's Manual.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-07 15:09:12 +01:00
Neil Armstrong 0f15f500ff pinctrl: meson: Add GXL pinctrl definitions
Add support for the Amlogic Meson GXL SoC, this is a partially complete
definition only based on the Amlogic Vendor tree.

This definition differs a lot from the GXBB and needs a separate entry.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-04 23:05:06 +01:00
Sergei Shtylyov 68cc085a4d ARM: dts: r8a7794: remove Z clock
R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock...

Fixes: 0dce5454d5 ("ARM: shmobile: Initial r8a7794 SoC device tree")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:47 +01:00
Chris Brandt 7c8522b704 ARM: dts: r7s72100: add sdhi clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-04 10:36:17 +01:00
Maxime Ripard c6a0637460 clk: sunxi-ng: Add A64 clocks
Add the A64 CCU clocks set.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-03 09:06:18 +01:00