Commit Graph

23 Commits

Author SHA1 Message Date
Linus Torvalds f3ea496213 ARM: SoC driver updates
Some of the larger changes this merge window:
  - Removal of drivers for Exynos5440, a Samsung SoC that never saw
    widespread use.
  - Uniphier support for USB3 and SPI reset handling
  - Syste control and SRAM drivers and bindings for Allwinner platforms
  - Qualcomm AOSS (Always-on subsystem) reset controller drivers
  - Raspberry Pi hwmon driver for voltage
  - Mediatek pwrap (pmic) support for MT6797 SoC
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "Some of the larger changes this merge window:

   - Removal of drivers for Exynos5440, a Samsung SoC that never saw
     widespread use.

   - Uniphier support for USB3 and SPI reset handling

   - Syste control and SRAM drivers and bindings for Allwinner platforms

   - Qualcomm AOSS (Always-on subsystem) reset controller drivers

   - Raspberry Pi hwmon driver for voltage

   - Mediatek pwrap (pmic) support for MT6797 SoC"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (52 commits)
  drivers/firmware: psci_checker: stash and use topology_core_cpumask for hotplug tests
  soc: fsl: cleanup Kconfig menu
  soc: fsl: dpio: Convert DPIO documentation to .rst
  staging: fsl-mc: Remove remaining files
  staging: fsl-mc: Move DPIO from staging to drivers/soc/fsl
  staging: fsl-dpaa2: eth: move generic FD defines to DPIO
  soc: fsl: qe: gpio: Add qe_gpio_set_multiple
  usb: host: exynos: Remove support for Exynos5440
  clk: samsung: Remove support for Exynos5440
  soc: sunxi: Add the A13, A23 and H3 system control compatibles
  reset: uniphier: add reset control support for SPI
  cpufreq: exynos: Remove support for Exynos5440
  ata: ahci-platform: Remove support for Exynos5440
  soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata
  soc: mediatek: pwrap: add mt6351 driver for mt6797 SoCs
  soc: mediatek: pwrap: add pwrap driver for mt6797 SoCs
  soc: mediatek: pwrap: fix cipher init setting error
  dt-bindings: pwrap: mediatek: add pwrap support for MT6797
  reset: uniphier: add USB3 core reset control
  dt-bindings: reset: uniphier: add USB3 core reset support
  ...
2018-08-23 13:52:46 -07:00
Rafael J. Wysocki 17bc3432e3 Merge branches 'pm-core', 'pm-domains', 'pm-sleep', 'acpi-pm' and 'pm-cpuidle'
Merge changes in the PM core, system-wide PM infrastructure, generic
power domains (genpd) framework, ACPI PM infrastructure and cpuidle
for 4.19.

* pm-core:
  driver core: Add flag to autoremove device link on supplier unbind
  driver core: Rename flag AUTOREMOVE to AUTOREMOVE_CONSUMER

* pm-domains:
  PM / Domains: Introduce dev_pm_domain_attach_by_name()
  PM / Domains: Introduce option to attach a device by name to genpd
  PM / Domains: dt: Add a power-domain-names property

* pm-sleep:
  PM / reboot: Eliminate race between reboot and suspend
  PM / hibernate: Mark expected switch fall-through
  x86/power/hibernate_64: Remove VLA usage
  PM / hibernate: cast PAGE_SIZE to int when comparing with error code

* acpi-pm:
  ACPI / PM: save NVS memory for ASUS 1025C laptop
  ACPI / PM: Default to s2idle in all machines supporting LP S0

* pm-cpuidle:
  ARM: cpuidle: silence error on driver registration failure
2018-08-14 09:48:10 +02:00
Anson Huang de2d9b5284 soc: imx: gpc: restrict register range for regmap access
GPC registers are NOT continuous, some registers are
reserved and accessing them from userspace will trigger
external abort, add regmap register access table to
avoid below abort:

root@imx6slevk:~# cat /sys/kernel/debug/regmap/20dc000.gpc/registers
[  108.480477] Unhandled fault: imprecise external abort (0x1406) at 0xb6db5004
[  108.487985] pgd = 42b54bfd
[  108.490741] [b6db5004] *pgd=ba1b7831
[  108.494386] Internal error: : 1406 [#1] SMP ARM
[  108.498943] Modules linked in:
[  108.502043] CPU: 0 PID: 389 Comm: cat Not tainted 4.18.0-rc1-00074-gc9f1f60-dirty #482
[  108.509982] Hardware name: Freescale i.MX6 SoloLite (Device Tree)
[  108.516123] PC is at regmap_mmio_read32le+0x20/0x24
[  108.521031] LR is at regmap_mmio_read+0x40/0x60
[  108.525586] pc : [<c059cf74>]    lr : [<c059d1ac>]    psr: 20060093
[  108.531875] sp : eccf1d98  ip : eccf1da8  fp : eccf1da4
[  108.537122] r10: ec2d3800  r9 : eccf1f60  r8 : ecfc0000
[  108.542370] r7 : eccf1e2c  r6 : eccf1e2c  r5 : 00000028  r4 : ec338e00
[  108.548920] r3 : 00000000  r2 : eccf1e2c  r1 : f0980028  r0 : 00000000
[  108.555474] Flags: nzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment none
[  108.562720] Control: 10c5387d  Table: acf4004a  DAC: 00000051
[  108.568491] Process cat (pid: 389, stack limit = 0xd4318a65)
[  108.574174] Stack: (0xeccf1d98 to 0xeccf2000)

Fixes: 721cabf6c6 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-19 10:24:00 +08:00
Leonard Crestez 69c04aee34 soc: imx6qp: Use GENPD_FLAG_ALWAYS_ON for PU errata
This is functionally identical but simpler and slightly faster.

The PU domain is turned on at boot time and never turned off. In the
current implementation the pm core will repeatedly call power_off when
the domain is unused and get -EBUSY back. If the domain is marked as
"always on" instead the pm core won't even attempt to turn it off.

In theory on 6qp it is safe to turn PU off in suspend, however that is
best accomplished with a new core flag.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-17 14:12:14 +08:00
Leonard Crestez 5507ec5126 soc: imx: gpc: Disable 6sl display power gating for ERR006287
The imx6sl chip errata document describes ERR006287 like this:

> Upon resuming from power gating, the modules in the display power domain
(eLCDIF, EPDC, PXP and SPDC) might fail to perform register reads
correctly.

> When the modules listed above are used, do not use power gating on the
display power domain.

Link: https://www.nxp.com/docs/en/errata/IMX6SLCE.pdf#page=62

Handle this in the safest possible way by keeping the DISP domain
always-on.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-07-11 21:18:24 +08:00
Vivek Gautam e88728f46c driver core: Rename flag AUTOREMOVE to AUTOREMOVE_CONSUMER
Now that we want to add another flag to autoremove the device link
on supplier unbind, it's fair to rename the existing flag from
DL_FLAG_AUTOREMOVE to DL_FLAG_AUTOREMOVE_CONSUMER so that we can
add similar flag for supplier later.
And, while we are touching device.h, fix a doc build warning.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-07-09 12:14:31 +02:00
Andrey Smirnov f54e714cfc soc: imx: gpc: Do not pass static memory as platform data
Platform device core assumes the ownership of dev.platform_data as
well as that it is dynamically allocated and it will try to kfree it
as a part of platform_device_release(). Change the code to use
platform_device_add_data() instead of a pointer to a static memory to
avoid causing a BUG() when calling platform_device_put().

The problem can be reproduced by artificially enabling the error path
of platform_device_add() call (around line 452).

Cc: Stefan Agner <stefan@agner.ch>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-04-23 17:03:15 +08:00
Arnd Bergmann 3bea9c5885 i.MX drivers update for 4.17:
- Set GENPD_FLAG_ALWAYS_ON flag for ARM power domain to avoid incorrect
    power state in sysfs pm_genpd_summary output.
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Merge tag 'imx-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

Pull "i.MX drivers update for 4.17" from Shawn Guo:

 - Set GENPD_FLAG_ALWAYS_ON flag for ARM power domain to avoid incorrect
   power state in sysfs pm_genpd_summary output.

* tag 'imx-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpc: ARM power domain should be always-on
2018-03-15 16:23:33 +01:00
Linus Torvalds 97ace515f0 ARM: SoC fixes for 4.16
This is the first set of bugfixes for ARM SoCs, fixing a couple
 of stability problems, mostly on TI OMAP and Rockchips platforms:
 
 - OMAP2 hwmod clocks must be enabled in the correct order
 
 - OMAP3 Wakeup from resume through PRM IRQ was unreliable
 
 - One regression on OMAP5 caused by a kexec fix
 
 - Rockchip ethernet needs some settings for stable operation on Rock64
 
 - Rockchip based Chrombook Plus needs another clock setting for
   stable display suspend/resume
 
 - Rockchip based phyCORE-RK3288 was able to run at an invalid
   CPU clock frequency
 
 - Rockchip MMC link was sometimes unreliable
 
 - Multiple fixes to avoid crashes in the Broadcom STB DPFE driver
 
 Other minor changes include:
 
 - Devicetree fixes for incorrect hardware description (rockchip,
   omap, Gemini, amlogic)
 
 - Some MAINTAINER file updates to correct email and git addresses
 
 - Some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
   cavium, qualcomm, hisilicon, zx)
 
 - Fixes for LTO-compilation (orion, davinci, clps711x)
 
 - One fix for an incorrect Kconfig errata selection
 
 - A memory leak in the OMAP timer driver
 
 - A kernel data leak in OMAP1 debugfs files
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "This is the first set of bugfixes for ARM SoCs, fixing a couple of
  stability problems, mostly on TI OMAP and Rockchips platforms:

   - OMAP2 hwmod clocks must be enabled in the correct order

   - OMAP3 Wakeup from resume through PRM IRQ was unreliable

   - one regression on OMAP5 caused by a kexec fix

   - Rockchip ethernet needs some settings for stable operation on
     Rock64

   - Rockchip based Chrombook Plus needs another clock setting for
     stable display suspend/resume

   - Rockchip based phyCORE-RK3288 was able to run at an invalid CPU
     clock frequency

   - Rockchip MMC link was sometimes unreliable

   - multiple fixes to avoid crashes in the Broadcom STB DPFE driver

  Other minor changes include:

   - Devicetree fixes for incorrect hardware description (rockchip,
     omap, Gemini, amlogic)

   - some MAINTAINER file updates to correct email and git addresses

   - some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
     cavium, qualcomm, hisilicon, zx)

   - fixes for LTO-compilation (orion, davinci, clps711x)

   - one fix for an incorrect Kconfig errata selection

   - a memory leak in the OMAP timer driver

   - a kernel data leak in OMAP1 debugfs files"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  MAINTAINERS: update entries for ARM/STM32
  ARM: dts: bcm283x: Move arm-pmu out of soc node
  ARM: dts: bcm283x: Fix unit address of local_intc
  ARM: dts: NSP: Fix amount of RAM on BCM958625HR
  ARM: dts: Set D-Link DNS-313 SATA to muxmode 0
  ARM: omap2: set CONFIG_LIRC=y in defconfig
  ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6 DualLite/Solo RQS
  memory: brcmstb: dpfe: support new way of passing data from the DCPU
  memory: brcmstb: dpfe: fix type declaration of variable "ret"
  memory: brcmstb: dpfe: properly mask vendor error bits
  ARM: BCM: dts: Remove leading 0x and 0s from bindings notation
  ARM: orion: fix orion_ge00_switch_board_info initialization
  ARM: davinci: mark spi_board_info arrays as const
  ARM: clps711x: mark clps711x_compat as const
  arm: zx: dts: Remove leading 0x and 0s from bindings notation
  arm64: dts: Remove leading 0x and 0s from bindings notation
  arm64: dts: cavium: fix PCI bus dtc warnings
  MAINTAINERS: ARM: at91: update my email address
  soc: imx: gpc: de-register power domains only if initialized
  ARM: dts: rockchip: Fix DWMMC clocks
  ...
2018-02-28 16:11:04 -08:00
Ingo Molnar ed7158bae4 treewide/trivial: Remove ';;$' typo noise
On lkml suggestions were made to split up such trivial typo fixes into per subsystem
patches:

  --- a/arch/x86/boot/compressed/eboot.c
  +++ b/arch/x86/boot/compressed/eboot.c
  @@ -439,7 +439,7 @@ setup_uga32(void **uga_handle, unsigned long size, u32 *width, u32 *height)
          struct efi_uga_draw_protocol *uga = NULL, *first_uga;
          efi_guid_t uga_proto = EFI_UGA_PROTOCOL_GUID;
          unsigned long nr_ugas;
  -       u32 *handles = (u32 *)uga_handle;;
  +       u32 *handles = (u32 *)uga_handle;
          efi_status_t status = EFI_INVALID_PARAMETER;
          int i;

This patch is the result of the following script:

  $ sed -i 's/;;$/;/g' $(git grep -E ';;$'  | grep "\.[ch]:"  | grep -vwE 'for|ia64' | cut -d: -f1 | sort | uniq)

... followed by manual review to make sure it's all good.

Splitting this up is just crazy talk, let's get over with this and just do it.

Reported-by: Pavel Machek <pavel@ucw.cz>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-02-22 10:59:33 +01:00
Stefan Agner 7801c545e7 soc: imx: gpc: de-register power domains only if initialized
If power domain information are missing in the device tree, no
power domains get initialized. However, imx_gpc_remove tries to
remove power domains always in the old DT binding case. Only
remove power domains when imx_gpc_probe initialized them in
first place.

Fixes: 721cabf6c6 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-22 11:22:12 +08:00
Anson Huang f40a1e3705 soc: imx: gpc: ARM power domain should be always-on
ARM power domain does NOT support runtime off, always-on
flag should be set to avoid incorrect power state in
pm_genpd_summary:

Before:

root@imx6qpdlsolox:~# cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain                          status          slaves
    /device                                             runtime status
----------------------------------------------------------------------
ARM                             off-0

After:

root@imx6qpdlsolox:~# cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain                          status          slaves
    /device                                             runtime status
----------------------------------------------------------------------
ARM                             on

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-12 13:07:48 +08:00
Fabio Estevam cfabb7921c soc: imx: gpc: Add i.MX6SX PCI power domain
i.MX6SX has a PCI power domain in PGC. Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-26 16:26:46 +08:00
Lucas Stach 44c43c9821 soc: imx: gpc: add workaround for i.MX6QP to the GPC PD driver
On i.MX6QP, due to hardware erratum ERR009619, the PRE clocks may be
stalled during the power up sequencing of the PU power domain. As this
may lead to a complete loss of display output, the recommended
workaround is to keep the PU domain enabled during normal system
operation.

Implement this by rejecting the domain power down request on the
affected SoC.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-07 20:47:34 +08:00
Lucas Stach 7c42af783a soc: imx: gpc: add defines for domain index
Makes referencing a specfic domain in the driver code
less error prone.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-04-07 20:47:24 +08:00
Dong Aisheng bd01f064af soc: imx: gpc: remove unnecessary readable_reg callback
It is not really necessary to provide the current .readable_reg
implementation as we know what we're doing in our driver
and the regmap core has already done the partial check for
available maximum regs.

Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-24 13:43:21 +08:00
Dong Aisheng fbb0b4402a soc: imx: gpc: keep PGC_X_CTRL name align with reference manual
Instead of GPC_PGC_PDN_OFFS, naming it as GPC_PGC_CTRL_OFFS which is
defined in reference manual for better reading.

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-24 13:43:10 +08:00
Dong Aisheng 6e6e339cc1 soc: imx: gpc: fix comment when power up domain
The correct comment should be power up domain.

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-24 13:43:04 +08:00
Dong Aisheng 5a42d11989 soc: imx: gpc: fix imx6sl gpc power domain regression
Commit 721cabf6c6 ("soc: imx: move PGC handling to a new GPC driver")
broke the MX6SL GPC power domain support.
It always got the following error:
[    1.248364] imx-gpc 20dc000.gpc: could not find pgc DT node
This patch adds back the legecy support.

Fixes: 721cabf6c6 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-24 13:42:07 +08:00
Dong Aisheng 15c3de4e18 soc: imx: gpc: fix domain_index sanity check issue
ARRAY_SIZE(imx_gpc_domains) represents all power domains supported
by different SoCs. Driver should use SoC specific of_id_data->num_domains
instead to do power domain index sanity check.
e.g. MX6Q supports two power domains while MX6SL supports three.

Fixes: 721cabf6c6 ("soc: imx: move PGC handling to a new GPC driver")
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-24 13:42:01 +08:00
Dong Aisheng 3a317f5235 soc: imx: gpc: fix the wrong using of regmap cache
Without providing the proper reg_defaults, the regmap registers first
read out may be always 0 if enabling cache, which results in the
following issue we met.
e.g. During driver probe in imx6_pm_domain_power_on():
regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PUPSCR_OFFS, &val);
The PGC_PUPSCR register val is always 0 but it's actually 0xf01 in HW.

Since GPC registers are tightly related to CPU bring up and may be
changed in bootloader, we don't want to provide defaults.
And the cache really does not save too much for GPC module.

Therefore, simply disable cache to fix the issue and make life easy.

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Fixes: 721cabf6c6 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-24 13:41:51 +08:00
Dong Aisheng 55b0baa254 soc: imx: gpc: fix gpc clk get error handling
We got a following kernel crash once supplying one more IPG
clock in GPC node in devicetree. The original error handling of
clocks get is a bit wrong that when reaching the maximum clock
get error, the index 'i' is already GPC_CLK_MAX which can't be used
as the array index for clk_put operations.

[    3.000110] imx-gpc 20dc000.gpc: more than 6 clocks
[    3.005141] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    3.013487] pgd = c0004000
[    3.016300] [00000000] *pgd=00000000
[    3.020060] Internal error: Oops: 805 [#1] SMP ARM
[    3.024957] Modules linked in:
[    3.028122] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G        W       4.11.0-rc1-00056-g813791b-dirty #1140
[    3.037801] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[    3.044435] task: ef298000 task.stack: ef294000
[    3.049080] PC is at __clk_put+0x38/0xec
[    3.053103] LR is at 0x7f54ce9a
[    3.056345] pc : [<c0537984>]    lr : [<7f54ce9a>]    psr: 60000013
[    3.056345] sp : ef295d48  ip : c8a582b2  fp : ef295d64
[    3.068026] r10: ee9fc400  r9 : 00000000  r8 : ef398c10
[    3.073354] r7 : ef398c10  r6 : c1071264  r5 : c10710f0  r4 : eea5be80
[    3.079986] r3 : 00000000  r2 : 00000000  r1 : 00000100  r0 : 00000001
[    3.086621] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[    3.093863] Control: 10c5387d  Table: 1000404a  DAC: 00000051
[    3.099712] Process swapper/0 (pid: 1, stack limit = 0xef294210)
[    3.105823] Stack: (0xef295d48 to 0xef296000)
...
[    3.292660] Backtrace:
[    3.295222] [<c053794c>] (__clk_put) from [<c0531028>] (clk_put+0x18/0x1c)
[    3.302206]  r6:c1071264 r5:c10710f0 r4:c107124c r3:00000001
[    3.307977] [<c0531010>] (clk_put) from [<c0546ba0>] (imx_pgc_get_clocks+0x64/0x78)
[    3.315747] [<c0546b3c>] (imx_pgc_get_clocks) from [<c0547124>] (imx_gpc_probe+0x204/0x31c)
[    3.324209]  r7:00000000 r6:c1070eb0 r5:00000001 r4:ef398c00
[    3.329980] [<c0546f20>] (imx_gpc_probe) from [<c05e65f0>] (platform_drv_probe+0x5c/0xc0)
[    3.338270]  r10:c0f00608 r9:00000000 r8:00000000 r7:fffffdfb r6:c1070f20 r5:ef398c10
[    3.346207]  r4:ef398c10
[    3.348849] [<c05e6594>] (platform_drv_probe) from [<c05e4250>] (driver_probe_device+0x214/0x2ec)
[    3.357835]  r7:c1070f20 r6:00000000 r5:c18cea74 r4:ef398c10
[    3.363607] [<c05e403c>] (driver_probe_device) from [<c05e43ec>] (__driver_attach+0xc4/0xc8)
[    3.372159]  r9:c0f8b858 r8:c0f8b850 r7:00000000 r6:ef398c44 r5:c1070f20 r4:ef398c10
[    3.380017] [<c05e4328>] (__driver_attach) from [<c05e21fc>] (bus_for_each_dev+0x7c/0xb0)
[    3.388304]  r6:c05e4328 r5:c1070f20 r4:00000000 r3:00000000
[    3.394074] [<c05e2180>] (bus_for_each_dev) from [<c05e3bc4>] (driver_attach+0x28/0x30)
[    3.402188]  r6:c107f3e8 r5:eea5be00 r4:c1070f20
[    3.406913] [<c05e3b9c>] (driver_attach) from [<c05e3740>] (bus_add_driver+0x19c/0x224)
[    3.415034] [<c05e35a4>] (bus_add_driver) from [<c05e52fc>] (driver_register+0x88/0x108)
[    3.423235]  r7:c10e1000 r6:00000000 r5:c0f57d2c r4:c1070f20
[    3.429004] [<c05e5274>] (driver_register) from [<c05e6534>] (__platform_driver_register+0x40/0x54)
[    3.438160]  r5:c0f57d2c r4:00000006
[    3.441846] [<c05e64f4>] (__platform_driver_register) from [<c0f57d44>] (imx_gpc_driver_init+0x18/0x20)
[    3.451360] [<c0f57d2c>] (imx_gpc_driver_init) from [<c010200c>] (do_one_initcall+0x4c/0x180)
[    3.460008] [<c0101fc0>] (do_one_initcall) from [<c0f00e40>] (kernel_init_freeable+0x130/0x1f8)
[    3.468820]  r9:c0f8b858 r8:c0f8b850 r6:c0fc2414 r5:c10e1000 r4:00000006
[    3.475637] [<c0f00d10>] (kernel_init_freeable) from [<c0ae6aec>] (kernel_init+0x18/0x124)
[    3.484014]  r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c0ae6ad4
[    3.491951]  r4:00000000
[    3.494590] [<c0ae6ad4>] (kernel_init) from [<c01088d0>] (ret_from_fork+0x14/0x24)
[    3.502267]  r4:00000000 r3:ef294000
[    3.505947] Code: e5943014 e5942018 e3530000 e3a01c01 (e5823000)
[    3.512215] ---[ end trace 375f9f2a5ddeff3c ]---
[    3.517036] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

Cc: Lucas Stach <l.stach@pengutronix.de>
Fixes: 721cabf6c6 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-24 13:41:30 +08:00
Lucas Stach 721cabf6c6 soc: imx: move PGC handling to a new GPC driver
This is an almost complete re-write of the previous GPC power gating control
code found in the IMX architecture code. It supports both the old and the new
DT binding, allowing more domains to be added later and generally makes the
driver easier to extend, while keeping compatibility with existing DTBs.

As the result, all functionality regarding the power gating controller
gets removed from the IMX architecture GPC driver.  It keeps only the
IRQ controller code in the architecture, as this is closely coupled to
the CPU idle implementation.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-03-08 11:55:47 +01:00