Commit Graph

9 Commits

Author SHA1 Message Date
Yong Zhi f65cf7d666 ASoC: Intel: Skylake: Add api to retrieve dmic array info from nhlt
Skylake can be configured with either both 2 and 4 channel DMIC
array, or 2 channel DMIC array only, this patch provides an API to
retrieve the DMIC info from nhlt.

Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-30 18:16:44 +01:00
Jeeja KP c286b3f960 ASoC: Intel: Skylake: Fix memory leak in nhlt init
During skl_nhlt_init(), acpi obj pointer is allocated and never
freed and remap address is not unmapped.

To fix this we should release the ACPI obj and also unmap the
nhlt address during cleanup of driver.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-05 16:46:54 +01:00
Vinod Koul 4b235c43de ASoC: Intel: Skylake: Generate topology name for NHLT table header
NHLT table [1] header has fields like oem_id, oem_table_id and
oem_revision. Use that to load a unique topology binary specific
to that platform

NHLT Table is documented at:
[1]: https://01.org/blogs/2016/intel-smart-sound-technology-audio-dsp

Signed-off-by: Yang A Fang <yang.a.fang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-02-20 00:34:47 +09:00
Jeeja KP 16882d24b3 ASoC: Intel: Skylake: Ignore rate check for DMIC link
DMIC NHLT entry is sample rate agnostic, so ignore the rate
checks for DMIC type

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16 10:08:09 +00:00
Jeeja KP 83b50246d3 ASoC: Intel: Skylake: Fix bit depth when querying the NHLT blob
Bps calculation is not correct as this needs to be based on valid
bit depth.  16 bit fmt bit depth is 16 bit and for 24 and 32 bit
as it is container size This patch fixes the bps.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16 10:08:09 +00:00
Dan Williams ba40a854ea ASoC: Intel: switch from ioremap_cache to memremap
In preparation for deprecating ioremap_cache() convert its usage in
skl-nhlt to memremap.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-22 14:23:27 +01:00
Jeeja KP aba3dd5ace ASoC: Intel: Skylake: Use acpi header for NHLT header
Instead of defining own acpi header, use the available acpi
header defined in acpi framework.

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07 14:26:01 +01:00
Jeeja KP 9f2dd0270d ASoC: Intel: Skylake: Fix the NHLT rate size
Sampling rate type needs to be u32 instead of u8, nhlt wav format
description expected u32 for rate, passing u8 will fetch NULL
config in skl_get_ep_blob().

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-07 14:26:01 +01:00
Jeeja KP 473eb87adc ASoC: Intel: Skylake: Add NHLT support to get BE config
The Non-HD Audio Endpoint Description table contains the link
configuration information for the DSP. This is specific to Non HDA
links only, like I2s and PDM

Skylake driver will use NHLT table to retrieve the configuration based
on the link type, format, channel and rate. This configuration is
passed to DSP FW

Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-07-23 17:39:00 +01:00