Commit Graph

19 Commits

Author SHA1 Message Date
Olof Johansson b9d5868e34 Cleanups for Allwinner sunXi architecture:
- Remove sunxi.dtsi
   - Switch to clocksource/irqchip device tree handlers
   - Cleanup the watchdog code
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRZDauAAoJEBx+YmzsjxAgu8IP/3V/W2NsFOwQTz7+nVxw19zu
 cGyCqqTTXed0ku0lmA4mP9x234eSwCplkzyFhnNU2hOdNaObZql8Mibkp3FBIcVn
 eSq6lbCNpu0VPTjmTqaHYueYFrxmM3DeVQgiZ6m3bDdloTinfndjPKyFK1b8k6ti
 OluYF25TaW8OFBJDUhXMxRiEbCLls38Z83aFpL/6k3krf/Royn75ey8uq066jyRL
 d26tL2Rh0vJWojR+RUFdu6+y3CzLdOl5vUwJ/29SaarBDDxWKMIbUY4ezwmxXq2N
 eCqGsxwtM6VuhYps5b//T+FdKTZbB/3U2ybH4xCU2RYDXZPigeVFT7unE0npYRry
 LIern3PAKv3jOJ6kwKyEYCX1++6Yt6kyoWNKLk2FYik92KB9Pdw9yCCcpm5F/C9N
 DetA4GPY/4009bNkKJrlA4Iks+TzrYp+z/qg0OxvDLYaLbknecjYutNL7on9wKrV
 f5eUlVoRvecHHuf/S+V+DMId4CQrH1RP+jsDKDD6Z8hLpFQ6bnFv2QgSaVwC0f+8
 dRMbN9GAReibMAR3BiYodQZnb5x9yF9sBYnRY+ZVgkS7VvsRFi6C9F7cZYQnIia1
 j1x8AlFxEvNsSv1bKg5bFaWT3EpO1X2zmT30wPYuGO2XL/UVsz23Einw6jSHiJDi
 M77vFMzmH30YQ2GLNbKn
 =227f
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-cleanup-for-3.10' of git://github.com/mripard/linux into next/cleanup

From Maxime Ripard:
Cleanups for Allwinner sunXi architecture:
  - Remove sunxi.dtsi
  - Switch to clocksource/irqchip device tree handlers
  - Cleanup the watchdog code

* tag 'sunxi-cleanup-for-3.10' of git://github.com/mripard/linux:
  ARM: sunxi: Rework the restart code
  irqchip: sunxi: Rename sunxi to sun4i
  irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
  clocksource: sunxi: Rename sunxi to sun4i
  clocksource: sunxi: make use of CLKSRC_OF
  clocksource: sunxi: Cleanup the timer code
  clocksource: make CLOCKSOURCE_OF_DECLARE type safe

Signed-off-by: Olof Johansson <olof@lixom.net>

Add/change conflict in drivers/clocksource/Makefile resolved.
2013-04-11 03:39:00 -07:00
Arnd Bergmann 92202876a3 The mxs cleanup for 3.10:
* Clean up timer code and move it into drivers/clocksource
 * Clean up icoll code and move it into drivers/irqchip
 * Clean up clock code to not include <mach/*> headers
 * Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*>
   headers
 * Clean up mach-mxs code to get it prepared for multiplatform support
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJRYnwxAAoJEFBXWFqHsHzOs34H/iSLBv6I+f6oPubu52kJz6fP
 ctZPm6ZJPUKIiyVLLcmMf9kMr3h0wWH3XOBDzPdSj0Wtyb+rbpb/qa0jOg2EwZOs
 2g+7LpehX2BgqKzdBPQEBC94NuU81F0X7SDZe0YechEWZY1VBGjaDnPso+Ugs23A
 7hpjRHAOjd8gnJvkqU/uLKkbJiRX/pvXDcxkRhu15HsA9v6m18Elpq4FNw1QccLd
 06o2M8aVvSL4IYy4Eh8lheUZrPNuyapG3TTjzhbYlPZtvXijFEFWniAQWyq5eGdg
 3aiVbv3lCWYyJzFhmv9n6WYGqHthpnxej9ZMsREa1OVjmViDzSTda6vlhJvBOHQ=
 =neCB
 -----END PGP SIGNATURE-----

Merge tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/cleanup

From Shawn Guo <shawn.guo@linaro.org>:

The mxs cleanup for 3.10:

* Clean up timer code and move it into drivers/clocksource
* Clean up icoll code and move it into drivers/irqchip
* Clean up clock code to not include <mach/*> headers
* Clean up rtc-stmp3xxx, mxs-lradc and mxs-saif to not include <mach/*>
  headers
* Clean up mach-mxs code to get it prepared for multiplatform support

* tag 'mxs-cleanup-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (26 commits)
  clocksource: mxs_timer: Add semicolon at end of line
  ARM: mxs: remove unused headers
  ARM: mxs: merge imx23 and imx28 into one machine_desc
  ARM: mxs: remove common.h
  ARM: mxs: move mxs_get_ocotp() into mach-mxs.c
  ARM: mxs: remove mm.c
  ARM: mxs: use debug_ll_io_init for low-level debug
  ARM: mxs: get ocotp base address from device tree
  ARM: mxs: remove system.c
  ARM: mxs: get reset address from device tree
  ARM: mxs: remove empty hardware.h
  ASoC: mxs-saif: remove mach header inclusion
  iio: mxs-lradc: remove unneeded mach header inclusion
  rtc: stmp3xxx: use stmp_reset_block() instead
  clk: mxs: remove the use of mach level IO accessor
  clk: mxs: get base address from device tree
  ARM: mxs: remove unneeded mach-types.h inclusion
  ARM: mxs: move icoll driver into drivers/irqchip
  ARM: mxs: call stmp_reset_block() in icoll
  ARM: mxs: get icoll base address from device tree
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 15:29:52 +02:00
Maxime Ripard f1dc6c4f77 irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
This allows to remove some boilerplate code. At the same time, call the
set_handle_irq function in the initialization function of the irqchip,
so that we can remove it from the machine declaration.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-04-08 21:42:27 +02:00
Shawn Guo 6a8e95b071 ARM: mxs: move icoll driver into drivers/irqchip
Move icoll.c into drivers/irqchip as irq-mxs.c, and along with the
renaming, change the driver to use IRQCHIP_DECLARE.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-01 16:30:04 +08:00
Catalin Marinas c0114709ed irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Tested-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Barry Song <baohua.song@csr.com>
2013-03-26 16:12:02 +00:00
Catalin Marinas de88cbb7b2 arm: Move chained_irq_(enter|exit) to a generic file
These functions have been introduced by commit 10a8c383 (irq: introduce
entry and exit functions for chained handlers) in asm/mach/irq.h. This
patch moves them to linux/irqchip/chained_irq.h so that generic irqchip
drivers do not rely on architecture specific header files.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
2013-03-26 16:11:43 +00:00
Linus Torvalds 8fd5e7a2d9 ImgTec Meta architecture changes for v3.9-rc1
This adds core architecture support for Imagination's Meta processor
 cores, followed by some later miscellaneous arch/metag cleanups and
 fixes which I kept separate to ease review:
 
  - Support for basic Meta 1 (ATP) and Meta 2 (HTP) core architecture
  - A few fixes all over, particularly for symbol prefixes
  - A few privilege protection fixes
  - Several cleanups (setup.c includes, split out a lot of metag_ksyms.c)
  - Fix some missing exports
  - Convert hugetlb to use vm_unmapped_area()
  - Copy device tree to non-init memory
  - Provide dma_get_sgtable()
 
 Signed-off-by: James Hogan <james.hogan@imgtec.com>
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.13 (GNU/Linux)
 
 iQIcBAABAgAGBQJRMmVXAAoJEKHZs+irPybfivgP/inEXqJyfw59omQdjwvYcU/a
 /u0MJ3UKSNS3U+HknfaFCy/Nwk1dqPLjqqyVC1V6AbUPBXlaEwGcimlNRx2uRjdq
 Uh96upMLHsNuF/xiiR477g3RwY0egIJdM1R1bGi3mZ3vVrNQGF+wbni6f61xCWGz
 M/4rDglpQvE79oLhYdgj6tidZtHQT0YWtERA9W90zkQWXGYmpFPKBKbfZAi5+rKQ
 U6Gpg26orUugzXNaxltJEYKE8gjLTppEabx8DARnItZ4zCMy4dw5RBJ35RFvQw6e
 eSmfgTy9w9WqBMY2+QMSgU0KQt1IITCzX7OlOXC0jALQJXoU0WWbOELlBVQLCwF1
 T0OcR/5ZP/hIlOk5Dh+e9U3AtbASXdMtqA0ZUe78woH1CBf7Nc/0c0vRg23EdMh8
 lnHDJxT/UqskoOYLI4kgWbEdLDy4uTh19U2pVi7VCo7ksLB9Bj9Xc8VSKgscSXTl
 OwzN+c4Jgtu8FDFTp+Af4AT8pYGJ08j8L2ErsV2sOv3Q44U5WXdrMz3GSgwXj8+4
 wZk3HvdkQVkMD5sJCUZgAswaN6BnbB0pHdCz4wMQ8jR/Ogs015Ipk64Ecym9S/4n
 uES7PnDtt/4lb5EyX2ScbvdnZTAFTaaP7OOhC77BOQvbQjIW1tkAcxWJqRry86uS
 iM0BFgK6Ohx3geqa5Ft0
 =65cR
 -----END PGP SIGNATURE-----

Merge tag 'metag-v3.9-rc1-v4' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag

Pull new ImgTec Meta architecture from James Hogan:
 "This adds core architecture support for Imagination's Meta processor
  cores, followed by some later miscellaneous arch/metag cleanups and
  fixes which I kept separate to ease review:

   - Support for basic Meta 1 (ATP) and Meta 2 (HTP) core architecture
   - A few fixes all over, particularly for symbol prefixes
   - A few privilege protection fixes
   - Several cleanups (setup.c includes, split out a lot of
     metag_ksyms.c)
   - Fix some missing exports
   - Convert hugetlb to use vm_unmapped_area()
   - Copy device tree to non-init memory
   - Provide dma_get_sgtable()"

* tag 'metag-v3.9-rc1-v4' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag: (61 commits)
  metag: Provide dma_get_sgtable()
  metag: prom.h: remove declaration of metag_dt_memblock_reserve()
  metag: copy devicetree to non-init memory
  metag: cleanup metag_ksyms.c includes
  metag: move mm/init.c exports out of metag_ksyms.c
  metag: move usercopy.c exports out of metag_ksyms.c
  metag: move setup.c exports out of metag_ksyms.c
  metag: move kick.c exports out of metag_ksyms.c
  metag: move traps.c exports out of metag_ksyms.c
  metag: move irq enable out of irqflags.h on SMP
  genksyms: fix metag symbol prefix on crc symbols
  metag: hugetlb: convert to vm_unmapped_area()
  metag: export clear_page and copy_page
  metag: export metag_code_cache_flush_all
  metag: protect more non-MMU memory regions
  metag: make TXPRIVEXT bits explicit
  metag: kernel/setup.c: sort includes
  perf: Enable building perf tools for Meta
  metag: add boot time LNKGET/LNKSET check
  metag: add __init to metag_cache_probe()
  ...
2013-03-03 12:06:09 -08:00
James Hogan 5698c50d9d metag: Internal and external irqchips
Meta core internal interrupts (from HWSTATMETA and friends) are vectored
onto the TR1 core trigger for the current thread. This is demultiplexed
in irq-metag.c to individual Linux IRQs for each internal interrupt.

External SoC interrupts (from HWSTATEXT and friends) are vectored onto
the TR2 core trigger for the current thread. This is demultiplexed in
irq-metag-ext.c to individual Linux IRQs for each external SoC interrupt.
The external irqchip has devicetree bindings for configuring the number
of irq banks and the type of masking available.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Dom Cobley <popcornmix@gmail.com>
Cc: Simon Arlott <simon@fire.lp0.eu>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-doc@vger.kernel.org
2013-03-02 20:09:48 +00:00
Marc Zyngier a96ab03917 ARM: gic: add __ASSEMBLY__ guard to C definitions
The GIC include file being used by some of the KVM assembly code,
wrap the C definitions with a #ifdef __ASSEMBLY__ guard.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:58:34 +00:00
Marc Zyngier fdf77a72ec ARM: gic: define GICH offsets for VGIC support
The GICH_* constants are defined by the GIC HW spec, and even though
they only be used by KVM to begin with, define them generically in gic.h.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:58:23 +00:00
Christoffer Dall 7c7945a8f9 ARM: gic: add missing distributor defintions
Add missing register map offsets for the distributor and rename
GIC_DIST_ACTIVE_BIT to GIC_DIST_ACTIVE_SET to be consistent.

Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-02-11 18:57:47 +00:00
Rob Herring 9e47b8bf98 irqchip: Move ARM vic.h to include/linux/irqchip/arm-vic.h
Now that we have VIC moved to drivers/irqchip and all VIC DT init for
platforms using irqchip_init, move gic.h and update the remaining
includes.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Alessandro Rubini <rubini@unipv.it>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: STEricsson <STEricsson_nomadik_linux@list.st.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: linux-samsung-soc@vger.kernel.org
2013-01-12 10:52:16 -06:00
Rob Herring 520f7bd733 irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h
Now that we have GIC moved to drivers/irqchip and all GIC DT init for
platforms using irqchip_init, move gic.h and update the remaining
includes.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Anton Vorontsov <avorontsov@mvista.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>
2013-01-12 10:47:32 -06:00
Linus Torvalds 0beb58783f ARM: arm-soc: Device-tree updates, take 2
This branch contains device-tree updates for the SPEAr platform.
 They had dependencies on earlier branches from this merge window,
 which is why they were broken out in a separate branch.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQy5h1AAoJEIwa5zzehBx3TukP/ijMApMtSf5NuGfjeHz0eh18
 JdWVa+89Bgrf1ggVWrnrdfMjHVjsQlu/pwGQF9BY3QmmVlyQIjcxEUMmZ2tw69rw
 wMu17S40Hv746XHB7zkg8HDMzYL7btwxUeo8hX4NUQZSaL82VVB/RndZyIkWQ11q
 FqUG1CS4tunw75sedbJI0NukV9rHF29XYTfAKOqpuBbHC+fNAZDSZIoHNQSJmdQi
 lUc8uw0WD9cZBJN+yt4qKUv6B07Tkc8yPCKiDj+onwEddWahHsLEO+q2e15Llb6x
 qThG2tgtC4WqqrGyxjZHgIwy/uis6v0jerN9CbUTOUeJP3XosC9xg4novWvH6vrK
 K3iQnC5Pl7FGIxIjJoLbttbkVTz9SqLuFa31cAdjTPODC2D7trPKqFoJMQA2DjU3
 XqTJc/Q6Xbgee1qGWjdulDTFBK6zsqbdSC/uB/Ro6FRsOToypdB4AVQo4gl9I5g3
 dUC6ZghgOlbff0pFazSsfMDQOmzyBq4694Xnosq7C/KkLL1HyRe8qqEg/gBfPcQZ
 NKXzoIrGIR1pTs9VN00ScBMWtbJWd9OkVMc3aGUQZA+gIUE2ExNfzls0n+1pAhAb
 god1Aq0s1ZWqGSeguENRGMN/lUYYN8TCeOlTIY3eKPxw9ybwSxOdCyH2iLlXOYHj
 l1J6msYWvhULWpLQST7r
 =iK4W
 -----END PGP SIGNATURE-----

Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device-tree updates, take 2, from Olof Johansson:
 "This branch contains device-tree updates for the SPEAr platform.  They
  had dependencies on earlier branches from this merge window, which is
  why they were broken out in a separate branch."

* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
  ARM: SPEAr320: DT: Add SPEAr 320 HMI board support
  ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
  ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT
  ARM: SPEAr1310: Fix AUXDATA for compact flash controller
  ARM: SPEAr13xx: Remove fields not required for ssp controller
  ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
  ARM: SPEAr: DT: Update device nodes
  ARM: SPEAr: DT: add uart state to fix warning
  ARM: SPEAr: DT: Modify DT bindings for STMMAC
  ARM: SPEAr: DT: Fix existing DT support
  ARM: SPEAr: DT: Update partition info for MTD devices
  ARM: SPEAr: DT: Update pinctrl list
  ARM: SPEAr13xx: DT: Add spics gpio controller nodes
2012-12-14 14:42:53 -08:00
Viresh Kumar df1590d9ae ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
This patch moves shirq interrupt controllers driver and header file out of
plat-spear directory. It is moved to drivers/irqchip/ directory.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2012-11-26 16:55:33 +05:30
Olof Johansson 5ffd785402 Allwinner SoC support for 3.8
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iEYEABECAAYFAlCmwSAACgkQGxsu9jQV9nbssgCcChzwuFlPkP4sVdTtAGGh5mWD
 rNcAn3PfG1ByMR57GkDtdQiAjS5N2dME
 =Pi49
 -----END PGP SIGNATURE-----

Merge tag 'tags/sunxi-support-for-3.8' of git://github.com/mripard/linux into next/soc

From Maxime Ripard:
Allwinner SoC support for 3.8

* tag 'tags/sunxi-support-for-3.8' of git://github.com/mripard/linux:
  ARM: sunxi: Add entry to MAINTAINERS
  ARM: sunxi: Add device tree for the A13 and the Olinuxino board
  ARM: sunxi: Add earlyprintk support
  ARM: sunxi: Add basic support for Allwinner A1x SoCs
  irqchip: sunxi: Add irq controller driver
  clocksource: sunxi: Add Allwinner A1X Timer Driver
  clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-20 22:14:59 -08:00
Maxime Ripard afd24e1468 irqchip: sunxi: Add irq controller driver
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
CC: Thomas Gleixner <tglx@linutronix.de>
2012-11-16 21:56:51 +01:00
Linus Walleij 2389d50143 ARM: plat-versatile: move FPGA irq driver to drivers/irqchip
This moves the Versatile FPGA interrupt controller driver, used in
the Integrator/AP, Integrator/CP and some Versatile boards, out
of arch/arm/plat-versatile and down to drivers/irqchip where we
have consensus that such drivers belong. The header file is
consequently moved to <linux/platform_data/irq-versatile-fpga.h>.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-11-04 18:09:12 +01:00
Simon Arlott 89214f009c ARM: bcm2835: add interrupt controller driver
The BCM2835 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/irchip/.
* Added devicetree documentation, and hence removed list of IRQs from
  bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
  the size of the hwirq space, and pass the total size of the hwirq space
  to irq_domain_add_linear(), rather than just the number of valid hwirqs;
  the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
  rather than nesting it inside a /axi node. Hence, changed the reg value
  since /axi had a ranges property. This seems simpler to me, but I'm not
  sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
  removing the need to patch include/linux/irqdomain.h or
  kernel/irq/irqdomain.c.
* Simplified armctrl_of_init() using of_iomap().
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
  controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19 19:08:37 -06:00