Commit Graph

4 Commits

Author SHA1 Message Date
Sergei Shtylyov 51982d8f47 ARM: dts: sk-rzg1m: add Ether pins
Add the (previously omitted) Ether/PHY pin data to the SK-RZG1M board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:32 +02:00
Sergei Shtylyov 403812e4c4 ARM: dts: sk-rzg1m: add SCIF0 pins
Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-07-27 16:28:32 +02:00
Sergei Shtylyov d05ab65b1d ARM: dts: sk-rzg1m: add Ether support
Define the SK-RZG1M board dependent part of the Ether device node.
Enable DHCP and NFS root  for the kernel booting.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23 20:52:28 +01:00
Sergei Shtylyov 22e69c4bfc ARM: dts: sk-rzg1m: initial device tree
Add the initial device  tree for the R8A7743 SoC based SK-RZG1M board.
The board has one debug serial port (SCIF0); include support for it, so
that  the serial  console  can work.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-11-23 20:52:28 +01:00