Commit Graph

55 Commits

Author SHA1 Message Date
Max Filippov 644b213ccc xtensa: configure shared DMA pool reservation in kc705 DTS
Add example 64MByte long reservation in the first 512MBytes of physical
memory used as shared DMA pool.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-12-15 10:41:50 -08:00
Max Filippov 205ad548a7 xtensa: rearrange CCOUNT calibration
DT-enabled kernel should have a CPU node connected to a clock. This clock
is the CCOUNT clock. Use old platform_calibrate_ccount call as a fallback
when CPU node cannot be found or has no clock and in non-DT-enabled
configurations.

Drop no longer needed code that updates CPU clock-frequency property in
the DT; drop DT-related code from the platform_calibrate_ccount too.

Move of_clk_init to the top of time_init, so that clocks are initialized
before CCOUNT calibration is attempted.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-09-20 18:52:59 -07:00
Max Filippov 58c3e3ac7a xtensa: xtfpga: use clock provider, don't update DT
Instead of querying hardcoded FPGA frequency register and then updating
clock-frequency property in specificly named DT nodes in machine setup
code register a clock provider that returns fixed-rate clock, configured
by register specified in DT. This way we have less magic/hardcoded names
and use more existing common clock framework code.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
2016-09-20 18:52:51 -07:00
Scott Telford bebbc4bcf3 xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config.
Add module parameter xilinx_uartps.rx_trigger_level=32 to command line
options for CSP to set Rx watermark for xuartps driver lower than the
default value, to avoid UART overruns at 115200 bps.

Signed-off-by: Scott Telford <stelford@cadence.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-09-19 11:51:32 -07:00
Scott Telford 23c2b9321b xtensa: Added Cadence CSP kernel configuration for Xtensa
Added defconfig, device tree and Xtensa variant header files for the
Cadence Configurable System Platform "xt_lnx" processor configuration.

Signed-off-by: Scott Telford <stelford@cadence.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-09-09 18:39:09 -07:00
Max Filippov a9f2fc628e xtensa: cleanup MMU setup and kernel layout macros
Make kernel load address explicit, independent of the selected MMU
configuration and configurable from Kconfig. Do not restrict it to the
first 512MB of the physical address space.

Cleanup kernel memory layout macros:

- rename VECBASE_RESET_VADDR to VECBASE_VADDR, XC_VADDR to VECTOR_VADDR;
- drop VIRTUAL_MEMORY_ADDRESS and LOAD_MEMORY_ADDRESS;
- introduce PHYS_OFFSET and use it in __va and __pa definitions;
- synchronize MMU/noMMU vectors, drop unused NMI vector;
- replace hardcoded vectors offset of 0x3000 with Kconfig symbol.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-07-24 06:33:58 +03:00
Max Filippov 56b9f9d672 xtensa: xtfpga: fix earlycon endianness
Serial port is attached to XTFPGA boards as native endian device, now
that earlycon parameter parser understands mmio32native put it into
earlycon kernel parameter. This makes early console functional on both
little- and big-endian CPUs with identical kernel command lines.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:32 +00:00
Max Filippov bce299ca54 xtensa: xtfpga: fix i2c controller register width and endianness
I2C controller is attached to XTFPGA boards as native endian device, mark
it as such in DTS.
Set register width in DTS to 4, this way it works both for little- and
big-endian CPUs.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:32 +00:00
Max Filippov d99434e176 xtensa: xtfpga: fix ethernet controller endianness
Ethernet controller is attached to XTFPGA boards as native endian device,
mark it as such in DTS and pass correct endianness in platform data.
This makes network functional on big-endian CPUs.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:31 +00:00
Max Filippov abfbd89595 xtensa: xtfpga: fix serial port register width and endianness
Serial port is attached to XTFPGA boards as native endian device, mark
it as such in DTS and pass correct endianness in platform data.
Set register width in DTS to 4, this way it matches the platform data
and works correctly on big-endian CPUs.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-03-11 08:53:31 +00:00
Linus Torvalds 3510ca19a8 Xtensa patchset for 4.4
- fix remaining issues with noMMU cores;
 - fix build for cores w/o cache or zero overhead loop options;
 - fix boot of secondary cores in SMP configuration;
 - add support for DMA to high memory pages;
 - add dma_to_phys and phys_to_dma functions.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWQBeJAAoJEI9vqH3mFV2sOHQP/Rdx8pOmGWrVuRFJWA4D4teM
 q6kQb+slf7UTLCYFIpFfnzf3dOtYpo0rioJcScj9hE+r/UW5ytbzouId/cEDVTrL
 s/SujGVkMa85vCNI7StseRB3MvlhF0dXbXBfIaPEAJ+OSTy8u17jXKrkcE4L17rV
 q/opv4bx8eY2LURITQPvZbYsGcb7+spdAZYfEcacnB0AB7FeCTNdWy6evRNivLvX
 5z4a3yq549UiU/F+2Q7Ofrx+ZZ9etL2D31FYD6naztwU0zfUPFxm3b58P7MZwveZ
 beBMuvlzRE7qccZn9SGUAp5kDgoCpWRz3zFob9vwLFuuBioYocvXnVMUYRbTpqM9
 5KUaxjV8K2pb8nvutYQFtqG6KvrY8Bjb+yepfOOR5B8483RIJh2H/dqSIRHtR0Eb
 NJL1Wog3n8bvxtOrymvg4B1L1PHmIV/v0iz6qaGW8DKA8AAdOG3u/a7NZ2v4q8ct
 DHVewduftUOgqWoponFIiwGLzVFwaDhEUsBCM4M4PVpgqZbBou7yyMenl7aMcZla
 HUMWeFlOQ0qUEvpINN07DzfDKL5gcfAz6OHOmKtoPxC8P5GlM1F8X5IaDAPEkqoj
 AnjNuVjCLTheQHaEUxzt6RMfdNSvV9g0muTRrMnqkQFUXVICoBBMsKWsNkwcv7JN
 oZaNJZhbc1enAniTUGVZ
 =iNoG
 -----END PGP SIGNATURE-----

Merge tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linux

Pull xtensa updates from Chris Zankel:

 - fix remaining issues with noMMU cores
 - fix build for cores w/o cache or zero overhead loop options
 - fix boot of secondary cores in SMP configuration
 - add support for DMA to high memory pages
 - add dma_to_phys and phys_to_dma functions.

* tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linux:
  xtensa: implement dma_to_phys and phys_to_dma
  xtensa: support DMA to high memory
  Revert "xtensa: cache inquiry and unaligned cache handling functions"
  xtensa: drop unused sections and remapped reset handlers
  xtensa: fix secondary core boot in SMP
  xtensa: add FORCE_MAX_ZONEORDER to Kconfig
  xtensa: nommu: provide defconfig for de212 on kc705
  xtensa: nommu: xtfpga: add kc705 DTS
  xtensa: add de212 core variant
  xtensa: nommu: select HAVE_FUTEX_CMPXCHG
  xtensa: nommu: fix default memory start address
  xtensa: nommu: provide correct KIO addresses
  xtensa: nommu: fix USER_RING definition
  xtensa: xtfpga: fix integer overflow in TASK_SIZE
  xtensa: fix build for configs without cache options
  xtensa: fixes for configs without loop option
2015-11-09 16:32:13 -08:00
Max Filippov 0d848afe11 xtensa: drop unused sections and remapped reset handlers
There are no .bootstrap or .ResetVector.text sections linked to the
vmlinux image, drop these sections from vmlinux.ld.S. Drop
RESET_VECTOR_VADDR definition only used for .ResetVector.text.

Drop remapped copies of primary and secondary reset vectors, as modern
gdb don't have problems stepping through instructions at arbitrary
locations. Drop corresponding sections from the corresponding linker
scripts.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-11-03 17:19:39 +03:00
Max Filippov adbd75edee xtensa: nommu: xtfpga: add kc705 DTS
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-11-02 18:03:11 +03:00
Rob Herring 990857042f xtensa: enable building of all dtbs
Enable building all dtb files when CONFIG_OF_ALL_DTBS is enabled. The dtbs
are not really dependent on a platform being enabled or any other kernel
config, so for testing coverage it is convenient to build all of the dtbs.
This builds all dts files in the tree, not just targets listed.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Chris Zankel <chris@zankel.net>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: linux-xtensa@linux-xtensa.org
2015-10-27 16:12:16 -05:00
Max Filippov c2c62e61fb xtensa: xtfpga: add audio card to xtfpga DTS
This includes OpenCores I2C host controller, TI CDCE706 clock generator,
xtfpga I2S master controller, xtfpga SPI master controller, TI TLV320AIC23
audio codec and a simple audio card.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2015-02-07 11:21:39 +03:00
Max Filippov a4f9846da7 xtensa: nommu: fix uImage load address
Use the same offset from the default physical memory start address as in
LOAD_MEMORY_ADDRESS definition.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-10-21 13:28:54 +04:00
Max Filippov ccd0ef38be xtensa: nommu: fix Image.elf reset code and ld script
Don't hardcode kernel entry address as 0x3000 or 0xd0003000, use
LOAD_MEMORY_ADDRESS macro. Don't compile MMU remapping code and don't try
to link it when building noMMU configuration.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-10-21 13:28:52 +04:00
Max Filippov 3ce2ce1c0d xtensa: xtfpga: add lx200 SMP DTS and defconfig
This config allows running SMP-enabled bitstream on LX200 board.
NFS or FLASH rootfs, minimal debug, up to 4 cores.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-10-21 13:28:43 +04:00
Max Filippov b82837c772 xtensa: configure kc705 for highmem
Enable all memory available on KC705 (1G - 128M) by default. Update memory
node in DTS and also limit usable memory in bootargs in case memmap is
passed from the bootloader.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-08-14 11:59:25 +04:00
Max Filippov 9c602629e3 xtensa: add support for KC705
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-04-06 21:32:02 +04:00
Max Filippov 08a7bbf624 xtensa: xtfpga: introduce SoC I/O bus
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-04-06 21:32:02 +04:00
Max Filippov 2bc2fde638 xtensa: xtfpga: set ethoc clock frequency
Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC
base frequency in the platform data in case of build w/o CONFIG_OF.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-21 21:33:44 +04:00
Max Filippov cdc9af7ccf xtensa: xtfpga: use common clock framework
With this change the board needs to set up single clock object, users of
this clock will get correct frequency automatically.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-21 21:33:43 +04:00
Baruch Siach 42beb7628e xtensa: standardize devicetree cpu compatible strings
The recommended compatible string format, according to the ePAPR v1.1 standard,
is "manufacturer,model". Change the xtensa cpu compatible strings to
"cdns,xtensa-cpu". Also, change the boards compatible strings in a similar way.

The pic compatible string will be dealt with in a separate patch.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-01-15 00:21:25 +04:00
Max Filippov cbd1de2e8e xtensa: move built-in PIC to drivers/irqchip
Extract xtensa built-in interrupt controller implementation from
xtensa/kernel/irq.c and move it to other irqchips, providing way to
instantiate it from the device tree.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2014-01-14 10:19:56 -08:00
Max Filippov 123f15e669 xtensa: don't use echo -e needlessly
-e is not needed to output strings without escape sequences. This breaks
big endian FSF build when the shell is dash, because its builtin echo
doesn't understand '-e' switch and outputs it in the echoed string.

Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-09-06 09:48:29 -07:00
Max Filippov 478ba61afc xtensa: add static function tracer support
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-07-08 01:18:57 -07:00
Baruch Siach 77b4dcdbfa xtensa: tell git to ignore generated .dtb files
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-07-08 01:18:55 -07:00
Baruch Siach f47a3ca224 xtensa: tell git to ignore copied zlib source files
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-07-08 01:11:35 -07:00
Baruch Siach 28622c5353 xtensa: tell git to ignore generated files
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-06-05 10:14:19 -07:00
Chris Zankel a078ccff56 xtensa: fix redboot load address
With the patch to support MMUv3, the base address for the loaded
binary image has changed, and a fix was applied to the U-Boot image.
This fixes the RedBoot image.

Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:12 -07:00
Max Filippov e85e335f8f xtensa: add MMU v3 support
MMUv3 comes out of reset with identity vaddr -> paddr mapping in the TLB
way 6:

Way 6 (512 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0x00000000  0x00000000  0x01  0x03 RWX Bypass
        0x20000000  0x20000000  0x01  0x03 RWX Bypass
        0x40000000  0x40000000  0x01  0x03 RWX Bypass
        0x60000000  0x60000000  0x01  0x03 RWX Bypass
        0x80000000  0x80000000  0x01  0x03 RWX Bypass
        0xa0000000  0xa0000000  0x01  0x03 RWX Bypass
        0xc0000000  0xc0000000  0x01  0x03 RWX Bypass
        0xe0000000  0xe0000000  0x01  0x03 RWX Bypass

This patch adds remapping code at the reset vector or at the kernel
_start (depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) that
reconfigures MMUv3 as MMUv2:

Way 5 (128 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0xd0000000  0x00000000  0x01  0x07 RWX WB
        0xd8000000  0x00000000  0x01  0x03 RWX Bypass
Way 6 (256 MB)
        Vaddr       Paddr       ASID  Attr RWX Cache
        ----------  ----------  ----  ---- --- -------
        0xe0000000  0xf0000000  0x01  0x07 RWX WB
        0xf0000000  0xf0000000  0x01  0x03 RWX Bypass

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-05-09 01:07:09 -07:00
Stephen Warren 2a02bc166d xtensa: use new common dtc rule
The current rules have the .dtb files build in a different directory
from the .dts files. This patch changes xtensa to use the generic dtb
rule which builds .dtb files in the same directory as the source .dts.

This requires moving parts of arch/xtensa/boot/Makefile into newly
created arch/xtensa/boot/dts/Makefile, and updating arch/xtensa/Makefile
to call the new Makefile.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2013-02-23 19:12:52 -08:00
Max Filippov 055d4db1e1 xtensa: don't try to build DTB when OF is disabled
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:26 -08:00
Max Filippov 5584b4da78 xtensa: add XTFPGA DTS
Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60
and for ML605.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:24 -08:00
Max Filippov 0d456bad36 xtensa: add support for the XTFPGA boards
The Avnet LX60/LX110/LX200 board is an FPGA board that can be configured with
an Xtensa processor and an OpenCores Ethernet device.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:24 -08:00
Max Filippov da844a8177 xtensa: add device trees support
Device trees allow specification of hardware topology and device
parameters at runtime instead of hard-coding them in platform setup
code. This allows running single binary kernel on a range of compatible
boards.

New boot parameters tag BP_TAG_FDT is allocated and a pointer to flat
device tree is passed in it.

Note that current interrupt mapping scheme uses single cell for
interrupt identification. That means that IRQ numbers used in DTS must
be CPU internal IRQ numbers, not external. It is possible to extend
interrupt identification to two cells, and use second cell to tell
external IRQ numbers form internal. That would allow to use single DTS
on multiple boards with different mapping of external IRQ numbers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:23 -08:00
Max Filippov 0322cabd39 xtensa: add U-Boot image support (uImage).
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:23 -08:00
Max Filippov 3f5ec298e5 xtensa: clean up boot make rules
- remove duplicate rules for binary and packed image
- use predefined macros for ld/objcopy/gzip
- remove build-id section from bootable elf image

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:23 -08:00
Max Filippov bc5378fcba xtensa: reorganize SR referencing
- reference SRs by names where possible, not by numbers;
- get rid of __stringify around SR names where possible;
- remove unneeded SR names from asm/regs.h;
- add SREG_ prefix to remaining SR names;

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-15 21:48:08 -07:00
Max Filippov 9ad79b5851 xtensa: drop CONFIG_EMBEDDED_RAMDISK
Remove Kconfig entries, boot subdirectory, dependencies from other
boot-* Makefiles, and sections from ld scripts.

Remove stale redboot code that used to pass initrd addresses in a3 and
a4 to _start.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-03 15:13:09 -07:00
Max Filippov 7c94fe4a01 xtensa: fix parallel make
Make vmlinux.tmp and vmlinux.tmp.gz separate build targets, avoid
removing vmlinux.tmp during vmlinux.tmp.gz build.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-10-03 15:12:29 -07:00
matt mooney 3996eabbab xtensa: change to new flag variable
Replace EXTRA_CFLAGS with ccflags-y.

Signed-off-by: matt mooney <mfm@muteddisk.com>
Acked-by: WANG Cong <xiyou.wangcong@gmail.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
2011-03-17 14:02:57 +01:00
Chris Zankel 367b8112fe xtensa: move headers files to arch/xtensa/include
Move all header files for xtensa to arch/xtensa/include and platform and
variant header files to the appropriate arch/xtensa/platforms/ and
arch/xtensa/variants/ directories.

Moving the files gets also rid of all uses of symlinks in the Makefile.

This has been completed already for the majority of the architectures
and xtensa is one out of six missing.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Chris Zankel <chris@zankel.net>
2008-11-06 10:25:09 -08:00
Bob Wilson bdd362ff4f [XTENSA] Fix makefile to work with binutils-2.18.
When building with binutils-2.18, vmlinux includes .note.gnu.build-id
sections that need to be stripped out when building the binary image.
The old .xt.insn sections haven't been used for a long time, so don't
bother stripping them.

Signed-off-by: Bob Wilson <bob.wilson@acm.org>
Signed-off-by: Chris Zankel <chris@zankel.net>
2008-02-13 17:45:05 -08:00
Chris Zankel 36dffadb7f [XTENSA] Use preprocessor to generate the linker script for the ELF boot image
Signed-off-by: Marc Gauthier <marc@tensilica.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2008-02-13 17:26:17 -08:00
Marc Gauthier ed3174d93c [XTENSA] adjust boot linker script start addresses
Move boot-redboot load address from 0xD0200000 to 0xD1000000
to make space for larger kernel images, in particular those with
an embedded initramfs filesystem.
Also properly set the ELF start address in boot-elf images so
that PC need not be set manually when loading them using GDB.

Signed-off-by: Marc Gauthier <marc@tensilica.com>
2008-02-13 17:15:34 -08:00
Milton Miller 437374e9a9 kbuild: restore arch/{ppc/xtensa}/boot cflags
Commit 9a39e273d4 removed the boot directory
addition to CFLAGS that was being used by the subdirectory builds.  For the
other files, that patch set EXTRA_CFLAGS, but Makefile.build explicitly
sets that to empty as it is explicitly for a single directory only.
Append to KBUILD_CFLAGS instead.

Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2007-10-20 20:35:23 +02:00
Sam Ravnborg a0f97e06a4 kbuild: enable 'make CFLAGS=...' to add additional options to CC
The variable CFLAGS is a wellknown variable and the usage by
kbuild may result in unexpected behaviour.
On top of that several people over time has asked for a way to
pass in additional flags to gcc.

This patch replace use of CFLAGS with KBUILD_CFLAGS all over the
tree and enabling one to use:
make CFLAGS=...
to specify additional gcc commandline options.

One usecase is when trying to find gcc bugs but other
use cases has been requested too.

Patch was tested on following architectures:
alpha, arm, i386, x86_64, mips, sparc, sparc64, ia64, m68k

Test was simple to do a defconfig build, apply the patch and check
that nothing got rebuild.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2007-10-14 22:21:35 +02:00
Sam Ravnborg 9a39e273d4 kbuild: fix up CFLAGS usage
Only in very rare cases is it needed to change CFLAGS
outside of arch/*/Makefile.
Fix up all wrong cases - in most cases
the use of EXTRA_CFLAGS is the only thing needed.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
2007-10-14 21:49:42 +02:00