Perf records IBS (Instruction Based Sampling) extra sample data when
'perf record --raw-samples' is used with an IBS-compatible event, on a
machine that supports IBS. IBS support is indicated in
CPUID_Fn80000001_ECX bit #10.
Up until now, users have been able to see the extra sample data solely
in raw hex format using 'perf report --dump-raw-trace'. From there,
users could decode the data either manually, or by using an external
script.
Enable the built-in 'perf report --dump-raw-trace' to do the decoding of
the extra sample data bits, so manual or external script decoding isn't
necessary.
Example usage:
$ sudo perf record -c 10000001 -a --raw-samples -e ibs_fetch/rand_en=1/,ibs_op/cnt_ctl=1/ -C 0,1 taskset -c 0,1 7za b -mmt2 | perf report --dump-raw-trace
Stdout contains IBS Fetch samples, e.g.:
ibs_fetch_ctl: 02170007ffffffff MaxCnt 1048560 Cnt 1048560 Lat 7 En 1 Val 1 Comp 1 IcMiss 0 PhyAddrValid 1 L1TlbPgSz 4KB L1TlbMiss 0 L2TlbMiss 0 RandEn 1 L2Miss 0
IbsFetchLinAd: 000056016b2ead40
IbsFetchPhysAd: 000000115cedfd40
c_ibs_ext_ctl: 0000000000000000 IbsItlbRefillLat 0
..and IBS Op samples, e.g.:
ibs_op_ctl: 0000009e009e8968 MaxCnt 10000000 En 1 Val 1 CntCtl 1=uOps CurCnt 158
IbsOpRip: 000056016b2ea73d
ibs_op_data: 00000000000b0002 CompToRetCtr 2 TagToRetCtr 11 BrnRet 0 RipInvalid 0 BrnFuse 0 Microcode 0
ibs_op_data2: 0000000000000002 CacheHitSt 0=M-state RmtNode 0 DataSrc 2=Local node cache
ibs_op_data3: 0000000000c60002 LdOp 0 StOp 1 DcL1TlbMiss 0 DcL2TlbMiss 0 DcL1TlbHit2M 0 DcL1TlbHit1G 0 DcL2TlbHit2M 0 DcMiss 0 DcMisAcc 0 DcWcMemAcc 0 DcUcMemAcc 0 DcLockedOp 0 DcMissNoMabAlloc 0 DcLinAddrValid 1 DcPhyAddrValid 1 DcL2TlbHit1G 0 L2Miss 0 SwPf 0 OpMemWidth 4 bytes OpDcMissOpenMemReqs 0 DcMissLat 0 TlbRefillLat 0
IbsDCLinAd: 00007f133c319ce0
IbsDCPhysAd: 0000000270485ce0
Committer notes:
Fixed up this:
util/amd-sample-raw.c: In function ‘evlist__amd_sample_raw’:
util/amd-sample-raw.c:125:42: error: ‘ bytes’ directive output may be truncated writing 6 bytes into a region of size between 4 and 7 [-Werror=format-truncation=]
125 | " OpMemWidth %2d bytes", 1 << (reg.op_mem_width - 1));
| ^~~~~~
In file included from /usr/include/stdio.h:866,
from util/amd-sample-raw.c:7:
/usr/include/bits/stdio2.h:71:10: note: ‘__builtin___snprintf_chk’ output between 21 and 24 bytes into a destination of size 21
71 | return __builtin___snprintf_chk (__s, __n, __USE_FORTIFY_LEVEL - 1,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
72 | __glibc_objsize (__s), __fmt,
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
73 | __va_arg_pack ());
| ~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
As that %2d won't limit the number of chars to 2, just state that 2 is
the minimal width:
$ cat printf.c
#include <stdio.h>
#include <stdlib.h>
int main(int argc, char *argv[])
{
char bf[64];
int len = snprintf(bf, sizeof(bf), "%2d", atoi(argv[1]));
printf("strlen(%s): %u\n", bf, len);
return 0;
}
$ ./printf 1
strlen( 1): 2
$ ./printf 12
strlen(12): 2
$ ./printf 123
strlen(123): 3
$ ./printf 1234
strlen(1234): 4
$ ./printf 12345
strlen(12345): 5
$ ./printf 123456
strlen(123456): 6
$
And since we probably don't want that output to be truncated, just
assume the worst case, as the compiler did, and add a few more chars to
that buffer.
Also use sizeof(var) instead of sizeof(dup-of-wanted-format-string) to
avoid bugs when changing one but not the other.
I also had to change this:
-#include <asm/amd-ibs.h>
+#include "../../arch/x86/include/asm/amd-ibs.h"
To make it build on other architectures, just like intel-pt does.
Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Joao Martins <joao.m.martins@oracle.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Michael Petlan <mpetlan@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Stephane Eranian <eranian@google.com>
Link: https //lore.kernel.org/r/20210817221509.88391-4-kim.phillips@amd.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>