Add the appropriate min/max voltages for the regulators on the
apq8074 dragonboard so that they can be used by clients properly.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add "dis_rxdet_inp3_quirk" boolean property to USB3 node. This property
is used to disable rx detection in P3 PHY mode.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PCI reset GPIO is active low, so represent it with the
GPIO_ACTIVE_LOW flag.
Even though the imx6 PCI driver will not take the polarity into account
in this case, it is better to provide a correct description in device-tree.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GPLv2-only devicetrees make reuse difficult for software components
licensed under a different license. In particular, the Utilite Pro
devicetree file (which includes imx6q-cm-fx6.dts) is already dual
licensed under GPLv2/X11.
Hence, relicense imx6q-cm-fx6.dts under GPLv2/X11 dual license.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The CompuLab Utilite Pro is a miniature fanless desktop pc based on
the i.MX6 Quad powered cm-fx6 module. It features two serial ports,
USB OTG, 4x USB, analog audio and S/PDIF, 2x Gb Ethernet, HDMI and
DVI ports, an on-board 32GB SSD, a mmc slot, and on-board wifi/bt.
Add initial support for it including USB, Ethernet (both ports), sata
and HDMI support.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The cm-fx6 module has an on-board spi-flash chip for its firmware, an
eeprom (containing e.g. the mac address of the on-board Ethernet),
a sata port, a pcie controller, an USB hub, and an USB otg port.
Enable support for them. In addition, enable syscon poweroff support.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6q-cm-fx6 iomuxc container node is not required. Remove it.
Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This fixes the following dtc warning by removing the unnecessary unit:
Warning (unit_address_vs_reg): Node /matrix-keypad@0 has a unit name,
but no reg property
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-By: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This fixes the following dtc warning by removing the unnecessary unit:
Warning (unit_address_vs_reg): Node /onewire@0 has a unit name,
but no reg property
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the missing reg properties for the regulator nodes
in order to fix the dtc warnings.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the missing reg properties for the MXS GPIO banks
in order to fix the dtc warnings.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Auvidea H100 is a baseboard for the SolidRun MicroSOM.
Its primary feature is a Toshiba TC358743 HDMI to CSI decoder,
allowing the board to work as HDMI passthrough and framegrabber.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the DT property to all boards that have the hardware workaround
for erratum ERR006687 present. This allows the CPUidle driver to use
the deep idle states, even if the FEC is active.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This node describes the DI1 port of IPU, fix the node name to reflect this.
There's currently no user of this node in mainline, so this change should
not break any supported platforms.
Signed-off-by: Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the LCD8000-43T display and for the backlight
controlled via PWM1.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As of commit 1006ed7e1b ("serial: imx: Use generic uart-has-rtscts
DT property"), the Freescale IMX UART driver recognizes the generic
"uart-has-rtscts" DT property, deprecating the vendor-specific
"fsl,uart-has-rtscts" DT property. Hence replace the latter by the
former in all DTS files.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As of commit 182cdcb8bb ("serial: mxs-auart: Use generic
uart-has-rtscts DT property"), the Freescale MXS AUART driver recognizes
the generic "uart-has-rtscts" DT property, deprecating the
vendor-specific "fsl,uart-has-rtscts" DT property. Hence replace the
latter by the former in all DTS files.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds back the dma channels for the i2c1 node. This is safe now
that the qcom,controlled-remotely changes are in place and will be used
on the boards that require it.
This reverts commit 10c0f0e92f.
This puts back in place the blsp2_bam node. This can be safely added
due to the addition of the special qcom,controlled-remotely flag that
will be used on specific boards that require it.
This reverts commit 338d518898.
Add PL330 support to the the Broadcom Northstar Plus device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The BCM958525XMC board is a smaller form factor typically used as
controller boards for switches. This smaller board has less devices
pinned out, so only a few need be populated in the device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Joachim Eastwood <manabian@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Fabio Porcedda <fabio.porcedda@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Sergio Tanzilli <tanzilli@acmesystems.it>
Cc: Douglas Gilbert <dgilbert@interlog.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Rodolfo Giometti <giometti@linux.it>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Cc: Sergio Tanzilli <tanzilli@acmesystems.it>
Cc: Douglas Gilbert <dgilbert@interlog.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The clocks group properties and the clock@0 node have been obsolete for two
years, remove them.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
The Denx MA5D4 dts doesn't properly define the slow_xtal and main_xtal
frequencies, the PMC then has to fallback to using the RC oscillators whose
precision is not really good.
As both crystals are populated, define their frequencies, see p17 of
http://www.denx-cs.de/sites/all/files/MA5D4.HWM_.002.pdf
Also, remove the obsolete main_clock definition.
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Use stdout-path to specify the console and remove the console argument from
the kernel command line.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add support for this small MP3 player based on STMP3780 (rev.3).
Currently supported are both external microSD and internal SD-NAND
bridge, PWM and USB gadget.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for this small MP3 player based on STMP3780 (rev.4).
Currently supported is both external microSD and internal SD-NAND
bridge, PWM and USB gadget.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add pinmux configuration for SSP2 port in SD mode, both for
the 4-bit and 8-bit case.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The unit address of the second PCIe instance
is set to be same as that of the first instance
(copy-paste error).
Fix it.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Define RFID eeprom node which is present on gta04
device.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The twl6040 codec is generating the pdmclk, which is used by the McPDM as
functional clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The twl6040 codec is generating the pdmclk, which is used by the McPDM as
functional clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The twl6040 codec is generating the pdmclk, which is used by the McPDM as
functional clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The twl6040 codec is generating the pdmclk, which is used by the McPDM as
functional clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The twl6040 codec is generating the pdmclk, which is used by the McPDM as
functional clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add clock properties to the McBSP nodes. McBSP2 and 3 need to have ick also
since the Sidetone block of these modules are operating using the McBSP
interface clock.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently am33xx.dtsi declares the MAC controller to have two
slave ports, on these boards we only use one, so set the slave
count to one. This eliminates a console error message when
the non-existent PHY is not detected.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently am4372.dtsi declares the MAC controller to have two
slave ports, on this board we only use one, so set the slave
count to one. This eliminates a console error message when
the non-existent PHY is not detected.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Correct misspelling, "emda3" -> "edma3".
Reported-by: Adam J Allison <adamj.allison@gmail.com>
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rename the tag of the 3.3 V regulator used in the DRA72 EVM in
order to have a consistent tag name with the DRA7 EVM. This
is useful when the regulator needs to be referenced in common
dtsi files (i.e. for common companion boards like JAMR3 [1]).
[1] http://www.ti.com.cn/cn/lit/ug/sprui52/sprui52.pdf
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM335x ICE board has a TI PCA9536 chip connected to I2C0 at address
0x41. Add DT entry for the same.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Kristofer Martinez <Kristofer.S.Martinez@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add an operating-points-v2 table with all OPPs available for all silicon
revisions along with necessary data for use by ti-opp driver to selectively
enable the appropriate OPPs at runtime and handle voltage transitions
As we now need to define voltage ranges for each OPP, we define the
minimum and maximum voltage to match the ranges possible for AVS class0
voltage as defined by the DRA7/AM57 Data Manual, with the exception of
using a range for OPP_OD based on historical data to ensure that SoCs
from older lots still continue to boot, even though more optimal voltages
are now the standard. Once an AVS Class0 driver is in place it will be
possible for these OPP voltages to be adjusted to any voltage within the
provided range.
Information from SPRS953, Revised December 2015.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Nearly all of the information in the cpus node, especially for cpu0, is
the same between dra74x and dra72x so move the common information to
the parent dra7.dtsi to avoid duplication of data.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Create a system control module node for the control module portion that
resides under l4_wkup.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Hook dcdc2 as the cpu0-supply.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add an operating-points-v2 table with all OPPs available for all silicon
revisions along with necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime.
Information from AM437x Data Manual, SPRS851B, Revised April 2015,
Table 5-2.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older
Beaglebone Blacks may have PG2.0 silicon populated and these particular
parts are guaranteed to support the OPP, so enable it for PG2.0 on
am335x-boneblack only.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Drop the operating-points table present in am33xx.dtsi and add an
operating-points-v2 table with all OPPs available for all silicon
revisions along with necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime. Also, drop the voltage-tolerance
value and provide voltages for each OPP using the <target min max>
format instead.
Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now that we are moving to OPPv2 bindings and able to add 1GHz OPP for
MPU, let's update the max MPU voltage range to align with the maximum
possible value allowed in the operating-points table, which is max
target voltage of 132500 uV + 2%.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without that change wifi card isn't probed because pwrseq is necessary for
libertas chip.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Define pinmux and usage if irq pin + fix irq edge.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Define pwm backlight node which is using dmtimer pwm.
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the needed DT data to enable IR TX driver
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Secure variants of DRA7xx and AM57xx SoCs may need to reserve a region
of the SRAM for use by secure software. To account for this, add a child
node to the ocmcram1 node that will act as a placeholder at the start
of the SRAM for the reserved region of memory that may be required
by secure services. The node is added with size 0 so that by default
parts will have the full space available but the bootloader or board dts
file is able to resize the node as needed depending on how much reserved
space is needed, if any, so end users of the ocmcram1 region on HS parts
must be aware that a smaller amount of SRAM than expected may be available.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add all ocmcram nodes to dra7.dtsi using the generic mmio-sram driver.
DRA7xx and AM57xx families of SoCs can contain three ocmcram regions of
SRAM, one of 512kb and also an optional two additional of 1Mb each. Mark
the two additional 1MB regions of SRAM as disabled as only ocmcmram1 is
on all variants of the SoCs, then depending on which specific variant
is in use the ocmcram2 and ocmcram3 nodes can be enabled in the board
dts file if the data manual for that part number indicates the ocmcram
region is available.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.
Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Add eCAP and use updated bindings for PWMSS and ePWM]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Previous patches switched the ECAP and EPWM to use the new bindings.
These bindings explicitly adds the various required clocks via DT rather
than depending on hwmod.
Therefore, it is safe to remove the hwmod entries since they are no longer
needed.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Switch to a new ECAP and EPWM bindings that doesn't depend on hwmod to
provide the various required clocks.
For AM437 and AM335x, add the required clocks explicitly to DT. The
hwmod entries for ECAP and EPWM will be removed and this will prevent
anything from breaking.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Avoid depending on the bootloader or the ROM for configuring the pinmux by
explicitly setting the pinmux here.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The pinctrl IP used in some of the Keystone 2 devices differ vs other
TI SoCs. Therefore, create a Keystone specific pinctrl header.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Add pinctrl support.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This enables support for the CAN controller located in the FPGA.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable FPGA's IRQ controller. It is in charge of dispatching interrupts
generated by IPs in the FPGA. The SoC is notified that an interrupt
occurred through a GPIO.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 6c42db30d8 introduced audio support based on alsa ucm profiles
taken from the ChromeOS userspace. Both in the kernel as well as alsa
they were named (and matched against) ROCKCHIP-I2S. Audio profiles are
very much board-specific and hogging the ROCKCHIP-I2S name would make
it harder for future boards and also is misleading.
For Veyron boards the audio setup is similar over all variants, so
VEYRON-I2S is a more suitable name. This rename also was merged into
the alsa ucm profile so both userspace and kernel match and the old
naming was never released in any alsa or kernel release.
Fixes: 6c42db30d8 ("ARM: dts: rockchip: Add shared file for audio on rk3288-veyron boards")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
DSS's 'pll2_clkctrl' and 'pll2' have wrong addresses in the dra74x.dtsi
file. Video PLL2 has not been used so wrong addresses went unnoticed.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add pinctrl node and populate the pinctrl registers with the default
values.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The PCI DT bindings contain a bogus entry for IO space which is not
supported on Keystone. The current bogus entry has an invalid size
and throws following error during boot.
[0.420713] keystone-pcie 21021000.pcie: error -22: failed to map
resource [io 0x0000-0x400000003fff]
So remove it from the dts. While at it also add a bus-range
value that eliminates following log at boot up.
[0.420659] No bus range found for /soc/pcie@21020000, using [bus 00-ff]
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The notion of which uart instance is serial0 or serial1
is board specific rather than generic to the chip. This
patch removes the serial aliases from generic chip dtsi
and adds an appropriate alias to the board specific dtsi.
By making the alias for serial0 point to uart1 for the arria10_socdk,
the linux boot command line supports specifying console=ttyS0,115200
for backwards compatibility, and it supports not specifying
the console at all.
Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Without having an ethernet alias, ethernet will have a random MAC address,
versus take an address that was provided from the bootloader.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
MFC device can be used without any external hardware dependencies (when
IOMMU is enabled), so it can be enabled by default (like it has been
already done for Exynos 542x platforms). This unifies handling of this
device for Exynos3250, Exynos4 and Exynos542x platforms. Board can still
include exynos-mfc-reserved-memory.dtsi to enable using this device
without IOMMU being enabled.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch moves assigning reserved memory regions from each board dts
to common exynos-mfc-reserved-memory.dtsi file, where those regions are
defined.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Generic reserved memory regions bindings allow to automatically allocate
region of given parameters (alignment and size), so use this feature
instead of the hardcoded values, which had no dependency on the real
hardware. This patch also increases "left" region from 8MiB to 16MiB to
make the codec really usable with nowadays steams (with 8MiB reserved
region it was not even possible to decode 480p H264 video).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Using the new line naming mechanism from the GPIO subsystem, name
the GPIO lines on the HREFv60plus board that are connected as
GPIO on this design.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Using the new line naming mechanism from the GPIO subsystem, name
the GPIO lines on the Snowball board that are connected as
GPIO on this design.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Move the compatible string "stericsson,ab8500" from the board
definitions into the main node in the chipset file where it
belongs.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use compatible "atmel,sama5d2-ohci" to be capable of suspending
ports while sleep to save the power consumption.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
sam9-l9260 is a low cost board designed by Olimex.
More information is available at:
https://www.olimex.com/Products/ARM/Atmel/SAM9-L9260/
Signed-off-by: Raashid Muhammed <raashidmuhammed@zilogic.com>
Reviewed-by: Vijay Kumar B. <vijaykumar@bravegnu.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Remove leading zeros in OHCI node for at91sam9260 based boards.
Signed-off-by: Raashid Muhammed <raashidmuhammed@zilogic.com>
Reviewed-by: Vijay Kumar B. <vijaykumar@bravegnu.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Commit bea7eef694 ("ARM: dts: exynos: Fix DTC unit name warnings in
Peach Pit") fixed the DTC warnings about mismatches between unit names
and reg properties in the Exynos5420 Peach Pit DTS.
But unfortunately it also added a regression on the Peach Pit when
changing the port node names since the OF graph logic expects the port
nodes to be always named 'port'.
The Documentation/devicetree/bindings/graph.txt binding document says
that when there is more than one port, '#address-cells', '#size-cells'
and 'reg' properties should be used to number the port nodes.
Fixes: bea7eef694 ("ARM: dts: exynos: Fix DTC unit name warnings in Peach Pit")
Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Commit 5c9cbade06 ("ARM: dts: exynos: Fix DTC unit name warnings in
Exynos5250") fixed all the DTC warnings about mismatchs between unit
names and reg properties in Exynos5250 boards DTS.
But unfortunately it also added a regression on the Exynos5250 Snow
Chromebook when changing the port node names since the OF graph logic
expects the port nodes to be always named 'port'.
The Documentation/devicetree/bindings/graph.txt binding document says
that when there is more than one port, '#address-cells', '#size-cells'
and 'reg' properties should be used to number the port nodes.
Fixes: 5c9cbade06 ("ARM: dts: exynos: Fix DTC unit name warnings in Exynos5250")
Reported-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Add device tree files for the Broadcom BCM23550 SoC and the
Broadcom Sparrow board.
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The thermal nodes are not disabled in exynos5420.dtsi so there is no
need to manually enable them on Odroid XU3/XU3-Lite/XU4 boards.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Move watchdog and Security SubSystem nodes from exynos5420.dtsi to file
shared with Exynos5410 and configure the clocks on the latter.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Extend the DTS for Exynos5410-based Odroid XU board with:
1. Proper PWM outputs,
2. usb3503 USB HUB (with integrated LAN9730 ethernet adapter (smsc95xx)),
3. Maxim 77802 PMIC (regulators, 32 kHz clocks, RTC),
4. CPU thermal (trip points are the same as in Odroid XU3/XU4 but
cooling maps are different as there is no CPU freq and only one
cluster available for now),
5. Regulator supplies for USB 3.0.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Add nodes for Thermal Management Unit to exynos5410.dtsi. Use the same
compatible as for Exynos5420 however without second base for TRIMINFO
register and without TMU for GPU.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Add input mux for UART2 RX in DTE mode. This allows to use the pad
UART2_TX_DATA_ALT0 as UART2 RX. This particular input select seems
to be missing in current reference manuals (Rev. B), but when looking
at the tables and other UART input select registers (e.g. UART3) it
seems naturally that this input mux register also has a fourth pad
option for UART2_TX_DATA_ALT0. It has also been proven to be required
to use UART2 in DTE mode and the particular pads on the Colibri iMX7
platform.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pass "fsl,sai-mclk-direction-output" to the sai2 node, so that the
SAI2_MCLK can be an output.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add SAI alias entries, which makes it possibe for the SAI driver
to retrieve the port instance.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Building with W=1 option leads to several warnings like:
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-1p1@110 has a unit name, but no reg property
Fix them by removing the unneeded unit-addresses.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable support for Multimedia Codec (MFC) device for all Exynos4412-based
Odroid boards.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch replaces custom properties for defining reserved memory
regions with generic reserved memory bindings for MFC video codec
device.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
[k.kozlowski: Add Samsung copyrights]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
On Exynos5410 the SPI interrupt for second USB DWC3 (called DRD: Dual
Role Device) is different - 200 instead of 73.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Hang the three switches of the three MDIO busses using the new DSA
binding. Also, make use of the mdio-bus and explicitly list the phys
on one device. This is not required, but good for testing.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is the same issue fixed in commit dcf5341f01 ("ARM: dts:
sun8i-q8-common: Do not set constraints on dc1sw regulator").
Commit message copied:
dc1sw is an on/off only regulator and as such it cannot have constraints.
This is a limitation of the kernel regulator implementation which resolves
supplies on the first regulator_get(), which is done after applying
constraints, and applying the constrains will fail because it calls
_regulator_get_voltage() and _regulator_do_set_voltage() both of which
will fail on a switch regulator when there is no supply (yet).
This causes registering of all axp22x regulators to fail with the
following errors:
[ 1.395249] vcc-lcd: failed to get the current voltage(-22)
[ 1.405131] axp20x-regulator axp20x-regulator: Failed to register dc1sw
[ 1.412436] axp20x-regulator: probe of axp20x-regulator failed with error -22
This commit removes the constrains on dc1sw / vcc-lcd fixing this problem.
Note that dcdc1 itself is contrained to the exact same values, so this
does not change anything.
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Cc: <stable@vger.kernel.org> # 4.6
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is the same issue fixed in commit dcf5341f01 ("ARM: dts:
sun8i-q8-common: Do not set constraints on dc1sw regulator").
Commit message copied:
dc1sw is an on/off only regulator and as such it cannot have constraints.
This is a limitation of the kernel regulator implementation which resolves
supplies on the first regulator_get(), which is done after applying
constraints, and applying the constrains will fail because it calls
_regulator_get_voltage() and _regulator_do_set_voltage() both of which
will fail on a switch regulator when there is no supply (yet).
This causes registering of all axp22x regulators to fail with the
following errors:
[ 1.395249] vcc-lcd: failed to get the current voltage(-22)
[ 1.405131] axp20x-regulator axp20x-regulator: Failed to register dc1sw
[ 1.412436] axp20x-regulator: probe of axp20x-regulator failed with error -22
This commit removes the constrains on dc1sw / vcc-lcd fixing this problem.
Note that dcdc1 itself is contrained to the exact same values, so this
does not change anything.
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Cc: <stable@vger.kernel.org> # 4.6
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
with patches in Linux next:
- Fix omap5 and am57xx-idk input voltages to fix micro-sd
probing at least for some omap5-uevm configurations
- Fix unhandled fault for igepv5 audio
- Fix UART wakeirqs for omap5 by removing WAKUP_EN flags,
those are managed by the wakeirq and can currently confuse
the wakeirqs as there is no handler necessarily registered
- Fix LDO7 source for igepv5
Also included are few minor changes not strictly fixes
are good to have merged:
- Fix HP T410 boot time warnings for eMMC and disable the
unused MMC interfaces while at it
- Add dra7 gpmc dma channel
- Add igep00x0 SD card detect and write protect GPIOs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXNghoAAoJEBvUPslcq6Vzpj8P/jsKyMBQZZS/GXxLXouAIIx/
S/HK3Xd1VjW8FwB1cKDL2FcY9BF1q/sbc8r0499q1fYuoZoswv3fj8mssKSOPDPQ
1K5bjlgsw/eMaEkQh313ID7yLSK3jSBtt/USn/k+9DCg++JwnsMAi9n3GUmi1Itz
d7p/UBnIeMY3HNWau7svLL3iphAZy8CaD2jnsB+9ZhsaRx8+Am/Uwx+Y2CcwIgP+
lm3mzA6nnSuZkus6qW9zt5gurcA2hIyZZtdDmuEuv5D2e245z4MV/2pBbwfoAxB3
7aRej6L+tizPh3kqbaBFfMgd9mRSn6h4CoIJova/1U64KPAnF+hoUaKw4JNX6OQt
lnj/jqT2XwRzBejt7TVPyM9LOnF9HHP3TF0u/302tJS2OXEsfY0qt/zSAggr8pBR
kTIQofTH3VhfZa0qP8U1F7DWmFNDNvoKTf98yojGkDLDwvOkxH+SovRHTgQgg8+E
OVdU2PCfwzrP1/4RvvVxrgMTf5AidQCnvJbJP4Aa83WS9HEIZ3e+UXhLT+f5PFHc
AC5b8dYdHKO5IahBZUv9lg+GMDTTiwdPY9cN5OSvpLneYu8VkIa8RwjbuuzGf0mv
HA04E4LzIjHiHYam9NQVSlG+/hqsbgbmZOeGL7G4SxNTWQrrYeUA3ZXQwb5rlUjg
H6qshQYccawHebu9cwzv
=vMZg
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7-dts-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
DTS fixes for omaps for v4.7 merge window for issues noted
with patches in Linux next:
- Fix omap5 and am57xx-idk input voltages to fix micro-sd
probing at least for some omap5-uevm configurations
- Fix unhandled fault for igepv5 audio
- Fix UART wakeirqs for omap5 by removing WAKUP_EN flags,
those are managed by the wakeirq and can currently confuse
the wakeirqs as there is no handler necessarily registered
- Fix LDO7 source for igepv5
Also included are few minor changes not strictly fixes
are good to have merged:
- Fix HP T410 boot time warnings for eMMC and disable the
unused MMC interfaces while at it
- Add dra7 gpmc dma channel
- Add igep00x0 SD card detect and write protect GPIOs
* tag 'omap-for-v4.7-dts-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: igep0020: Add SD card write-protect pin.
ARM: dts: igep00x0: Add SD card-detect.
ARM: dts: am57xx-idk-common: Fix input supply names
ARM: dts: dra7: Add gpmc dma channel
ARM: dts: disable mmc by default and enable when needed for dm814x
ARM: dts: Add non-removable to hsmmc on hp-t410
ARM: dts: Fix ldo7 source for HDMI on igepv5
ARM: dts: Fix uart wakeirq on omap5 by removing WAKEUP_EN for omaps
ARM: dts: Fix igepv5 audiopwon-gpio
ARM: dts: omap5-board-common: Describe the voltage supply mapping accurately
Signed-off-by: Olof Johansson <olof@lixom.net>
commit 27dd9af6bc ("ARM: dts: sunxi: Add a olinuxino-lime2-emmc")
added the new emmc equipped lime2 but forgot its Makefile.
This patch adds an entry to the Makefile.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Changes to support IRQ controller implementation including adding
new property irq-controller to eccmgr and adding IRQ property
to children.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The Exynos5800 Peach Pi and Exynos5420 Peach Pit Chromebooks have the
LDO10 1.8V output connected to the VDD18_TS{01,23,4} Exynos SoC pins.
Add this regulator as the input supply of the Thermal Management Unit
channels and also remove the always-on property since all the devices
using LDO10 as input supply are now defined.
Suggested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Commit 1b47b98acc ("ARM: BCM5301X: Add DT entry for SPI controller and
NOR flash") enabled SPI-NOR device on routers using serial flash only.
However there are also devices with two flash memories:
1) Small SPI attached flash used mostly for booting
2) Bigger NAND used mostly for storing firmware
On such devices we still need SPI-NOR e.g. to access NVRAM data.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Create a new device tree file for the Broadcom Northstar Plus HR SVK.
This SVK is a smaller form factor, and thus only has 2 PCI slots and 1
UART. Also, it has the ability to reboot via GPIO (instead of the
processor reset).
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
NSP B0 has a different address for the second core. Since there should
not be any Ax versions in the field, it should be safe to universally
change this.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add MSI support to the PCI driver of the Northstar Plus SoC. This uses
the existing pcie-iproc driver. So, all that is needed is device tree
entries in the DTS.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
bindings/arm/cpus.txt states that "enable-method" should be a
property of the "cpu" node rather than the "cpus" node.
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The hub and the ethernet in its port 1 are hardwired on the board.
Compared to the adapters that can be plugged into the USB ports, this
one has no serial EEPROM to store its MAC. Nevertheless, the Raspberry Pi
has the MAC address for this adapter in its ROM, accessible from its
firmware.
U-Boot can read out the address and set the local-mac-address property of the
node with "ethernet" alias. Let's add the node so that U-Boot can do its
business.
Model B rev2 and Model B+ entries were verified by me, the hierarchy and
pid/vid pair for the Version 2 was provided by Peter Chen. Original
Model B is a blind shot, though very likely correct.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Configure Exynos5410-specific properties of RTC, I2C and HSI2C nodes.
This still does not enable them on the board level though.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Add pincontrol groups for HSI2C (USI), I2C, PWM and UART to Exynos5410.
This allows configuring these pins to specific functions.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
The USI/HSI2C nodes can be mostly shared between Exynos5420 and
Exynos5410 so move them to common DTSI.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
The Hardkernel's Odroid XU board was first design with big.LITTLE SoC
from Samsung: the Exynos5410. Details:
1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is
enabled),
2. 2 GB DDR3 RAM,
3. PowerVR SGX544MP3 GPU (not enabled in DTS),
4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4,
5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of
revisions though),
6. eMMC 4.5 and microSD slots.
Comparing this board to Odroid XU3 (more popular), the differences are:
1. Exynos5410 instead of 5422,
2. MIPI DSI LCD connector,
3. Main PMIC: Maxim 77802 instead of S2MPS11,
4. USB3503+LAN9730 instead of integrated LAN9514,
5. eMMC 4.5 instead of eMMC 5.0,
This patch adds initial support for the XU board with working basic
functions, eMMC/SD and USB (including attached ethernet adapter).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Link: http://www.hardkernel.com/main/products/prdt_info.php?g_code=G137510300620
Move USB 3.0 DWC and 2.0 EHCI/OHCI nodes from exynos5420.dtsi to
exynos54xx.dtsi common for entire family. For Exynos542x/5800 this
should not have functional impact but for Exynos5410 this effectively
adds USB support.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
The Exynos5410/542x/5800 are very similar designs. Create a new
DTSI with common nodes to remove DTS duplication. Although currently
only MCT and SysRAM are shared but in future more nodes will be added to
the common file.
The patch should not have functional impact.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Multi-Core Timer generates interrupts but it is not really an interrupt
controller so remove the "interrupt-controller" and "interrupt-cells"
properties. Additionally extend the length of mapped memory to cover all
registers (last SFR is at 0x0A40).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Just like other Exynos5 family SoCs, this one has four UARTs. Configure
clocks for UART3 and enable it.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
The exynos5.dtsi is used for common nodes shared between Exynos5250 and
Exynos542x. Since Exynos5410 is very similar to Exynos5420 it can
include the common file as well to remove duplication and make
everything more consistent.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
The conventions is to put SoC devices under 'soc' node. In fact other
our DTSes (like exynos3250.dtsi or exynos5410.dtsi) already follow it.
Adjust exynos5250 and exynos5420 DTSI to follow this convention. This is
also necessary for the upcoming change in exynos5410.dtsi to inherit
from common exynos5.dtsi.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
The i2c-arbitrator node in exynos5250-snow-common used absolute path to
reference other node (the i2c parent). Use phandle instead, because the
depth of the other node may be changed (like moving it under 'soc'
node).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Add 'sromc' label to SROM memory controller in common exynos5.dtsi so it
can be referenced by inheriting DTSI.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Exynos5420 and Exynos5250 share some nodes: the PWM, syscon
(sysreg_system_controller) and first four I2C controllers. Move them to
parent DTSI to avoid duplication.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
The LED nodes can be shared between Odroid XU3, XU3-Lite and XU (not yet
added) thus removing duplication.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Configure the pinctrl for MMC0 (eMMC) and MMC2 (microSD card).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
For consistency lowercase node labels are used.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Add support for the random number generator to the Northstar Plus
SoC device tree.
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The CLKOUT (which control is provided by PMU) is necessary for some of
the drivers using this as a clock, e.g. usb3503 USB HUB on Odroid XU
board.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The 'sd0_rclk' was put in the middle of SD1 nodes. Remove the confusion.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Since commit 218e149613 ("i2c: exynos5: add support for HSI2C on
Exynos5260 SoC") the "samsung,exynos5-hsi2c" is deprecated in favor of
SoC version specific: "samsung,exynos5250-hsi2c".
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
As Murata Manufactures the NTC based thermistors. The vendor
name in the compatibility is preposed to change to "murata".
This patch uses the new compatibility string in Exynos4412 based
Trats2 board.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Cc: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The regulator always-on property should only be used for regulators
that either can't be disabled or the drivers for the client devices
are not enabling the regulator and so being disabled due to unused.
There are some max77802 regulators in the Peach Pit and Pi boards
that are always-on but shouldn't since they are enabled by drivers:
BUCK5 is max77802 inl1 supply
BUCK7 is max77802 inl{2,10} supply
BUCK9 is max77802 inl{3,4,5,7} supply
BUCK10 is mmc1 vqmmc supply
LDO9 is adc vdd supply
This patch removes the always-on property for these regulators.
Some regulators should remain always-on even when they are used as
input supplies, because these regulators are also used by other
components that are not described in the DT, for example:
LDO10 is hdmi vdd_osc supply but it's also used as input supply for
the Exynos5420 temperature sensor.
LDO8 is hdmi vdd and vdd_pll supply but it's also used as supply for
the Exynos5420 Display port.
BUCK2 and BUCK6 are the vdd supplies for the EAGLE and KFC clusters.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Enable the Origen's usb phy and ohci devices in the device tree. Also
add the "samsung,vbus-gpio" property to enable the GPX3(5) gpio pin so
the AX88760 hub is powered.
Signed-off-by: Matthew Leach <matthew@mattleach.net>
[k.kozlowski: Extend nodes by label notation instead of path]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Include the CPU thermal nodes directly in Odroid XU3-family common DTS
because it is the only user of it. Keeping it in separate DTSI file does
not bring benefits because:
1. It is not re-usable on other non-fan boards (fan is referenced),
2. It won't be re-used on future Odroid XU board because different
CPU cluster behavior.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Odroid X/X2/U3 schematics say that SD card vmmc regulator
(LDO21/TFLASH) operates on 2.8 V. Mainline U-Boot uses that value as
well and 2.8 V is common on Exynos-based boards. Additionally use some
descriptive name for this regulator.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
The eMMC card vmmc-supply contained incorrectly two regulators: LDO20
and buck8. The second one is ignored. Additionally the buck8 is a vqmmc
supply only on X and X2. On U3 the buck8 is providing power to the LAN
(SMSC95xx) so instead the LDO22 should be used.
Fix this by defining proper vmmc and vqmmc supplies for respective
boards.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
The SD-card vmmc-supply contained incorrectly two regulators. The second
one is ignored. Fix this by defining proper vmmc and vqmmc supplies.
Additionally these regulators do not have to be always on, so allow
disabling them to reduce energy consumption.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
io-voltage control is actually part of the grf, so move the node under the
newly available grf simple-mfd.
To minimize duplicate code, the core node and compatible property
gets placed in the core rk3288.dtsi while the individual boards
now only need to enable it and add the necessary supply properties.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Set i2s block to "okay", add sound node for max98090 with gpios for
HP and Mic detect and pinctrl, and add a max98090 device and ts3a227e to
the correct i2c bus.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This is a standard binding for describing SPI flash that can be
identified by reading their JEDEC ID. Let's use it.
Tested on Veyron Jaq.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The MFC IP is also inter-connected by an Async-Bridge so the CLK_ACLK333
has to be ungated during a power domain switch. Trying to do it when the
clock is gated will fail and lead to an imprecise external abort error
when the driver tries to access the MFC registers with the PD disabled.
For example, if the s5p-mfc module is removed and the MFC PD turned off:
[ 186.835606] Power domain power-domain@10044060 disable failed
[ 186.835671] s5p-mfc 11000000.codec: Removing 11000000.codec
[ 186.837670] Power domain power-domain@10044060 disable failed
And when the module is inserted again:
[ 2395.176956] s5p_mfc_wait_for_done_dev:34: Interrupt (dev->int_type:0, command:12) timed out
[ 2395.177031] s5p_mfc_init_hw:272: Failed to load firmware
[ 2395.177384] Unhandled fault: imprecise external abort (0x1406) at 0x00000000
[ 2395.177441] pgd = ec3b4000
[ 2395.177467] [00000000] *pgd=00000000
[ 2395.177507] Internal error: : 1406 [#1] PREEMPT SMP ARM
[ 2395.177550] Modules linked in: s5p_mfc mwifiex_sdio mwifiex uvcvideo s5p_jpeg v4l2_mem2mem videobuf2_vmalloc videobuf2_dma_contig videobuf2_memops videobuf2_v4l2 videobuf2_core v4l2_common videodev media [last unloaded: s5p_mfc]
[ 2395.177774] CPU: 1 PID: 2382 Comm: v4l_id Tainted: G W 4.6.0-rc6-next-20160502-00010-g7730dc64d2c1-dirty #179
[ 2395.177857] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[ 2395.177906] task: ed275500 ti: e6c8c000 task.ti: e6c8c000
[ 2395.177996] PC is at s5p_mfc_reset+0x1c4/0x284 [s5p_mfc]
[ 2395.178057] LR is at s5p_mfc_reset+0x1a4/0x284 [s5p_mfc]
This patch fixes this issue by adding the CLK_ACLK333 as an Async-Bridge
clock for the MFC power domain, so the PD configuration works properly.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Warning (unit_address_vs_reg): Node /regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@4 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /keyboard/button@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /keyboard/button@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /keyboard/button@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /keyboard/button@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c@8 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /pfc@e0140200/serial@e1030000 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_keys/button@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_keys/button@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_keys/button@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /gpio_keys/button@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@5 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@5 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /i2c@2 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /regulator@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /cache-controller has a reg or ranges property, but no unit name
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property
Move the cache-controller node under the cpus node, and make its unit
name and reg property match the MPIDR value.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
Move the cache-controller node under the cpus node, and make its unit
name and reg property match the MPIDR values.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
Move the cache-controller node under the cpus node, and make its unit
name and reg property match the MPIDR values.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
Move the cache-controller nodes under the cpus node, and make their unit
names and reg properties match the MPIDR values.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,src/src@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,src/src@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,src/src@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,src/src@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,src/src@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,src/src@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,src/src@9 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ffd90000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /cache-controller has a reg or ranges property, but no unit name
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property
Move the cache-controller nodes under the cpus node, and make their
unit names and reg properties match the MPIDR values.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Warning (unit_address_vs_reg): Node /clocks@e0110000/iic0_sclkdiv has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/iic0_sclk has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/iic1_sclkdiv has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/iic1_sclk has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/usia_u0_sclkdiv has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/usib_u1_sclkdiv has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/usib_u2_sclkdiv has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/usib_u3_sclkdiv has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/usia_u0_sclk has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/usib_u1_sclk has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/usib_u2_sclk has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/usib_u3_sclk has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): Node /clocks@e0110000/sti_sclk has a reg or ranges property, but no unit name
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car Gen2 have two DMA controllers, which are equivalent. Add
references to both dmac0 and dmac1 so the driver can choose which one to
use.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car Gen2 have two DMA controllers, which are equivalent. Add
references to both dmac0 and dmac1 so the driver can choose which one to
use.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car Gen2 have two DMA controllers, which are equivalent. Add
references to both dmac0 and dmac1 so the driver can choose which one to
use.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car Gen2 have two DMA controllers, which are equivalent. Add
references to both dmac0 and dmac1 so the driver can choose which one to
use.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Make the unit names for the cpu nodes match their reg properties.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On the KZM-A9-GT development board, the RTS and CTS pins of the debug
console SCIFA4 are wired to the CP2102 Serial-USB bridge. Reflect
this in the DTS by adding the "uart-has-rtscts" property to the scifa4
device node.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On the BOCK-W development board, the RTS and CTS pins of the console
SCIF0 are wired to the "product serial" connector. Reflect this in the
DTS by adding the "uart-has-rtscts" property to the scif0 device node.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Same as on r8a7791.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Pull kbuild updates from Michal Marek:
- new option CONFIG_TRIM_UNUSED_KSYMS which does a two-pass build and
unexports symbols which are not used in the current config [Nicolas
Pitre]
- several kbuild rule cleanups [Masahiro Yamada]
- warning option adjustments for gcov etc [Arnd Bergmann]
- a few more small fixes
* 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild: (31 commits)
kbuild: move -Wunused-const-variable to W=1 warning level
kbuild: fix if_change and friends to consider argument order
kbuild: fix adjust_autoksyms.sh for modules that need only one symbol
kbuild: fix ksym_dep_filter when multiple EXPORT_SYMBOL() on the same line
gcov: disable -Wmaybe-uninitialized warning
gcov: disable tree-loop-im to reduce stack usage
gcov: disable for COMPILE_TEST
Kbuild: disable 'maybe-uninitialized' warning for CONFIG_PROFILE_ALL_BRANCHES
Kbuild: change CC_OPTIMIZE_FOR_SIZE definition
kbuild: forbid kernel directory to contain spaces and colons
kbuild: adjust ksym_dep_filter for some cmd_* renames
kbuild: Fix dependencies for final vmlinux link
kbuild: better abstract vmlinux sequential prerequisites
kbuild: fix call to adjust_autoksyms.sh when output directory specified
kbuild: Get rid of KBUILD_STR
kbuild: rename cmd_as_s_S to cmd_cpp_s_S
kbuild: rename cmd_cc_i_c to cmd_cpp_i_c
kbuild: drop redundant "PHONY += FORCE"
kbuild: delete unnecessary "@:"
kbuild: mark help target as PHONY
...
This is a collection of a few late fixes and other misc. stuff that
had dependencies on things being merged from other trees.
The Renesas R-Car power domain handling, and the Nvidia Tegra USB
support both hand notable changes that required changing the DT binding
in a way that only provides compatibility with old DT blobs on new
kernels but not vice versa. As a consequence, the DT changes
are based on top of the driver changes and are now in this branch.
For NXP i.MX and Samsung Exynos, the changes in here depend on
other changes that got merged through the clk maintainer tree.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAV0Sse2CrR//JCVInAQJoOg//VQwAUxayKGfYVzhJjhHdYbVA9kWYczHb
wizFbF51XPylQzfGgHxEZJgdO3y2Ks54J7xaCK7oSUPEBT0rHsLQunHhq0aVQpew
1c06vEysYMkRclG7C0zN7i4gwdig+L4r6kUguTvb+nyJS3RISg0LaSoANVU65dQ5
+g4DLRrX1QlZPBXR8Fc/S1gTFXU+dO1S0oJFnK9ZZTgmsGg4GA0qC60hdsv+WeSv
uzS4FJoxSy9MzoAFqmnWIa4jBV9I1Rg5vi7dfoBbTW1XOAMpq+GVLLU+Lvso0Jqw
xWjBSmPl6l/cZ7BhpzWq8knKOsEezh5LLrVRXViVCGfTIFdlObxyHzeKcJp25V1p
mL98MBXobn9Rly9hJxyzpeNWITZ6qJYR+IQy3Lsuk5KrdZG2f4uTErtoqmYRI3Pn
vuXoi13NUeoCrHZJZ+fNUGwx5a5/hgUQXP5u+98uucQSqIVxe0cGnQVnFm84X81r
Sj/dXxFlFBZfqfE8rf1cFd+YEbKtpF13vEURAQWrnEzBmJSTu7Cp8qdA5hX5CeK4
DW9bsu5hkWwnzoC2Ox/ZQVms4aI3q8s2xuu28GEJJdCE2IUiSnag/5vhGBzd4dTm
9R69RhE9y4EOhw+0z1O0LfoKoo6YyUQa+OUNVIwEfFjcCdZiMQIdZWi2PLv4jeAR
jBBbpcWtHLo=
=I0Be
-----END PGP SIGNATURE-----
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late DT updates from Arnd Bergmann:
"This is a collection of a few late fixes and other misc stuff that had
dependencies on things being merged from other trees.
The Renesas R-Car power domain handling, and the Nvidia Tegra USB
support both hand notable changes that required changing the DT
binding in a way that only provides compatibility with old DT blobs on
new kernels but not vice versa. As a consequence, the DT changes are
based on top of the driver changes and are now in this branch.
For NXP i.MX and Samsung Exynos, the changes in here depend on other
changes that got merged through the clk maintainer tree"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits)
ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC
ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC
ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3
ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3
ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato
ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250
ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk
ARM: dts: exynos: Add DMC bus node for Exynos3250
ARM: tegra: Enable XUSB on Nyan
ARM: tegra: Enable XUSB on Jetson TK1
ARM: tegra: Enable XUSB on Venice2
ARM: tegra: Add Tegra124 XUSB controller
ARM: tegra: Move Tegra124 to the new XUSB pad controller binding
ARM: dts: r8a7794: Use SYSC "always-on" PM Domain
ARM: dts: r8a7793: Use SYSC "always-on" PM Domain
...
Pull drm updates from Dave Airlie:
"Here's the main drm pull request for 4.7, it's been a busy one, and
I've been a bit more distracted in real life this merge window. Lots
more ARM drivers, not sure if it'll ever end. I think I've at least
one more coming the next merge window.
But changes are all over the place, support for AMD Polaris GPUs is in
here, some missing GM108 support for nouveau (found in some Lenovos),
a bunch of MST and skylake fixes.
I've also noticed a few fixes from Arnd in my inbox, that I'll try and
get in asap, but I didn't think they should hold this up.
New drivers:
- Hisilicon kirin display driver
- Mediatek MT8173 display driver
- ARC PGU - bitstreamer on Synopsys ARC SDP boards
- Allwinner A13 initial RGB output driver
- Analogix driver for DisplayPort IP found in exynos and rockchip
DRM Core:
- UAPI headers fixes and C++ safety
- DRM connector reference counting
- DisplayID mode parsing for Dell 5K monitors
- Removal of struct_mutex from drivers
- Connector registration cleanups
- MST robustness fixes
- MAINTAINERS updates
- Lockless GEM object freeing
- Generic fbdev deferred IO support
panel:
- Support for a bunch of new panels
i915:
- VBT refactoring
- PLL computation cleanups
- DSI support for BXT
- Color manager support
- More atomic patches
- GEM improvements
- GuC fw loading fixes
- DP detection fixes
- SKL GPU hang fixes
- Lots of BXT fixes
radeon/amdgpu:
- Initial Polaris support
- GPUVM/Scheduler/Clock/Power improvements
- ASYNC pageflip support
- New mesa feature support
nouveau:
- GM108 support
- Power sensor support improvements
- GR init + ucode fixes.
- Use GPU provided topology information
vmwgfx:
- Add host messaging support
gma500:
- Some cleanups and fixes
atmel:
- Bridge support
- Async atomic commit support
fsl-dcu:
- Timing controller for LCD support
- Pixel clock polarity support
rcar-du:
- Misc fixes
exynos:
- Pipeline clock support
- Exynoss4533 SoC support
- HW trigger mode support
- export HDMI_PHY clock
- DECON5433 fixes
- Use generic prime functions
- use DMA mapping APIs
rockchip:
- Lots of little fixes
vc4:
- Render node support
- Gamma ramp support
- DPI output support
msm:
- Mostly cleanups and fixes
- Conversion to generic struct fence
etnaviv:
- Fix for prime buffer handling
- Allow hangcheck to be coalesced with other wakeups
tegra:
- Gamme table size fix"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1050 commits)
drm/edid: add displayid detailed 1 timings to the modelist. (v1.1)
drm/edid: move displayid validation to it's own function.
drm/displayid: Iterate over all DisplayID blocks
drm/edid: move displayid tiled block parsing into separate function.
drm: Nuke ->vblank_disable_allowed
drm/vmwgfx: Report vmwgfx version to vmware.log
drm/vmwgfx: Add VMWare host messaging capability
drm/vmwgfx: Kill some lockdep warnings
drm/nouveau/gr/gf100-: fix race condition in fecs/gpccs ucode
drm/nouveau/core: recognise GM108 chipsets
drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup
drm/nouveau/gr/gk104-: share implementation of ppc exception init
drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx
drm/nouveau/bios/pll: check BIT table version before trying to parse it
drm/nouveau/bios/pll: prevent oops when limits table can't be parsed
drm/nouveau/volt/gk104: round up in gk104_volt_set
drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()
drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init()
drm/nouveau/fb/gf100-: allocate mmu debug buffers
drm/nouveau/fb: allow chipset-specific actions for oneinit()
...
Pull ARM updates from Russell King:
"Changes included in this pull request:
- revert pxa2xx-flash back to using ioremap_cached() and switch
memremap() to use arch_memremap_wb()
- remove pci=firmware command line argument handling
- remove unnecessary arm_dma_set_mask() implementation, the generic
implementation will do for ARM
- removal of the ARM kallsyms "hack" to work around mode switching
veneers and vectors located below PAGE_OFFSET
- tidy up build system output a little
- add L2 cache power management DT bindings
- remove duplicated local_irq_disable() in reboot paths
- handle AMBA primecell devices better at registration time with PM
domains (needed for Samsung SoCs)
- ARM specific preparation to support Keystone II kexec"
* 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8567/1: cache-uniphier: activate ways for secondary CPUs
ARM: 8570/2: Documentation: devicetree: Add PL310 PM bindings
ARM: 8569/1: pl2x0: Add OF control of cache power management
ARM: 8568/1: reboot: remove duplicated local_irq_disable()
ARM: 8566/1: drivers: amba: properly handle devices with power domains
ARM: provide arm_has_idmap_alias() helper
ARM: kexec: remove 512MB restriction on kexec crashdump
ARM: provide improved virt_to_idmap() functionality
ARM: kexec: fix crashkernel= handling
ARM: 8557/1: specify install, zinstall, and uinstall as PHONY targets
ARM: 8562/1: suppress "include/generated/mach-types.h is up to date."
ARM: 8553/1: kallsyms: remove --page-offset command line option
ARM: 8552/1: kallsyms: remove special lower address limit for CONFIG_ARM
ARM: 8555/1: kallsyms: ignore ARM mode switching veneers
ARM: 8548/1: dma-mapping: remove arm_dma_set_mask()
ARM: 8554/1: kernel: pci: remove pci=firmware command line parameter handling
ARM: memremap: implement arch_memremap_wb()
memremap: add arch specific hook for MEMREMAP_WB mappings
mtd: pxa2xx-flash: switch back from memremap to ioremap_cached
ARM: reintroduce ioremap_cached() for creating cached I/O mappings
Enumeration
Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger)
Provide common functions for ECAM mapping (Jayachandran C)
Allow all PCIe services on non-ACPI host bridges (Jon Derrick)
Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick)
Widen portdrv service type from 4 bits to 8 bits (Keith Busch)
Add Downstream Port Containment portdrv service type (Keith Busch)
Add Downstream Port Containment driver (Keith Busch)
Resource management
Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson)
Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas)
alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas)
Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava)
Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava)
Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki)
PCI device hotplug
acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter)
Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner)
Virtualization
Mark Intel i40e NIC INTx masking as broken (Alex Williamson)
Reverse standard ACS vs device-specific ACS enabling (Alex Williamson)
Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson)
IOMMU
Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas)
Move informational printk to pci_add_dma_alias() (Bjorn Helgaas)
Add support for multiple DMA aliases (Jacek Lawrynowicz)
Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz)
Thunderbolt
Fix double free of drom buffer (Andreas Noever)
Add Intel Thunderbolt device IDs (Lukas Wunner)
Fix typos and magic number (Lukas Wunner)
Support 1st gen Light Ridge controller (Lukas Wunner)
Generic host bridge driver
Use generic ECAM API (Jayachandran C)
Cavium ThunderX host bridge driver
Don't clobber read-only bits in bridge config registers (David Daney)
Use generic ECAM API (Jayachandran C)
Freescale i.MX6 host bridge driver
Use enum instead of bool for variant indicator (Andrey Smirnov)
Implement reset sequence for i.MX6+ (Andrey Smirnov)
Factor out ref clock enable (Bjorn Helgaas)
Add initial imx6sx support (Christoph Fritz)
Add reset-gpio-active-high boolean property to DT (Petr Štetiar)
Add DT property for link gen, default to Gen1 (Tim Harvey)
dts: Specify imx6qp version of PCIe core (Andrey Smirnov)
dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar)
Marvell Armada host bridge driver
add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni)
Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni)
Marvell MVEBU host bridge driver
Constify mvebu_pcie_pm_ops structure (Jisheng Zhang)
Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang)
Microsoft Hyper-V host bridge driver
Report resources release after stopping the bus (Vitaly Kuznetsov)
Add explicit barriers to config space access (Vitaly Kuznetsov)
Renesas R-Car host bridge driver
Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann)
Synopsys DesignWare host bridge driver
Remove incorrect RC memory base/limit configuration (Gabriele Paoloni)
Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang)
TI Keystone host bridge driver
Add error IRQ handler (Murali Karicheri)
Remove unnecessary goto statement (Murali Karicheri)
Miscellaneous
Fix spelling errors (Colin Ian King)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXPdMKAAoJEFmIoMA60/r8ofUP/j0zyzn24f0xY1wLeGJ8geB9
6nHk1QdkPqwCiXZahEcnA5HMlFCl/ciWjjsoCqeMlvS6NXkX13KGcc1UGZszelTs
68bFhyBKqcoMn0it53vBjBXnkfA64PmlxwY/T1ADulxL8amFOCpjjBruZ8pxJ/U7
r6uHvhxUxHCRF7hMmpNN+V5XWXWCFFkPJZvxOTkglaxkbdnhZ0h0Xz9p9liUvjPH
mBE72E3WUjiGogXGoLAPDclz1NI6rhRVUyTRcQ8EWaOwitV3OqMuDpAwoWH62ZZJ
iorCkQk2/eKfN6OA6UgZh4loauAty0FeoZDX7ZVftQr52IpAzRUVx1oAq0J7u4ga
KRX37mlK/53UcMZyv9Lz2kw4KjaLLELiInzcF+w3Bbov4UhY4/sL5uh9eNMFvSUU
iZuY+GFlceL0P6wZuVKU5U8td/CyBr3f5vY/3htxuYHE1xJq4FkL92JpWRCvwpVr
YdCzocscw73Yn8ZMplt8DX2fyabN7HyGezbQISrDDGY6T0ZDsRRKc6FFAt4xF+ta
JJ+bcY8OcXtxGw6SXtrscL7vNXdR7Zg1HBSa8Sl/CopCdW9zs0VdwgFoxgORcWDT
mphIgt57DMzaiUUaV8FRQz0mSLixnAcCEfGjVbAEEw3SP5ZChGfS3EknKb/CPRyk
TD6I3pXTBhTWXd8aS113
=68Iz
-----END PGP SIGNATURE-----
Merge tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"Enumeration:
- Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger)
- Provide common functions for ECAM mapping (Jayachandran C)
- Allow all PCIe services on non-ACPI host bridges (Jon Derrick)
- Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick)
- Widen portdrv service type from 4 bits to 8 bits (Keith Busch)
- Add Downstream Port Containment portdrv service type (Keith Busch)
- Add Downstream Port Containment driver (Keith Busch)
Resource management:
- Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson)
- Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas)
- alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas)
- Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava)
- Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava)
- Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki)
PCI device hotplug:
- acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter)
- Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner)
Virtualization:
- Mark Intel i40e NIC INTx masking as broken (Alex Williamson)
- Reverse standard ACS vs device-specific ACS enabling (Alex Williamson)
- Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson)
IOMMU:
- Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas)
- Move informational printk to pci_add_dma_alias() (Bjorn Helgaas)
- Add support for multiple DMA aliases (Jacek Lawrynowicz)
- Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz)
Thunderbolt:
- Fix double free of drom buffer (Andreas Noever)
- Add Intel Thunderbolt device IDs (Lukas Wunner)
- Fix typos and magic number (Lukas Wunner)
- Support 1st gen Light Ridge controller (Lukas Wunner)
Generic host bridge driver:
- Use generic ECAM API (Jayachandran C)
Cavium ThunderX host bridge driver:
- Don't clobber read-only bits in bridge config registers (David Daney)
- Use generic ECAM API (Jayachandran C)
Freescale i.MX6 host bridge driver:
- Use enum instead of bool for variant indicator (Andrey Smirnov)
- Implement reset sequence for i.MX6+ (Andrey Smirnov)
- Factor out ref clock enable (Bjorn Helgaas)
- Add initial imx6sx support (Christoph Fritz)
- Add reset-gpio-active-high boolean property to DT (Petr Štetiar)
- Add DT property for link gen, default to Gen1 (Tim Harvey)
- dts: Specify imx6qp version of PCIe core (Andrey Smirnov)
- dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar)
Marvell Armada host bridge driver:
- add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni)
- Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni)
Marvell MVEBU host bridge driver:
- Constify mvebu_pcie_pm_ops structure (Jisheng Zhang)
- Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang)
Microsoft Hyper-V host bridge driver:
- Report resources release after stopping the bus (Vitaly Kuznetsov)
- Add explicit barriers to config space access (Vitaly Kuznetsov)
Renesas R-Car host bridge driver:
- Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann)
Synopsys DesignWare host bridge driver:
- Remove incorrect RC memory base/limit configuration (Gabriele Paoloni)
- Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang)
TI Keystone host bridge driver:
- Add error IRQ handler (Murali Karicheri)
- Remove unnecessary goto statement (Murali Karicheri)
Miscellaneous:
- Fix spelling errors (Colin Ian King)"
* tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits)
PCI: Disable all BAR sizing for devices with non-compliant BARs
x86/PCI: Mark Broadwell-EP Home Agent 1 as having non-compliant BARs
PCI: Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs
PCI, of: Move PCI I/O space management to PCI core code
PCI: generic, thunder: Use generic ECAM API
PCI: Provide common functions for ECAM mapping
PCI: hv: Add explicit barriers to config space access
PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit
PCI: Add Downstream Port Containment driver
PCI: Add Downstream Port Containment portdrv service type
PCI: Widen portdrv service type from 4 bits to 8 bits
PCI: designware: Remove incorrect RC memory base/limit configuration
PCI: hv: Report resources release after stopping the bus
ARM: dts: imx6qp: Specify imx6qp version of PCIe core
PCI: imx6: Implement reset sequence for i.MX6+
PCI: imx6: Use enum instead of bool for variant indicator
PCI: thunder: Don't clobber read-only bits in bridge config registers
thunderbolt: Fix double free of drom buffer
PCI: rcar: Select PCI_MSI_IRQ_DOMAIN
PCI: armada: Add driver for Marvell Armada 7K/8K PCIe controller
...
This time round the update brings in following changes:
- New tegra driver for ADMA device
- Support for Xilinx AXI Direct Memory Access Engine and Xilinx AXI Central
Direct Memory Access Engine and few updates to this driver.
- New cyclic capability to sun6i and few updates.
- Slave-sg support in bcm2835.
- Updates to many drivers like designware, hsu, mv_xor, pxa, edma,
qcom_hidma & bam.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXPVb9AAoJEHwUBw8lI4NHnDQP/AtUYBTI8XD68iGh5eCTEtwO
3dNgUmOvIAIl0ZtVKex3b7j2S52IN7EDv44QmsmvMHgjvaupUsZ/HeIHgoI37y39
/qoRkyiG75ht68BrNjKcpJLsOyxaAUT1tMyf/bYXlDW8O7qEPtRDhuvUB+i+s3RX
ljNOQXH2WaQTJrNeZxkvbp92iGiu3j7AKyCh9MJ4gnF4y2oA1bFp++QpH5qcBOTp
0nccs7pgDQhw2nzHmhYbEmvgcKPrPQi+67U7eIed7n7wiThAIXIEbZl6AYk9kFaK
gSa4/N3fwnZc9TFR5O6qdanvsYdW4JC1P5Ydm0opExo3lgtMckQ3sGKFIwTG8eU4
YiyQE1uVHRqT82zxPCecTF+I0Y4g68oCJURrHED6kxKGA5a8ojU04aGebXDiNKlp
FEDceEC5ch7ZPw8CCTola+TYpf9Vni3g7OkrdkPY9cX/aDXDROghTCg9jgPJ2aL/
oai5axc5gQMEFzHPaEwFp45tgXw7IvIzaqYHmiWE11fsRbGUSB2HAwBXytI9ReC0
XTMBvc08YvisbIpIR29T0R5cerzdDuK9bXxYHHHOeUFg0t8R8UGaP1UxEQCVmLsT
AIrHupoccPJ7IAn0h6mShtZ2yzBfj3rU4tEMJR/Oj/VvjW3gKbbZ5XVi92fOurBs
xjn9uBBZ/Pt9hgprwlmY
=0Sy7
-----END PGP SIGNATURE-----
Merge tag 'dmaengine-4.7-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul:
"This time round the update brings in following changes:
- new tegra driver for ADMA device
- support for Xilinx AXI Direct Memory Access Engine and Xilinx AXI
Central Direct Memory Access Engine and few updates to this driver
- new cyclic capability to sun6i and few updates
- slave-sg support in bcm2835
- updates to many drivers like designware, hsu, mv_xor, pxa, edma,
qcom_hidma & bam"
* tag 'dmaengine-4.7-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (84 commits)
dmaengine: ioatdma: disable relaxed ordering for ioatdma
dmaengine: of_dma: approximate an average distribution
dmaengine: core: Use IS_ENABLED() instead of checking for built-in or module
dmaengine: edma: Re-evaluate errors when ccerr is triggered w/o error event
dmaengine: qcom_hidma: add support for object hierarchy
dmaengine: qcom_hidma: add debugfs hooks
dmaengine: qcom_hidma: implement lower level hardware interface
dmaengine: vdma: Add clock support
Documentation: DT: vdma: Add clock support for dmas
dmaengine: vdma: Add config structure to differentiate dmas
MAINTAINERS: Update Tegra DMA maintainers
dmaengine: tegra-adma: Add support for Tegra210 ADMA
Documentation: DT: Add binding documentation for NVIDIA ADMA
dmaengine: vdma: Add Support for Xilinx AXI Central Direct Memory Access Engine
Documentation: DT: vdma: update binding doc for AXI CDMA
dmaengine: vdma: Add Support for Xilinx AXI Direct Memory Access Engine
Documentation: DT: vdma: update binding doc for AXI DMA
dmaengine: vdma: Rename xilinx_vdma_ prefix to xilinx_dma
dmaengine: slave means at least one of DMA_SLAVE, DMA_CYCLIC
dmaengine: mv_xor: Allow selecting mv_xor for mvebu only compatible SoC
...
Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons. For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to
get done.
Finally, reset controller handling as always gets merged through here
as well.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXkGCrR//JCVInAQKb5BAAv2HuJ/tDjC8nNfYi0/aIt4uaRfRWE84t
+nIpdKl/pB9AQo+HdG9WNihHs2GN44PdQRrDZ1enQX8nvTzc+dUl0AI1GZmUDpF/
zCV2UJ39HMZcEPwf8lZk9X/JP4VOkJDM5pDgNZnnqdvkq0oqtKzmh0Kt6m2g6fIS
LR3FVtCRxJDeT+pT+EpoN4jpW0cb3mjTWbn/a8Ar3BH07KBA3U22MVJhHArLjS30
/aXP+AkgdvlgmBher5z44N6Qd/KOLn78rnE4LCRC4FwSCqA+qqPJQNGNblV5MHjE
s5CYTqlihqLiGapqJ4zGBhmqj0XU/3kFVboGqYlTGjzMkOFgjddTpMdfkBUoG5oJ
UubJ51zzSLXTcMwILGNXVls4YjJRKwNH7jeSjuMqpWrAYP4qBcMn/HQ1GqUjkNv+
yWkheHiLDYgYkIDOBDuFUtJ7OXiVumGGxIE+r2K/sXeNI7gFcDxFExMIo11vPAWP
WJ8ydTchyb/RUQbzhjEXhoIeCZwXQfe9s11qsyFQDCZLleWYQGs3gFKdEI1E7+BE
oe018BSP+uaVXdaV18Ne4smwzydLAU9/ieUoO45PAUSN2reV4lWhFTlNiiiMd3Id
IWoYwpxqP2VW9zJvLz6QGF/P+3cZ00m/1lecJCKHHPBmbUijCHWJmgLT73AdSXmR
YIJ2UM5QMiY=
=x+iD
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons.
For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to get
done.
Finally, reset controller handling as always gets merged through here
as well"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
arm-ccn: Enable building as module
soc/tegra: pmc: Add generic PM domain support
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
drivers: firmware: psci: make two helper functions inline
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
...
These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as well,
and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and
the Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition"
is added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7)
are supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported, which
in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet Processor",
following the IPQ806x that is used in many high-end WiFi routers. This one
integrates two ath10k wifi radios that were previously on separate chips.
Other boards that got added for existing chips are:
- On Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
- On Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
- On NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and
SoloX Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
- On Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
- On Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
- On Rockchips platform:
- mqmaker MiQi single-board computer
- On Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
- On Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC
single board computers
Across many platforms, bug fixes went in to address warnings that
dtc now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router),
Ti Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXhGCrR//JCVInAQJXjhAA1bV0fbREflRQrlXdMb4rNesygH8ikaja
gOYHE1yO+tSitHZ5g4w2yAFIEK7DzFdO5rz53BEINZfLCj4LO4495/z9ipqZQEjC
rw5IL89jAn8x4wF791SHjLpmmNRbHN2vjLcsX3ShJIHckip/jIbiU2aFJuohA0TU
jxpPAZzhaKsu/rDaVzHMS/im4LbZQ2qI3DxUUn6Kt8c468i4Ns22sowqSjh2xO/X
YiwHD0eAvDrySfMGiNT82wMMTfMF2KfXZGB885isMP4hK8OIDrOnI5nM9rxyRFfu
N14o0+tN1S2JzBHnqOOpib6JxYyCVr+QTjsKGAyR5X1mGINIhX8f1gy0EvFFxXKT
rIATc5VTeo4gc1quij8RVtDEp/4iJ8GspH4WGMh1F8tjTe+WUxeSMkxdf6/QY1+Q
vZKT0KKihoJQu1xI62NjnaRbfbhwx2BSWehwgXVd72lD19dG5LPw+Nj6/8+Bgouc
YxJahgkB9MMtHoNp8huMg33Gr9a07/yVxc4CztXtf7N9phd0nEXov2iM1aBgazLU
8IVd3Z9lZA+4iGVcj3oBJ6K1IkiCmg2qoNyF6tcInR5vPjKLECuxyuZw8VKuUuHD
k/s/rymSGRlDN5i4F0h0r4MvQ9gkYfwk8xiL3ofmwYHwo103Q7b7Cw55XRk88EoB
appd5QA+pko=
=Nx46
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as
well, and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and the
Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition" is
added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are
supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported,
which in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet
Processor", following the IPQ806x that is used in many high-end WiFi
routers. This one integrates two ath10k wifi radios that were
previously on separate chips.
Other boards that got added for existing chips are:
Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX
Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
Rockchips platform:
- mqmaker MiQi single-board computer
Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board
computers
Across many platforms, bug fixes went in to address warnings that dtc
now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti
Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits)
ARM: dts: tango4: Import watchdog node
ARM: dts: tango4: Update cpus node for cpufreq
ARM: dts: tango4: Update DT to match clk driver
ARM: dts: tango4: Initial thermal support
arm/dst: Add Aspeed ast2500 device tree
arm/dts: Add Aspeed ast2400 device tree
ARM: sun7i: dt: Add pll3 and pll7 clocks
ARM: dts: sunxi: Add a olinuxino-lime2-emmc
ARM: dts: at91: sama5d4: add trng node
ARM: dts: at91: sama5d3: add trng node
ARM: dts: at91: sama5d2: add trng node
ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
ARM: sun4i: dt: Add pll3 and pll7 clocks
ARM: sun5i: chip: Enable the TV Encoder
ARM: sun5i: r8: Add display blocks to the DTSI
ARM: sun5i: a13: Add display and TCON clocks
ARM: dts: ux500: configure the accelerometers open drain
ARM: mx5: dts: Enable USB OTG on M53EVK
ARM: dts: imx6ul-14x14-evk: Add audio support
ARM: dts: imx6qdl: Remove unneeded unit-addresses
...
Traditionally we've had two separate branches for cleanups and non-critical
bug fixes, but both of these got smaller with each release and the differences
are rather unclear now, so it seems more appropriate to have a combined
branch.
The most notably change is for OMAP, which gets a small rework to simplify
handling of the AUXDATA mechanism used on machines that are not completely
DT based yet, along with other work that is used as preparation for dropping
the legacy board files.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXUWCrR//JCVInAQKLTw/7BjSDJGRMsioOJ33Bg3LP92rJHPrVttWc
vG8ULnc2QgcFTofDqgyPza2p2XuV868I7jEw4d/qDXOkeIw3ddLKjdCMzHq5r1CO
G9W+ZlIw54na/Lh/CMVdMN1M3+64K4Fmp1IiBG66OhhFY8Zg3xterSEBk8V1+00K
LNdiq6aJ1yROyHQtYbe+CtqTi/pJ9AmkBoRk4MnfgIMQyywESLlYDRkc3VXWEFXv
3MBszgujEIE1R+XozC2VMDPrirdwjJv71x/tlE0nveOcAIam57B/6e5yLnVCQHpu
UCK8x39cj/PwWlwoBExKXNMwbTKCy03AhXjkxDmJ3bD+7FK1sEtFzcyBiwOjiZQq
CBttcwqGbtrGIsLbrbpEh9hAWbWNaparbChWW7RBC1sBIG11zd0HVYjzsKppmXsZ
3LUl4KbkGw+grKa+AnsM+e9vGu+J+2vIh9sDVvs0dbXCZp5ILgExbnurxMwbg/J1
QVycR8cjS2vs+79tTfakgVCSADvpdNbMcnYLz9GM5IS9j8bOlOhv1OhKtMFOue6y
zCIZyffDJqhU0M3xk78JQSx3Rt4FacDjYJdlqN27AQ125QT2kYmfGR2x/en52ARS
9QwauVp+5WcaoySdWi4TCpOMHV7FP40zhJ3G7TXZARaBccN0kCTfdF/QstLhAa0L
u+TVN4A1cBw=
=au7y
-----END PGP SIGNATURE-----
Merge tag 'armsoc-cleanups-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups and fixes from Arnd Bergmann:
"Traditionally we've had two separate branches for cleanups and
non-critical bug fixes, but both of these got smaller with each
release and the differences are rather unclear now, so it seems more
appropriate to have a combined branch.
The most notable change is for OMAP, which gets a small rework to
simplify handling of the AUXDATA mechanism used on machines that are
not completely DT based yet, along with other work that is used as
preparation for dropping the legacy board files"
* tag 'armsoc-cleanups-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: exynos: Add interrupt line to MAX8997 PMIC on exynos4210-trats
ARM: dts: exynos: Fix regulator name to avoid forbidden character on exynos4210-trats
ARM: dts: exynos: Add MFC memory banks for Peach boards
ARM: OMAP2+: n900 needs MMC slot names for legacy user space
ARM: OMAP2+: Add more functions to pwm pdata for ir-rx51
ARM: debug: remove extraneous DEBUG_HI3716_UART option
ARM: OMAP2+: Simplify auxdata by using the generic match
of/platform: Allow secondary compatible match in of_dev_lookup
ARM: davinci: use IRQCHIP_DECLARE for cp_intc
ARM: davinci: remove unused DA8XX_NUM_UARTS
ARM: davinci: simplify call to of populate
ARM: DaVinci USB: removed deprecated properties from MUSB config
ARM: rockchip: Fix use of plain integer as NULL pointer
ARM: realview: hide unused 'pmu_device' object
soc: versatile: dynamically detect RealView HBI numbers
Pull crypto update from Herbert Xu:
"API:
- Crypto self tests can now be disabled at boot/run time.
- Add async support to algif_aead.
Algorithms:
- A large number of fixes to MPI from Nicolai Stange.
- Performance improvement for HMAC DRBG.
Drivers:
- Use generic crypto engine in omap-des.
- Merge ppc4xx-rng and crypto4xx drivers.
- Fix lockups in sun4i-ss driver by disabling IRQs.
- Add DMA engine support to ccp.
- Reenable talitos hash algorithms.
- Add support for Hisilicon SoC RNG.
- Add basic crypto driver for the MXC SCC.
Others:
- Do not allocate crypto hash tfm in NORECLAIM context in ecryptfs"
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (77 commits)
crypto: qat - change the adf_ctl_stop_devices to void
crypto: caam - fix caam_jr_alloc() ret code
crypto: vmx - comply with ABIs that specify vrsave as reserved.
crypto: testmgr - Add a flag allowing the self-tests to be disabled at runtime.
crypto: ccp - constify ccp_actions structure
crypto: marvell/cesa - Use dma_pool_zalloc
crypto: qat - make adf_vf_isr.c dependant on IOV config
crypto: qat - Fix typo in comments
lib: asn1_decoder - add MODULE_LICENSE("GPL")
crypto: omap-sham - Use dma_request_chan() for requesting DMA channel
crypto: omap-des - Use dma_request_chan() for requesting DMA channel
crypto: omap-aes - Use dma_request_chan() for requesting DMA channel
crypto: omap-des - Integrate with the crypto engine framework
crypto: s5p-sss - fix incorrect usage of scatterlists api
crypto: s5p-sss - Fix missed interrupts when working with 8 kB blocks
crypto: s5p-sss - Use common BIT macro
crypto: mxc-scc - fix unwinding in mxc_scc_crypto_register()
crypto: mxc-scc - signedness bugs in mxc_scc_ablkcipher_req_init()
crypto: talitos - fix ahash algorithms registration
crypto: ccp - Ensure all dependencies are specified
...
A host device that supports write protection should refuse to write to
an SD card that is designated read-only when write-protect is set. This
is an optional feature of the SD specification.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix SD card remove/insert detection by adding the correct card-detect
pin. All IGEP OMAP3 based boards use the same card-detect pin.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Palmas Regulator is an exception and does not follow the standard
"vin-supply" common definitions for all regulators, as a result of this,
the input supplies are not reported to regulator framework, with the
obvious result of not being appropriately mapped. Fix the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add dma channel information to the gpmc.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch disable mmc nodes by default in the dm814x.dtsi and
enable only when needed on a given dts
v2: Disable un-used mmc nodes on the related boards dts files
instead of from the included SOC dts
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This will clean-up warnings at boot, since either that or cd-gpio{,s} are
mandated by the dts specification
of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@47810000[0]'
of_get_named_gpiod_flags: can't parse 'cd-gpio' property of node '/ocp/mmc@47810000[0]'
v2: use the generic non-removable instead of ti,non-removable
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The padconf register WAKEUP_EN is now handled in a generic way using
Linux wakeirqs where pinctrl-single toggles the WAKEUP_EN bit when
a wakeirq is enabled or disabled.
At least omap5 gets confused if the WAKEUP_EN bit is set and the pin
is not claimed as a wakeirq. The end result is that wakeirqs don't
work properly as there is nothing handling the wakeirq.
So let's just remove the WAKEUP_EN usage from dts files.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Playing audio works on omap5-uevm, but produces an "Unhandled fault:
imprecise external abort (0x1406) at 0x00000000" error on igepv5.
Looks like the twl6040 audpwron GPIO pin is different for these
boards. Let's fix the issue by configuring the audpwron in the
board specific dts file.
Cc: Agustí Fontquerni <af@iseebcn.com>
Cc: Eduard Gavin <egavin@iseebcn.com>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujflausi@ti com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- fix a regression on the clock subsystem while switching to syscon/regmap
due to a stricter check of the register map.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJXM0NyAAoJEAf03oE53VmQ0IwIAI05Acjbko78+Hm/kWHlbJrx
5BLpJqTGLavbjbPjFnElKTr1c8m7Bgd6HNcat/2z9ZNh8/82FXyGOjYSp4W0BE9V
ovyD/lz/2fZyom4YLJjdCnVkwIV1pKHS+uNxy5zXMY2gJfz4VRtUh54H3ArdaQOE
LOKvrVl9bGorLbzbTpH0rSeKqQ1XFGPDlp1A3GUtI6646RWd5Eqe6zDzgQUwWJis
AR+sAcsqVb+IWY5rZwMyL0oZ1kjnEw4tihDTy+G+eBXRdRMYqSgEt8dBz65T3VYi
5EFXLuLjknnf3qVaxEU+og6kiJkefTYdB4I7xVR+dKbcILBSSqdHxlG1HmNkBQ4=
=CF/9
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Merge "Second AT91 fix PR for 4.6" from Nicolas Ferre:
- fix a regression on the clock subsystem while switching to syscon/regmap
due to a stricter check of the register map.
* tag 'at91-fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sam9x5: Fix the memory range assigned to the PMC
The memory range assigned to the PMC (Power Management Controller) was
not including the PMC_PCR register which are used to control peripheral
clocks.
This was working fine thanks to the page granularity of ioremap(), but
started to fail when we switched to syscon/regmap, because regmap is
making sure that all accesses are falling into the reserved range.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reported-by: Richard Genoud <richard.genoud@gmail.com>
Tested-by: Richard Genoud <richard.genoud@gmail.com>
Fixes: 863a81c3be ("clk: at91: make use of syscon to share PMC registers in several drivers")
Cc: <stable@vger.kernel.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
v4.7:
1. Add bus nodes for Exynos3250, Exynos4x12, Exynos4210 and Exynos542x.
2. Split out common PPMU (Performance Monitoring Unit) nodes into separate
DTSI. The PPMU provides performance data for devfreq.
3. Add NoCP (Network on Chip Probe) node for Exynos542x. On this SoC, like PPMU
on older designs, provides performance data for devfreq.
4. Enable DFVS (Dynamic Voltage and Frequency Scaling) on boards:
- Exynos3250 Rinato,
- Exynos4412 Odroid-X/X2/U3 and Trats2,
- Exynos5422 Odroid XU3/XU3-Lite/XU4.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXKfGRAAoJEME3ZuaGi4PXY/MQAJAjXSYPc2lj53BcFhZVVuel
J+zITvarTDdV/CF01SMyYA760OEVYE7eZ59kQpkyiEy018/Wle63ortKco0UQprW
JLRcYUPjvtByCmhgX8yvboYiS0Q5xLLVi9mMg802tR3ccxnJcZmZRPIwBRTmn7Nr
P/WpSoEM3E5yZzqTu1AuvmqW7fys1kCDTPcaFH3OZNnEz+r/6KAgzhip95ihIKq0
DT7dFPFI2F90p+ozcS8O8G/LLFwyOjPfVi0G2hOPmo8mvvizorLiHU2P78EgG+L5
UyXrXHWvgaUtc5kiE+naH6ihNQuz1hSW4IfIzvLTls1n0e0Sz4O130h96e0XgMSa
c0kmHk0rFC8LNqeO4Ly+ojPHiXCUU+8DMF0RNMXMJdnH+jGlbzkzNnUB7csaH4xz
wVD0gSBBl/ydm+iFJ6r89zLVYN8mX3MXBNUBfarnZe+h2i2Fb/RmO6l8VWVVh2dP
576LLCqTOx0BdhIIqeK3Wv4edBiyIPTQUjadksat6XwEfg7WtNTIv2Zg7As3uXYc
hjRhxQ6rj48NBjxz5NT/OV9uHuKWoMaJ/x222UbtUTXV0hRufae9sb1dne8kuYag
hYChIYHu3t3DR5EIrAEEp1vHUglf9luUyDg01o7Fq63JK2D/NruAeWSm/PmCvI03
1Xh2eAVmNePpmL+qpRcT
=pAOJ
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-devfreq-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/late
Merge "ARM: dts: exynos: Devfreq for v4.7: from Krzysztof Kozłowski:
Topic branch for Device Tree changes adding new generic devfreq driver, for
v4.7:
1. Add bus nodes for Exynos3250, Exynos4x12, Exynos4210 and Exynos542x.
2. Split out common PPMU (Performance Monitoring Unit) nodes into separate
DTSI. The PPMU provides performance data for devfreq.
3. Add NoCP (Network on Chip Probe) node for Exynos542x. On this SoC, like PPMU
on older designs, provides performance data for devfreq.
4. Enable DFVS (Dynamic Voltage and Frequency Scaling) on boards:
- Exynos3250 Rinato,
- Exynos4412 Odroid-X/X2/U3 and Trats2,
- Exynos5422 Odroid XU3/XU3-Lite/XU4.
* tag 'samsung-dt-devfreq-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC
ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC
ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3
ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3
ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato
ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250
ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk
ARM: dts: exynos: Add DMC bus node for Exynos3250
clk: samsung: exynos542x: Add the clock id for ACLK
dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC
- Add LCDIF and FlexCAN device support for i.MX7D
- New support i.MX7D based Nitrogen7 board from Boundary Devices
- Add display support for vf610-colibri board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXKLuLAAoJEFBXWFqHsHzOZ88IAKb4kS4KN0fOdNLMyE7wwi9Y
JAfKZEaOASwifm8LZBvC5F3DrLvmxykbbhNiIOFlr0var+wK15HDJNgbTbWDtcUU
vS4Jag5UrMXdd7wW/S7Lik2TeEKylt1P3asrrvxvVLkQM7xKeixS3n0LpqzX+RQ1
rOdPv8aSFewX2C7EaMoXPwoJGNXYvA+cge6pIdpO+EHpTiK3PDkEE9C3Vv34I8R7
XQxlKbqoXBxcYXBWseyq57QKQVsnRcvIPTU4HSMJAqJxiMPbgR6KIVAupzjDmtKM
aVyXoZTayFhBrdC8l7o3YwOjqHD9Rov7rgEmS2a9qIrkiqxBz/TjsfpBQT23+X0=
=t+hk
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-clkdep-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/late
Merge "The i.MX device tree updates with new clocks for 4.7" from Shawn Guo:
- Add LCDIF and FlexCAN device support for i.MX7D
- New support i.MX7D based Nitrogen7 board from Boundary Devices
- Add display support for vf610-colibri board
* tag 'imx-dt-clkdep-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: vf610-colibri: enable display controller
ARM: dts: vf610: add display nodes
ARM: dts: imx: add Boundary Devices Nitrogen7 board
ARM: dts: imx7d: add flexcan support
ARM: dts: imx7d: add lcdif support
clk: imx: vf610: fix whitespace in vf610-clock.h
clk: imx: vf610: add TCON ipg clock
clk: imx: vf610: fix DCU clock tree
clk: imx: add ckil clock for i.MX7
clk: imx: vf610: add suspend/resume support
clk: imx: vf610: add WKPU unit
clk: imx: vf610: leave DDR clock on
clk: imx: clk-gate2: allow custom gate configuration
clk: imx6sx: Register SAI clocks as shared clocks
The device driver was added in v4.5 by commit dca536c433
("watchdog: add support for Sigma Designs SMP86xx/SMP87xx")
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This platform will use the new generic platdev driver.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit fefe0535b7 ("clk: tango4: improve clkgen driver") added
support for USB and SDIO clocks.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Define the CPU temperature sensor, and critical trip point.
Commit 799d71da471c ("add temperature sensor support for tango SoC")
added the device driver.
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Mostly DT patches to enable the new DRM driver on the CHIP, preliminary
support for the A10 and A20, and a support for a new variant of the Olimex
A20-Olinuxino-Lime2 featuring an eMMC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXMO43AAoJEBx+YmzsjxAgBc4P+wTT+7BaGQibEpkKOVTUXvn9
NS+r7myqiZ3Kk+V0Z1hCO/OE0RXZsf8AxRulLycULAWrmsDjoaE1D7kGb91U9Cqk
2zfSznJpEzA+Ny/l+1cLOMVyLcXudhPw5JPPeouqjZW/35z2q4vKbOhAbi39OVY7
j1nXj9sT3XwNdpU1Osx8VQpEdHQauGNnotyj8RrSiRsma+vuIfq0mzzN4D6KjBan
uSd9NLbfXxF+56s38sUjSyjwlFKWs0Smusk7uESWsbr8KQMrh5TRxEja9jFqcKN7
M+pLmazwiVRUAG3W0B8XVfqnIowcait/IZ//Umy5iGmTCpt22u42RoFB5rWGXRk7
/Ec2DhlK4UNboYDTWw85Y9g+4Ha0N49V2V+xQ9KZhUVNy442FiTi2wCvRWpoQWQT
OZQG5yMWml1jujcQtR9X2n85l5uUQniZn55Yp/XIkggcar1deWWinEQ0QFod+48W
8dm65LrMCL6T8X9awQVyfho31OUn/JUy3MODnnAuTinEsuf/6UxGGmXsg+BwdFzp
OEi1yRsDXfieeoirQjf9J7QqzOpP4X2JAx8UDcWmdUqR8dd+d6d/U5DWhLlZra4t
PJQZebHwWXQA3V+ZuLOEM2EYtD/0YWLDqanG0rgm+VjXme+ZN0rKFmiSjgHhamV4
zgaxwV7woeM1fXXm3/VN
=zrar
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.7-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Merge "Allwinner DT changes for 4.7, round 2" from Maxime Ripard:
Mostly DT patches to enable the new DRM driver on the CHIP, preliminary
support for the A10 and A20, and a support for a new variant of the Olimex
A20-Olinuxino-Lime2 featuring an eMMC
* tag 'sunxi-dt-for-4.7-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sun7i: dt: Add pll3 and pll7 clocks
ARM: dts: sunxi: Add a olinuxino-lime2-emmc
ARM: sun4i: dt: Add pll3 and pll7 clocks
ARM: sun5i: chip: Enable the TV Encoder
ARM: sun5i: r8: Add display blocks to the DTSI
ARM: sun5i: a13: Add display and TCON clocks
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJXMIEiAAoJEGt2WQeBR3CenhoP/3H9oohOLBW/mGR/nilFM4HI
17rGLe2lx8MZ6at8mnlWVzKMUKtWXoiTtCtYxyTF9sxnPSF+Z3vNuEK5V341uMds
LZ8X/jxw1uZ/4Qf6kZgqPAVqUYd9JurNgDv/bT/99u/CqaNAjx2kzMByCDwZa1vN
HlIsUwklCGeO2GZXIEMk5+FfnalB+s0+9NC6sGV/ngEuKeubSs2h3EAwRyJiQalu
aL9ZYRL7fd7W1+d7y4vaKPdBbX8GF3qTNpzmTKWjACkV0fn8G5XQM6+3Q26/ICf/
Pj/rcP0BrAPYtnbaLKNtP2dmc2YcCm7lQyEEe1dRDqDWgkeLD34bdUm4SjwGIME9
WDcX4hCUe1fFlTroNm+gXmEI1LE46L7GW5/YOhPgk9fwM6gAwkq5Gh7/O1rV9FEa
3UTEo7nlocTWbMEkc0kjekGayh/rvhCM4cdfr+3pl9PHHKA/riG0FbTv0KpvPXba
P44d5p0ceQBtqg4+tB0GwcSELJHtgdGTqyALzmdrpdCa1tNkP1NyvPzvMPBSR9oU
Xwc5Q1QwKiF39wtzCGRIwC9fskSvhG8elDFDNHoSfjNGvE525/rQL4SGEMWVmFYj
M3YSzjQSaSm44gTOKciRvxfnX5OLeqprrkWz5UBlMXTrr1L0DrLK0INvbmb/bjPU
v3GdC3pueFK98nMmZdYl
=ED1J
-----END PGP SIGNATURE-----
Merge tag 'aspeed-for-4.7-dts' of https://github.com/shenki/linux into next/dt
Merge "aspeed devicetree for 4.7" from Joel Stanley:
This device trees for a pair of Aspeed BMC SoCs and the boards that
they sit in.
* tag 'aspeed-for-4.7-dts' of https://github.com/shenki/linux:
arm/dst: Add Aspeed ast2500 device tree
arm/dts: Add Aspeed ast2400 device tree
doc/devicetree: Add Aspeed and Tyan to vendor-prefixes
- a fix for the VInCo platform: reset gpio specification for Ethernet
- addition of True Random Number Generator (TRNG) for all sama5 platforms
- trivial adjustment of TRNG register map size for at91sam9g45 family
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJXLK+JAAoJEAf03oE53VmQlDEIAJXbOrw/dKJzFxdvzqhMszC+
2IKkolGCsYposwryyNjzYkGaSZaWPRo/1TWUiOV7NkyRRACo4VN+ksPphbIQU5qg
5N5G6VGHzuGC9jJXVAV1W9aNGx0vDYd6A4SuTOOyxxy9S8lpVYXUbthaf6MWrOUB
QqMpbDtCt/g5t7RYajWYZGDARAU92UT97FQxAHGX642Ytrcvp8ITVCrL6rh6vKPE
f91okoe9fipqnp87EvgxcQITxtQUJnQcGXRluzz8m3uvQMEvQk9uxcGaJfM+TECT
G0X6yNmFLIPsxxkZxxKVMg54b5pxi9SthohFoY4GKv3JRlSJDzuHmdIqnjwIL/s=
=iZ40
-----END PGP SIGNATURE-----
Merge tag 'at91-dt3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "Third batch of DT changes for 4.7" from Nicolas Ferre:
- a fix for the VInCo platform: reset gpio specification for Ethernet
- addition of True Random Number Generator (TRNG) for all sama5 platforms
- trivial adjustment of TRNG register map size for at91sam9g45 family
* tag 'at91-dt3' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d4: add trng node
ARM: dts: at91: sama5d3: add trng node
ARM: dts: at91: sama5d2: add trng node
ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
ARM: dts: at91: VInCo: fix phy reset gpio flag
- Use generic include files
- Make accelerometers open drain on the TVK board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXKaYBAAoJEEEQszewGV1z5DsQALCXJJG5MSGZXWQOz87u0O0M
Ec+iGhcgJTgS0+E0eurbxz1ICcNd0sUs+ZA2TU5j3THkCaHNyyu1A/1UvABNAAtR
E1Z0ZxoPg68pm76UOj41sjpBf3SUhOiQKY7fBn9ur7ZnFBki06By7RHBVolUKEjB
4biUaqvRW8JrzaGTMamVXdEVGn+FXcZTsEef7TSKnydNvqYM1b6rTL49V2vijcvT
/dsrXDsdG/yx2hOPCst/hgPgw4Co9sFVE+AlkX/6fwkYqCnX7Hlhm0FkCr/WcEtn
FWGUauLvdaAa80HbAUV5SqVzffhnIb53yhgge7rGcLE0rdO0qDlgEayGldtwoSGA
05hBKK1iGhLfbA7LUnDc6kfiaSroxfD4qID+UXVJccmR0Tzh7dPzB2MuSmVRGapQ
wgBohAVz1qgTe5kYLskibuRhHiVPhjhEqeRQmIPudZmNlAzgl1E6LE0qkpi43hmT
G1soQEoc98sdqjyODf2RS6a3OF2IAqSjTPa/+O5Ma9zLAeGDXDVhuJcQjjMQ5RaS
D5UhxjqmEi2kpKrYsUHrrc1OnlhyBZ8RF4yRTRudi/eFy5lu7jd3i6lwIPE7hV7/
U2kzjUeVxK6GiymFW24xPaPstRAbIMHMJPFG+3x+VfUtwkb5nULUAoA1P5sBr4sS
MnI29wQjpryzyCtsCPix
=VITy
-----END PGP SIGNATURE-----
Merge tag 'ux500-armsoc-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "ux500 Devicetree updates for v4.7" from Linus Walleij:
- Use generic include files
- Make accelerometers open drain on the TVK board
* tag 'ux500-armsoc-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ux500: configure the accelerometers open drain
ARM: dts: ux500: use the GIC include header
ARM: dts: ux500: use the GPIO DT header
- Update display clock configuration for imx6q-b850v3 board
- Use watchdog external reset for imx6q-ba16 board
- Update operating points settings for i.MX6UL/SX/DL
- New board support: imx6ul-pico-hobbit and imx6q-marsboard
- Add SAI audio support for imx6ul-14x14-evk board
- Enable USB OTG support for M53EVK board
- A couple of fixes on DTC warnings
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXKMJoAAoJEFBXWFqHsHzOcpsH/0bFP/P36+1O8HstQ9+a/BGk
r3BMzTeC9glqVO2XXl5VDRp0v/kRHfNETZy7ML7Ghd0oE0VTBfw3j+b/0aQQUxbY
GdyGSWjrKFlzuFmBjHP/ZJg4iZfZREUAXAql6iYrXapvx8XM+Si0Ear/urK5yX9l
laVu4tszpc0ip5YwzSVOYulwt2lNhialCN/AavQ57bvb1t3pGyv5qtIQ9NNbrxJt
0ZEj/dq5P4GKwHweKUo9jIPPkgygILLq5N9nNnyCkmVbcK5jLFa/Gr42h/hGNyCX
gjOeo9jNX5zdcUie38NJbRfcEmqUFTUXXIJKjYPCi/mkpj4xUMEnrWlzcOqY46I=
=q9tG
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Merge "i.MX device tree updates for 4.7, take 2: from Shawn Guo:
The i.MX device tree updates for 4.7, take 2:
- Update display clock configuration for imx6q-b850v3 board
- Use watchdog external reset for imx6q-ba16 board
- Update operating points settings for i.MX6UL/SX/DL
- New board support: imx6ul-pico-hobbit and imx6q-marsboard
- Add SAI audio support for imx6ul-14x14-evk board
- Enable USB OTG support for M53EVK board
- A couple of fixes on DTC warnings
* tag 'imx-dt-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: mx5: dts: Enable USB OTG on M53EVK
ARM: dts: imx6ul-14x14-evk: Add audio support
ARM: dts: imx6qdl: Remove unneeded unit-addresses
ARM: dts: imx6: apalis: parallel lcd display support on ixora
ARM: dts: imx6sx-sdb: Add 198MHz operational point
ARM: dts: imx28-m28: Remove unneeded partition nodes
ARM: dts: imx6ul-pico-hobbit: Add initial support
ARM: dts: imx6: Do not hardcode the CLKO clock
ARM: dts: imx6: Add dts for Embest MarS Board
ARM: dts: imx6: fix dtc warnings for ipu endpoints
ARM: dts: imx6dl: Fix the VDD_ARM_CAP voltage for 396MHz operation
ARM: dts: imx6sx: Add 198MHz operating point
ARM: dts: imx6ul: Fix operating points
ARM: dts: imx6q-ba16: use wdog external reset
ARM: dts: imx: b450/b650v3: Move ldb_di clk assignment
ARM: dts: imx6q-b850v3: Update display clock source
ARM: dts: imx6q-b850v3: Remove ldb panel
The usual bunch of changes, mostly:
* Addition of the SPDIF support
* Addition of the pre-requisites for the display support
* New boards: Difrence DIT4350, colorfly e708 q1, Dserve DSRV9703C,
Polaroid MID2809PXE4, Orange Pi PC, Orange Pi 2
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXI4xeAAoJEBx+YmzsjxAgqFoP/1TWPb7EeHzB5AT9EvnA5oVZ
O0ZurXalr2/lgrZqI4iUuAdIHhOJHPH0YwYO6BaUY9XPMqWcEUhBSC0Gol2E80vw
rovtyyASjteg1RBqPDe2jlg1wWdIYwKKe4oGY5XDRLjmqArRba7UhB7w5qW9Hjpv
Q7i/jrdCm3y0UNxoNA1Z1sTjRoUu+rxBmPt3YyCze5sXysUTo27r5bRnRso0c0Fh
sHz6lVrDpk5NN9idRqB9IybYl63FEysG0soWt7DYCMAnDq+fxeGv4LJC8w08BYNa
K+UuwzHzn/8djbRKMcYo+4Vtv1RDU27piHTkLocnpYj+ckOYDNlcmzboBzHu/0uX
oaQ8VU+lhwEydkAqiAtaTNGgmK1ZPD3/L7yrgrMrmyUe+IALLNIUYS7xUPCIQf8k
FQcVTFI+S8qsdRikkb4/WwMkPCmsNwMoU7T0ErZ/akrGrWpm0OMxEpyKFhKumASc
pfmGSdh7BAE/G5Mhcx8cDW1qDSJzPtrTbdmwCu5tQVpzoa7LnNNRFbAZxwwt/SNG
lJXxvg4mcsp+dtEt8c/0XYQxnRMZy5o0gSQVDlqW0gYTyzfZn4l8v0iyv5l54yZv
foJukaMRVvGrO/piPNVQKGJ1O8+xCjv2kjjTYkyoQY7Xs//ZOhp7s9qGlz1/Pq14
Dxsbri9UkawJvwMR9gnD
=tEwH
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Merge "Allwinner DT additions for 4.7" from Maxime Ripard:
The usual bunch of changes, mostly:
* Addition of the SPDIF support
* Addition of the pre-requisites for the display support
* New boards: Difrence DIT4350, colorfly e708 q1, Dserve DSRV9703C,
Polaroid MID2809PXE4, Orange Pi PC, Orange Pi 2
* tag 'sunxi-dt-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (38 commits)
ARM: dts: sun7i: Enable S/PDIF on the Cubietruck
ARM: sun5i: Add DRAM gates
ARM: sun5i: Add TV encoder gate to the DTSI
ARM: sun5i: dt: Add pll3 and pll7 clocks
ARM: dts: sun8i: Add dts file for the Orange Pi One SBC
ARM: sun7i: dt: Enable dram gate 5 (tve0 clock) for simplefb TV output
ARM: sun4i: dt: Enable dram gate 5 (tve0 clock) for simplefb TV output
ARM: dts: sun5i-a13-olinuxino-micro: enable USB DRC
ARM: dts: sun8i: Base Orange Pi Plus dts on the Orange Pi 2 dts
ARM: dts: sun8i: Orangepi plus gpio keys fixes and improvements
ARM: dts: sun8i: Add dts for Orange Pi 2 SBC
ARM: dts: sun8i: Add Orange Pi PC support
ARM: dts: sun8i: Fix pio nodes Orangepi Plus dts
ARM: dts: sun7i: Add SPDIF to the Itead Ibox
ARM: dts: sun4i: Add SPDIF to the Mele A1000
ARM: dts: sun7i: Add the SPDIF block to the A20
ARM: dts: sun4i: Add the SPDIF block to the A10
ARM: dts: sun7i: Add the SPDIF clk to the A20
ARM: dts: sun4i: Add the SPDIF clk to the A10
ARM: dts: sun7i: Add SPDIF TX pin to the A20
...
adding support for SPI0 and some low
priority fixes for ethernet and interrupt
controller.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJXIzmQAAoJEGFBu2jqvgRNyRQP/0djH3xjrChj0d5plfXpemHn
zbhDZLAB7yjUsxH+umNrqN1t1T6MY3czrOUsM2DtucmMGuIchHC28/EHHMcfrMtl
KYr1pDCIuOIMmbBec2+LZ2+j4/jf5el+MbYQaF1xdFfoI2pj9Z1Xb2EItRV1ahl0
8xBrf/mTz1vlAn4nuJ2AuLj1/igKWYgR9RRvYDvi1EDZJkLBGGxUJtT6RqvH1JrE
Jvw2fnqrcC1W66eI3g5jGuZFT7uvzVG8tU5gtMaee1SY/6o4mvKOc4qD47PWmyyZ
DUrAvxJxTuRJe1G9Og814EeCmlboD6eijsY7vyeXoozsWtR9xcwSGlgxrJMjRhIJ
PuiLPDjxKGPNZI5ZAl0vmMA+jtmZ3Q28q7NcIjytMLel0G9KgW1t6qY3ugoFqris
8vp8bOd0xEC5rBHIvsFlQdOsG2ccjLy7oFulu4q59d/WKXquHpHnbbjNetnSbb8i
GLSia4Hmw+PS/7P933G9ScUQp/lGDM2iGITFMaAqKMLDDF7Pju4dfj0zFpBoGKPU
67lgdEWDeuKQtnyj5V6d/VLgpG6b2r/pqGo2OJta47MyAoVh+4xThnobdNZeuSIp
tAJpmRodG+2OzV67n+OTQnVt0eobdd26oxJl6rmgCWTS2vija0cQ/3Rl3TtpDxFV
i45WLujaUyT2U0L0bEWU
=RVPv
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.7/dt-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
Merge "DaVinci DT updates for v4.7 (part 2)" from Sekhar Nori:
Second set of DT updates for DaVinci
adding support for SPI0 and some low
priority fixes for ethernet and interrupt
controller.
* tag 'davinci-for-v4.7/dt-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850: There are 101 interrupts.
ARM: dts: da850: disable mdio and eth0 in da850.dtsi
ARM: davinci: da8xx-dt: Add spi0 lookup for clock matching
ARM: dts: da850: add spi0 to device tree
to the binding-change that made it into 4.6, adds rk3288 i2c controller
nodes and moves the rk3288 thermal data into the soc dtsi, as there
really is no need to have that separate file.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJXIoqfAAoJEPOmecmc0R2BBX0H/iBNCd50u66X9sAgpoi9HgPs
QghFjG9wxXUAtSGfMWirgmjMVNwCfNBTPUMHgZpIn61Yxgm5vh1dNTiBIGYoNVwv
XLLgSRmc4tHKdRQmdw2bik9Do4AKR0NfWN4UG1YtaJnPWVGiBPnlvGqr8sdJHZkS
VEPeh5sUgLi8nI5fR2UQxTlv5Epptal72k5kWrPWtLuFN3diPOPZ5tblSESt5OIE
EfNARkNVLMRtt+nEZyWF8hFtdIF+gJ+9CKwIt83w9c2Mudbrcpha+HYzOWVMUIY/
g0itfsoW48PyI81UpoBaNmKQXj5S0k8HuDrZ65HMgYWm9pJ5dNsJdlcyQolRmKM=
=rD4T
-----END PGP SIGNATURE-----
Merge tag 'v4.7-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "Rockchip dts32 updates for v4.7 - part2" from Heiko Stübner:
This adds the rk3288-miqi as new board, adapts the edp-phy settings
to the binding-change that made it into 4.6, adds rk3288 i2c controller
nodes and moves the rk3288 thermal data into the soc dtsi, as there
really is no need to have that separate file.
* tag 'v4.7-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: move the rk3288 thermal data into rk3288.dtsi
ARM: dts: rockchip: add MiQi board from mqmaker
dt-bindings: add vendor-prefix for mqmaker
ARM: dts: rockchip: move rk3288 edp phy under the GRF
ARM: dts: rockchip: make rk3288-grf a simple-mfd
ARM: dts: rockchip: add i2c nodes for RK3228 SoCs
- error in the documentation led to wrongly add a new NAND Flash Controller
type. Switch back to the previous compatible one.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJXMYtYAAoJEAf03oE53VmQfvoH/i2HahAo+hQUaCoTKUYy5rfo
FOII0mpsLrzryiiVX9B+XV1d5cj5obprQfIrKU4nZomZr1iZdhbPtcrItv/uId5d
N2RSdlax+a20nGvo4tKwqmJLOYDWwtcrIFATmGJ1N6VggEeqp7tDE7/QOOxVDpIo
K/DPk49b9ZCRQarJpaYC+xbV6zqpyrONfE6Vna6YJ37iCiH5gVu3Kg/X9CNupyiL
LUwdYoCkYF6yLRSMSe9A/eN49flVH+B8aUvIa1howqtLRLZlW0K4b8+c4P2reKmY
gR/QulhQbcJ0gl4YEX+6ZY5xwnexpAQca9H8f2ivUC12xUjonr3f2mHXgIeQOPE=
=d7Yr
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into fixes
Merge "at91: fixes for 4.6 #1" from Nicolas Ferre:
Here is a late fix for AT91. Sorry to have figure it out so late in the
development cycle but we had to confirm it was an error with the documentation
of two products.
So, as the compatibility string is in since 4.6-rc1 and that the previous one
works okay, it's a good opportunity to switch back to the one that works without
introducing a intermediary bug.
The revert on driver code and the removal of the useless additional
compatibility string will be queued for 4.7 through NAND/MTD.
* tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2: use "atmel,sama5d3-nfc" compatible for nfc
An error in documentation of the NAND Flash Controller (NFC) led to choose
another compatibility string for sama5d2 with an impact on the NAND flash
ready/busy information. It was producing the error message:
atmel_nand 80000000.nand: Time out to wait for interrupt: 0x08000000
and had an impact on performance.
So, switch back to the classical "atmel,sama5d3-nfc" compatibility string for
this SoC which gives the proper ready/busy bit information. The NAND flash
driver will be updated to remove the support for this different
implementation.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Romain Izard <romain.izard.pro@gmail.com>
[nicolas.ferre@atmel.com: change commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
These changes add support for the XUSB controller on Tegra124. It is an
XHCI compatible controller that replaces the existing EHCI controllers.
Support is enabled on Venice2, Jetson TK1 and Nyan-based Chromebooks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXI4aZAAoJEN0jrNd/PrOhlhEQAJsk8OhsyqMUpi+kUBPwvR+x
V/WAoHsC2P41l0J8kltGyEW8hVt9jjq1xKoUjYQMycEVK3+uwHWSAmPxLvB4I+OM
6sdZ7fzwbQbC6Om6XT0fdXoi9ryyWWW7N3yil53wJUCbgrDVehd3qG+k56yyvyc4
MqEfGelAtIcj365Oq4aOmLe5cGXEQ1rAVdTVAG1jRhXe+4ItnZwbXJB3Tavp6SK6
euxrrVf9KoW9fhH4Y4SL6l/9A5qDSYr3p1SitNgMTZmvPZa58EJ1Bu/y6OoefsD0
Vi4MYbKyltuNjo6vHRYrUfLXwd9bRFVDgZmErxibI3RXUew8RKxmZzGItaqsxesc
YzEcfZ7hZP5qIK3c8uvuw3XRIenHbg/Dk0mGQ4OSJx+jyf5V6BFPjfpESykE/M0b
C71p2wEVRBWSwOpNY7+AOKobKnxK4lWEymd5RsneZKpZpjtYy67Mh/AFuUj64IiU
AlQoPOIRX4qvf1T4RdYq/jqYp0tSxHVwxwqYg7tQu5fWo5KjZB/KBiqCgsM8RC5i
2Pv7upI9feAwffydljLJvAgKiF2GzOpjj+eFdZZc/5OCvLaDULdI9VHcpMPuJrt/
yI0ZVjnzkmTTBzNjoTPzglbwWCdJ2cA0iZeIgdtupLAMHvDALltAE1vGSu1TBGhF
rGAOcNZ1yW3X5UxbXL5X
=NYo3
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-xusb-no-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/late
Merge "ARM: tegra: Enable the XUSB controller" from Thierry Reding:
These changes add support for the XUSB controller on Tegra124. It is an
XHCI compatible controller that replaces the existing EHCI controllers.
Support is enabled on Venice2, Jetson TK1 and Nyan-based Chromebooks.
* tag 'tegra-for-4.7-xusb-no-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable XUSB on Nyan
ARM: tegra: Enable XUSB on Jetson TK1
ARM: tegra: Enable XUSB on Venice2
ARM: tegra: Add Tegra124 XUSB controller
ARM: tegra: Move Tegra124 to the new XUSB pad controller binding
This adds a common device tree for all fifth generation Aspeed systems,
and a board specific device tree for the ast2500 evaluation board.
Signed-off-by: Joel Stanley <joel@jms.id.au>
A common device tree for all forth gen/ast2400 systems and a board
specific dts for the Palmetto OpenPower developemnt machine which was
used for testing.
Signed-off-by: Joel Stanley <joel@jms.id.au>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXL7HfAAoJEHm+PkMAQRiGYe8IAJBGaPUq38EJh2YOV+AQf9v6
t/alhwB3DUE1E0zjLy7I7JJ+xDXtKjZh9fS6OFuIS8Q3RIrBteIJ/oH8TPpt7yZ/
SnP6rYPvYD6CImTyrh7+ORL/udEwJX8+YqFYAgUAq167gvpDjYj8r26VzdIaIN4/
oBbL8NrQNWfODieywYyhUoitVhwMz09zmBfLtGVks4vd2jUJk2Fdd9cOtGV5tRfk
DPndPgyQtbr8W0mKovV8sT9WkQeV5TsUr4MLgf7hjnAGYQ8+0KamkzzVVLBeBiiw
uazyrOCFkddZp+N7KbmbOmazV/yULRuLGgDjVKazoCsOaKOvoGCzrCk7daOPy6Q=
=CegX
-----END PGP SIGNATURE-----
Merge tag 'v4.6-rc7' into drm-next
Merge this back as we've built up a fair few conflicts, and I have
some newer trees to pull in.
Enable pll3 and pll7 clocks that are needed by display clocks.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
There are 3 kinds of OLinuXino Lime2 boards.
One without any on board storage, one with NAND storage and one with
eMMC storage. This patch adds the eMMC variant of boards.
eMMC storage is different from a regular SD card in that it is soldered
on the board and cannot be changed. Additionally, it shares pins with
the NAND module and with the second SPI port.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
[Maxime: Removed the change log from the commit log]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Pull libata fixes from Tejun Heo:
"An ahci driver addition and updates to ahci port enable handling for
some platform devices"
* 'for-4.6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
ata: add AMD Seattle platform driver
ARM: dts: apq8064: add ahci ports-implemented mask
ata: ahci-platform: Add ports-implemented DT bindings.
libahci: save port map for forced port map
The usage of slash character causes failure when creating regulator
debugfs entry.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
[k.kozlowski: Write commit message]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The MFC nodes with the memory regions reserved for memory allocations
are missing in the Exynos5420 Peach Pit and Exynos5800 Peach Pi DTS.
This causes the s5p-mfc driver probe to fail with the following error:
[ 4.140647] s5p_mfc_alloc_memdevs:1072: Failed to declare coherent memory for MFC device
[ 4.216163] s5p-mfc: probe of 11000000.codec failed with error -12
Add the missing nodes so the driver probes and the {en,de}coder video
nodes are registered correctly:
[ 4.096277] s5p-mfc 11000000.codec: decoder registered as /dev/video4
[ 4.102282] s5p-mfc 11000000.codec: encoder registered as /dev/video5
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Add node to support SAMA5D4 hardware random number generator.
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
[nicolas.ferre@atmel.com: reduce the register map size]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add node to support SAMA5D3 hardware random number generator.
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
[nicolas.ferre@atmel.com: reduce the register map size]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add node to support SAMA5D2 hardware random number generator.
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
[nicolas.ferre@atmel.com: reduce the register map size]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
OMAP5uEVM based platforms share a similar voltage rail map. This
should be properly described in device tree, without this regulator core
will be unable to determine the source voltage of LDOs such as LDO9 and
SMPS10 which could be configured for bypass depending on the voltage
requested of them. This results in conditions such as:
ldo9: bypassed regulator has no supply!
ldo9: failed to get the current voltage(-517)
palmas-pmic 48070000.i2c:palmas@48:palmas_pmic: failed to register
48070000.i2c:palmas@48:palmas_pmic regulator
Cc: Agustí Fontquerni <af@iseebcn.com>
Cc: Eduard Gavin <egavin@iseebcn.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: fixed to use palmas style in-supply]
Signed-off-by: Tony Lindgren <tony@atomide.com>
are for the OMAP platforms, quoting Tony Lindgren:
Fixes for omaps for v4.6-rc cycle. All dts fixes, mostly
affecting voltages and pinctrl for various device drivers:
- Regulator minimum voltage fixes for omap5
- ISP syscon register offset fix for omap3
- Fix regulator initial modes for n900
- Fix omap5 pinctrl wkup instance size
The rest are all for different platforms:
- Allwinner:
Remove incorrect constraints from a dcdc1 regulator
- Alltera SoCFPGA:
Fix compilation in thumb2 mode
- Samsung exynos:
Fix a potential oops in the pm-domain error handling
- Davinci:
Avoid a link error if NVMEM is disabled
- Renesas:
Do not mark an external uart clock as disabled, to allow
probing the uarts
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVyud6WCrR//JCVInAQKhXBAAir8+FCYQGLzwFQrCHTRa6zJq0sGUOLss
DBawxezSxtcz9LYn2s9EI5W7yqs/vtjILNTtV3bNNHZTrn/cE8Jpvo+kjNK096PP
3m0LS20pbGV/629JXiuf55pWugoXUvQNP4kTcuW8dQzQWWuzv2QfJwtW776Q8rOQ
ZRvh6uUsCgsc6JCCnZESVAnWQ7VA5YpTpZRhokhogdU0r6VTuHfOf8NPD10kiel+
jpayjC852MPJtS+1JI/d9vIydsSPHbfS8lkVp0rX7oep/Xjp6C3HGSNH+KkLTjXf
9q6uVm21Kko24wd3RAFYNFshNmD80j+BQJN+59gx7jUnQsVA+WZkNlKSPD1svf+R
9Ym+fGVn+UgsU/rSW+hhTYft7ao6Tud+W80QARFgWX6B3E3xF/ExJ9TE07hg0sK7
b+JZAFoSnEut6yTq5g99/YdvDLfqANPo3f3968bl18rKh15Iso/u177KR3cbMPBw
rKFXg9fkmjd3g5mUUekYvaEKbb+bEeLaAT+2Cri3diSW7odTzsLQSXELS0UTOWfx
TLTJSkmgxvABhdZZPQscHBvxwXPGQO8S479GGXG2xcI+tiT7ZDJPZeVm0P99B8WB
Y2VjTjuc49ZALrzT93nY9nInyjhzI5NsnccG5Khw+qoxlZ3+H+N2tVkhwt6+FNcg
vl8vcFbj9hM=
=ymz3
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"Here are a couple last-minute fixes for ARM SoCs. Most of them are
for the OMAP platforms, the rest are all for different platforms.
OMAP:
All dts fixes, mostly affecting voltages and pinctrl for various
device drivers:
- Regulator minimum voltage fixes for omap5
- ISP syscon register offset fix for omap3
- Fix regulator initial modes for n900
- Fix omap5 pinctrl wkup instance size
Allwinner:
Remove incorrect constraints from a dcdc1 regulator
Alltera SoCFPGA:
Fix compilation in thumb2 mode
Samsung exynos:
Fix a potential oops in the pm-domain error handling
Davinci:
Avoid a link error if NVMEM is disabled
Renesas:
Do not mark an external uart clock as disabled, to allow probing
the uarts"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: davinci: only use NVMEM when available
ARM: SoCFPGA: Fix secondary CPU startup in thumb2 kernel
ARM: dts: omap5: fix range of permitted wakeup pinmux registers
ARM: dts: omap3-n900: Specify peripherals LDO regulators initial mode
ARM: dts: omap3: Fix ISP syscon register offset
ARM: dts: omap5-cm-t54: fix ldo1_reg and ldo4_reg ranges
ARM: dts: omap5-board-common: fix ldo1_reg and ldo4_reg ranges
arm64: dts: r8a7795: Don't disable referenced optional scif clock
ARM: EXYNOS: Properly skip unitialized parent clock in power domain on
ARM: dts: sun8i-q8-common: Do not set constraints on dc1sw regulator
Enable pll3 and pll7 clocks that are needed to drive display clocks.
Signed-off-by: Priit Laes <plaes@plaes.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CHIP has a composite output available muxed with the microphone in the
micro-jack plug.
Enable the composite output in its DTS.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The TCON, tv-encoder and display engine backends and frontends are combined
to create our display pipeline.
Add them to the R8 DTSI. It's supposed to be perfectly compatible with the
A10s and A13, but since we haven't tested it on them yet, it's safer to
just enable it on the R8. Eventually, it should be moved to sun5i.dtsi
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the display and TCON (channel 0 and channel 1) clocks that are going
to be needed to drive the display engine, tcon and TV encoders.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Configure the two accelerometers sharing GPIO line 82 as:
- Open drain so that they can share the same interrupt line.
Configure the corresponding interrupt pin:
- Trigger on the falling edge since open drain implies that we
do not actively drive the line high, but we will actively drive
it low to generate interrupts and then it moves from high to low
i.e. a falling edge.
- Pulled up so the line will be biased to high unless an IRQ
is active on any device on the line, and thus it goes high
again after the interrupt is deasserted.
Cc: linux-iio@vger.kernel.org
Cc: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
imx6ul-14x14-evk has a wm8960 codec connected via SAI2 port.
Add support for it.
Thanks to Petr Kulhavy <brain@jikos.cz> for the hint on initializing
the PLL4 frequency to get a correct MCLK.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The following build warnings are seen when building with 'W=1' option:
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-1p1@110 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-3p0@120 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-2p5@130 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddcore@140 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddpu@140 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/aips-bus@02000000/anatop@020c8000/regulator-vddsoc@140 has a unit name, but no reg property
Fix them by removing the unneeded unit-addresses.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the bus device tree nodes for INT (Internal) block
to enable the AMBA bus frequency scaling and add the NoC (Network on Chip)
Probe Device Tree node to measure the bandwidth for AMBA AXI bus.
The WCORE bus bus is parent device in INT block using VDD_INT.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the AMBA bus nodes using VDD_INT for Exynos542x SoC.
Exynos542x has the following AMBA buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed correlation between sub-block and clock:
- CLK_DOUT_ACLK400_WCORE clock for WCORE's AXI
- CLK_DOUT_ACLK100_NOC for NoC (Network on Chip)'s AXI
- CLK_DOUT_PCLK200_FSYS for FSYS's APB
- CLK_DOUT_ACLK200_FSYS for FSYS's AXI
- CLK_DOUT_ACLK200_FSYS2 for FSYS2's AXI
- CLK_DOUT_ACLK333 for MFC's AXI
- CLK_DOUT_ACLK266 for GEN's AXI
- CLK_DOUT_ACLK66 for PERIC/PERIR's AXI
- CLK_DOUT_ACLK333_G2D for G2D's AXI
- CLK_DOUT_ACLK266_G2D for ACP's AXI
- CLK_DOUT_ACLK300_JPEG for JPEG's AXI
- CLK_DOUT_ACLK166 for JPEG's APB
- CLK_DOUT_ACLK300_DISP1 for FIMD's AXI
- CLK_DOUT_ACLK400_DISP1 for DISP1's AXI
- CLK_DOUT_ACLK300_GSCL for GSCL Scaler's AXI
- CLK_DOUT_ACLK400_MSCL for MSCL's AXI
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the NoCP (Network on Chip Probe) Device Tree node
to measure the bandwidth of memory and g3d in Exynos542x SoC.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus device tree nodes for both MIF (Memory) and INT
(Internal) block to enable the bus frequency.
The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
bus is parent device in INT block using VDD_INT.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch expands the voltage range of buck1/3 regulator due to as following:
- MIF (Memory Interface) bus frequency needs the range of '900 - 1100 mV'.
- INT (Internal) bus frequency needs the range of '900 - 1050 mV'.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus device-tree nodes of INT (internal) block
to enable the bus frequency scaling. The following sub-blocks share
the VDD_INT power source:
- LEFTBUS (parent device)
- RIGHTBUS
- PERIL
- LCD0
- FSYS
- MCUISP / ISP
- MFC
The LEFTBUS is parent device with devfreq ondemand governor
and the rest of devices depend on the LEFTBUS device.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the exynos4412-ppmu-common.dtsi to remove duplicate PPMU nodes
because exynos3250-rinato/monk, exynos4412-trats2/odroidu3 has the same
PPMU device tree node.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD0/LCD1
- ACLK133 clock for FSYS/GPS
- GDL/GDR clock for LEFTBUS/RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus nodes using VDD_INT for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD
: The minimum clock of ACLK160 should be over 160MHz.
When drop the clock under 160MHz, show the broken image.
- ACLK133 clock for FSYS
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
Exynos3250 has following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK400 clock for MCUISP
- ACLK266 clock for ISP
- ACLK200 clock for FSYS
- ACLK160 clock for LCD0
- ACLK100 clock for PERIL
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the DMC (Dynamic Memory Controller) bus frequency node
which includes the devfreq-events and regulator properties. The bus
frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature
with ondemand governor.
The devfreq-events (ppmu_dmc0*) can monitor the utilization of DMC bus
on runtime and the buck1_reg (VDD_MIF power line) supplies the power to
the DMC block.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC.
The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
SDRAM devices. The bus includes the OPP tables and the source clock for DMC
block.
Following list specifies the detailed relation between the clock and DMC block:
- The source clock of DMC block : div_dmc
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
imx6sx-sdb has custom operating points entries because it has one
power supply that drives both VDDARM_IN and VDDSOC_IN.
As per the MX6UL datasheet we have the following minimum voltages for
198 MHz operation (after adding the 25mV margin value):
VDDARM_IN = 0.975 V
VDDSOC_IN = 1.175 V
So use 1.175V for the 198MHz operation.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
mtdparts is passed from command line, so there is no need to have a
default partitioning in device-tree.
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add initial support for imx6ul pico hobbit board.
For information about this board, please visit:
http://www.wandboard.org/images/hobbit/hobbitboard-imx6ul-reva1.pdf
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
I.MX6Quad Plus has a slightly different version of PCIe core than reqular
i.MX6Quad.
Tested-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
There several changes are done here:
- Convert the property to be in bytes
Besides that this is a common practice for such property, the use of a value
in bytes much more convenient than handling the encoded one.
- Rename data_width to data-width in the device tree bindings
The change leaves the support for the old format as well just in case someone
will use a newer kernel with an old device tree blob.
- While here, replace dwc_fast_ffs() by __ffs()
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
A single regulator fix
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXI42/AAoJEBx+YmzsjxAgtVQP/0OTC5jU7+jr3rfuVQbb4ufT
YuTp0DztBP9YfedFcphwF42Py3LBl11BdTXy6qbMvkcGcdxfaSYyOGgC+Of1ZyQ5
8zlxj8aK6aM9T16hdegYMnolhriJefBr+HioRSXuABexg+0S5alkgRcJILiCJBSJ
h3g7cYYLp1gMzE7Ik1IMT1dLFDaUlonVeeHMtcJqEcyEPhDKwvHXeqLVJiTn+qcO
b9pGNwCqRXqMRygsedtx2O0nSGdk9lRmJFD5N+ePS3Y3NWri9+DtXwSfE6+1we9Z
uOrGheQBqbRDZGdJZDsIam8++uskSsFfX2CRq2+T4CHkN6JNhGCsk2I83jws07YV
LQkl/RohCmUiB0WwFjuuc5+MUtVFIoYR+65U20AqvYB7FAys5BRqfQIPCRqrcaIE
1y2woAwdoturnNdLGsPGzWD2UBumE9Ib8CwFWzzIVjISH6N7Tus1jKaOwi1TnSlk
s/hxwGy/1Aa04e6NrxvJUeE/2ftBNtELrszLxs/1kzQDGtjzEf2RXa3h4X/cJEn4
3hSvD4diFL4NfAJQompUHfP4PaqPAwOHW6V1tEQ7pz2uyXzJa++QzIE2ia/i3k72
I2jhCqRjzkGTU4CO8ghjISd+6WiktAR1Ya7t4BaDYqYVcVfAwBsMsX8drKDN2PNB
BBzA/BlQ3H+n6EksY/T3
=C4f7
-----END PGP SIGNATURE-----
Merge tag 'sunxi-fixes-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes
Allwinner fixes for 4.6
A single regulator fix
* tag 'sunxi-fixes-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: dts: sun8i-q8-common: Do not set constraints on dc1sw regulator
Add XUSB pad controller and XUSB controller device tree nodes and enable
them with a configuration for the Nyan boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add XUSB pad controller and XUSB controller device tree nodes and enable
them with a configuration for the Jetson TK1 board.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add XUSB pad controller and XUSB controller device tree nodes and enable
them with a configuration for the Venice2 board.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a device tree node for the Tegra XUSB controller. It contains a
phandle to the XUSB pad controller for control of the PHYs assigned
to the USB ports.
Signed-off-by: Thierry Reding <treding@nvidia.com>
- Fix few typos for address-cells and interrupt-names
- Update dra7 voltage rail limits
- Update compatible string for pcf8575 for both nxp and ti prefix
- Add omap5 configuration for gpadc
- Update dra7 for qspi to remove pinmux as it needs to be done by
the bootloader in isolation. Also update the qspi for 64MHz
frequency.
- Add support for Baltos ir2110 and ir3220
- Add industrial and commercial grade thermal thresholds for am57xx
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIikdAAoJEBvUPslcq6VzEQUP/3GFHR4PuyVGkzRTLO3lbYRc
Otml75jcLJqJSpWLioMnZJWnOT/6RQ7M1zxUf1BcXI1TXosXqwzxNiye9fySuIET
CNQ6VgvQkhjKtHV+qncT3NkbKsScLoNSJvijMrF2NDe2QqFynL5KZHAoF2EO1ZvD
PjnW5Gd+EODwnDhz60jVukXrhCi0pbT1zY7iJm2N7DixPc0gaqYxoGMbBklV+nNU
LVE7UXRC0I/+78deZy1y4IrQIQ24hnueOx8QXBjyyv/5xiuXQoDxEX0mlGDMTHB3
3WE5wbfCm/lkJR8xlhX9Ms5UHvKk0CeuWg3h3LjUVG7oDTa2/7IlWJTITVA+sw6D
tKxYa7X5lseRewXxNefb4dunbxZKvHQZXAGrNz09R+PVIzi2Q89DXHVjRkYCrCk+
BqJQ8/xE/pVJsr7pUvvyr8t8sNEGRk/EZuJi9T9hnGjQ8zedlbBdcLCxGTXK4cXN
4mseO7uCzgI2KucEAc9NEnOgDeFwpIS/zf/jJk5d2NQCyU+4JYXgNwUZLX2Hu76/
AtWhnp82s41Lpz2brMwUhTF/YqJo/32OaYDjfvZjbK3Td/queeqSk5H/HD5irLVZ
UQG5QEHInfdVwahRRtppuhdb7sp6RNCqD8c+KH7hPIAerCWwv6pH4TDuxGPWebiv
o+lXevTEYvI3frUeuwWG
=LRKX
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "Part two of device tree changes for omaps for v4.7 merge window" from Tony Lindgren:
- Fix few typos for address-cells and interrupt-names
- Update dra7 voltage rail limits
- Update compatible string for pcf8575 for both nxp and ti prefix
- Add omap5 configuration for gpadc
- Update dra7 for qspi to remove pinmux as it needs to be done by
the bootloader in isolation. Also update the qspi for 64MHz
frequency.
- Add support for Baltos ir2110 and ir3220
- Add industrial and commercial grade thermal thresholds for am57xx
* tag 'omap-for-v4.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am57xx-idk: Include Industrial grade thermal thresholds
ARM: dts: am57xx-beagle-x15: Include the commercial grade thresholds
ARM: dts: am57xx: Introduce industrial grade thermal thresholds
ARM: dts: am57xx: Introduce commercial grade thermal thresholds
ARM: dts: add DTS for Baltos IR2110
ARM: dts: add DTS for Baltos IR3220
ARM: dts: split am335x-baltos-ir5221 into dts and dtsi files
ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
ARM: dts: dra7x: Remove QSPI pinmux
ARM: dts: omap5-board-common: describe gpadc for Palmas
ARM: dts: twl6030: describe gpadc
ARM: dts: dra7xx: Fix compatible string for PCF8575 chip
ARM: dts: AM57xx/DRA7: Update SoC voltage rail limits to match data sheet
ARM: dts: OMAP36xx: : DT spelling s/#address-cell/#address-cells/
ARM: dts: omap5-cm-t54: DT spelling s/interrupt-name/interrupt-names/
ARM: dts: omap5-board-common: DT spelling s/interrupt-name/interrupt-names/
This moves Samsung SROM controller code from arm/mach-exynos into to
separate driver under drivers/memory/samsung. In the future this driver
will be re-used on ARM64 Exynos platform.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIHrcAAoJEME3ZuaGi4PXIfsP/0Fba9eiLkTobPb8B9KhBNzc
sQqU3CfYNCQOHTz/1W//JHfFgyOQ67bQjKiMlU5NfXS34l33mafMRLqUhUxpnPZB
3FPkecv0eG/Ojj4XO/aY3GgDSDB0Dpi894D5y2OpbkcYTSADijf1VD4+0WvWsxn0
B9UnZFCbUg2nxbAEDxMuulaDnGi7WhUTaUFYUZVBMZjYaQxDVjVwhNFlixXey8cd
9X0SRnm0quPCnuL/j5UtLQCJQu6vnyM9MqauZQqC9J3Bkd+6LaCIVlObmmoV94O9
pOqllEpSbJ6YD6N3M6DYVMihmJUUj/MTFCuJQg9CJHeb4hWUHZXxDj9w+q0Ps1JI
fKE7EhtloN1/31KpQJE7xysG8lyq1tE00v5d270QANyHUq6vYXIQgHU9DVpAorto
xkytq/9QClVHm0c40BRVrxIgXyLeSekMtqA9ILpSnhdZepUpt0UIM21x1v5tez9Y
S+CQJ3wU+iTA2HfSdFqaZ6bMYLlmqdHaylBtVorMdsLj/ZxKs2syEPgsJcDv1LWm
7pNG8S9d1zIeEB6YXfnUiaSkYvNWEkjn0GOiq+Hs+pPB+6HYoI9SaainAhzi9GAq
G42gWyA8v/AupwS0A+V5d97agaMZXxuj/FhMH2xKGhvqdNB5QZVtkNOkO+twAO12
i8bFvqlBUO8vfmYj+J39
=6ukR
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-exynos-srom-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Merge "Samsung soc/drivers update for v4.7" from Krzysztof Kozłowski:
This moves Samsung SROM controller code from arm/mach-exynos into to
separate driver under drivers/memory/samsung. In the future this driver
will be re-used on ARM64 Exynos platform.
* tag 'samsung-drivers-exynos-srom-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
memory: samsung: exynos-srom: Add support for bank configuration
ARM: EXYNOS: Remove SROM related register settings from mach-exynos
MAINTAINERS: Add maintainers entry for drivers/memory/samsung
memory: Add support for Exynos SROM driver
dt-bindings: EXYNOS: Add exynos-srom device tree binding
ARM: dts: change SROM node compatible from generic to model specific
some time ago, before the driver was accepted (due to very late
comments). However, after these late comments, the driver expects
different bindings so we need to fix the DTS.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXFNHtAAoJEME3ZuaGi4PX2LQP/3qB213z+yw60SbP9rzHYdkS
Gh5oiuJygf6KUo2lK0uWfROiLRQ4hYpbqf41TmCCLsKuXxGppofDuXAYghXDSMh8
GhKVhNW7/zsJrXOUwl30l9irp5Ai4+5dTzhe2MVyuZ/mnhC8hz+74v/KnQclpUpc
Fh3w++8Tf/hXUYThhqpo5gguEcJpWIafP1xzJ5xa9yK1MaTVuYlPt2nqba6xSjir
Ti9mahQ713T0F3FYmJlZO47C3Qn4SKiZRlkCTzzs9h7czhIkTDbbGvmyddrDJHN6
sloDE6pKTCN0Hse9f+O1erP9FdmT9k/0R9r4idL/RDLRbJvi+OL/UhCP2m1FdJNr
XgiYIwwrf9shVT/UfmMlFu4yU2KYeD1ELXtDdW0UAAMClIZ5TaHsNhGQpG7yslVb
E0lMazmBFkCBuq1W2DZPliXd9dCDbK9kcZU0bJacZKUtjXm+AEwIkJmaxrRYp7DG
hFo+EHprn/dm+9skU+oxHX3yuK+A0i17XeYeNgDRWt4JFb4CNwnX0cTRhwHOJbjq
4RQqB8ouAIdZkzCsgAZ80nior7dA5B/3WZiX5aNZfAFO4KJxNbeHTLp8+Vdujir1
H+IC7OC/1Xww8hzfIHIzvi9uV5/q9rfBBb04FMOhRdNN15pnpQ4JvJFkKMom0j/u
St/R4Tj0FEQDoSj7ViCk
=5P6R
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-exynos-srom-fixup-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "ARM: dts: exynos: Fixup for SROM controller (v4.7)" from Krzysztof Kozlowski:
DeviceTree changes for new SROM controller driver reached mainline
some time ago, before the driver was accepted (due to very late
comments). However, after these late comments, the driver expects
different bindings so we need to fix the DTS.
* tag 'samsung-dt-exynos-srom-fixup-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: change SROM node compatible from generic to model specific
am57xx-idk have Industrial grade samples whose thermal
thresholds are different as compared with dra7. Hence correcting the same.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The silicon version ES2.0 onwards are industrial grade samples
and have higher thermal thresholds than commecial grade samples.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The silicon versions which are non ES2.0 are commercial grade silicon
and have lower thermal thresholds.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
1. Cleanup regulator bindings on Exynos5420 boards.
2. Support MIC bypass in display path for Exynos5420.
3. Enable PRNG and SSS for all Exynos4 devices.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXIHotAAoJEME3ZuaGi4PXdbMP/0LnIxQq8JEwTfoizAsNkga0
oJoAWUI4TXt70fPxKgQHHDg3InMLzAEMkC3fFWiH8cO8OU+khWYkCBEq0QQ+H2wi
JOKmupQ+HpQGqNwGH6vZmcCrAA5aZBhVbNz3ujocKk8F2rrJPDpkQc5Nt2nxU0R2
BYH/ZOLiUdpzqefeoinymWsVzVLapN0N5zy1zt6a0t8oYXTGwWVHCwfbGfYyAQtI
FEg9cl95pemk15awdkglmTXOnLi4MNHFjdNob0IiCg31PSreuBtpiN5mljJACwG/
Qv4fhfY1AW1J6Qn2HmH32rnR0nz+xUiIjtGp5m6XcDBM3IPfdNJdi8/Q6uX4K3Z5
H2FIyOKiNMsmhxJDIvFO0mh+rSbjt5QjbmshLYb5DtkjFQMWHPGVNucEVFvn4wLi
Xnrzfa3hzqLGTqYYF2okaJzDQZwTzQAtyrQyWjszoSHYTaG84OleZMOpAt1izOQe
Yi74//zmlAHUv5Siudebn77BflOkISWCcwFyaIuWP4rewnD+f4o/cs5npMmshil8
jBy4KPfLJegVvfIhK0iDonqXPxuE8pfHMTYfZKdZD9L2eOGaFwfZsDf9QqJT2zER
GuSRdZgv8/kYyDKHhFwg4oZofdVQho16huR6VROEMxAr3tn52U1ppUD6llOIHglZ
cO6WUM2OpRhmOblqXjFl
=ARFb
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Merge "Secound round of Samsung Device Tree updates and improvements for v4.7" from Krzysztof Kozlowski:
1. Cleanup regulator bindings on Exynos5420 boards.
2. Support MIC bypass in display path for Exynos5420.
3. Enable PRNG and SSS for all Exynos4 devices.
* tag 'samsung-dt-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Enable PRNG and SSS for all Exynos4 devices
ARM: dts: exynos: Add exynos5420-fimd compatible
ARM: dts: exynos: Remove unsupported s2mps11 regulator bindings from Exynos5420 boards
This includes a few functional changes:
* new representation of MIC, SIC1 and SIC2 interrupt controllers,
* disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in
shared lpc32xx.dtsi file,
* added clock sources for SPI1 and SPI2,
* set default clock rate of HCLK PLL to main osc rate multiplied by 16.
Also there are some non-functional changes:
* flatten board DTS files by exploiting device node labels,
* add 'partitions' device node for NAND SLC / MTD OF,
* correct Atmel vendor prefix to describe on board AT24 EEPROMs,
* rename board DTS files by adding SoC name prefix.
Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJXIVDoAAoJEKo94to8JTlldp8P/Rq2daHz/cJwylGDUXP45Ja2
IfEDCjfwyzMqDrQX7S6gCIILmY5RZqw/TOUmYgQ6t+5lsBtooxzLBOj2ZW7J2+3/
4rni051kOKmPy9wVaQ0x8u335J993Um4mhZYPDW1Ca1vzTN0wPyC6PIxM7KInJ2J
SQfRLlrY+wxiwG2h0fXXvhGH+7i8t7wRp78dIZZT56LYfJctwjPbAMXFEeeH/5bF
GpQe2Y5hyxwQ2qL9D1LDiimdm/Mabd0D2R2dNXziWG37vu267Z2OjZqq1/pWk5rg
dpo4AUkWwTIYrZ5oHpjrSqDgBGzZ7yQYxNIQfRzaZdYlc++Io53jKnXhdCIvMpfb
lm1ENi3qD+R9BqUPjf7O9qDbkRbM+r8KcTBNuYjiC7pxj3bW6NaBbUs1P1RxUUSG
+zdDswGZNr1jc26QizVAvvQezNY1nB/V0iIQGnYtxmhyhv1nPMhxf8iW1Iu2DNjE
dEIHOM30BfPnQ16rGIvotUZ1n2Ka3fzuyqgjffwML8prILCeoo/Tuk5JGHdXblAh
ousv6Xz9Xq9+ahnd10VFzdbbSrjnVR6ABOWSTS8I7DBlVSPhcd8rqQ1IXIT3GJ1k
noKCW76Vs4kcrfYQrtIochV4IJYKhHVyI1OAJv/3CTBRT3HCVkrEUtCAukd3uiSs
7IZU1KnnerNjUhvUvJLx
=wDt+
-----END PGP SIGNATURE-----
Merge tag 'lpc32xx-dt-4.7' of git://github.com/vzapolskiy/linux-lpc32xx into next/dt
Merge "NXP LPC32xx device tree updates for v4.7" from Vladimir Zapolskiy:
This includes a few functional changes:
* new representation of MIC, SIC1 and SIC2 interrupt controllers,
* disabled by default SPI1, SPI2, SSP0 and SSP1 SPI controllers in
shared lpc32xx.dtsi file,
* added clock sources for SPI1 and SPI2,
* set default clock rate of HCLK PLL to main osc rate multiplied by 16.
Also there are some non-functional changes:
* flatten board DTS files by exploiting device node labels,
* add 'partitions' device node for NAND SLC / MTD OF,
* correct Atmel vendor prefix to describe on board AT24 EEPROMs,
* rename board DTS files by adding SoC name prefix.
Since now DTS files of LPC32xx boards match "^lpc32[2345]0-" pattern.
* tag 'lpc32xx-dt-4.7' of git://github.com/vzapolskiy/linux-lpc32xx:
ARM: dts: lpc32xx: phy3250: add SoC name prefix to board dts file
ARM: dts: lpc32xx: phy3250: add NAND partitions device node
ARM: dts: lpc32xx: phy3250: avoid extension of device nodes by absolute path
ARM: dts: lpc32xx: ea3250: add SoC name prefix to board dts file
ARM: dts: lpc32xx: ea3250: fix Atmel at24 eeprom vendor
ARM: dts: lpc32xx: ea3250: add NAND partitions device node
ARM: dts: lpc32xx: ea3250: avoid extension of device nodes by absolute path
ARM: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC
dt-bindings: interrupt-controllers: add description of SIC1 and SIC2
ARM: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by default
ARM: dts: phy3250: enable ssp0
ARM: dts: lpc32xx: add clock properties to spi nodes
ARM: dts: lpc32xx: set default clock rate of HCLK PLL
- three low priority fixes:
- sama5d2: one pin definition and dependency with the slow clock for watchdog
- sama5d4: definition of watchdog IRQ property
- addition of the new shutdown controller to sama5d2 & sama5d2 Xplained
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJXINyNAAoJEAf03oE53VmQZtIH/1Ielv9yYUfQtFg8NHrjkLhM
nk0WWRjaWvwoPnmfGYF8SAv/tb9OM96uF4o+zv7rK8vWQVf2fi67R7MJ5bllGtaN
vgULv+jNixh/ocQb+SHZwRxhUQJbycIIfS5A8nDbUMUxpjIqC1iknpfytm2VyoPb
WWcuLoJ4LZ4HiZwRDeKvN/0pMDHbo7XzfgOCHC/QdW3lDEzGBEKSi+3cGIsaQOnS
LL11M/Ul4IBH6h2sct5w3SXlLu6vnc/DRYAP4SmwdQ+9gLfEkDCH9Vifbb7p9+tx
WbNIf+kZGkQHvTlI6tqUZwga4q+0KZwDyo7s0hRoZlH5BYIRXkrfh3bhVOW3tTo=
=Q/Ob
-----END PGP SIGNATURE-----
Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "Second batch of DT changes for 4.7" from Nicolas Ferre:
- three low priority fixes:
- sama5d2: one pin definition and dependency with the slow clock for watchdog
- sama5d4: definition of watchdog IRQ property
- addition of the new shutdown controller to sama5d2 & sama5d2 Xplained
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2: add slow clock to watchdog node
ARM: dts: at91: sama5d2: add shutdown controller node
ARM: dts: at91: sama5d4: add watchdog interrupt property
ARM: dts: at91: fix typo in sama5d2 PIN_PD24 description
-----------
- Add CPUFreq support to STiH407 family
- Add Mailbox nodes to STiH407 family
- Add RemoteProc nodes to STiH407 family
- Use 'reserved-memory' for DMA memory on STiH407
- Use the LPC timer as a clocksource
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXH3qZAAoJEMo4jShGhw+JmZcP/09CUBI2y/B8yehFR7G/2Pgv
WKPm2CuGQT1IzV9W+NMMsFF1etcuvc1OEndgA/BCQkiofVmm7KMc9djrAVrb9LkB
FH1JTNb9AvnlYP5cHsnLEKcrk8allcx2fl00nOgWER68e12s1ArAPW6Vb9pOJBqw
nGSDuwJqX+cjp0NpRX8djinmiOghRLsbPVFpcFfsMeBhh8ncFvzY7XxqWYlQxaF9
sicFZYWT/c/AL8yUZFaLHIP6fmQpqITOausIqLIzcDlBdNLHWMHv04WciESPho+v
VuaRhh4G0kxZkjvyA3sajNxqd4uG0a2pWvQRo5l3YTKuwG4y/6PvNcGydG49tCYe
tthK4aDz9B8w8QSVLxi1cq/juxp+sqvf1bWtttuEZoMkKg1bAmoofTCWHe9x1Wzd
5CkeO9i6Q4fbfTf2oQ4WpfkP/y1Il58fckKlignsLFf6WsSm236JjCRnntXKIcCP
/vwJZxPtJBepR0wrE1MAxZsQtSsWMwAde5aH6jdn0WJG4t9CLEeoIn6x2s3aBrEF
sliJm5XKyFSDXSYJd7Vwmvy6Qmm4bf8Hly5OuhUpc+nYSZcb5Nuvf1UCXLScRSiS
IohDFNF0xqJAW4+a7VyCG5NhGmR2AAo3Txt+56gt1o6Q43sx6CaCy0N09ZJc2HTX
3fko3YZuclQeJB2wo/MS
=S1d7
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-for-v4.7b-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt
Merge "STi DT updates for v4.7 #1" from Maxime Coquelin:
Highlights:
-----------
- Add CPUFreq support to STiH407 family
- Add Mailbox nodes to STiH407 family
- Add RemoteProc nodes to STiH407 family
- Use 'reserved-memory' for DMA memory on STiH407
- Use the LPC timer as a clocksource
* tag 'sti-dt-for-v4.7b-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
ARM: dts: STi: STih407: Switch LPC mode from RTC to Clocksource
ARM: dts: STiH407: Move over to using the 'reserved-memory' API for obtaining DMA memory
ARM: dts: STiH407: Add nodes for RemoteProc
ARM: dts: STi: stih407-family: Add nodes for Mailbox
ARM: dts: STi: STiH407: Provide CPU with a means to look-up Major number
ARM: dts: STi: STiH407: Link CPU with its voltage supply
ARM: dts: STi: STiH407: Provide CPU with clocking information
ARM: dts: STi: STiH407: Provide generic (safe) DVFS configuration
To simplify matching of DTS files of all NXP LPC32xx powered boards by
a file name add 'lpc3250' prefix to PHYTEC PHYCORE-LPC3250 board dts
file.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
To declare MTD OF partitions NAND controller device node should have
a special 'partitions' subnode, the change removes a debug message
from mtd/ofpart on boot:
nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash@20020000.
Trying to parse direct subnodes as partitions.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change simplifies layout of PHY3250 board description by
referencing device nodes of LPC32xx controllers by label.
No functional change intended.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
To simplify matching of DTS files of all NXP LPC32xx powered boards by
a file name add 'lpc3250' prefix to Embedded Artists LPC3250 board dts
file.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
There is no 'at' hardware vendor defined yet, correct vendor prefix
for Atmel is 'atmel'.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
To declare MTD OF partitions NAND controller device node should have
a special 'partitions' subnode, the change removes a debug message
from mtd/ofpart on boot:
nxp_lpc3220_slc: 'partitions' subnode not found on /ahb/flash@20020000.
Trying to parse direct subnodes as partitions.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change simplifies layout of EA3250 board description by
referencing device nodes of LPC32xx controllers by label.
No functional change intended.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change adds separate device nodes for SIC1 and SIC2 interrupt
controllers and reparents all defined SIC1 and SIC2 interrupt
producers to the correspondent interrupt controller, this is needed to
perform switching to a new LPC32xx MIC/SIC interrupt controller driver.
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Fix gpio active flag for the phy reset-gpios property. The line is
active low instead of active high.
Actually, this flags was never used by the macb driver.
Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
As the watchdog timer needs the slow clock, add it to the currently defined
wdt node.
Reported-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Add the SAMA5D2-Compatible Shutdown Controller node to sama5d2.dtsi
and the use of it in the sama5d2 Xplained board dts file.
Enable the RTC wakeup event and the "wake up" button support through the
input "0" that is present on the board.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The "interrupts" property is missing from the watchdog node. Add it with
highest priority value of 7.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
There is no external dependency for Security SubSystem (SSS) block so
the nodes for Pseudo Random Number Generator and AES hardware
acceleration can be enabled always for all Exynos4 devices.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch changes the compatible of Exynos5420 fimd
to "exynos5420-fimd". To support MIC bypass from display
path, the new compatible is introduced for Exynos5420.
Cc: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The bindings like s2mps11,buck6-ramp-enable or s2mps11,buck2-ramp-delay
were ignored. They were never parsed by s2mps11 regulator driver. Also
the values used in these bindings were equal to default reset values of
S2MPS11 device. It is safe to remove them.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Hook up all devices that are part of the CPG/MSTP Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their
respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the first Cortex-A15 CPU core and the Cortex-A15 L2 cache/SCU to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the Cortex-A15 CPU cores and the Cortex-A15 L2 cache/SCU to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up the Cortex-A15 and Cortex-A7 CPU cores and L2 caches/SCUs to
their respective PM Domains.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller.
Hook up ARM CPU cores 1-3 to their respective PM Domains.
Note that ARM CPU core 0 cannot be shut off.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Using "IMX6QDL_CLK_CKO" for the clock is easier to read instead of
the hardcoded clock number.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Embest MarS Board [1] is a multi-core platform based on Freescale i.MX6
Cortex-A9 Dual Core, running up to 1GHz with 1 GB of RAM, 4GB of eMMC
and with a 4MB SPI flash.
[1] http://www.embest-tech.com/shop/star/marsboard.html
Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can
cause drivers to be deferred forever if such clocks are referenced in
their devices' clocks properties.
Update the various disabled external clock nodes to default to a
frequency of 0, but don't disable them, to prevent this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Introduce am335x-baltos.dtsi, that provides common configuration
for the whole device family based on the same SODIMM module.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7 family of processors from Texas Instruments, have a hardware module
called IODELAYCONFIG Module which is expected to be configured. This
block allows very specific custom fine tuning for electrical
characteristics of IO pins that are necessary for functionality and
device lifetime requirements. IODelay module has it's own register space
with registers to configure various pins.
According to AM572x TRM SPRUHZ6E October 2014–Revised January 2016[1]
section 18.4.6.1 Pad Configuration, in addition to pinmuxing(MUXMODE),
when operating a pad in certain mode, Virtual/Manual IO Timing Mode must
also be configured to ensure that IO timings are met (DELAYMODE and
MODESELECT fields of pad's IODELAYCONFIG module register). According to
section 18.4.6.1.7 Isolation Requirements of above TRM, when
reprogramming MUXMODE, DELAYMODE, and MODESELECT fields, there is a
potential for a significant glitch on the corresponding IO. It is hence
recommended to do this with I/O isolation (which can only be done in
initial stages of bootloader). QSPI is one such module that requires
IODELAY configuration. So, this patch removes the pinmux for
QSPI for DRA74/DRA72 EVM as it needs to be done in bootloader (U-Boot)
and cannot be done in kernel.
Users should migrate to U-Boot v2016.05-rc1 or higher.
[1] http://www.ti.com/lit/ug/spruhz6e/spruhz6e.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Without that, regulators are left in the mode last set by the bootloader or
by the kernel the device was rebooted from. This leads to various problems,
like non-working peripherals.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Reviewed-By: Sebastian Reichel <sre@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to the TRM, SCM CONTROL_CSIRXFE register is on offset 0x6c
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Reviewed-By: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The boards use a TI variant of the PCF8575 so specify that
in the compatible string.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per the data sheet starting from SPRUHQ0H (Nov 2015 - Latest[1]),
VDD_CORE can vary from 0.85v to 1.15v for AVS class0. VDD GPU/DSP
et.al. can range from 0.85v to 1.25V with AVS class0
Since dynamic voltage scaling is disabled for DRA7/AM57xx SoCs for
all SoC rails other than MPU, the bootloader is responsible for
setting up the AVS class0 voltage, however, with wrong voltage machine
constraints in dtb, regulator framework will lower the voltage below
the required voltage levels for certain samples in production flow.
This can cause catastrophic failures which can be pretty hard to
identify.
Update board files which don't match required specification.
[1] http://www.ti.com/product/AM5728/datasheet/specifications#SPRT637-7340
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ldo4_reg is connected to DSS, and should always be 1.8V. However the The
dts defines a range of 1.5V-1.8V, which requires somethings to set the
actual voltage at runtime. Currently we set the voltage in omapdss
driver.
As the voltage must always be 1.8V, let's just define the range to 1.8V
so that the driver doesn't need to deal with the voltage. In fact, the
driver should not touch the voltage, except in the cases where the
voltage needs to be changed at runtime.
I presume the situation is the same for ldo1_reg, used for CSI, although
I think it is not currently used in the mainline.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ldo4_reg is connected to DSS, and should always be 1.8V. However the
The dts defines a range of 1.5V-1.8V, which requires somethings to set
the actual voltage at runtime. Currently we set the voltage in omapdss
driver.
As the voltage must always be 1.8V, let's just define the range to 1.8V
so that the driver doesn't need to deal with the voltage. In fact, the
driver should not touch the voltage, except in the cases where the
voltage needs to be changed at runtime.
I presume the situation is the same for ldo1_reg, used for CSI, although
I think it is not currently used in the mainline.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Doing so saves quite a bit of code in the driver.
For more information on the 'reserved-memory' bindings see:
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
Suggested-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch supplies the Mailbox Controller nodes. In order to
request channels, these nodes will be referenced by Mailbox
Client nodes.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
You'll notice that the voltage cell is populated with 0's. Voltage
information is very platform specific, even depends on 'cut' and
'substrate' versions. Thus it is left blank for a generic (safe)
implementation. If other nodes/properties are provided by the
bootloader, the ST CPUFreq driver will over-ride these generic
values.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
When compiled with "W=1", dtc complains: e.g.
"Warning (unit_address_vs_reg):
Node /soc/ipu@02800000/port@2/endpoint@0
has a unit name, but no reg property"
Endpoint nodes don't have a reg property, and the addresses
in their node names are ordinals without any special meaning
so remove them and swap them for semantic node names.
Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015):
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf
states the following:
"LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation
up to 396 MHz."
So fix the entry by adding the 25mV margin value as done in the other
entries of the table, which results in 1.15V for 396MHz operation.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
198MHz is a valid operating point for mx6sx.
Add entries for VDD_ARM_CAP and VDD_SOC_CAP voltages for 198MHz according
to the imx6sx datahseet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SXIEC.pdf
(a 25mV offset is added to the minimum allowed values for safety).
These values also match the ones from the NXP kernel.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adjust the VDD_ARM_CAP and VDD_SOC_CAP voltages according to
Table-11 from MX6UL datasheet:
http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf
(a 25mV offset is added to the minimum allowed values for safety).
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Application Notes 399 and 400 shares the same memory map and
features. Both are shipped with Cortex-M7 and have the same peripheral
as AN385/AN386, but with different location of PSRAM and Ethernet
controller.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Application Notes 385 and 386 shares the same memory map and features
except the CPU is used. AN385 is supplied with Cortex-M3 CPU and AN386
is supplied with Cortex-M4.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
* Correct preset_lpj calculation which may lead to too short delays
* Correct handling of optional clocks on r8a7791 to restore
access to the serial port the porter board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXGEtmAAoJENfPZGlqN0++aYIP/RCANWvI9Z7VH/Y/NQ1f5t4Y
l4Uv1/dSuIHJq44z0sLMD5gmDVKqP1NnCncfkZabDXceGm9Fk3DlFxeLd+ahMN+B
dBtDpf1AA9Mr1AEoBrXjNimWSupvJalatqk3nWfLnjpGHQJOKTZCekikQb9WBA5t
l5r5Pvu/leRfyg/wi10F3hq0a2drKbIbFDOzh37L7al9cvZTnyVZNcchb/vlqZmt
kAi90crLUXvQ9eOw357kFBmigQF5r/fD0X3f5sFYyDlNldZg3chkyghiluiOcXDL
eEc6TdHNT/a9hixqpW/Z1BinpvFF+vIjfUZBW9wXTRz0t9EX5Pxr9wSXWEY4+hmp
DrI9eiEAbX8ltfjOo3Q7LgHstjZ6AJyk3CZJBWk8i2DLK5SEt6eum/BvKRmakTa+
DLe+SES+uUfg1d35WEqhqPeO7JEybPAVyto++NrCRSkPeDeO32+h2O6yEsMBqEKC
HFoV/V86Ufqq8MCiZkQBZJGNYqcTeKMiXzvte23tcAXXYmxMct5Z4HLCiFEM4paw
yyThG9VZofe4pt03u9XqiZjEu23AopMpM9xDpUjK3CKYq6uaJxNoJcgJC6TBbkmT
D7kdmhhlWCLeyr3pqblbqiWdK7Bx9B65aFhm/nilX0y4p3vvT46vMLvG4SgfFojv
Ybr9ICHZMaTxJ1V32fty
=k7qU
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Renesas ARM Based SoC Fixes for v4.6
* Correct preset_lpj calculation which may lead to too short delays
* Correct handling of optional clocks on r8a7791 to restore
access to the serial port the porter board
This is a backmerge of v4.6 fixes, to avoid a merge conflict between 4.6
and our next/dt branch.
* tag 'renesas-fixes-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: timer: Fix preset_lpj leading to too short delays
Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
ARM: dts: r8a7791: Don't disable referenced optional clocks
Fix a typo on PIN_PD24 for UTXD2 and FLEXCOM4_IO3 which were
wrongly linked to PIN_PD23).
Signed-off-by: Florian Vallee <fvallee@eukrea.fr>
Fixes: 7f16cb676c ("ARM: at91/dt: add sama5d2 pinmux")
Cc: stable@vger.kernel.org # v4.4+
[nicolas.ferre@atmel.com: add commit message, changed subject]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Stephen Boyd