Commit Graph

3 Commits

Author SHA1 Message Date
Madhav Chauhan 45f09f7adc drm/i915/icl: Power down unused DSI lanes
To save power, unused lanes should be powered
down using the bitfield of PORT_CL_DW10.

v2: Review comments from Jani N
    - Put default label next to case 4
    - Include the shifts in the macros

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1530798591-2077-7-git-send-email-madhav.chauhan@intel.com
2018-07-06 12:14:16 +03:00
Madhav Chauhan b1cb21a5f1 drm/i915/icl: Enable DSI IO power
This patch configures mode of operation for DSI
and enable DDI IO power by configuring power well.

v2: Use for_each_dsi_port() for power get (Jani N)

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1530798591-2077-5-git-send-email-madhav.chauhan@intel.com
2018-07-06 12:14:15 +03:00
Madhav Chauhan fcfe0bdcb1 drm/i915/icl: Program DSI Escape clock Divider
Escape Clock is used for LP communication across the DSI
Link. To achieve the constant frequency of the escape clock
from the variable DPLL frequency output, a variable divider(M)
is needed. This patch programs the same.

v2: (Jani N) Don't end line with "(".

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1530798591-2077-3-git-send-email-madhav.chauhan@intel.com
2018-07-06 12:13:34 +03:00