Commit Graph

446 Commits

Author SHA1 Message Date
Ville Syrjälä 13a3d91f17 drm: Pass 'name' to drm_encoder_init()
Done with coccinelle for the most part. However, it thinks '...' is
part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder
in its place and got rid of it with sed afterwards.

@@
identifier dev, encoder, funcs;
@@
 int drm_encoder_init(struct drm_device *dev,
                      struct drm_encoder *encoder,
                      const struct drm_encoder_funcs *funcs,
                      int encoder_type
+                     ,const char *name, int DOTDOTDOT
                      )
{ ... }

@@
identifier dev, encoder, funcs;
@@
 int drm_encoder_init(struct drm_device *dev,
                      struct drm_encoder *encoder,
                      const struct drm_encoder_funcs *funcs,
                      int encoder_type
+                     ,const char *name, int DOTDOTDOT
                      );

@@
expression E1, E2, E3, E4;
@@
 drm_encoder_init(E1, E2, E3, E4
+                 ,NULL
                  )

v2: Add ', or NULL...' to @name kernel doc (Jani)
    Annotate the function with __printf() attribute (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670818-2966-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-11 09:13:20 +01:00
Ville Syrjälä b0b3b79511 drm: Pass 'name' to drm_universal_plane_init()
Done with coccinelle for the most part. It choked on
msm/mdp/mdp5/mdp5_plane.c like so:
"BAD:!!!!!  enum drm_plane_type type;"
No idea how to deal with that, so I just fixed that up
by hand.

Also it thinks '...' is part of the semantic patch, so I put an
'int DOTDOTDOT' placeholder in its place and got rid of it with
sed afterwards.

I didn't convert drm_plane_init() since passing the varargs through
would mean either cpp macros or va_list, and I figured we don't
care about these legacy functions enough to warrant the extra pain.

@@
typedef uint32_t;
identifier dev, plane, possible_crtcs, funcs, formats, format_count, type;
@@
 int drm_universal_plane_init(struct drm_device *dev,
                              struct drm_plane *plane,
                              unsigned long possible_crtcs,
                              const struct drm_plane_funcs *funcs,
                              const uint32_t *formats,
                              unsigned int format_count,
                              enum drm_plane_type type
+                             ,const char *name, int DOTDOTDOT
                              )
{ ... }

@@
identifier dev, plane, possible_crtcs, funcs, formats, format_count, type;
@@
 int drm_universal_plane_init(struct drm_device *dev,
                              struct drm_plane *plane,
                              unsigned long possible_crtcs,
                              const struct drm_plane_funcs *funcs,
                              const uint32_t *formats,
                              unsigned int format_count,
                              enum drm_plane_type type
+                             ,const char *name, int DOTDOTDOT
                              );

@@
expression E1, E2, E3, E4, E5, E6, E7;
@@
 drm_universal_plane_init(E1, E2, E3, E4, E5, E6, E7
+                         ,NULL
                          )

v2: Split crtc and plane changes apart
    Pass NUL for no-name instead of ""
    Leave drm_plane_init() alone
v3: Add ', or NULL...' to @name kernel doc (Jani)
    Annotate the function with __printf() attribute (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670795-2853-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-11 09:13:10 +01:00
Ville Syrjälä f98828769c drm: Pass 'name' to drm_crtc_init_with_planes()
Done with coccinelle for the most part. However, it thinks '...' is
part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder
in its place and got rid of it with sed afterwards.

I didn't convert drm_crtc_init() since passing the varargs through
would mean either cpp macros or va_list, and I figured we don't
care about these legacy functions enough to warrant the extra pain.

@@
identifier dev, crtc, primary, cursor, funcs;
@@
 int drm_crtc_init_with_planes(struct drm_device *dev,
                               struct drm_crtc *crtc,
                               struct drm_plane *primary, struct drm_plane *cursor,
                               const struct drm_crtc_funcs *funcs
+                              ,const char *name, int DOTDOTDOT
                               )
{ ... }

@@
identifier dev, crtc, primary, cursor, funcs;
@@
 int drm_crtc_init_with_planes(struct drm_device *dev,
                               struct drm_crtc *crtc,
                               struct drm_plane *primary, struct drm_plane *cursor,
                               const struct drm_crtc_funcs *funcs
+                              ,const char *name, int DOTDOTDOT
                               );

@@
expression E1, E2, E3, E4, E5;
@@
 drm_crtc_init_with_planes(E1, E2, E3, E4, E5
+                          ,NULL
                           )

v2: Split crtc and plane changes apart
    Pass NULL for no-name instead of ""
    Leave drm_crtc_init() alone
v3: Add ', or NULL...' to @name kernel doc (Jani)
    Annotate the function with __printf() attribute (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449670771-2751-1-git-send-email-ville.syrjala@linux.intel.com
2015-12-11 09:12:44 +01:00
Ville Syrjälä 1eb83451ba drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create()
Drivers shouldn't clobber the passed in addfb ioctl parameters.
i915 was doing just that. To prevent it from happening again,
pass the struct around as const, starting all the way from
internal_framebuffer_create().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-11-24 11:47:38 +01:00
Archit Taneja b110ef3775 drm/tegra: Remove local fbdev emulation Kconfig option
DRM_TEGRA_FBDEV config is currently used to enable/disable legacy fbdev
emulation for the tegra kms driver.

Remove this local config option and use the top level DRM_FBDEV_EMULATION
config option instead.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1445933459-5249-4-git-send-email-architt@codeaurora.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-11-24 11:41:50 +01:00
Linus Torvalds 3e82806b97 Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
 "I Was Almost Tempted To Capitalise Every Word, but then I decided I
  couldn't read it myself!

  I've also got one pull request for the sti driver outstanding.  It
  relied on a commit in Greg's tree and I didn't find out in time, that
  commit is in your tree now so I might send that along once this is
  merged.

  I also had the accidental misfortune to have access to a Skylake on my
  desk for a few days, and I've had to encourage Intel to try harder,
  which seems to be happening now.

  Here is the main drm-next pull request for 4.4.

  Highlights:

  New driver:
        vc4 driver for the Rasberry Pi VPU.
        (From Eric Anholt at Broadcom.)

  Core:
        Atomic fbdev support
        Atomic helpers for runtime pm
        dp/aux i2c STATUS_UPDATE handling
        struct_mutex usage cleanups.
        Generic of probing support.

  Documentation:
        Kerneldoc for VGA switcheroo code.
        Rename to gpu instead of drm to reflect scope.

  i915:
        Skylake GuC firmware fixes
        HPD A support
        VBT backlight fallbacks
        Fastboot by default for some systems
        FBC work
        BXT/SKL workarounds
        Skylake deeper sleep state fixes

  amdgpu:
        Enable GPU scheduler by default
        New atombios opcodes
        GPUVM debugging options
        Stoney support.
        Fencing cleanups.

  radeon:
        More efficient CS checking

  nouveau:
        gk20a instance memory handling improvements.
        Improved PGOB detection and GK107 support
        Kepler GDDR5 PLL statbility improvement
        G8x/GT2xx reclock improvements
        new userspace API compatiblity fixes.

  virtio-gpu:
        Add 3D support - qemu 2.5 has it merged for it's gtk backend.

  msm:
        Initial msm88896 (snapdragon 8200)

  exynos:
        HDMI cleanups
        Enable mixer driver byt default
        Add DECON-TV support

  vmwgfx:
        Move to using memremap + fixes.

  rcar-du:
        Add support for R8A7793/4 DU

  armada:
        Remove support for non-component mode
        Improved plane handling
        Power savings while in DPMS off.

  tda998x:
        Remove unused slave encoder support
        Use more HDMI helpers
        Fix EDID read handling

  dwhdmi:
        Interlace video mode support for ipu-v3/dw_hdmi
        Hotplug state fixes
        Audio driver integration

  imx:
        More color formats support.

  tegra:
        Minor fixes/improvements"

[ Merge fixup: remove unused variable 'dev' that had all uses removed in
  commit 4e270f088011: "drm/gem: Drop struct_mutex requirement from
  drm_gem_mmap_obj" ]

* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (764 commits)
  drm/vmwgfx: Relax irq locking somewhat
  drm/vmwgfx: Properly flush cursor updates and page-flips
  drm/i915/skl: disable display side power well support for now
  drm/i915: Extend DSL readout fix to BDW and SKL.
  drm/i915: Do graphics device reset under forcewake
  drm/i915: Skip fence installation for objects with rotated views (v4)
  vga_switcheroo: Drop client power state VGA_SWITCHEROO_INIT
  drm/amdgpu: group together common fence implementation
  drm/amdgpu: remove AMDGPU_FENCE_OWNER_MOVE
  drm/amdgpu: remove now unused fence functions
  drm/amdgpu: fix fence fallback check
  drm/amdgpu: fix stoping the scheduler timeout
  drm/amdgpu: cleanup on error in amdgpu_cs_ioctl()
  drm/i915: Fix locking around GuC firmware load
  drm/amdgpu: update Fiji's Golden setting
  drm/amdgpu: update Fiji's rev id
  drm/amdgpu: extract common code in vi_common_early_init
  drm/amd/scheduler: don't oops on failure to load
  drm/amdgpu: don't oops on failure to load (v2)
  drm/amdgpu: don't VT switch on suspend
  ...
2015-11-10 09:33:06 -08:00
Andrew Morton 79211c8ed1 remove abs64()
Switch everything to the new and more capable implementation of abs().
Mainly to give the new abs() a bit of a workout.

Cc: Michal Nazarewicz <mina86@mina86.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-11-09 15:11:24 -08:00
Dave Airlie 596a1d32bb drm/tegra: Changes for v4.4-rc1
Just a couple of minor fixes and cleanups for this cycle.
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Merge tag 'drm/tegra/for-4.4-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.4-rc1

Just a couple of minor fixes and cleanups for this cycle.

* tag 'drm/tegra/for-4.4-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: dc: Request/free syncpoint at init/exit
  drm/tegra: fb: Remove gratuituous blank line
  gpu: host1x: Fix MLOCK's debug info
2015-11-05 11:07:03 +10:00
Thierry Reding 2bcdcbfae2 drm/tegra: dc: Request/free syncpoint at init/exit
syncpoints are resources provided by host1x and their lifetime is tied
to the host1x device. They are not properly reference counted either, so
removing the host1x device before any of its clients causes a use-after-
free error. Adding proper reference counting would be a major enterprise
so work around it for now by requesting and freeing the syncpoint at
init and exit time, respectively. The host1x device is guaranteed to be
around at this point.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-30 18:40:52 +01:00
Thierry Reding c8a8067f7d drm/tegra: fb: Remove gratuituous blank line
This was introduced by mistake in commit 0f7d9052fb ("drm/tegra: Use
new drm_fb_helper functions"). Remove it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-30 16:54:41 +01:00
Daniel Vetter f8c47144bf drm/<drivers>: Drop DRM_UNLOCKED from modeset drivers
Just one special case (since i915 lost its ums code, yay):
- radeon: Has slots for the old ums ioctls which don't have
  DRM_UNLOCKED, but all filled with drm_invalid_op. So ok to drop it
  everywhere.

Every other kms driver just has DRM_UNLOCKED for all their ioctls, as
they should.

v2: admgpu happened, include that one too. And i915 lost its UMS
support which means we can change all the i915 ioctls too.

v3: Rebased on top of new vmwgfx DX interface extensions.

v4: Rebase on top of render-node support in exynos.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-10-16 15:50:54 +02:00
Thierry Reding 88e72717c2 drm/irq: Use unsigned int pipe in public API
This continues the pattern started in commit cc1ef118fc ("drm/irq:
Make pipe unsigned and name consistent"). This is applied to the public
APIs and driver callbacks, so pretty much all drivers need to be updated
to match the new prototypes.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Jianwei Wang <jianwei.wang.chn@gmail.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: David Airlie <airlied@linux.ie>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Mark Yao <mark.yao@rock-chips.com>
Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Cc: Vincent Abriou <vincent.abriou@st.com>
Cc: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-10-06 12:57:47 +02:00
Ville Syrjälä f993406182 drm/tegra: Handle I2C_WRITE_STATUS_UPDATE for address only writes
A address-only I2C_WRITE can't be replied with a short i2c ack, but I
suppose it could be replied with an i2c defer. So the code should be
prepared for an address-only I2C_WRITE_STATUS_UPDATE.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-09-08 20:15:42 +02:00
Ville Syrjälä 2b712be72f drm/dp: s/I2C_STATUS/I2C_WRITE_STATUS_UPDATE/
Rename the I2C_STATUS request to I2C_WRITE_STATUS_UPDATE to match the
spec.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-09-08 20:12:38 +02:00
Daniel Vetter aef9dbb8f7 drm/atomic-helper: Add option to update planes only on active crtc
With drivers supporting runtime pm it's generally not a good idea to
touch the hardware when it's off. Add an option to the commit_planes
helper to support this case.

Note that the helpers already add all planes on a crtc when a modeset
happens, hence plane updates will not be lost if drivers set this to
true.

v2: Check for NULL state->crtc before chasing the pointer. Also check
both old and new crtc if there's a switch. Finally just outright
disallow switching crtcs for a plane if the plane is in active use, on
most hardware that doesn't make sense.

v3: Since commit_planes(active_only = true) is for enabling things
only after all the crtc are on we should only look at the new crtc to
decide whether to call the plane hooks - if the current CRTC isn't on
then skip. If the old crtc (when moving a plane) went down then the
plane should have been disabled as part of the pipe shutdown work
already. For which there's currently no helper really unfortunately.
Also move the check for wether a plane gets a new CRTC assigned while
still in active use out of this patch.

v4: Rebase over exynos changes.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-09-08 13:49:08 +02:00
Maarten Lankhorst 844f9111f6 drm/atomic: Make prepare_fb/cleanup_fb only take state, v3.
This removes the need to separately track fb changes i915.
That will be done as a separate commit, however.

Changes since v1:
- Add dri-devel to cc.
- Fix a check in intel's prepare and cleanup fb to take rotation
  into account.
Changes since v2:
- Split out i915 changes to a separate commit.

Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
[danvet: Squash in msm fixup from Maarten.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-09-08 13:45:54 +02:00
Dave Airlie bef2c7bd57 drm/tegra: Changes for v4.3-rc1
There are a bunch of non-critical fixes here that I've collected over
 the past few months, but the biggest part is Tegra210 support, in the
 DC, DSI and SOR/HDMI drivers.
 
 Also this finally restores DPMS with atomic mode-setting, something
 that has been broken since the conversion and which I had originally
 expected to take far less longer to fix.
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Merge tag 'drm/tegra/for-4.3-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.3-rc1

There are a bunch of non-critical fixes here that I've collected over
the past few months, but the biggest part is Tegra210 support, in the
DC, DSI and SOR/HDMI drivers.

Also this finally restores DPMS with atomic mode-setting, something
that has been broken since the conversion and which I had originally
expected to take far less longer to fix.

* tag 'drm/tegra/for-4.3-rc1' of git://anongit.freedesktop.org/tegra/linux: (41 commits)
  drm/tegra: sor: Add HDMI support
  drm/tegra: sor: Add Tegra210 eDP support
  drm/tegra: dc: Implement atomic DPMS
  drm/tegra: sor: Restore DPMS
  drm/tegra: dsi: Restore DPMS
  drm/tegra: hdmi: Restore DPMS
  drm/tegra: rgb: Restore DPMS
  drm/tegra: sor: Use DRM debugfs infrastructure for CRC
  drm/tegra: sor: Write correct head state registers
  drm/tegra: sor: Constify display mode
  drm/tegra: sor: Reset the correct debugfs fields
  drm/tegra: sor: Set minor after debugfs initialization
  drm/tegra: sor: Provide error messages in probe
  drm/tegra: sor: Rename registers for consistency
  drm/tegra: dpaux: Disable interrupt when detached
  drm/tegra: dpaux: Configure pads as I2C by default
  drm/tegra: dpaux: Provide error message in probe
  drm/tegra: dsi: Add Tegra210 support
  drm/tegra: dsi: Add Tegra132 support
  drm/tegra: dsi: Add Tegra124 support
  ...
2015-08-17 15:52:39 +10:00
Thierry Reding 459cc2c680 drm/tegra: sor: Add HDMI support
The SOR1 introduced on Tegra210 supports HDMI 2.0 and DisplayPort. Add
HDMI support and name the debugfs node after the type of SOR. The SOR
introduced with Tegra124 is known simply as "sor", whereas the
additional SOR found on Tegra210 is known as "sor1".

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:37 +02:00
Thierry Reding 3309ac8362 drm/tegra: sor: Add Tegra210 eDP support
The SOR found on Tegra210 is very similar to the version found on
Tegra124, except that it no longer supports LVDS.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:36 +02:00
Thierry Reding 003fc84877 drm/tegra: dc: Implement atomic DPMS
Move all code into the new canonical ->disable() and ->enable() helper
callbacks so that they play extra nice with atomic DPMS.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:36 +02:00
Thierry Reding 850bab4480 drm/tegra: sor: Restore DPMS
In order to restore DPMS with atomic mode-setting, move all code from
the ->mode_set() callback into ->enable(). At the same time, rename the
->prepare() callback to ->disable() to use the names preferred by atomic
mode-setting. This simplifies the calling sequence and will allow DPMS
to use runtime PM in subsequent patches.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:35 +02:00
Thierry Reding 171e2e6dd9 drm/tegra: dsi: Restore DPMS
In order to restore DPMS with atomic mode-setting, move all code from
the ->mode_set() callback into ->enable(). At the same time, rename the
->prepare() callback to ->disable() to use the names preferred by atomic
mode-setting. This simplifies the calling sequence and will allow DPMS
to use runtime PM in subsequent patches.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:23 +02:00
Thierry Reding 29871b21c4 drm/tegra: hdmi: Restore DPMS
In order to restore DPMS with atomic mode-setting, move all code from
the ->mode_set() callback into ->enable(). At the same time, rename the
->prepare() callback to ->disable() to use the names preferred by atomic
mode-setting. This simplifies the calling sequence and will allow DPMS
code to use runtime PM in subsequent patches.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:49:11 +02:00
Thierry Reding 32c3dee11e drm/tegra: rgb: Restore DPMS
In order to restore DPMS with atomic mode-setting, move all code from
the ->mode_set() callback into ->enable(). At the same time, rename the
->prepare() callback to ->disable() to use the names preferred by atomic
mode-setting. This simplifies the calling sequence and will allow DPMS
code to use runtime PM in subsequent patches.

While at it, remove the enabled field that hasn't been used since the
demidlayering of the output drivers done in preparation for the atomic
mode-setting conversion.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:48:54 +02:00
Thierry Reding 530239a8b8 drm/tegra: sor: Use DRM debugfs infrastructure for CRC
Instead of duplicating most of the code to set up a debugfs file, use
the existing DRM core debugfs infrastructure instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:57 +02:00
Thierry Reding 51511d05de drm/tegra: sor: Write correct head state registers
The head state registers are per head, so they must be properly indexed.
This has worked fine so far because all boards with eDP use it as the
primary output, so it is very likely to end up attached to head 0.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:56 +02:00
Thierry Reding 8044449556 drm/tegra: sor: Constify display mode
The data structure is always only read, never written, and can hence be
referred to by a const pointer.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:56 +02:00
Thierry Reding 066d30f8c7 drm/tegra: sor: Reset the correct debugfs fields
When tearing down debugfs support, make sure to reset the fields to NULL
in the correct order, otherwise the debugfs root will not be properly
removed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:55 +02:00
Thierry Reding 3ff1f22c88 drm/tegra: sor: Set minor after debugfs initialization
The DRM minor is needed to teardown debugfs, so it needs to be tracked
to prevent a crash on driver removal.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:53 +02:00
Thierry Reding 4dbdc740c4 drm/tegra: sor: Provide error messages in probe
When probing the SOR device fails, output proper error messages to help
diagnose the cause of the failure.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:51 +02:00
Thierry Reding a9a9e4fd7c drm/tegra: sor: Rename registers for consistency
The TRM lists indexed registers without an underscore to separate name
from index. Use that convention in the driver for consistency.

While at it, rename some of the field names to the names used in the
TRM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:50 +02:00
Thierry Reding 9e532b3ad9 drm/tegra: dpaux: Disable interrupt when detached
When the DPAUX isn't attached to an SOR the interrupts are not useful.
This also prevents a race that could potentially cause a crash on driver
removal.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:49 +02:00
Thierry Reding 3227166c3b drm/tegra: dpaux: Configure pads as I2C by default
The DPAUX code paths already configure the pads in AUX mode, but there
is no way to reconfigure them in I2C mode for HDMI (the DPAUX module is
unused in that case). Enabling the pads in I2C mode by default is the
quickest way to support HDMI. Eventually this may need an explicit call
in the user drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:47 +02:00
Thierry Reding 08f580ef2f drm/tegra: dpaux: Provide error message in probe
When probing the dpaux device fails, output proper error messages to
help diagnose the cause of the failure.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:46 +02:00
Thierry Reding ddfb406b2f drm/tegra: dsi: Add Tegra210 support
The DSI host controller hasn't changed from Tegra132 to Tegra210, but
different characterization parameters may be required.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:45 +02:00
Thierry Reding c06c793084 drm/tegra: dsi: Add Tegra132 support
The DSI host controller hasn't changed from Tegra124 to Tegra132, but
different characterization parameters may be required.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:44 +02:00
Thierry Reding 7d3385875b drm/tegra: dsi: Add Tegra124 support
The DSI host controller hasn't changed from Tegra114 to Tegra124, but
different characterization parameters may be required.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:44 +02:00
Thierry Reding b8be0bdbd5 drm/tegra: dsi: Use proper back-porch for non-sync video mode
In video modes without sync pulses, the horizontal back-porch needs to
include the horizontal sync width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:44 +02:00
Thierry Reding 472a6d1fd5 drm/tegra: dc: Rename BASE_COLOR_SIZE* fields
Use an underscore to separate the prefix from the color size suffix.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:43 +02:00
Thierry Reding 76ac3284bb drm/tegra: dc: Don't explicitly set owner module
The call to platform_driver_register() will already set up the .owner
field, so there's no need to do it explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:43 +02:00
Thierry Reding 8fd3ffa902 drm/tegra: dc: Rename register for consistency
The horizontal pulse enable bits are named H_PULSE{0,1,2}_ENABLE in the
TRM. Modify the driver to use the same naming for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:43 +02:00
Thierry Reding 791ddb1e1c drm/tegra: dc: Record statistics
Record interrupt statistics, such as the number of frames and VBLANKs
received and the number of FIFO underflow and overflows.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:43 +02:00
Thierry Reding 01a5da0c10 drm/tegra: dc: Request syncpoint earlier
Request a syncpoint for display prior to registering the host1x client.
This will ensure that the syncpoint will be acquired when the KMS driver
initializes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:42 +02:00
Thierry Reding e83dcb5bb6 drm/tegra: dc: Remove gratuituous blank line
Blank lines at the end of functions are hideous, so get rid of it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:42 +02:00
Thierry Reding a1df3b2488 drm/tegra: dc: Clarify comment about cursor treatment
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:42 +02:00
Thierry Reding 6ca1f62f0d drm/tegra: dc: Implement CRC debugfs interface
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:41 +02:00
Thierry Reding 5b4f516f5c drm/tegra: dc: Add Tegra210 support
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:41 +02:00
Thierry Reding 31930d4d08 drm/tegra: dc: Reset VBLANK to off
Upon driver load, reset the VBLANK machinery to off to reflect the
hardware state. Since the ->reset() callback is called from the initial
drm_mode_config_reset() call, move the latter after the VBLANK machinery
initialization by drm_vblank_init().

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:40 +02:00
Thierry Reding fb36d0eed4 drm/tegra: output: Support low-active hotplug detect
Support low-active hotplug detect signals by storing the GPIO flags
parsed from device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:40 +02:00
Thierry Reding a13f1dc4c3 drm/tegra: Use SIMPLE_DEV_PM_OPS
Use this macro to reduce some of the boilerplate.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:24 +02:00
Thierry Reding cdc630b6c6 drm/tegra: Allow VBLANK to be disabled
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:22 +02:00
Archit Taneja 0f7d9052fb drm/tegra: Use new drm_fb_helper functions
Use the newly created wrapper drm_fb_helper functions instead of calling
core fbdev functions directly. They also simplify the fb_info creation.

v2:
- Fix up error handling path in tegra_fbdev_probe

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: "Terje Bergström" <tbergstrom@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-08-06 14:12:57 +02:00
Maarten Lankhorst 9a69a9ac20 drm: Make the connector dpms callback return a value, v2.
This is required to properly handle failing dpms calls.
When making a wait in i915 interruptible, I've noticed
that the dpms sequence could fail with -ERESTARTSYS because
it was waiting interruptibly for flips. So from now on
allow drivers to fail in their connector dpms callback.

Encoder and crtc dpms callbacks are unaffected.

Changes since v1:
- Update kerneldoc for the drm helper functions.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[danvet: Resolve conflicts due to different merge order.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-07-27 16:23:28 +02:00
Maarten Lankhorst 613d2b2721 drm/atomic: pass old crtc state to atomic_begin/flush.
In intel it's useful to keep track of some state changes with old
crtc state vs new state, for example to disable initial planes or
when a modeset's prevented during fastboot.

Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
[danvet: squash in fixup for exynos provided by Maarten.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-07-27 16:23:22 +02:00
Dave Airlie c861acc4d5 drm/tegra: Changes for v4.2-rc1
This contains a couple of mostly fixes for issues that have crept up in
 recent versions of linux-next. One issue is that DP AUX transactions of
 more than 4 bytes will access the wrong FIFO registers and hence become
 corrupt. Another fix is required to restore functionality of Tegra20 if
 using the GART. The current code expects the IOMMU aperture to be the
 complete 4 GiB address space, whereas the GART on Tegra20 only provides
 a 128 MiB aperture. One more issue with IOMMU support is that on 64-bit
 ARM, swiotlb is the default IOMMU implementation backing the DMA API. A
 side-effect of that is that when dma_map_sg() is called to flush caches
 (yes, this is a bit of a hack, but ARM does not provide a better API),
 swiotlb will immediately run out of memory because its bounce buffer is
 too small to make a framebuffer.
 
 Finally I've included a mostly cosmetic fix that stores register values
 in u32 rather than unsigned long to avoid sign-extension issues on 64-
 bit ARM. This is only a precaution since it hasn't caused any issues
 (yet).
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Merge tag 'drm/tegra/for-4.2-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.2-rc1

This contains a couple of mostly fixes for issues that have crept up in
recent versions of linux-next. One issue is that DP AUX transactions of
more than 4 bytes will access the wrong FIFO registers and hence become
corrupt. Another fix is required to restore functionality of Tegra20 if
using the GART. The current code expects the IOMMU aperture to be the
complete 4 GiB address space, whereas the GART on Tegra20 only provides
a 128 MiB aperture. One more issue with IOMMU support is that on 64-bit
ARM, swiotlb is the default IOMMU implementation backing the DMA API. A
side-effect of that is that when dma_map_sg() is called to flush caches
(yes, this is a bit of a hack, but ARM does not provide a better API),
swiotlb will immediately run out of memory because its bounce buffer is
too small to make a framebuffer.

Finally I've included a mostly cosmetic fix that stores register values
in u32 rather than unsigned long to avoid sign-extension issues on 64-
bit ARM. This is only a precaution since it hasn't caused any issues
(yet).

* tag 'drm/tegra/for-4.2-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: dpaux: Registers are 32-bit
  drm/tegra: gem: Flush pages after allocation
  drm/tegra: gem: Take into account IOMMU aperture
  drm/tegra: dpaux: Fix transfers larger than 4 bytes
2015-06-18 12:53:54 +10:00
Thierry Reding 8a8005e3e1 drm/tegra: dpaux: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The DPAUX registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-06-12 16:26:04 +02:00
Thierry Reding fd73caa5e7 drm/tegra: gem: Flush pages after allocation
Pages allocated from shmemfs don't end up being cleared and flushed on
ARMv7, so they must be flushed explicitly. Use the DMA mapping API for
that purpose, even though it's not used for anything else.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-06-12 16:25:40 +02:00
Thierry Reding 4553f733c6 drm/tegra: gem: Take into account IOMMU aperture
The IOMMU may not always be able to address 2 GiB of memory. On Tegra20,
the GART supports 32 MiB starting at 0x58000000. Also the aperture on
Tegra30 and later is in fact the full 4 GiB, rather than just 2 GiB as
currently assumed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-06-12 16:23:50 +02:00
Thierry Reding 3c1dae0a07 drm/tegra: dpaux: Fix transfers larger than 4 bytes
The DPAUX read/write FIFO registers aren't sequential in the register
space, causing transfers larger than 4 bytes to cause accesses to non-
existing FIFO registers.

Fixes: 6b6b604215 ("drm/tegra: Add eDP support")
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-06-12 16:22:46 +02:00
Mario Kleiner 3790e395b8 drm/tegra: Don't use vblank_disable_immediate on incapable driver.
Tegra would not only need a hardware vblank counter that
increments at leading edge of vblank, but also support
for instantaneous high precision vblank timestamp queries, ie.
a proper implementation of dev->driver->get_vblank_timestamp().

Without these, there can be off-by-one errors during vblank
disable/enable if the scanout is inside vblank at en/disable
time, and additionally clients will never see any useable
vblank timestamps when querying via drmWaitVblank ioctl. This
would negatively affect swap scheduling under X11 and Wayland.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 20:56:34 +10:00
Sumit Semwal d8fbe341be dma-buf: cleanup dma_buf_export() to make it easily extensible
At present, dma_buf_export() takes a series of parameters, which
makes it difficult to add any new parameters for exporters, if required.

Make it simpler by moving all these parameters into a struct, and pass
the struct * as parameter to dma_buf_export().

While at it, unite dma_buf_export_named() with dma_buf_export(), and
change all callers accordingly.

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
2015-04-21 14:47:16 +05:30
Dave Airlie 1ddd36eda1 drm/tegra: Changes for v4.1-rc1
Perhaps the most noteworthy change in this set is the implementation of
 a hardware VBLANK counter using host1x syncpoints. The SOR registers can
 now be dumped via debugfs, which can be useful while debugging. The IOVA
 address space maintained by the driver can also be dumped via debugfs.
 
 Other than than, these changes are mostly cleanup work, such as making
 register names more consistent or removing unused code (that was left
 over after the atomic mode-setting conversion). There's also a fix for
 eDP that makes the driver cope with firmware that already initialized
 the display (such as the firmware on the Tegra-based Chromebooks).
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Merge tag 'drm/tegra/for-4.1-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.1-rc1

Perhaps the most noteworthy change in this set is the implementation of
a hardware VBLANK counter using host1x syncpoints. The SOR registers can
now be dumped via debugfs, which can be useful while debugging. The IOVA
address space maintained by the driver can also be dumped via debugfs.

Other than than, these changes are mostly cleanup work, such as making
register names more consistent or removing unused code (that was left
over after the atomic mode-setting conversion). There's also a fix for
eDP that makes the driver cope with firmware that already initialized
the display (such as the firmware on the Tegra-based Chromebooks).

* tag 'drm/tegra/for-4.1-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: sor: Reset during initialization
  drm/tegra: gem: Return 64-bit offset for mmap(2)
  drm/tegra: hdmi: Name register fields consistently
  drm/tegra: hdmi: Resets are synchronous
  drm/tegra: dc: Document tegra_dc_state_setup_clock()
  drm/tegra: dc: Remove unused callbacks
  drm/tegra: dc: Remove unused function
  drm/tegra: dc: Use base atomic state helpers
  drm/atomic: Add helpers for state-subclassing drivers
  drm/tegra: dc: Implement hardware VBLANK counter
  gpu: host1x: Export host1x_syncpt_read()
  drm/tegra: sor: Dump registers via debugfs
  drm/tegra: sor: Registers are 32-bit
  drm/tegra: Provide debugfs file for the IOVA space
  drm/tegra: dc: Check for valid parent clock
2015-04-08 11:13:06 +10:00
Tomeu Vizoso 535a65db48 drm/tegra: sor: Reset during initialization
As there isn't a way for the firmware on the Nyan Chromebooks to hand
over the display to the kernel, and the kernel isn't redoing the whole
configuration at present.

With this patch, the SOR is brought to a known state and we get correct
display on every boot.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:49:24 +02:00
Thierry Reding 5c1c071a36 drm/tegra: hdmi: Name register fields consistently
Name the fields of the SOR_SEQ_CTL register consistently.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:49:23 +02:00
Thierry Reding 375e118437 drm/tegra: hdmi: Resets are synchronous
Resets on Tegra are synchronous, so keep the clock enabled while
asserting the reset.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:49:22 +02:00
Thierry Reding 9d910b6068 drm/tegra: dc: Document tegra_dc_state_setup_clock()
This function is called by output drivers so should be documented. While
at it, move it to a more appropriate location.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:49:22 +02:00
Thierry Reding d0852ab9bb drm/tegra: dc: Remove unused callbacks
The ->mode_set() and ->mode_set_base() callbacks are no longer used with
full atomic mode-setting drivers, so remove them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:49:21 +02:00
Thierry Reding 3774363c75 drm/tegra: dc: Remove unused function
The tegra_dc_setup_clock() function is unused after the conversion to
atomic mode-setting, so remove it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:49:21 +02:00
Thierry Reding 3b59b7ac02 drm/tegra: dc: Use base atomic state helpers
Instead of duplicating the code, make use of the newly introduced atomic
state duplicate and destroy helpers. This allows changes to the base
atomic state handling to automatically propagate to the Tegra driver and
thereby prevent breakage resulting from both copies going out of sync.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:49:20 +02:00
Thierry Reding 42e9ce0523 drm/tegra: dc: Implement hardware VBLANK counter
The display controller on Tegra can use syncpoints to count VBLANK
events. syncpoints are 32-bit unsigned integers, so well suited as
VBLANK counters.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:46:21 +02:00
Thierry Reding dab163366a drm/tegra: sor: Dump registers via debugfs
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:46:18 +02:00
Thierry Reding 28fe207600 drm/tegra: sor: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The SOR registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:46:16 +02:00
Thierry Reding 28c23373b8 drm/tegra: Provide debugfs file for the IOVA space
The Tegra DRM driver uses a single IO virtual address space for buffer
mappings. Provide a table of the address space usage in debugfs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:46:14 +02:00
Thierry Reding d29827484b drm/tegra: dc: Check for valid parent clock
Check that the desired parent clock is indeed a valid parent for the
display controller clock. This is purely cosmetic at this point since
the parent clocks are specified in DT and all the currently defined
parents are in fact valid parents of the display controller clock.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-04-02 18:46:13 +02:00
Dave Airlie a8c6ecb3be Linux 4.0-rc3
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Merge tag 'v4.0-rc3' into drm-next

Linux 4.0-rc3 backmerge to fix two i915 conflicts, and get
some mainline bug fixes needed for my testing box

Conflicts:
	drivers/gpu/drm/i915/i915_drv.h
	drivers/gpu/drm/i915/intel_display.c
2015-03-09 19:58:30 +10:00
Tvrtko Ursulin d136dfeec8 drm: Pass in new and old plane state to prepare_fb and cleanup_fb
Use cases like rotation require these hooks to have some context so they
know how to prepare and cleanup the frame buffer correctly.

For i915 specifically, object backing pages need to be mapped differently
for different rotation modes and the driver needs to know which mapping to
instantiate and which to tear down when transitioning between them.

v2: Made passed in states const. (Daniel Vetter)

[airlied: add mdp5 and atmel fixups]
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-05 09:49:02 +10:00
Daniel Vetter 1af434a928 drm/atomic-helper: Rename commmit_post/pre_planes
These names only make sense because of backwards compatability with
the order used by the crtc helper library. There's not really any real
requirement in the ordering here.

So rename them to something more descriptive and update the kerneldoc
a bit. Motivated in a discussion with Laurent about how to restore
plane state for dpms for drivers with runtime pm.

v2: Squash in fixup from Stephen Rothwell to fix a conflict with
tegra.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2015-02-24 01:57:46 +01:00
Thierry Reding 07d05cbf60 drm/tegra: dc: Move more code into ->init()
The code in tegra_crtc_prepare() really belongs in tegra_dc_init(), or
at least most of it. This fixes an issue with VBLANK handling because
tegra_crtc_prepare() would overwrite the interrupt mask register that
tegra_crtc_enable_vblank() had written to to enable VBLANK interrupts.

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-02-19 14:21:51 +01:00
Thierry Reding 332bbe7003 drm/tegra: dc: Wire up CRTC parent of atomic state
Store a pointer to the CRTC in its atomic state to make it easy for
state handling code to get at the CRTC.

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-02-19 14:21:47 +01:00
Thierry Reding 567a3cd1d7 drm/tegra: dc: Reset state's active_changed field
Commit eab3bbeffd ("drm/atomic: Add drm_crtc_state->active") added the
field to track the DPMS state. However, the Tegra driver was in modified
in parallel and subclasses the CRTC atomic state, so needed to duplicate
the code in the atomic helpers. After the addition of the active_changed
field it became out of sync and doesn't reset it when duplicating state.

This causes a full modeset on things like page-flips, which will in turn
cause warnings due to the VBLANK machinery being disabled when it really
should remain on.

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-02-19 14:21:43 +01:00
Thierry Reding c03bf1bfd3 drm/tegra: hdmi: Explicitly set clock rate
Recent changes in the clock framework have caused a behavioural change
in that clocks that have not had their rate set explicitly will now be
reset to their initial rate (or 0) when the clock is released. This is
triggered in the deferred probing path, resulting in the clock running
at a wrong frequency after the successful probe.

This can be easily fixed by setting the rate explicitly rather than by
relying on the implicit rate inherited by the parent.

Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-02-19 14:21:25 +01:00
David Ung 31f40f8652 drm/tegra: Use correct relocation target offsets
When copying a relocation from userspace, copy the correct target
offset.

Signed-off-by: David Ung <davidu@nvidia.com>
Fixes: 961e3beae3 ("drm/tegra: Make job submission 64-bit safe")
Cc: stable@vger.kernel.org
[treding@nvidia.com: provide a better commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:59 +01:00
Thierry Reding 359ae687db drm/tegra: Add minimal power management
For now only disable the KMS hotplug polling helper logic upon suspend
and re-enable it on resume.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:58 +01:00
Thierry Reding 666cb87332 drm/tegra: dc: Unify enabling the display controller
Previously output drivers would enable continuous display mode and power
up the display controller at various points during the initialization.
This is suboptimal because it accesses display controller registers in
output drivers and duplicates a bit of code.

Move this code into the display controller driver and enable the display
controller as the final step of the ->mode_set_nofb() implementation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:58 +01:00
Thierry Reding 8f604f8c4d drm/tegra: Track tiling and format in plane state
Tracking these in the plane state allows them to be computed in the
->atomic_check() callback and reused when applying the configuration in
->atomic_update().

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:57 +01:00
Thierry Reding 47802b09a9 drm/tegra: Track active planes in CRTC state
Wrap struct drm_crtc_state in a driver-specific structure and add the
planes field which keeps track of which planes are updated or disabled
during a modeset. This allows atomic updates of the the display engine
at ->atomic_flush() time.

v2: open-code getting the state of the CRTC that the plane is being
    attached to (Daniel Vetter)

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:56 +01:00
Thierry Reding 3f0fb52ef0 drm/tegra: Remove unused ->mode_fixup() callbacks
All output drivers have now been converted to use the ->atomic_check()
callback, so the ->mode_fixup() callbacks are no longer used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:56 +01:00
Thierry Reding 1503ca47d7 drm/tegra: Atomic conversion, phase 3, step 3
Provide a custom ->atomic_commit() implementation which supports async
commits. The generic atomic page-flip helper can use this to implement
page-flipping.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:55 +01:00
Thierry Reding 74f48791ad drm/tegra: Atomic conversion, phase 3, step 2
Replace drm_crtc_helper_set_config() by drm_atomic_helper_set_config().
All drivers have now been converted to use ->atomic_check() to set the
atomic state, therefore the atomic mode setting helpers can be used.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:55 +01:00
Thierry Reding 76d59ed049 drm/tegra: dc: Use atomic clock state in modeset
All clock state is now stored in the display controller's atomic state,
so the output drivers no longer need to call back into the display
controller driver to set up the clock. This is also required to make
sure no hardware changes are made before validating a configuration.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:54 +01:00
Thierry Reding 82f1511c35 drm/tegra: sor: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:54 +01:00
Thierry Reding a9825a6e27 drm/tegra: hdmi: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:53 +01:00
Thierry Reding ebd14afe8f drm/tegra: dsi: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:53 +01:00
Thierry Reding 3cebae6737 drm/tegra: rgb: Implement ->atomic_check()
The implementation of the ->atomic_check() callback precomputes all
parameters to check if the given configuration can be applied. If so the
precomputed values are stored in the atomic state object for the encoder
and applied during modeset. In that way the modeset no longer needs to
perform any checking but simply program values into registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:53 +01:00
Thierry Reding ca915b108a drm/tegra: dc: Store clock setup in atomic state
This allows the clock setup to be separated from the clock programming
and better matches the expectations of the atomic modesetting where no
code paths must fail during modeset.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:52 +01:00
Thierry Reding 07866963b6 drm/tegra: Atomic conversion, phase 3, step 1
Switch out the regular plane helpers for the atomic plane helpers. Also
use the default atomic helpers to implement the ->atomic_check() and
->atomic_commit() callbacks. The driver now exclusively uses the atomic
interfaces.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:51 +01:00
Thierry Reding 9d44189f55 drm/tegra: Atomic conversion, phase 2
Hook up the default ->reset() and ->atomic_duplicate_state() helpers.
This ensures that state objects are properly created and framebuffer
reference counts correctly maintained.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:51 +01:00
Thierry Reding 4aa3df7149 drm/tegra: Atomic conversion, phase 1
Implement initial atomic state handling. Hook up the CRTCs, planes' and
connectors' ->atomic_destroy_state() callback to ensure that the atomic
state objects don't leak.

Furthermore the CRTC now implements the ->mode_set_nofb() callback that
is used by new helpers to implement ->mode_set() and ->mode_set_base().
These new helpers also make use of the new plane helper functions which
the driver now provides.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:50 +01:00
Thierry Reding 05f175f4f3 drm/tegra: dc: Do not needlessly deassert reset
Commit 9c0127004f ("drm/tegra: dc: Add powergate support") changed the
driver's ->probe() implementation to deassert the module reset, and with
there being nobody else to assert it until ->remove() there is no need
to deassert again later on.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:50 +01:00
Thierry Reding 328ec69e7f drm/tegra: Output cleanup functions cannot fail
The tegra_output_exit() and tegra_output_remove() functions cannot fail,
so make them return void.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:49 +01:00
Thierry Reding ea130b240d drm/tegra: Remove remnants of the output midlayer
The tegra_output midlayer is now completely gone and output drivers use
it purely as a helper library.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:49 +01:00
Thierry Reding 4009c22420 drm/tegra: debugfs cleanup cannot fail
The debugfs cleanup code never fails, so no error is returned. Therefore
the functions can all return void instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding 6fad8f66d7 drm/tegra: sor: Demidlayer
Implement encoder and connector within the eDP driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding 5b901e78b2 drm/tegra: dsi: Demidlayer
Implement encoder and connector within the DSI driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:48 +01:00
Thierry Reding 596827196f drm/tegra: hdmi: Demidlayer
Implement encoder and connector within the HDMI driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:47 +01:00
Thierry Reding 3b0e585548 drm/tegra: rgb: Demidlayer
Implement encoder and connector within the RGB driver itself using the
Tegra output helpers rather than using the Tegra output as midlayer. By
doing so one level of indirection is removed and output drivers become
more flexible while keeping the majority of the advantages provided by
the common output helpers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:47 +01:00
Thierry Reding c5a107d327 drm/tegra: Add tegra_dc_setup_clock() helper
This is a small helper that performs the basic steps required by all
output drivers to prepare the display controller for use with a given
encoder.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:46 +01:00
Thierry Reding d5bae6f33e drm/tegra: output: Make ->setup_clock() optional
In order to transition output drivers to using the struct tegra_output
as a helper rather than midlayer, make this callback optional. Instead
drivers should implement the equivalent as part of ->mode_fixup(). For
the conversion to atomic modesetting a new callback ->atomic_check()
should be implemented that updates the display controller's state with
the corresponding parent clock, rate and shift clock divider.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:46 +01:00
Thierry Reding 132085d84f drm/tegra: Convert output midlayer to helpers
The output layer was initially designed to help reduce the amount of
code duplicated in output drivers. An unfortunate side-effect of that
was that it turned into a midlayer and it became difficult to make the
output drivers work without bending over backwards to fit into the
midlayer.

This commit starts to convert the midlayer into a helper library by
exporting most of the common functions so that they can be used by the
output drivers directly. Doing so will allow output drivers to reuse
common code paths but more easily override them where necessary.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:45 +01:00
Thierry Reding 50a246aa13 drm/tegra: dc: No longer disable planes at CRTC disable
The DRM core should take care of disabling all unneeded planes, so there
is no need to do this explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:45 +01:00
Thierry Reding f991421490 drm/tegra: Move tegra_drm_mode_funcs to the core
This structure will be extended using non-framebuffer related callbacks
in subsequent patches, so it should move to a more central location.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:44 +01:00
Thierry Reding 86df256f30 drm/tegra: dc: Wait for idle when disabled
When disabling the display controller, stop it and wait for it to become
idle. Doing so ensures that no further accesses to the framebuffer occur
and the buffers can be safely unmapped or freed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Thierry Reding 36904adf21 drm/tegra: Stop CRTC at CRTC disable time
Previously output drivers would all stop the display controller in their
disable path. However with the transition to atomic modesetting the
display controller needs to be kept running until all planes have been
disabled so that software can properly determine (using VBLANK counts)
when it is safe to remove the framebuffers associated with the planes.

Moving this code into the display controller's disable path also gets
rid of the duplication of this into all output drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Thierry Reding 62b9e06321 drm/tegra: Use tegra_commit_dc() in output drivers
All output drivers have open-coded variants of this function, so export
it to remove some code duplication.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:43 +01:00
Dan Carpenter 2cb207e413 drm/tegra: gem: oops in error handling
kfree(ERR_PTR(-ENOMEM)) will not work very well.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:41 +01:00
Dan Carpenter 8643bc6d8e drm/tegra: dc: Fix bad irqsave/restore in tegra_dc_finish_page_flip()
We can't save two values to the IRQ flags at the same time so the IRQs
are not enabled at the end.  This kind of bug is easy to miss in testing
if the function is normally called with IRQs disabled so we wouldn't
enable IRQs anyway.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:40 +01:00
David Ung 2dafd63682 drm/tegra: dsi: Adjust D-PHY timing
Compliance testing shows that HS Trail is off by -12%. Increase the HS
Trail time to make this test pass.

Signed-off-by: David Ung <davidu@nvidia.com>
[treding@nvidia.com: update specification references, add comment]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:40 +01:00
Thierry Reding 201106d83e drm/tegra: dsi: Reset across ->exit()/->init()
This allows a DRM driver unload/reload cycle to completely reset the DSI
controller and may help in situations where it's broken.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:39 +01:00
Thierry Reding 92f0e073ed drm/tegra: dsi: Soft-reset controller on ->disable
This reset is necessary to properly clean up the internal state of the
controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:39 +01:00
Thierry Reding 9c0b4ca112 drm/tegra: dsi: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The DSI registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:38 +01:00
Thierry Reding 4ee8cee0c5 drm/tegra: hdmi: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The HDMI registers are 32 bits wide irrespective of the architecture's
data width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding fb35c6b60e drm/tegra: dc: Return planar flag for non-YUV modes
This prevents the compiler from warning about using a variable that is
possibly uninitialized.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding d700ba7a66 drm/tegra: dc: Describe register copies
Most of the display controller's registers are double-buffered, a few of
them are triple-buffered. The ASSEMBLY shadow copy is latched intto the
ACTIVE copy for double-buffered registers. For triple-buffered registers
the ASSEMBLY copy is first latched into the ARM copy.

Latching into the ACTIVE copy happens immediately if the controller is
inactive. Otherwise the latching happens on the next frame boundary. The
latching of the ASSEMBLY into the ARM copy happens immediately. Latching
is controlled by a set of *_ACT_REQ and *_UPDATE bits in the
DC_CMD_STATE_CONTROL register.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:37 +01:00
Thierry Reding 42d0659ba7 drm/tegra: dc: Initialize border color
Tegra114 and earlier support specifying the color of the border (i.e.
the active area of the screen that is not covered by any of the overlay
windows). By default this is set to a light blue, so set it to black to
comply with the requirements set by atomic modesetting.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:36 +01:00
Dan Carpenter bf19b885f9 drm/tegra: Check for NULL pointer instead of IS_ERR()
iommu_domain_alloc() returns NULL on error, it never returns error
pointers.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:36 +01:00
Thierry Reding 518e6227af drm/tegra: plane: Use proper possible_crtcs mask
The possible_crtcs mask needs to be a mask of CRTC indices. There is no
guarantee that the DRM indices match the hardware pipe number, so the
mask must be computed from the CRTC index.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:35 +01:00
Thierry Reding aa942f6ac4 drm/tegra: Remove redundant zeroing out of memory
The DRM core now zeroes out the memory associated with CRTC, encoder and
connector objects upon cleanup, so there's no need to explicitly do that
in drivers anymore.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:34 +01:00
Thierry Reding 8c8cb58ed6 drm/tegra: gem: Use iommu_map_sg()
The iommu_map_sg() function is now available in the IOMMU API, so drop
the open-coded variant.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:14:34 +01:00
Thierry Reding f4c5cf88fb gpu: host1x: Provide a proper struct bus_type
Previously the struct bus_type exported by the host1x infrastructure was
only a very basic skeleton. Turn that implementation into a more full-
fledged bus to support proper probe ordering and power management.

Note that the bus infrastructure needs to be available before any of the
drivers can be registered. This is automatically ensured if all drivers
are built as loadable modules (via symbol dependencies). If all drivers
are built-in there are no such guarantees and the link order determines
the initcall ordering. Adjust drivers/gpu/Makefile to make sure that the
host1x bus infrastructure is initialized prior to any of its users (only
drm/tegra currently).

v2: Fix building host1x and tegra-drm as modules
    Reported-by: Dave Airlie <airlied@gmail.com>

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27 10:09:14 +01:00
Dave Airlie e5202a2289 Merge tag 'topic/core-stuff-2014-12-19' of git://anongit.freedesktop.org/drm-intel into drm-next
Misc drm patches with mostly polish patches from Thierry, with a bit of
generic mode validation from Ville and a few other oddball things.

* tag 'topic/core-stuff-2014-12-19' of git://anongit.freedesktop.org/drm-intel: (25 commits)
  drm: Include drm_crtc_helper.h in DocBook
  drm: Make drm_crtc_helper.h standalone includible
  drm: Move IRQ related fields to proper section
  drm: Remove stale comment
  drm: Do basic sanity checks for user modes
  drm: Perform basic sanity checks on probed modes
  drm: Reorganize probed mode validation
  drm/doc: Remove duplicate "by"
  drm/info: Remove unused code
  drm/cache: Use wbinvd helpers
  drm/plane-helper: Test for plane disable earlier
  drm/doc: Document drm_add_modes_noedid() usage
  drm: bit of spell-check / editorializing.
  drm: Prefer sizeof(type) over sizeof type
  drm: Remove useless else block
  drm: Remove unneeded braces for single statement blocks
  drm: Do not assign in if condition
  drm: Prefer kmalloc_array() over kmalloc() with multiply
  drm: Prefer kcalloc() over kzalloc() with multiply
  drm: Miscellaneous checkpatch whitespace cleanups
  ...
2015-01-09 09:13:41 +10:00
Sean Paul 93396d0f9c drm/tegra: dc: Select root window for event dispatch
In finish pageflip, the driver was not selecting the root window when
dispatching events. This exposed a race where a plane update would
change the window selection and cause tegra_dc_finish_page_flip to check
the wrong base address.

This patch also protects access to the window selection register as well
as the registers affected by it.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:39 +01:00
Thierry Reding 73c42c7976 drm/tegra: gem: Use the proper size for GEM objects
If the requested buffer size wasn't a multiple of the page size, the
IOMMU code would round down the size to the next multiple of the page
size, thereby causing translation errors. To fix this we no longer pass
around the requested size but reuse the computed size of the GEM object.
This is already rounded to the next page boundary, so mapping that size
works out fine.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:38 +01:00
Thierry Reding a04251fc94 drm/tegra: gem: Flush buffer objects upon allocation
Buffers obtained via shmem may still have associated cachelines. If they
aren't properly flushed they may cause framebuffer corruption if the
cache gets flushed after the application has drawn to it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:37 +01:00
Thierry Reding 6b59cc1c86 drm/tegra: dc: Fix a potential race on page-flip completion
Page-flip completion could race with page-flip submission, so extend the
critical section to include all accesses to page-flip related data.

Reported-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:36 +01:00
Thierry Reding ed7dae58de drm/tegra: dc: Consistently use the same pipe
The hardware pipe numbers don't always match the DRM CRTC indices. This
can happen for example if the first display controller defers probe,
causing it to be registered with DRM after the second display
controller. When that happens the hardware pipe numbers and DRM CRTC
indices become different. Make sure that the CRTC index is always used
when accessing per-CRTC VBLANK data. This can be ensured by using the
drm_crtc_vblank_*() API, which will do the right thing automatically
given a struct drm_crtc *.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17 14:27:36 +01:00
Thierry Reding c422f31d56 drm/tegra: Remove dummy ->load_lut() implementation
The ->load_lut() callback is optional, therefore a dummy implementation
is not needed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-12-10 13:58:05 +01:00
Dave Airlie e8115e79aa Linux 3.18-rc7
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Merge tag 'v3.18-rc7' into drm-next

This fixes a bunch of conflicts prior to merging i915 tree.

Linux 3.18-rc7

Conflicts:
	drivers/gpu/drm/exynos/exynos_drm_drv.c
	drivers/gpu/drm/i915/i915_drv.c
	drivers/gpu/drm/i915/intel_pm.c
	drivers/gpu/drm/tegra/dc.c
2014-12-02 10:58:33 +10:00
Dave Airlie b0654103f5 drm/tegra: Changes for v3.19-rc1
The highlights in this pull request are:
 
   * IOMMU support: The Tegra DRM driver can now deal with discontiguous
     buffers if an IOMMU exists in the system. That means it can allocate
     using drm_gem_get_pages() and will map them into IOVA space via the
     IOMMU API. Similarly, non-contiguous PRIME buffers can be imported
     from a different driver, which allows better integration with gk20a
     (nouveau) and less hacks.
 
   * Universal planes: This is precursory work for atomic modesetting and
     will allow hardware cursor support to be implemented on pre-Tegra114
     where RGB cursors were not supported.
 
   * DSI ganged-mode support: The DSI controller can now gang up with a
     second DSI controller to drive high resolution DSI panels.
 
 Besides those bigger changes there is a slew of fixes, cleanups, plugged
 memory leaks and so on.
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Merge tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm/tegra: Changes for v3.19-rc1

The highlights in this pull request are:

  * IOMMU support: The Tegra DRM driver can now deal with discontiguous
    buffers if an IOMMU exists in the system. That means it can allocate
    using drm_gem_get_pages() and will map them into IOVA space via the
    IOMMU API. Similarly, non-contiguous PRIME buffers can be imported
    from a different driver, which allows better integration with gk20a
    (nouveau) and less hacks.

  * Universal planes: This is precursory work for atomic modesetting and
    will allow hardware cursor support to be implemented on pre-Tegra114
    where RGB cursors were not supported.

  * DSI ganged-mode support: The DSI controller can now gang up with a
    second DSI controller to drive high resolution DSI panels.

Besides those bigger changes there is a slew of fixes, cleanups, plugged
memory leaks and so on.

* tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (44 commits)
  drm/tegra: gem: Check before freeing CMA memory
  drm/tegra: fb: Add error codes to error messages
  drm/tegra: fb: Properly release GEM objects on failure
  drm/tegra: Detach panel when a connector is removed
  drm/tegra: Plug memory leak
  drm/tegra: gem: Use more consistent data types
  drm/tegra: fb: Do not destroy framebuffer
  drm/tegra: gem: dumb: pitch and size are outputs
  drm/tegra: Enable the hotplug interrupt only when necessary
  drm/tegra: dc: Universal plane support
  drm/tegra: dc: Registers are 32 bits wide
  drm/tegra: dc: Factor out DC, window and cursor commit
  drm/tegra: Add IOMMU support
  drm/tegra: Fix error handling cleanup
  drm/tegra: gem: Use dma_mmap_writecombine()
  drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
  drm/tegra: gem: Cleanup tegra_bo_create_with_handle()
  drm/tegra: gem: Extract tegra_bo_alloc_object()
  drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
  drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
  ...
2014-11-15 09:38:55 +10:00
Thierry Reding 7e0180e357 drm/tegra: gem: Check before freeing CMA memory
dma_free_writecombine() must not be called on a buffer that couldn't be
allocated. Check for a valid virtual address before attempting to free
the memory to avoid a crash.

Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:34 +01:00
Thierry Reding cb10c81fdf drm/tegra: fb: Add error codes to error messages
This helps in determining what errors happened at specifics points in
the initialization sequence.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:34 +01:00
Thierry Reding b88f005ea3 drm/tegra: fb: Properly release GEM objects on failure
When fbdev initialization fails, make sure to unreference the GEM
objects properly. Note that we can't do this in the general error
unwinding path because ownership of the GEM object references is
transferred to the framebuffer upon creation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:33 +01:00
Thierry Reding 9aaa0cebcb drm/tegra: Detach panel when a connector is removed
When the DRM device is torn down and the connector is removed, make sure
to detach the panel to make sure there are no dangling pointers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:33 +01:00
Thierry Reding 1053f4dd82 drm/tegra: Plug memory leak
Free the DRM device-private memory upon driver unload to make sure the
memory doesn't leak.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding 71c38629d6 drm/tegra: gem: Use more consistent data types
Use size_t consistently for sizes and u32/u64 instead of uint32_t and
uint64_t.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding 3feaf3e5ae drm/tegra: fb: Do not destroy framebuffer
Drop a reference instead of directly calling the framebuffer .destroy()
callback at fbdev free time. This is necessary to make sure the object
isn't destroyed if anyone else still has a reference.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:32 +01:00
Thierry Reding dc6057ecb3 drm/tegra: gem: dumb: pitch and size are outputs
When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB
IOCTL, only the width, height, bpp and flags parameters are inputs. The
caller is not guaranteed to zero out or set handle, pitch and size, so
the driver must not treat these values as possible inputs.

Fixes a bug where running the Weston compositor on Tegra DRM would cause
an attempt to allocate a 3 GiB framebuffer to be allocated.

Fixes: de2ba664c3 ("gpu: host1x: drm: Add memory manager and fb")
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:31 +01:00
Thierry Reding 8fc8f7da97 drm/tegra: Enable the hotplug interrupt only when necessary
The hotplug handling needs access to the DRM device, which only appears
at ->init() time. Disable interrupts up until that time. Similarly, when
an output is removed, disable the hotplug interrupt again because the
DRM device (and with it the hotplug infrastructure) is going away.

Also make sure to only access the DRM device if it's available. Given
the above change for the hotplug interrupt this should really never
happen, but the extra check doesn't hurt either.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:31 +01:00
Thierry Reding c7679306a9 drm/tegra: dc: Universal plane support
This allows the primary plane and cursor to be exposed as regular
DRM/KMS planes, which is a prerequisite for atomic modesetting and gives
userspace more flexibility over controlling them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:18:28 +01:00
Thierry Reding 03a6056976 drm/tegra: dc: Registers are 32 bits wide
Using an unsigned long type will cause these variables to become 64-bit
on 64-bit SoCs. In practice this should always work, but there's no need
for carrying around the additional 32 bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:17:03 +01:00
Thierry Reding 205d48edee drm/tegra: dc: Factor out DC, window and cursor commit
The sequence to commit changes to the DC, window or cursor configuration
is repetitive and can be extracted into separate functions for ease of
use.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13 16:17:01 +01:00