Commit Graph

25 Commits

Author SHA1 Message Date
Keyon Jie 0267de58ac
ASoC: SOF: Intel: CNL: add support for sending compact IPC
For compact IPCs, we will send the IPC header/command via the HIPCIDR
register and the first 32bit payload via the HIPCIDD register, no
mailbox will be used.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191025224122.7718-19-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-28 14:44:37 +00:00
Keyon Jie 73b5195712
ASoC: SOF: Intel: CNL: add set_power_state() ops
Using hda_dsp_set_power_state() as set_power_state() ops for cnl to do
d0ix platform configuration updates.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191025224122.7718-6-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-28 14:41:29 +00:00
Pierre-Louis Bossart 27e322fabd
ASoC: SOF: define INFO_ flags in dsp_ops
Currently the INFO_ flags such as PAUSE/NO_PERIOD_WAKEUP are defined
in the SOF PCM core, which doesn't scale. To account for platform
variations, these flags need to be set in DSP ops.

This patch only moves the definitions and does not change any
functionality.

Reviewed-by: Jaska Uimonen <jaska.uimonen@intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191024210318.30068-2-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25 11:07:45 +01:00
Pan Xiuli 6fd9903527
ASoC: SOF: Intel: initial support to JasperLake.
Add Kconfig, PCI ID and chip info for JSL platform.
The DSP only has 2 cores for this platform.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191022194705.23347-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-23 17:46:31 +01:00
Pan Xiuli 6173269038
ASoC: SOF: Intel: initial support for Elkhart Lake
Add Kconfig, PCI ID and chip info for EHL platform.

Note that the core mask is different from previous platforms, only
Core0 can be controlled by the host. Additional patches will be
required for multi-core functionality.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20190815155749.29304-5-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-15 18:13:39 +01:00
Pan Xiuli 1205c81edd
ASoC: SOF: Intel: initial support for Tiger Lake.
Add Kconfig, PCI ID and chip info for Tiger Lake platform.

Note that the core mask is different from previous platforms, only
Core0 can be controlled by the host. Additional patches will be
required for multi-core functionality.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20190815155749.29304-3-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-15 18:13:00 +01:00
Daniel Baluta 6eebd39075
ASoC: SOF: Intel: hda: Use generic function for fw ready / mem windows creation
We can use generic sof_fw_ready function and reduce code duplication.
Careful here that we need to provide the implementation for
get_mailbox_offset and get_window_offset.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20190807150203.26359-7-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-09 13:25:22 +01:00
Kai Vehmanen 717dedb1dc
ASoC: SOF: Intel: hda: remove misleading error trace from IRQ thread
Downgrade "nothing to do in IRQ thread" message from error to a debug
message in the IPC interrupt handler thread.

The spurious wake-up can happen if a HDA stream interrupt is
raised while the IPC interrupt thread is running. IPC functionality
is not impacted by this condition, so debug is a more appropriate
trace level.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20190722141402.7194-21-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-23 12:16:53 +01:00
Kai Vehmanen 87a6fe80d5
ASoC: SOF: Intel: implement runtime idle for CNL/APL
Implement runtime idle for CNL/APL devices using similar runtime
PM idle logic as the Intel AZX HDA driver. If any HDA codecs are
powered when runtime suspend request comes, return -EBUSY. By doing
this, strict ordering is enforced between HDA codec and the HDA
controller.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Takashi Iwai <tiwai@suse.de>
Link: https://lore.kernel.org/r/20190702132428.13129-4-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-07-06 12:23:47 +01:00
Ranjani Sridharan 93146bc22f
ASoC: SOF: Intel: hda: couple host and link DMA during FE hw_free
Host and link DMA are decoupled during FE hw_params. So,
they must be coupled in hw_free if the link DMA channel
is idle.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-17 13:44:15 +01:00
Kai Vehmanen f1fd9d0e6d
ASoC: SOF: intel: extend IPC dump information
Extend the HDA IPC dump implementation with status of key IRQ
registers. This is useful to debug IPC timeouts and similar
issues.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-13 19:53:57 +01:00
Pierre-Louis Bossart 09a173a63f
ASoC: SOF: Intel: ipc: don't check for HIPCCTL register value
The HIPCCTL register controls the IPC interrupts. It can be set or
cleared to mask or enable these interrupts, but it makes no sense to
read and test its fields in an interrupt (which can only executed if
its fields are set).

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-03 17:49:17 +01:00
Pierre-Louis Bossart 3f58521bc8
ASoC: SOF: Intel: cnl-ipc: re-enable IPC IRQ at end of handler
Align with Skylake driver and enable the IRQ at end of handler,
instead of at beginning.

Also add an error log if we have nothing to do in this handler.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-03 17:48:35 +01:00
Pierre-Louis Bossart ddbe922339
ASoC: SOF: Intel: cnl-ipc: move code around for clarity
Move all register access to cnl_ipc_host_done()
No functionality change.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-03 17:48:23 +01:00
Pierre-Louis Bossart c24b1b7279
ASoC: SOF: Intel: cnl-ipc: read all IPC registers first
Align with hardware recommended sequences, and read all IPC registers
before doing any other actions. Playing with BUSY and DONE bits may
invalidate values.

The values read may not actually be necessary but at least this
provides a snapshot of the IPC registers with no consistency issues.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-03 17:48:02 +01:00
Daniel Baluta 6fbbc18ead
ASoC: SOF: Do not send cmd via SHIM register
We use shim registers only to notify the other
side that a message was sent. The actual information
for the message is transmitted via mailbox.

cmd information inside shim register is not used by
the DSP, so we remove it to avoid confusion.

Signed-off-by: Daniel Baluta <daniel.baluta@gmail.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-03 17:47:49 +01:00
Mark Brown 79b3b7c4a3
Merge branch 'asoc-5.2' into asoc-5.3 2019-05-30 16:47:43 +01:00
Guennadi Liakhovetski 1183e9a634
ASoC: SOF: ipc: fix a race, leading to IPC timeouts
Currently on all supported platforms the IPC IRQ thread first signals
the sender when an IPC response is received from the DSP, then unmasks
the IPC interrupt. Those actions are performed without holding any
locks, so the thread can be interrupted between them. IPC timeouts
have been observed in such scenarios: if the sender is woken up and it
proceeds with sending the next message without unmasking the IPC
interrupt, it can miss the next response. This patch takes a spin-lock
to prevent the IRQ thread from being preempted at that point. It also
makes sure, that the next IPC transmission by the host cannot take
place before the IRQ thread has finished updating all the required IPC
registers.

Fixes: 53e0c72d98 ("ASoC: SOF: Add support for IPC IO between DSP and Host")
Reviewed-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-28 15:48:47 +01:00
Zhu Yingjiang 630be964b5
ASoC: SOF: Intel: ICL add Icelake chip info struct
Icelake has different count of SSP other than CNL, using
the new defined ICL SSP count, and copy other parameters
from CNL chip info.

Signed-off-by: Zhu Yingjiang <yingjiang.zhu@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-13 12:43:13 +01:00
Pan Xiuli dc20e5f315
ASoC: SOF: Intel: CNL: add ipc dump function
Add ipc dump function to CNL+ platforms.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-03 15:03:16 +09:00
Ranjani Sridharan ed3baacd76
ASoC: SOF: intel: hda: add hw_params_upon_resume flag for hda stream
The prepare() ioctl for BE dai link gets called both
when the stream is started and when it is resumed from
suspend. SOF uses this ioctl to set the hw params
again only if the stream has been suspended.

When the stream is started, the hw_params ioctl gets called
before prepare() and hw_params is set for the BE dai link.
So the prepare call does not need to do anything further.

When the stream resumes after system suspend, SOF requires
that the hw_params be set again for the BE dai. In order
to determine which streams should set the hw params
during prepare(), an internal flag called "hw_params_upon_resume"
is introduced in struct sof_intel_hda_stream. The flag is set
for hda streams when the sof device suspends and is
cleared after hw_params is set.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-03 15:01:45 +09:00
Keyon Jie 6d60a39e5b
ASoC: SOF: Intel: hda-ipc: simplify handling of IPC IRQ
When using a shared IRQ between IPC interrupt and stream IOC interrupt,
the interrupt handlers need to check the interrupt source before
scheduling their respective IRQ threads. In the case of IPC handler, it
should check if it is an IPC interrupt before waking up the IPC IRQ
thread.

The IPC IRQ thread, once scheduled, does not need to check the IRQ
source again. So, remove the superfluous check in the thread. Remove the
irq_status field from snd_sof_dev struct also as it is no longer needed.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-03 15:00:32 +09:00
Zhu Yingjiang b095fe47bc
ASoC: SOF: Intel: hda: add SSP info to the chip info struct
add SSP info of APL and CNL, to the sof_intel_dsp_desc
structure. The max SSP count the platform support and
the SSP base address.

Signed-off-by: Zhu Yingjiang <yingjiang.zhu@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-03 14:57:39 +09:00
Keyon Jie acd1c1883d
ASoC: SOF: Intel: cnl: add pointer ops to use DPIB position
Add .pcm_pointer ops for cannonlake to read DPIB/posbuf and get pointer
for ALSA, to align with apollolake.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-05-03 14:56:54 +09:00
Liam Girdwood 273020522e
ASoC: SOF: Intel: Add platform differentiation for APL and CNL
Add platform differentiation operations for different Intel HDA DSP
platforms.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-04-28 02:51:36 +09:00