Commit Graph

312 Commits

Author SHA1 Message Date
Kartik 821d96e3a0 soc/tegra: fuse: Remove nvmem root only access
To read fuse values, various "non-root" userspace applications require
access to nvmem binary interface.

Remove root only access for nvmem userspace binary interface.

Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-05 17:10:40 +02:00
Yang Yingliang 056a6e1db2 soc/tegra: cbb: tegra194: Use of_address_count() helper
After commit 16988c7429 ("of/address: introduce of_address_count() helper"),
We can use of_address_count() to instead of open-coding it.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-05 15:14:08 +02:00
Nick Alcock 6854f27598 soc/tegra: cbb: Remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454 ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.

So remove it in the files in this commit, none of which can be built as
modules.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Luis Chamberlain <mcgrof@kernel.org>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-05 15:07:30 +02:00
Ye Xingchen 42c67aa262 soc/tegra: flowctrl: Use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Ye Xingchen <ye.xingchen@zte.com.cn>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-05 14:59:09 +02:00
Uwe Kleine-König c299a2e6bf soc: tegra: cbb: Drop empty platform remove function
A remove callback just returning 0 is equivalent to no remove callback
at all. So drop the useless function.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-05 14:41:22 +02:00
Petlozu Pravareshwar a0941221c5 soc/tegra: pmc: Support software wake-up for SPE
The Sensor Processing Engine(SPE) can trigger a software wake-up of
the device. To support this wake-up for the SPE, set SR_CAPTURE_EN
bit in WAKE_AOWAKE_CNTRL register associated with the wake-up for
the SPE. This SR capturing logic is expected to be enabled for wakes
with short pulse signalling requirements.

Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03 14:34:00 +02:00
Sushil Singh cc026ccdd5 soc/tegra: pmc: Add wake source interrupt for MGBE
Add the GPIO wake interrupt for MGBE ethernet controller on Tegra234 SoC.

Signed-off-by: Sushil Singh <sushilkumars@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03 14:31:42 +02:00
Jon Hunter 161e0f78b3 soc/tegra: pmc: Add the PMIC wake event for Tegra234
Add the PMIC wake event for Tegra234 that is used to bring the device
out of system suspend for events such as an RTC alarm.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03 14:30:39 +02:00
Mikko Perttunen 61228c9b24 soc/tegra: bpmp: Actually free memory on error path
Within the error path, genpd->domains has not been set, so we need
to pass the domains variable to kfree instead.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03 14:29:46 +02:00
Muhammad Usama Anjum 9737a63558 soc/tegra: cbb: remove linux/version.h
make versioncheck reports the following:
./drivers/soc/tegra/cbb/tegra-cbb.c: 19 linux/version.h not needed.
./drivers/soc/tegra/cbb/tegra194-cbb.c: 26 linux/version.h not needed.
./drivers/soc/tegra/cbb/tegra234-cbb.c: 27 linux/version.h not needed.

So remove linux/version.h from these files.

Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-03-23 15:44:34 +01:00
Linus Torvalds 850f7a5cab ARM: SoC fixes for 6.2
These are a couple of build fixes from randconfig testing,
 plus a set of Mediatek SoC specific fixes, all trivial.
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Merge tag 'soc-fixes-6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "These are a couple of build fixes from randconfig testing, plus a set
  of Mediatek SoC specific fixes, all trivial"

* tag 'soc-fixes-6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  soc: tegra: fix CPU_BIG_ENDIAN dependencies
  ARM: disallow pre-ARMv5 builds with ld.lld
  ARM: pxa: fix building with clang
  MAINTAINERS: add related dts to IXP4xx
  ARM: dts: spear: drop 0x from unit address
  arm64: dts: mt8183: Fix Mali GPU clock
  arm64: dts: mediatek: mt8195-demo: fix the memory size of node secmon
  soc: mediatek: pm-domains: Fix the power glitch issue
2022-12-19 16:07:59 -06:00
Arnd Bergmann ba4b4d0293
soc: tegra: fix CPU_BIG_ENDIAN dependencies
My previous patch to prevent BPMP from being enabled on big
endian kernels caused a build regression:

WARNING: unmet direct dependencies detected for TEGRA_BPMP
  Depends on [n]: ARCH_TEGRA [=y] && TEGRA_HSP_MBOX [=y] && TEGRA_IVC [=y] && !CPU_BIG_ENDIAN [=y]
  Selected by [y]:
  - ARCH_TEGRA_186_SOC [=y] && ARCH_TEGRA [=y] && ARM64 [=y]
  - ARCH_TEGRA_194_SOC [=y] && ARCH_TEGRA [=y] && ARM64 [=y]
  - ARCH_TEGRA_234_SOC [=y] && ARCH_TEGRA [=y] && ARM64 [=y]

Add even more such dependencies for the SoC types that use
the BPMP driver.

Fixes: 4ddb1bf1a8 ("tegra: mark BPMP driver as little-endian only")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20221215165336.1781080-1-arnd@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-12-19 16:47:01 +01:00
Shang XiaoJing b6c6bbfc65 soc/tegra: cbb: Remove redundant dev_err call
devm_ioremap_resource() prints error message in itself. Remove the
dev_err call to avoid redundant error message.

Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-17 23:21:36 +01:00
Liu Shixin fa9b5246e2 soc/tegra: cbb: Use DEFINE_SHOW_ATTRIBUTE to simplify tegra_cbb_err
Use DEFINE_SHOW_ATTRIBUTE helper macro to simplify the code. No
functional change.

Signed-off-by: Liu Shixin <liushixin2@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-17 23:21:00 +01:00
Sumit Gupta 2927cf85f4 soc/tegra: cbb: Check firewall before enabling error reporting
To enable error reporting for a fabric to CCPLEX, we need to write its
register for enabling error interrupt to CCPLEX during boot and later
clear the error status register after error occurs. If a fabric's
registers are protected and not accessible from CCPLEX, then accessing
the registers will cause CBB firewall error.

Add support to check whether write access from CCPLEX to the registers
of a fabric is not blocked by it's firewall before enabling error
reporting to CCPLEX for that fabric.

Fixes: fc2f151d23 ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-11 15:39:45 +01:00
Sumit Gupta 55084947d6 soc/tegra: cbb: Add checks for potential out of bound errors
Added checks to avoid potential out of bounds errors which can happen if
the 'slave map' and 'CBB errors' arrays are not correct or latest where
some entries are missing.

Fixes: fc2f151d23 ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-11 15:39:23 +01:00
Sumit Gupta cd1d719b47 soc/tegra: cbb: Update slave maps for Tegra234
Updating the slave map for fabrics and using the same maps for DCE, RCE
and SCE as they all are a replica in Tegra234.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-11 15:39:06 +01:00
Sumit Gupta 33af51a652 soc/tegra: cbb: Use correct master_id mask for CBB NOC in Tegra194
In Tegra194 SoC, master_id bit range is different between cluster NOC
and CBB NOC. Currently same bit range is used which results in wrong
master_id value. Due to this, illegal accesses from the CCPLEX master
do not result in a crash as expected. Fix this by using the correct
range for the CBB NOC.

Finally, it is only necessary to extract the master_id when the
erd_mask_inband_err flag is set because when this is not set, a crash
is always triggered.

Fixes: b713442214 ("soc/tegra: cbb: Add CBB 1.0 driver for Tegra194")
Fixes: fc2f151d23 ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-11 15:38:26 +01:00
Kartik bebf683ba6 soc/tegra: fuse: Use platform info with SoC revision
Tegra pre-silicon platforms do not have chip revisions. This makes the
revision SoC attribute meaningless on these platforms.

Instead, populate the revision SoC attribute with a combination of the
platform name and the chip revision for silicon platforms, and simply
with the platform name on pre-silicon platforms.

Signed-off-by: Kartik <kkartik@nvidia.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-11 15:00:07 +01:00
Petlozu Pravareshwar 0474cc8489 soc/tegra: pmc: Process wake events during resume
During system resume, translate tier2 SC7 wake sources back into IRQs
and do generic_handle_irq() to invoke the interrupt handlers for edge
triggered wake events such as SW-wake.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-10 02:55:23 +01:00
Petlozu Pravareshwar 1ddb8f6d44 soc/tegra: pmc: Fix dual edge triggered wakes
When a wake event is defined to be triggered on both positive and
negative edge of the input wake signal, it is crucial to know the
current state of the signal when going into suspend. The intended way to
obtain the current state of the wake signals is to read the
WAKE_AOWAKE_SW_STATUS register, which should contains the raw state of
the wake signals.

However, this register is edge triggered, an edge will not be generated
for signals that are already asserted prior to the assertion of
WAKE_LATCH_SW.

To workaround this, change the polarity of the wake level from '0' to
'1' while latching the signals, as this will generate an edge for
signals that are set to '1'.

Signed-off-by: Stefan Kristiansson <stefank@nvidia.com>
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-10 02:48:05 +01:00
Petlozu Pravareshwar c9c4ddb20c soc/tegra: pmc: Add I/O pad table for Tegra234
Add I/O pad table for Tegra234 to allow configuring DPD mode and
switching the pins to 1.8V or 3.3V as needed.

On Tegra234, DPD registers are reorganized such that there is a DPD_REQ
register and a DPD_STATUS register per pad group. Update the PMC driver
accordingly.

While at it, use the generated tables from tegra-pinmux-scripts to make
the formatting of these tables more consistent.

Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
[treding@nvidia.com: generate tables from tegra-pinmux-scripts]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-10 02:21:12 +01:00
Kartik cc5b2ad539 soc/tegra: fuse: Add nvmem keepout list
On Tegra186 and later, various FUSE offsets are restricted and cannot be
accessed from CCPLEX. Currently nvmem binary interface allows reading
such offsets from userspace, which results in RAS errors.

Add nvmem keepout lists to avoid any reads to restricted offsets.

Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-10-24 17:09:55 +02:00
Kartik bea06d776d soc/tegra: fuse: Use SoC specific nvmem cells
Tegra FUSE block size, availability and offsets can vary from one SoC
generation to another.

Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-10-24 17:09:06 +02:00
Petlozu Pravareshwar 28dbe82310 soc/tegra: pmc: Select IRQ_DOMAIN_HIERARCHY
Tegra PMC driver depends on IRQ domain hierarchy support, hence select
the IRQ_DOMAIN_HIERARCHY config for SOC_TEGRA_PMC.

Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-10-24 17:05:51 +02:00
Arnd Bergmann 3919d90535 soc/tegra: cbb: Changes for v6.1-rc1
This introduces the CBB driver that is used to provide (a lot of)
 information about SErrors when things go wrong, instead of the kernel
 just crashing or hanging.
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Merge tag 'tegra-for-6.1-cbb' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers

soc/tegra: cbb: Changes for v6.1-rc1

This introduces the CBB driver that is used to provide (a lot of)
information about SErrors when things go wrong, instead of the kernel
just crashing or hanging.

* tag 'tegra-for-6.1-cbb' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: cbb: Add support for Tegra241 (Grace)
  soc/tegra: cbb: Add driver for Tegra234 CBB 2.0
  soc/tegra: cbb: Add CBB 1.0 driver for Tegra194
  soc/tegra: Set ERD bit to mask inband errors

Link: https://lore.kernel.org/r/20220916101957.1635854-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-23 18:04:29 +02:00
Petlozu Pravareshwar 74f7f183d8 soc/tegra: pmc: Check device node status property
In early_initcall, check if PMC device is available for use
and avoid accessing PMC resources if the device node status
property is set to disabled.

Signed-off-by: Manish Bhardwaj <mbhardwaj@nvidia.com>
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 14:10:49 +02:00
Christophe JAILLET c18f352442 soc/tegra: pmc: Use devm_clk_get_optional()
Use devm_clk_get_optional() instead of hand writing it.

While at it, use dev_err_probe() to further simplify the code. This is also
less verbose if clk_get() returns -EPROBE_DEFER.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 13:13:40 +02:00
Dmitry Osipenko 2254182807 soc/tegra: fuse: Drop Kconfig dependency on TEGRA20_APB_DMA
The DMA subsystem could be entirely disabled in Kconfig and then the
TEGRA20_APB_DMA option isn't available too. Hence kernel configuration
fails if DMADEVICES Kconfig option is disabled due to the unsatisfiable
dependency.

The FUSE driver isn't a critical driver and currently it only provides
NVMEM interface to userspace which isn't known to be widely used, and
thus, it's fine if FUSE driver fails to load.

Let's remove the erroneous Kconfig dependency and let the FUSE driver to
fail the probing if DMA is unavailable.

Fixes: 19d41e5e9c ("soc/tegra: fuse: Add APB DMA dependency for Tegra20")
Reported-by: Necip Fazil Yildiran <fazilyildiran@gmail.com>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209301
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
2022-09-15 12:49:14 +02:00
Sumit Gupta 53283105ca soc/tegra: cbb: Add support for Tegra241 (Grace)
Adding support for Tegra241 (Grace) which uses fabrics based on the CBB
2.0 architecture. Since Tegra241 requires ACPI, implement ACPI-based
probe support.

Fabrics reporting errors in Tegra241 are "CBB" and "BPMP". The CBB
fabric connects various other CBB 2.0 based fabrics and also services
the Initiators and Targets which are connected to itself. The BPMP
fabric is present in the BPMP cluster.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:41:36 +02:00
Sumit Gupta fc2f151d23 soc/tegra: cbb: Add driver for Tegra234 CBB 2.0
Adding driver to handle errors from CBB version 2.0 which is used in
Tegra234 SoC. The driver prints debug information about failed
transaction on receiving interrupt from the error notifier. The error
notifier collates the interrupts from various error monitor blocks and
presents a single interrupt to the SoC interrupt controller.

For timeout errors, the driver also does the lookup to find timed out
clients and prints their client ID. Drivers for hardware that needs to
be reset on timeout will have to call BPMP from the client IP's driver.
BPMP firmware will also clear the timeout bit after resetting the IP
so that next transactions are send to them after reset.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:41:36 +02:00
Sumit Gupta b713442214 soc/tegra: cbb: Add CBB 1.0 driver for Tegra194
Adding driver to handle errors from Control Backbone (CBB) which are
generated due to illegal accesses. CBB 1.0 is used in Tegra194 SoCs.
When an error is reported from a NOC within CBB, the driver prints debug
information about failed transaction like Error Code, Error Description,
Master, Address, AXI ID, Cache, Protection, Security Group etc. It then
causes system crash using BUG_ON() or call WARN() based on whether the
error type is fatal or not.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:41:36 +02:00
Thierry Reding a28dc5f17d soc/tegra: pmc: Add USB port wake events for Tegra194
Tegra194 supports waking up from suspend when activity is detected on
any of the USB ports. Add these wake events so that the system can be
woken on such activity.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:40:04 +02:00
Thierry Reding 72ccc1f564 soc/tegra: pmc: Add support for simple wake events
Simple wake events are neither mapped to GIC interrupts nor have an
associated GPIO line. They are close to GPIO-backed wake events in that
the IRQ hierarchy processing needs to stop at the PMC level, but since
there is no dedicated GPIO line for them, let's turn them into a
separate type.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:39:34 +02:00
Thierry Reding 1623566fc4 soc/tegra: pmc: Remove leading space
Remove a leading space from a line that is otherwise indented by tabs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:39:02 +02:00
Liang He 0a3c2dbec4 soc/tegra: fuse: Add missing of_node_put()
In tegra_init_apbmisc(), of_find_matching_node() will return a node
pointer with refcount incremented. We should use of_node_put() in each
failure path or when it is not used anymore.

Signed-off-by: Liang He <windhl@126.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:38:43 +02:00
Liang He e941712ccc soc/tegra: fuse: Add missing of_node_put() in tegra_init_fuse()
In this function, of_find_matching_node() will return a node pointer
with refcount incremented. We should use of_node_put() when the "np"
pointer is not used anymore.

Signed-off-by: Liang He <windhl@126.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:38:43 +02:00
Sumit Gupta 96765cc475 soc/tegra: Set ERD bit to mask inband errors
Add a function to set the ERD (Error Response Disable) bit in the
MISCREG_CCROC_ERR_CONFIG register from the Control Backbone (CBB) error
handler driver.

ERD bit allows masking of SError due to inband errors which are caused
by illegal register accesses through CBB. When the bit is set, interrupt
is used for reporting errors and magic code '0xdead2003' is returned.
This change is only required for Tegra194 SoC as the config is moved to
CBB register space for future SoC's. Also, remove unmapping the
apbmisc_base as it's required to get the base address for accessing the
misc register.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-09-15 12:30:11 +02:00
Viresh Kumar 25a18559b8 soc/tegra: Migrate to dev_pm_opp_set_config()
The OPP core now provides a unified API for setting all configuration
types, i.e. dev_pm_opp_set_config().

Lets start using it.

Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2022-07-08 11:27:33 +05:30
Viresh Kumar a6db3b9232 soc/tegra: Add comment over devm_pm_opp_set_clkname()
Explain why special handling was required here, it isn't obvious at all.

Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2022-07-08 11:27:33 +05:30
Viresh Kumar 87686cc845 OPP: Make dev_pm_opp_set_regulators() accept NULL terminated list
Make dev_pm_opp_set_regulators() accept a NULL terminated list of names
instead of making the callers keep the two parameters in sync, which
creates an opportunity for bugs to get in.

Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Steven Price <steven.price@arm.com> # panfrost
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2022-07-08 11:26:44 +05:30
Linus Torvalds 1ff7bc3ba7 More power management updates for 5.19-rc1
- Add Tegra234 cpufreq support (Sumit Gupta).
 
  - Clean up and enhance the Mediatek cpufreq driver (Wan Jiabing,
    Rex-BC Chen, and Jia-Wei Chang).
 
  - Fix up the CPPC cpufreq driver after recent changes (Zheng Bin,
    Pierre Gondois).
 
  - Minor update to dt-binding for Qcom's opp-v2-kryo-cpu (Yassine
    Oudjana).
 
  - Use list iterator only inside the list_for_each_entry loop (Xiaomeng
    Tong, and Jakob Koschel).
 
  - New APIs related to finding OPP based on interconnect bandwidth
    (Krzysztof Kozlowski).
 
  - Fix the missing of_node_put() in _bandwidth_supported() (Dan
    Carpenter).
 
  - Cleanups (Krzysztof Kozlowski, and Viresh Kumar).
 
  - Add Out of Band mode description to the intel-speed-select utility
    documentation (Srinivas Pandruvada).
 
  - Add power sequences support to the system reboot and power off
    code and make related platform-specific changes for multiple
    platforms (Dmitry Osipenko, Geert Uytterhoeven).
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Merge tag 'pm-5.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull more power management updates from Rafael Wysocki:
 "These update the ARM cpufreq drivers and fix up the CPPC cpufreq
  driver after recent changes, update the OPP code and PM documentation
  and add power sequences support to the system reboot and power off
  code.

  Specifics:

   - Add Tegra234 cpufreq support (Sumit Gupta)

   - Clean up and enhance the Mediatek cpufreq driver (Wan Jiabing,
     Rex-BC Chen, and Jia-Wei Chang)

   - Fix up the CPPC cpufreq driver after recent changes (Zheng Bin,
     Pierre Gondois)

   - Minor update to dt-binding for Qcom's opp-v2-kryo-cpu (Yassine
     Oudjana)

   - Use list iterator only inside the list_for_each_entry loop
     (Xiaomeng Tong, and Jakob Koschel)

   - New APIs related to finding OPP based on interconnect bandwidth
     (Krzysztof Kozlowski)

   - Fix the missing of_node_put() in _bandwidth_supported() (Dan
     Carpenter)

   - Cleanups (Krzysztof Kozlowski, and Viresh Kumar)

   - Add Out of Band mode description to the intel-speed-select utility
     documentation (Srinivas Pandruvada)

   - Add power sequences support to the system reboot and power off code
     and make related platform-specific changes for multiple platforms
     (Dmitry Osipenko, Geert Uytterhoeven)"

* tag 'pm-5.19-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (60 commits)
  cpufreq: CPPC: Fix unused-function warning
  cpufreq: CPPC: Fix build error without CONFIG_ACPI_CPPC_CPUFREQ_FIE
  Documentation: admin-guide: PM: Add Out of Band mode
  kernel/reboot: Change registration order of legacy power-off handler
  m68k: virt: Switch to new sys-off handler API
  kernel/reboot: Add devm_register_restart_handler()
  kernel/reboot: Add devm_register_power_off_handler()
  soc/tegra: pmc: Use sys-off handler API to power off Nexus 7 properly
  reboot: Remove pm_power_off_prepare()
  regulator: pfuze100: Use devm_register_sys_off_handler()
  ACPI: power: Switch to sys-off handler API
  memory: emif: Use kernel_can_power_off()
  mips: Use do_kernel_power_off()
  ia64: Use do_kernel_power_off()
  x86: Use do_kernel_power_off()
  sh: Use do_kernel_power_off()
  m68k: Switch to new sys-off handler API
  powerpc: Use do_kernel_power_off()
  xen/x86: Use do_kernel_power_off()
  parisc: Use do_kernel_power_off()
  ...
2022-05-30 11:37:26 -07:00
Dmitry Osipenko eae813b755 soc/tegra: pmc: Use sys-off handler API to power off Nexus 7 properly
Nexus 7 Android tablet can be turned off using a special bootloader
command which is conveyed to bootloader by putting magic value into the
special scratch register and then rebooting normally. This power-off
method should be invoked if USB cable is connected. Bootloader then will
display battery status and power off the device. This behaviour is
borrowed from downstream kernel and matches user expectations, otherwise
it looks like device got hung during power-off and it may wake up on
USB disconnect.

Switch PMC driver to sys-off handler API, which provides drivers with
chained power-off callbacks functionality that is required for powering-off
devices properly. It also brings resource-managed API for the restart
handler registration that makes PMC driver code cleaner.

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-05-19 19:30:31 +02:00
Thierry Reding d3a20dcbca soc/tegra: pmc: Document core domain fields
These fields are used to track the state of the core domain. Add basic
descriptions so that kerneldoc can be properly generated for them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-06 10:53:19 +02:00
Thierry Reding 9767d1be15 soc/tegra: pmc: Select REGMAP
Commit 9d5e7c3e36 ("soc/tegra: pmc: Provide USB sleepwalk register
map") introduced a dependency on the regmap infrastructure, so select
the corresponding Kconfig entry. This avoids failures in random builds
that may otherwise end up having SOC_TEGRA_PMC enabled but not REGMAP.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-05-04 11:09:49 +02:00
Sandipan Patra d3ed752654 soc/tegra: pmc: Update Tegra234 reset sources
Update the tegra234_reset_sources array to contain all reset sources for
Tegra234 and NULL out the entries that do not actually exist.

Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06 15:03:23 +02:00
Sagar Kamble 942501661f soc/tegra: fuse: Add nvmem cell lookup entries for Tegra194
Add nvmem cell lookup entries for below FUSE cells:
 - gcplex-config-fuse
 - pdi0
 - pdi1

Also include the device name prefix "gpu-" in the names of the GPU FUSE
cells in nvmem_cell_info.

Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-06 14:55:50 +02:00
kartik 194217df81 soc/tegra: pmc: Add Tegra234 wake events
Enable the Tegra RTC alarm and power key wake-ups for Tegra234

Signed-off-by: kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-25 14:08:46 +01:00
Thierry Reding b631c9c2ae soc/tegra: fuse: Explicitly cast to/from __iomem
sparse is picky about casts between different address spaces. A cast to
plain void * needs to be accompanied by a __force modifier and casting
back to void __iomem * needs to be explicit to avoid warnings.

Reported-by: kernel test robot <lkp@intel.com>
Fixes: 88724b78a8 ("soc/tegra: fuse: Use resource-managed helpers")
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 17:09:13 +01:00
kartik 6f259bf161 soc/tegra: fuse: Update nvmem cell list
Update tegra_fuse_cells with below entries:

 - gcplex-config-fuse:
     Configuration bits for GPU, used to enable/disable write protected
     region used for storing GPU firmware.
 - pdi0:
     Unique per chip public identifier.
 - pdi1:
     Unique per chip public identifier.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-24 17:09:13 +01:00