Commit Graph

57 Commits

Author SHA1 Message Date
Stephen Warren 583553b28c ARM: dt: Add ARM PMU to tegra*.dtsi
This enables HW performance measurements, and usage of the "perf" tool.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-03-04 10:41:57 -08:00
Stephen Warren 6f74dc9bc8 gpio: tegra: Dynamically allocate IRQ base, and support DT
Enhance the driver to dynamically allocate the base IRQ number, and
create an IRQ domain for itself. The use of an IRQ domain ensures that
any device tree node interrupts properties are correctly parsed.

Describe interrupt-related properties in the device tree binding docs,
and the contents of "child" node interrupts property.

Update tegra*.dtsi to specify the required interrupt-related properties.

Finally, remove the definition of TEGRA_GPIO_TO_IRQ; this macro no longer
gives correct results since the IRQ numbers for GPIOs are dynamically
allocated.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:25:00 -08:00
Stephen Warren d17adfdb17 ARM: dt: Add binding for Tegra PMC
The Tegra PMC (Power Management Controller) interfaces with an external
PMU (Power Management Unit), and controls wake-up from sleep modes.

This initial binding is the bare minimum required to control the PMC's
inversion of the PMU's interrupt signal.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:21:21 -08:00
Stephen Warren 8051b75ab3 ARM: dt: tegra: Add Tegra APB DMA device tree binding
Document binding, and add the node to tegra*.dtsi.

The driver isn't actually instantiated from this node yet, but the I2S
binding will rely on being able to refer to the APB DMA node using a
phandle.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:21:20 -08:00
Stephen Warren f8196b01b9 ARM: dt: tegra30.dtsi: Add extra GPIO interrupt
The Tegra30 GPIO controller has one more bank than Tegra20, and hence
has one more interrupt.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:21:19 -08:00
Stephen Warren 636e50a0e0 ARM: dt: tegra30.dtsi: Reformat gpio's interrupts property
The new content matches tegra20.dtsi, and is < 80 columns.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:21:19 -08:00
Peter De Schrijver c3e00a0eff arm/tegra: initial device tree for tegra30
This patch adds the initial device tree for tegra30

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-17 16:14:49 -08:00