Commit Graph

24 Commits

Author SHA1 Message Date
Richard Zhu bb0a80e394 mx51 enchance the sd/mmc HW timing compatibility on mx51 boards.
Some cards have the CRC errors in read on mx51 BBG board.
Configure the eSDHC pad configurations to level up the
compatibility to fix this issue.

Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-03-10 14:22:18 +01:00
Julien Boibessot 124c13b9a3 i.MX51 iomux: Fixes MX51_PAD_UART2_TXD__UART2_TXD & MX51_PAD_USBH1_DATA2__UART2_TXD declarations
Fixes 2 small regressions of recent iomux changes:
 - current MX51_PAD_UART2_TXD__UART2_TXD declaration overwrites
   IOMUXC_UART2_IPP_UART_RXD_MUX_SELECT_INPUT register (0x09ec) and prevent
   UART2 Rx from working properly.
   (Tested on my custom i.MX51 board where UART2 is used as console)
 - current MX51_PAD_USBH1_DATA2__UART2_TXD declaration also has the same problem.
   (Not tested)

Signed-off-by: Julien Boibessot <julien.boibessot@armadeus.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2011-02-11 18:39:19 +01:00
Sascha Hauer ee1ae4d7b1 ARM i.MX51: Full iomux support
This iomux file has been constructed from the Freescale pinmux tool.
It contains all pins from the tool, but the datasheet lists some
configurations not present in the tool, these are not yet added.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-12-15 14:42:23 +01:00
Arnaud Patard (Rtp) 0dea1c7464 imx51: fix gpio_4_24 and gpio_4_25 pad configuration
s/NO_PAD_CTRL/MX51_GPIO_PAD_CTRL/

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24 09:57:13 +01:00
Arnaud Patard (Rtp) 82df68ad26 imx51: add gpio mode for csi1 {h,v}sync
Add definitions for configuring CSI1_{H,V}SYNC as GPIO

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24 09:57:10 +01:00
Arnaud Patard (Rtp) 0a7d48712f imx51: enhance iomux configuration for esdhc support
- add definition to configure pads as ESDHC{1,2} WP and CD

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24 09:57:08 +01:00
Arnaud Patard (Rtp) db9d42348f imx51: fix iomux configuration
- ALT0 is used to set GPIO mode of GPIO_1_{2,3,4,5,6,7,8,9} but it's ALT1
for GPIO_1_{0,1}.

Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-11-24 09:57:07 +01:00
Dinh Nguyen 47c5382287 ARM: imx: Add gpio-keys to plat-mxc
Add imx_add_gpio_keys function to add gpio-keys in plat-mxc

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-26 16:24:04 +02:00
Eric Bénard b545d9ed1b iomux-mx51: fix GPIO_1_xx 's IOMUX configuration
this patch really configure the GPIO in GPIO mode.

Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19 18:45:00 +02:00
Eric Bénard 217f580ba6 iomux-mx51: fix SD1 and SD2's iomux configuration
Based on original patch from: Richard Zhu <r65037@freescale.com>
Signed-off-by: Eric Bénard <eric@eukrea.com>
2010-10-19 18:44:59 +02:00
Sascha Hauer 4b5ee7a768 ARM: iomux-mx51: Add AUD5 pinmux definitions
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-11 15:32:54 +02:00
Sascha Hauer f781bc8aa4 ARM: mx5/iomux-mx51: Fix input path of some pins in gpio mode
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-01 09:32:23 +02:00
Sascha Hauer 2e35bab5fd ARM: mx5/iomux-mx51: Add aud3 primary function defines
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-01 09:32:22 +02:00
Sascha Hauer 8efd9271fa ARM: mx5/iomux-mx51: Add SPI controller pads
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-01 09:32:22 +02:00
Jason Wang eaa4fd0b40 ARM: mx5/iomux-mx51: add iomux definitions for eCSPI2 on the imx51_3ds board
On the imx51_3ds board, eCSPI2 is connected to a SPI NOR flash,
now add iomux definitions for those used pins.

Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-10-01 09:32:19 +02:00
Fabio Estevam 3efee47db7 ARM: mx5/mx51_babbage: Add FEC support
Tested it by booting a rootfs via NFS.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
2010-09-27 12:53:00 +02:00
Eric Bénard 6937aabef4 iomux-mx51: add 4 pin definitions
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26 15:05:22 +02:00
Jason Wang b3fb53a81c mx51/iomux: add UART and GPIO pad definitions for imx51_3ds board
Add UART2 CTS/RTS and UART3 RXD/TXD pad definitons for imx51_3ds board,
add GPIO_1_6 definiton because this pin is used as a CPLD parent irq
request pin on imx51_3ds board.

Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26 14:18:23 +02:00
Jason Wang 310894b72b mx51/iomux: Fix mux mode and input path for two pads
For pad EIM_D27 to work in UART3_RTS mode, the input path should be
3 instead of 0; for pad USBH1_STP to work in GPIO_1_27 mode, the mux
value should be 2 instead of 8.

Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26 14:18:22 +02:00
Amit Kucheria 68d03da2ae [PATCH] mxc: Fix pad names for imx51
The pads capable of being used as GPIOs had their pad-name and mode-name
switched. Also, fix the following:

- Whitespace fixes
- Replace IOMUX_CONFIG_ALTn with 'n'

Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26 14:18:20 +02:00
Dinh Nguyen 71c2e514d5 mx5: Add i2c to Freescale MX51 Babbage HW
This patch adds I2C functionality to the Freescale MX51 Babbage HW.
The patch adds device structures, i2c board slave device defines,
IOMUX pin defines, and clocks.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-07-26 14:17:58 +02:00
Dinh Nguyen d6b273bfdf mx5: bring usb phy out of reset on freescale mx51 babbage hw
This patch de-asserts the reset line that is connected to the USB
ULPI PHY on USB Host1.

This patch should be included with the original USB host enablement
set of patches of mx51 babbage hw, but was accidentily left out.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-05-18 10:46:31 +02:00
Dinh Nguyen 282f152219 mxc: Update GPIO for USB support on Freescale MX51 Babbage HW
This patch is part of enabling USB for Freescale MX51 Babbage HW. This
patch updates the iomux pins for USB, and gpio line for reset the
USB hub on the MX51 Babbage HW.

This patch applies to 2.6.34-rc6.

Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-05-03 15:18:13 +02:00
Amit Kucheria a329b48c43 mxc: Core support for Freescale i.MX5 series
Add basic clock support, cpu identification, I/O mapping, interrupt
controller, serial port and ethernet.

Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
2010-02-09 18:32:16 +02:00