Commit Graph

1040 Commits

Author SHA1 Message Date
Felipe Balbi bb7ea2841e usb: dwc3: gadget: drop the useless dma_sync_single* calls
if req->dma isn't DMA_ADDR_INVALID it means gadget driver
mapped the request or allocated from coherent, so it's
unnecessary to do anything.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:05:26 +03:00
Felipe Balbi 771f184ece usb: dwc3: gadget: fix GCTL programming
ensure a few bits are cleared before enabling
what we need.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:05:25 +03:00
Felipe Balbi f78d32e79e usb: dwc3: define ScaleDown macro helper
We must ensure that those bits aren't set as
they should only be used in simulation.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:05:24 +03:00
Felipe Balbi f4aadbe49e usb: dwc3: Fix definition of DWC3_GCTL_U2RSTECN
that should be 1 << 16, not 16. Caused so many
problems and we never caught it before.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:05:22 +03:00
Sebastian Andrzej Siewior 78c58a53c9 usb: dwc3: gadget: do not map/unmap ZLP transfers
If the gadget drivers sends a ZLP we are trying to map this this request
which does not work on all implementations. So we simply skip mapping
it.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:03:46 +03:00
Felipe Balbi 42077b0a33 usb: dwc3: omap: fix IRQ handling
In order to ACK the IRQ we must write back
to the same register the bits we read.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:03:12 +03:00
Felipe Balbi dd17a6b20c usb: dwc3: omap: change IRQ name to dwc3-omap
dwc3-wrapper can be used by any other wrapper,
using dwc3-omap makes it clear that we're running
on OMAP SoC.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:03:07 +03:00
Felipe Balbi a72e658bcd usb: dwc3: add module.h to dwc3-omap.c and core.c
We need that header because of THIS_MODULE.

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:03:00 +03:00
Felipe Balbi 9962444f59 usb: dwc3: omap: distinguish between SW and HW modes
The OMAP wrapper allows us to either control internal
OTG signals via SW or HW. Different boards might wish
to use one or the other mode of operation. Let's have
have that information passed via platform_data for now.

After DT conversion is finished for OMAP, we can easily
convert this to a DT attribute.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:45 +03:00
Felipe Balbi 29d8bc133f usb: dwc3: omap: drop DEV_PM_OPS for now
We need to have actual HW in order to implement
and test that part of the code anyway. Until then
it's best to remove it.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:34 +03:00
Felipe Balbi df01c61e06 usb: dwc3: omap: use the macro we already have
trivial patch, no functional changes.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:31 +03:00
Felipe Balbi 324e548140 usb: dwc3: omap: do not enable DMA Disable Clear IRQ
Otherwise that IRQ will trigger forever. It's quite
unnecessary.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:28 +03:00
Felipe Balbi ccba3bca5e usb: dwc3: omap: fix dev_dbg() calls
dev_dbg() macro expects a device pointer as
argument, not a memory base address.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:23 +03:00
Felipe Balbi 1ddcb218b5 usb: dwc3: use ep0_next_event field
Start tracking the next expected event and act
on the error conditions as suggested by databook.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:18 +03:00
Felipe Balbi b53c772d16 usb: dwc3: core: add ep0_next_event field
this field will hold the next expected event.

In certain cases, host might fall into some error
condition and ask from us the wrong Control phase.
On such situations, we should stall and restart.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:18 +03:00
Felipe Balbi 0b7836a9eb usb: dwc3: drop EP0_STALL state
Whenever we issue a Set Stall command on EP0,
the state machine will be restarted and Stall
is cleared automatically, when core receives
the next SETUP packet.

There's no need to track that EP0_STALL state.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:17 +03:00
Felipe Balbi 76cb323f80 usb: dwc3: ep0: clear all EP0 flags
when we're going to issue Set Stall command,
we should clear DWC3_EP_STALL flag, but also
we should clear BUSY, HALTED and all others.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:16 +03:00
Felipe Balbi b673cf3002 usb: dwc3: ep0: fix Get Status handling
data was prepared on setup_buf but transfer
was started on ctrl_req, fix it.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:15 +03:00
Sebastian Andrzej Siewior 61d58242f6 usb: dwc3: gadget: replace mdelay with udelay in the busy loop
There are two spots where we wait until the HW finishes processing a
certain command. Initially we had a few problems and we used 500ms as a
limit to be on a the safe side. Paul Zimmerman mentioned this is little too
much. After a debugging session, we noticed that we hardly ever go over 20us
and didn't pass 30usec so far. Using mdelay() seems way overloaded.

Giving the current numbers 500usec as the upper limit is more than  enough.
Should it ever timeout then something is definitely wrong.

While here, also replace the type with u32 since long does not really
fit here.

Cc: Paul Zimmerman <paul.zimmerman@synopsys.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:13 +03:00
Sebastian Andrzej Siewior 624407f96f usb: dwc3: gadget: rework the dequeue on RESET & DISCONNECT
- since a while we are disabling an endpoint and purging every requests on
  RESET and DISCONNECT which leads to a warning since the endpoint was
  disabled twice (once by the UDC, and second time by the gadget). I
  think UDC should nuke all requests because all those requests
  become invalid. It's gadget driver's responsability, though, to disable
  its used endpoints. This is done by merging dwc3_stop_active_transfer()
  and dwc3_gadget_nuke_reqs() into dwc3_remove_requests().

- dwc3_stop_active_transfer() is now no longer called unconditionaly.
  This has the advantage that it is always called to disable an active
  transfer which means if res_trans_idx 0 than something went wrong and
  it is an error condition because we can't clean up the requests.

- Remove the DWC3_EP_WILL_SHUTDOWN which was introduced while
  introducing the command complete part for dequeue. All requests on
  req_queued list should be removed during the dwc3_cleanup_done_reqs()
  callback so there is no reason to go through the list again.
  We consider it an error condition if requests are still on this
  list since we never queue TRB without LST=1 (the last requests has
  always LST=1, there are no requests with LST=0 behind it).

[ balbi@ti.com : reworked commit log a bit, made patch apply ]

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:10 +03:00
Sebastian Andrzej Siewior 7650bd74d3 usb: dwc3: core: move the core check before soft reset
We read the DWC3_GSNPSID register to make sure we got the correct
register offset passed. One of the recent commits moved the soft reset
before this so in case of the wrong offset we end up with "reset timed
out". This patch moves the "id" check before the reset again.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:09 +03:00
Sebastian Andrzej Siewior e7225315a8 usb: dwc3: debugfs: remove test mode interface
There are some issues around for enabling/disabling this mode and
handling it. It does not work perfectly (yet). However we have a few
gadgets tested successfuly so far. That means we are quite confident
that we won't need this in near future.
So I'm for removing it and bringing a working version back once there is
a need for it.

Thanks to Dan Carpenter who spotted the wrong memory handling here.

[ balbi@ti.com : made it actually apply ]

Cc: Dan Carpenter <error27@gmail.com>
Cc: wharms@bfs.de
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:08 +03:00
Felipe Balbi c7fcdeb262 usb: dwc3: ep0: simplify EP0 state machine
The DesignWare USB3 core tells us which phase
of a control transfer should be started, it
also tells us which physical endpoint needs
that transfer.

With these two informations, we have all we
need to simply EP0 handling quite a lot and
get rid rid of the SW state machine tracking
ep0 states.

For achieving this perfectly, we needed to
add support for situations where we get
XferNotReady while endpoint is still busy
and XferNotReady while gadget driver still
hasn't queued a request.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:07 +03:00
Felipe Balbi 984f66a6f9 usb: dwc3: core: add flag for EP0 direction
Add a flag to keep track of ep0 direction.
This flag will be used on a following patch.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:06 +03:00
Felipe Balbi a6829706ce usb: dwc3: ep0: add handling for unaligned OUT transfers
In case we have transfers which aren't aligned
to wMaxPacketSize, we need to be careful with
how we start the transfer with the HW. OUT
transfers _must_ be aligned with wMaxPacketSize
and in order to guarantee that, we use a bounce
buffer.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:05 +03:00
Felipe Balbi 5812b1c236 usb: dwc3: add a bounce buffer for control endpoints
This core cannot handle OUT transfers which aren't
aligned to wMaxPacketSize, but that can happen at
least on control endpoint with the USB Audio Class.

This patch adds a bounce buffer to be used on the
case of a non-aligned ep0out request is queued.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:04 +03:00
Felipe Balbi dc137f01ac usb: dwc3: core: add defines for XferNotReady event on Control EPs
The status field of the Transfer Not Read event
is different on Control Endpoints. On this patch
we are just adding the defines to be used on a
later patch which will re-work the control endpoint
handling.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:03 +03:00
Felipe Balbi 164f6e141e usb: dwc3: gadget: improve command completion debug message
the previous message had too little meaning. Make
it more human readable and use the macro we already
had for extracting the command completion status out
of DEPCMDn register.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:02 +03:00
Felipe Balbi f198ead21b usb: dwc3: gadget: set request dma to invalid when unmapping
if we don't set DMA address to invalid when unmapping,
we might fall in a situation where request buffer
can't be mapped to DMA again.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:01 +03:00
Felipe Balbi c611ccb48a usb: dwc3: ep0: fix 'transfered' typo
trivial patch. No functional changes.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:00 +03:00
Felipe Balbi 91db07dcbf usb: dwc3: core: add missing @ for kerneldoc
trivial patch, no functional changes

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:00 +03:00
Dan Carpenter b4f28a98ea usb: dwc3: debugfs: add a kfree() on error to dwc3_testmode_open()
We may as well fix this potential leak so we don't have to listen to
the static checkers complain.

Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:59 +03:00
Sebastian Andrzej Siewior 0156cf8603 usb: dwc3: gaget: clear DWC3_EP_WILL_SHUTDOWN bit
Without this patch we won't clear that bit and instead will
clear all other bits on our endpoint flag.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:57 +03:00
Sebastian Andrzej Siewior 5a18999ebd usb: dwc3: gadget: use TRB type 6 for ISOC transfers
Type 6 should be used for the first transfer during an interval. This is
also what the reference driver is using. Type 7 seems to be for following
or additional transfers within the same interval.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:56 +03:00
Sebastian Andrzej Siewior a1ae9be5fc usb: dwc3: gadget: reset resource index to zero
If we collected two requests together (i.e. only the last of them has
LST=1) then we only have to stop transfer once: The clean-up code will
cleanup everything until first TRB with the LST bit set.
After XferComplete this index should be no longer valid since there is
no transfer pending.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:55 +03:00
Sebastian Andrzej Siewior 0d2f475853 usb: dwc3: gadget: fixing dequeue of TRBs
A TRB which is dequeued seems to have its HWO bits set to 1. Therefore
we ignore it if we dequeue it after the command is completed.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:54 +03:00
Randy Dunlap 096cb25d62 usb: fix dwc3 build when USB_GADGET_DWC3 is not enabled
Fix build error when CONFIG_USB_GADGET_DWC3 is not enabled:

ERROR: "dwc3_send_gadget_ep_cmd" [drivers/usb/dwc3/dwc3.ko] undefined!

Signed-off-by: Randy Dunlap <rdunlap@xenotime.net>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-24 15:06:53 -07:00
Kuninori Morimoto 29cc88979a USB: use usb_endpoint_maxp() instead of le16_to_cpu()
Now ${LINUX}/drivers/usb/* can use usb_endpoint_maxp(desc) to get maximum packet size
instead of le16_to_cpu(desc->wMaxPacketSize).
This patch fix it up

Cc: Armin Fuerst <fuerst@in.tum.de>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Johannes Erdfelt <johannes@erdfelt.com>
Cc: Vojtech Pavlik <vojtech@suse.cz>
Cc: Oliver Neukum <oliver@neukum.name>
Cc: David Kubicek <dave@awk.cz>
Cc: Johan Hovold <jhovold@gmail.com>
Cc: Brad Hards <bhards@bigpond.net.au>
Acked-by: Felipe Balbi <balbi@ti.com>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Thomas Dahlmann <dahlmann.thomas@arcor.de>
Cc: David Brownell <david-b@pacbell.net>
Cc: David Lopo <dlopo@chipidea.mips.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Michal Nazarewicz <m.nazarewicz@samsung.com>
Cc: Xie Xiaobo <X.Xie@freescale.com>
Cc: Li Yang <leoli@freescale.com>
Cc: Jiang Bo <tanya.jiang@freescale.com>
Cc: Yuan-hsin Chen <yhchen@faraday-tech.com>
Cc: Darius Augulis <augulis.darius@gmail.com>
Cc: Xiaochen Shen <xiaochen.shen@intel.com>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: OKI SEMICONDUCTOR, <toshiharu-linux@dsn.okisemi.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Ben Dooks <ben@simtec.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Herbert Pötzl <herbert@13thfloor.at>
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Roman Weissgaerber <weissg@vienna.at>
Acked-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: Tony Olech <tony.olech@elandigitalsystems.com>
Cc: Florian Floe Echtler <echtler@fs.tum.de>
Cc: Christian Lucht <lucht@codemercs.com>
Cc: Juergen Stuber <starblue@sourceforge.net>
Cc: Georges Toth <g.toth@e-biz.lu>
Cc: Bill Ryder <bryder@sgi.com>
Cc: Kuba Ober <kuba@mareimbrium.org>
Cc: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-23 09:47:40 -07:00
Stephen Rothwell 46a57283e8 usb: include module.h in the DesignWare USB3 DRD driver
Fixes this build error:

drivers/usb/dwc3/dwc3-pci.c: In function 'dwc3_pci_init':
drivers/usb/dwc3/dwc3-pci.c:211:9: error: 'THIS_MODULE' undeclared (first use in this function)

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-23 09:47:40 -07:00
Felipe Balbi 72246da40f usb: Introduce DesignWare USB3 DRD Driver
The DesignWare USB3 is a highly
configurable IP Core which can be
instantiated as Dual-Role Device (DRD),
Peripheral Only and Host Only (XHCI)
configurations.

Several other parameters can be configured
like amount of FIFO space, amount of TX and
RX endpoints, amount of Host Interrupters,
etc.

The current driver has been validated with
a virtual model of version 1.73a of that core
and with an FPGA burned with version 1.83a
of the DRD core. We have support for PCIe
bus, which is used on FPGA prototyping, and
for the OMAP5, more adaptation (or glue)
layers can be easily added and the driver
is half prepared to handle any possible
configuration the HW engineer has chosen
considering we have the information on
one of the GHWPARAMS registers to do
runtime checking of certain features.

More runtime checks can, and should, be added
in order to make this driver even more flexible
with regards to number of endpoints, FIFO sizes,
transfer types, etc.

While this supports only the device side, for
now, we will add support for Host side (xHCI -
see the updated series Sebastian has sent [1])
and OTG after we have it all stabilized.

[1] http://marc.info/?l=linux-usb&m=131341992020339&w=2

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-22 16:03:11 -07:00