Commit Graph

199 Commits

Author SHA1 Message Date
Ralf Baechle 2806ccd7ad [MIPS] Delete duplicate call to load_irq_save.
This call may have resulted to local_tlb_flush_range returning with
interrupts disabled resulting in excessive interrupt latency.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-19 01:08:26 +00:00
Atsushi Nemoto 33b06b513e [MIPS] TX49: Fix use of CDEX build_store_reg()
The commit a923660d786a53e78834b19062f7af2535f7f8ad accidently
prevents TX49 from using CDEX.  Use build_dst_pref() only if prefetch
for store was really available.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-08 21:41:04 +00:00
Atsushi Nemoto bcd022801e [PATCH] MIPS: Fix COW D-cache aliasing on fork
Provide a custom copy_user_highpage() to deal with aliasing issues on
MIPS.  It uses kmap_coherent() to map an user page for kernel with same
color.  Rewrite copy_to_user_page() and copy_from_user_page() with the
new interfaces to avoid extra cache flushing.

The main part of this patch was originally written by Ralf Baechle;
Atushi Nemoto did the the debugging.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-13 09:27:08 -08:00
Franck Bui-Huu cbb8fc0797 [MIPS] paging_init(): use highend_pfn/highstart_pfn
This patch makes paging_init() use highend_pfn/highstart_pfn globals.

It removes the need of 'high' local which was needed only by HIGHMEM config.

More important perhaps, it fixes a bug when HIGHMEM is set but there's
actually no physical highmem (highend_pfn = 0)

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-12 01:46:24 +00:00
Ralf Baechle 9202f32558 [MIPS] Export local_flush_data_cache_page for sake of IDE.
On a CPU with aliases the IDE core needs to flush caches in the special
IDE variants of insw, insl etc.  If IDE support is built as a module this
will only work if local_flush_data_cache_page happens is exported as a
module.

As per policy export local_flush_data_cache_page as GPL symbol only.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-10 21:52:11 +00:00
Haavard Skinnemoen 8e087929df [PATCH] Generic ioremap_page_range: mips conversion
Convert MIPS to use generic ioremap_page_range()

[yoichi_yuasa@tripeaks.co.jp: build fix]
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-08 08:28:52 -08:00
Ralf Baechle d3fa72e455 [PATCH] Pass struct dev pointer to dma_cache_sync()
Pass struct dev pointer to dma_cache_sync()

dma_cache_sync() is ill-designed in that it does not have a struct device
pointer argument which makes proper support for systems that consist of a
mix of coherent and non-coherent DMA devices hard.  Change dma_cache_sync
to take a struct device pointer as first argument and fix all its callers
to pass it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07 08:39:41 -08:00
Ralf Baechle f67637ee4b [PATCH] Add struct dev pointer to dma_is_consistent()
dma_is_consistent() is ill-designed in that it does not have a struct
device pointer argument which makes proper support for systems that consist
of a mix of coherent and non-coherent DMA devices hard.  Change
dma_is_consistent to take a struct device pointer as first argument and fix
the sole caller to pass it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07 08:39:41 -08:00
Peter Zijlstra a866374aec [PATCH] mm: pagefault_{disable,enable}()
Introduce pagefault_{disable,enable}() and use these where previously we did
manual preempt increments/decrements to make the pagefault handler do the
atomic thing.

Currently they still rely on the increased preempt count, but do not rely on
the disabled preemption, this might go away in the future.

(NOTE: the extra barrier() in pagefault_disable might fix some holes on
       machines which have too many registers for their own good)

[heiko.carstens@de.ibm.com: s390 fix]
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Nick Piggin <npiggin@suse.de>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07 08:39:21 -08:00
Ralf Baechle 617667ba72 [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:48 +00:00
Atsushi Nemoto 0550d9d13e [MIPS] Remove redundant r4k_blast_icache() calls
r4k_flush_cache_all() and r4k_flush_cache_mm() case: these are noop if
the CPU did not have dc_aliases.  It would mean we do not need to care
about icache here.

r4k_flush_cache_range case: if r4k_flush_cache_mm() did not need to
care about icache, it would be same for this function.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:48 +00:00
Atsushi Nemoto 656be92f9a [MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n
This is a patch to load 64-bit modules to CKSEG0 so that can be
compiled with -msym32 option.  This makes each module ~10% smaller.

* introduce MODULE_START and MODULE_END
* custom module_alloc()
* PGD for modules
* change XTLB refill handler synthesizer
* enable -msym32 for modules again
  (revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a)

New XTLB refill handler looks like this:

80000080 dmfc0   k0,C0_BADVADDR
80000084 bltz    k0,800000e4			# goto l_module_alloc
80000088 lui     k1,0x8046			# %high(pgd_current)
8000008c ld      k1,24600(k1)			# %low(pgd_current)
80000090 dsrl    k0,k0,0x1b			# l_vmalloc_done:
80000094 andi    k0,k0,0x1ff8
80000098 daddu   k1,k1,k0
8000009c dmfc0   k0,C0_BADVADDR
800000a0 ld      k1,0(k1)
800000a4 dsrl    k0,k0,0x12
800000a8 andi    k0,k0,0xff8
800000ac daddu   k1,k1,k0
800000b0 dmfc0   k0,C0_XCONTEXT
800000b4 ld      k1,0(k1)
800000b8 andi    k0,k0,0xff0
800000bc daddu   k1,k1,k0
800000c0 ld      k0,0(k1)
800000c4 ld      k1,8(k1)
800000c8 dsrl    k0,k0,0x6
800000cc mtc0    k0,C0_ENTRYLO0
800000d0 dsrl    k1,k1,0x6
800000d4 mtc0    k1,C0_ENTRYL01
800000d8 nop
800000dc tlbwr
800000e0 eret
800000e4 dsll    k1,k0,0x2			# l_module_alloc:
800000e8 bgez    k1,80000008			# goto l_vmalloc
800000ec lui     k1,0xc000
800000f0 dsubu   k0,k0,k1
800000f4 lui     k1,0x8046			# %high(module_pg_dir)
800000f8 beq     zero,zero,80000000
800000fc nop
80000000 beq     zero,zero,80000090		# goto l_vmalloc_done
80000004 daddiu  k1,k1,0x4000
80000008 dsll32  k1,k1,0x0			# l_vmalloc:
8000000c dsubu   k0,k0,k1
80000010 beq     zero,zero,80000090		# goto l_vmalloc_done
80000014 lui     k1,0x8046			# %high(swapper_pg_dir)

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:44 +00:00
Franck Bui-Huu acd86b8622 [MIPS] Make free_init_pages() arguments to be physical addresses
It allows caller of this function to not care about CKSEG0/XKPHYS
address mixes. It's now automatically done by free_init_pages().

We can now safely remove hack needed by 64 bit kernels with
CONFIG_BUILD_ELF64=n in free_initmem().

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:42 +00:00
Franck Bui-Huu a7837b76b6 [MIPS] setup.c: clean up initrd related code
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:42 +00:00
Franck Bui-Huu 99e3b942c6 [MIPS] page.h: remove __pa() usages.
__pa() was used by virt_to_page() and virt_addr_valid(). These
latter are used when kernel is initialised so __pa() is not
appropriate, we use virt_to_phys() instead.

Futhermore __pa() is going to take care of CKSEG0/XKPHYS
address mix for 64 bit kernels. This makes __pa() more complex
than virt_to_phys() and this extra work is not needed by
virt_to_page() and virt_addr_valid().

Eventually it consolidates virt_to_phys() prototype by making
its argument 'const'. this avoids some warnings that was due
to some virt_to_page() usages which pass const pointer.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30 01:14:40 +00:00
Thiemo Seufer eb48287508 [MIPS] Hack for SB1 cache issues
Removing flush_icache_page a while ago broke SB1 which was using an empty
flush_data_cache_page function.  This glues things well enough so a more
efficient but also more intrusive solution can be found later.

Signed-Off-By: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-22 23:34:01 +00:00
Ralf Baechle d6b861c640 [MIPS] SB1: On bootup only flush cache on local CPU.
This fixes a warning on bootup warning in smp_call_function.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-06 20:55:37 +00:00
Ralf Baechle 242954b5aa [MIPS] 16K & 64K page size fixes
Derived from Peter Watkins <treestem@gmail.com>'s work.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-01 17:46:09 +00:00
Manish Lachwani 9448b8f6a0 [MIPS] Make SB1 cache flushes not to use on_each_cpu
This fixes the

  start_kernel(): bug: interrupts were enabled early

messages.

Signed-off-by: Manish Lachwani <mlachwani@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-30 21:41:28 +00:00
Yoichi Yuasa f0ec69e529 [MIPS] Fix warning about unused definition in c-sb1.c
arch/mips/mm/c-sb1.c: In function `sb1_cache_init':
arch/mips/mm/c-sb1.c:447: warning: unused variable `handle_vec2_sb1'

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-30 21:41:27 +00:00
Ralf Baechle f8829caee3 [MIPS] Fix aliasing bug in copy_to_user_page / copy_from_user_page
The current implementation uses a sequence of a cacheflush and a copy.
This is racy in case of a multithreaded debuggee and renders GDB
virtually unusable.

Aside this fixes a performance hog rendering access to /proc/cmdline very
slow and resulting in a enough cache stalls for the 34K AP/SP programming
model to make the bare metal code on the non-Linux VPE miss RT deadlines.

The main part of this patch was originally written by Ralf Baechle;
Atushi Nemoto did the the debugging.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-21 23:17:35 +01:00
Ralf Baechle d89e36d8df [MIPS] Fix iounmap argument to const volatile.
With the existing prototype the following code:

    const void __iomem *io = ioremap();
    x = readb(io);
    iounmap(io);

did result in a warning.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-19 17:55:14 +01:00
Linus Torvalds 708e16892e Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial
* git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial: (39 commits)
  Add missing maintainer countries in CREDITS
  Fix bytes <-> kilobytes  typo in Kconfig for ramdisk
  fix a typo in Documentation/pi-futex.txt
  BUG_ON conversion for fs/xfs/
  BUG_ON() conversion in fs/nfsd/
  BUG_ON conversion for fs/reiserfs
  BUG_ON cleanups in arch/i386
  BUG_ON cleanup in drivers/net/tokenring/
  BUG_ON cleanup for drivers/md/
  kerneldoc-typo in led-class.c
  debugfs: spelling fix
  rcutorture: Fix incorrect description of default for nreaders parameter
  parport: Remove space in function calls
  Michal Wronski: update contact info
  Spelling fix: "control" instead of "cotrol"
  reboot parameter in Documentation/kernel-parameters.txt
  Fix copy&waste bug in comment in scripts/kernel-doc
  remove duplicate "until" from kernel/workqueue.c
  ite_gpio fix tabbage
  fix file specification in comments
  ...

Fixed trivial path conflicts due to removed files:
   arch/mips/dec/boot/decstation.c, drivers/char/ite_gpio.c
2006-10-03 16:35:11 -07:00
Matt LaPlante 4b3f686d4a Attack of "the the"s in arch
The patch below corrects multiple occurances of "the the"
typos across several files, both in source comments and KConfig files.
There is no actual code changed, only text.  Note this only affects the /arch
directory, and I believe I could find many more elsewhere. :)

Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-10-03 22:21:02 +02:00
Atsushi Nemoto b58e5d050f [MIPS] Fix size of zones_size and zholes_size array
Commit f06a96844a broke MIPS.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-03 17:59:18 +01:00
Atsushi Nemoto 23126692e3 [MIPS] Stacktrace build-fix and improvement
Fix build error due to stacktrace API change.  Now save_stack_trace()
tries to save all kernel context, including interrupts and exception.
Also some asm code are changed a bit so that we can detect the end of
current context easily.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-01 23:16:58 +01:00
Atsushi Nemoto c59a0f15be [MIPS] Remove __flush_icache_page
__flash_icache_page is unused, so kill it.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-01 23:16:58 +01:00
Sukadev Bhattiprolu f400e198b2 [PATCH] pidspace: is_init()
This is an updated version of Eric Biederman's is_init() patch.
(http://lkml.org/lkml/2006/2/6/280).  It applies cleanly to 2.6.18-rc3 and
replaces a few more instances of ->pid == 1 with is_init().

Further, is_init() checks pid and thus removes dependency on Eric's other
patches for now.

Eric's original description:

	There are a lot of places in the kernel where we test for init
	because we give it special properties.  Most  significantly init
	must not die.  This results in code all over the kernel test
	->pid == 1.

	Introduce is_init to capture this case.

	With multiple pid spaces for all of the cases affected we are
	looking for only the first process on the system, not some other
	process that has pid == 1.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Sukadev Bhattiprolu <sukadev@us.ibm.com>
Cc: Dave Hansen <haveblue@us.ibm.com>
Cc: Serge Hallyn <serue@us.ibm.com>
Cc: Cedric Le Goater <clg@fr.ibm.com>
Cc: <lxc-devel@lists.sourceforge.net>
Acked-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-29 09:18:12 -07:00
Ralf Baechle 432bef2a31 [MIPS] Replace BARRIER with more appropriate hazard barrier.
This is the unchanged part 2 of Chris' hazard cleanup.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:54 +01:00
Ralf Baechle a00f631018 [MIPS] c-r4k: Convert init functions from inline to __init.
With more recent compilers inline doesn't necessarily means a function
will always be inlined.  So leave that decission to the compiler and
make the function as __init.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:44 +01:00
Ralf Baechle 00932ba305 [MIPS] Make PROT_WRITE imply PROT_READ. 2006-09-27 13:37:42 +01:00
Atsushi Nemoto f6502791d7 [MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache.
c-r4k.c and c-sb1.c use drop_mmu_context() to flush virtually tagged
I-caches, but this does not work for flushing other task's icache.  This
is for example triggered by copy_to_user_page() called from ptrace(2).
Use indexed flush for such cases.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:37 +01:00
Ralf Baechle 585fa72493 [MIPS] Retire flush_icache_page from mm use.
On the 34K the redundant cache operations were causing excessive stalls
resulting in realtime code running on the second VPE missing its deadline.
For all other platforms this patch is just a significant performance
improvment as illustrated by below benchmark numbers.

Processor, Processes - times in microseconds - smaller is better
------------------------------------------------------------------------------
Host                 OS  Mhz null null      open slct sig  sig  fork exec sh
                             call  I/O stat clos TCP  inst hndl proc proc proc
--------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
25Kf      2.6.18-rc4     533 0.49 1.16 7.57 33.4 30.5 1.34 12.4 5497 17.K 54.K
25Kf      2.6.18-rc4-p   533 0.49 1.16 6.68 23.0 30.7 1.36 8.55 5030 16.K 48.K
4Kc       2.6.18-rc4      80 4.21 15.0 131. 289. 261. 16.5 258. 18.K 70.K 227K
4Kc       2.6.18-rc4-p    80 4.34 13.1 128. 285. 262. 18.2 258. 12.K 52.K 176K
34Kc      2.6.18-rc4      40 5.01 14.0 61.6 90.0 477. 17.9 94.7 29.K 108K 342K
34Kc      2.6.18-rc4-p    40 4.98 13.9 61.2 89.7 475. 17.6 93.7 8758 44.K 158K
BCM1480   2.6.18-rc4     700 0.28 0.60 3.68 5.92 16.0 0.78 5.08 931. 3163 15.K
BCM1480   2.6.18-rc4-p   700 0.28 0.61 3.65 5.85 16.0 0.79 5.20 395. 1464 8385
TX49-16K  2.6.18-rc3     197 0.73 2.41 19.0 37.8 82.9 2.94 17.5 4438 14.K 56.K
TX49-16K  2.6.18-rc3-p   197 0.73 2.40 19.9 36.3 82.9 2.94 23.4 2577 9103 38.K
TX49-32K  2.6.18-rc3     396 0.36 1.19 6.80 11.8 41.0 1.46 8.17 2738 8465 32.K
TX49-32K  2.6.18-rc3-p   396 0.36 1.19 6.82 10.2 41.0 1.46 8.18 1330 4638 18.K
    
Original patch by me with enhancements by Atsushi Nemoto.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
2006-09-27 13:37:34 +01:00
Ralf Baechle df586d59a4 [MIPS] c-r4k: Typo fix.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:23 +01:00
Christoph Lameter f06a96844a [PATCH] reduce MAX_NR_ZONES: fix MAX_NR_ZONES array initializations
Fix array initialization in lots of arches

The number of zones may now be reduced from 4 to 2 for many arches.  Fix the
array initialization for the zones array for all architectures so that it is
not initializing a fixed number of elements.

Signed-off-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 08:48:46 -07:00
Atsushi Nemoto f4dee85e2c [MIPS] sparsemem: fix crash in show_mem
With sparsemem, pfn should be checked by pfn_valid() before pfn_to_page().

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:22 +01:00
Thiemo Seufer 115f2a44e0 [MIPS] Print out TLB handler assembly for debugging.
Small update, using pr_debug and pr_info.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:16 +01:00
Yoichi Yuasa 2874fe5533 [MIPS] vr41xx: Replace magic number for P4K bit with symbol.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:11 +01:00
Yoichi Yuasa 1058ecda9b [MIPS] vr41xx: Changed workaround to recommended method
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:11 +01:00
Atsushi Nemoto 565200a146 [MIPS] Do not count pages in holes with sparsemem
With some memory model other than FLATMEM, the single node can
contains some holes so there might be many invalid pages.  For
example, with two 256M memory and one 256M hole, some variables
(num_physpage, totalpages, nr_kernel_pages, nr_all_pages, etc.) will
indicate that there are 768MB on this system.  This is not desired
because, for example, alloc_large_system_hash() allocates too many
entries.
    
Use free_area_init_node() with counted zholes_size[] instead of
free_area_init().

For num_physpages, use number of ram pages instead of max_low_pfn.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:08 +01:00
Yoichi Yuasa 4e8ab36182 [MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:06 +01:00
Ralf Baechle fc5d2d279f [MIPS] Use the proper technical term for naming some of the cache macros.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:26:04 +01:00
Jörn Engel 6ab3d5624e Remove obsolete #include <linux/config.h>
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-30 19:25:36 +02:00
Ralf Baechle 2e78ae3f48 [MIPS] 74K: Assume it will also have an AR bit in config7
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29 21:10:54 +01:00
Ralf Baechle beab375a48 [MIPS] Treat CPUs with AR bit as physically indexed.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29 21:10:54 +01:00
Atsushi Nemoto a2c2bc4b26 [MIPS] MIPS32/MIPS64 S-cache fix and cleanup
Use blast_scache_range, blast_inv_scache_range for mips32/mips64 scache
routine.  Also initialize waybit for MIPS32/MIPS64 S-cache.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29 21:10:54 +01:00
Chris Dearman 73f403527b [MIPS] Fix handling of 0 length I & D caches.
Don't ask.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29 21:10:53 +01:00
Chris Dearman 9318c51acd [MIPS] MIPS32/MIPS64 secondary cache management
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29 21:10:52 +01:00
Ralf Baechle 5deee2dbf4 [MIPS] Remove prototype for non-existing function.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:18 +01:00
Chad Reese b1c231f5a5 [MIPS] Fix sparsemem support.
Move memory_present() in arch/mips/kernel/setup.c. When using sparsemem
extreme, this function does an allocate for bootmem. This would always
fail since init_bootmem hasn't been called yet.
    
Move memory_present after free_bootmem. This only marks actual memory
ranges as present instead of the entire address space.
    
Signed-off-by: Chad Reese  <creese@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-06 00:15:20 +01:00
Sergei Shtylyov 9370b35175 [MIPS] Save write-only Config.OD from being clobbered
Save the Config.OD bit from being clobbered by coherency_setup(). This
bit, when set, fixes various errata in the early steppings of Au1x00
SOCs.  Unfortunately, the bit was write-only on the most early of them.
In addition, also restore the bit after a wakeup from sleep.
    
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-06 00:15:13 +01:00
Kumba 44d921b246 [MIPS] Treat R14000 like R10000.
Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01 00:28:35 +01:00
Ralf Baechle 7f3f1d01a9 [MIPS] Fix deadlock on MP with cache aliases.
A proper fix would involve introducing the notion of shared caches but
at this stage of 2.6.17 that's going to be too intrusive and not needed
for current hardware; aside I think some discussion will be needed.

So for now on the affected SMP configurations which happen to suffer from
cache aliases we make use of the fact that a single cache will be shared
by all processors.  This solves the deadlock issue and will improve
performance by getting rid of the smp_call_function overhead.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01 00:28:33 +01:00
Chris Dearman c620953c32 [MIPS] Fix detection and handling of the 74K processor.
Nothing exciting; Linux just didn't know it yet so this is most adding
a value to a case statement.
    
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01 00:28:30 +01:00
Nigel Stephens 98a41de99a [MIPS] Add missing 34K processor IDs
The 34K is very much like a 24K on steroids.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01 00:28:30 +01:00
Atsushi Nemoto 3c68da798a [MIPS] Use __ffs() instead of ffs() for waybit calculation.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:30 +02:00
Ralf Baechle 7e3bfc7cfc [MIPS] Handle IDE PIO cache aliases on SMP.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:29 +02:00
Ralf Baechle 41c594ab65 [MIPS] MT: Improved multithreading support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:28 +02:00
Atsushi Nemoto 67a3f6de93 [MIPS] Fix tx49_blast_icache32_page_indexed.
Fix the cache index value in tx49_blast_icache32_page_indexed().
This is a damage by de62893bc0 commit.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:21 +02:00
Ralf Baechle f13b68e817 [MIPS] Fix CONFIG_LIMITED_DMA build.
This fix a build error for the Momentum Jaguar ATX eval board.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:19 +02:00
Ralf Baechle 91b05e6776 [MIPS] Fix vectored interrupt support in TLB exception handler generator.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:13 +02:00
Ralf Baechle 6fd11a2173 [MIPS] Cleanup free_initmem the same way as i386 did.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19 04:14:12 +02:00
Dave Hansen 22a9835c35 [PATCH] unify PFN_* macros
Just about every architecture defines some macros to do operations on pfns.
 They're all virtually identical.  This patch consolidates all of them.

One minor glitch is that at least i386 uses them in a very skeletal header
file.  To keep away from #include dependency hell, I stuck the new
definitions in a new, isolated header.

Of all of the implementations, sh64 is the only one that varied by a bit.
It used some masks to ensure that any sign-extension got ripped away before
the arithmetic is done.  This has been posted to that sh64 maintainers and
the development list.

Compiles on x86, x86_64, ia64 and ppc64.

Signed-off-by: Dave Hansen <haveblue@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-27 08:44:48 -08:00
Alexey Dobriyan 53b3531bbb [PATCH] s/;;/;/g
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-24 07:33:24 -08:00
Nick Piggin 7835e98b2e [PATCH] remove set_page_count() outside mm/
set_page_count usage outside mm/ is limited to setting the refcount to 1.
Remove set_page_count from outside mm/, and replace those users with
init_page_count() and set_page_refcounted().

This allows more debug checking, and tighter control on how code is allowed
to play around with page->_count.

Signed-off-by: Nick Piggin <npiggin@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-22 07:54:02 -08:00
Nick Piggin 8dfcc9ba27 [PATCH] mm: split highorder pages
Have an explicit mm call to split higher order pages into individual pages.
 Should help to avoid bugs and be more explicit about the code's intention.

Signed-off-by: Nick Piggin <npiggin@suse.de>
Cc: Russell King <rmk@arm.linux.org.uk>
Cc: David Howells <dhowells@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Chris Zankel <chris@zankel.net>
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-03-22 07:53:57 -08:00
Atsushi Nemoto de862b488e [MIPS] TX49XX has prefetch.
The TX49XX has the prefetch instruction.  It supports only Pref_Load
(hint 0).  Actually changes in this patch except for Kconfig are not
have any effects, I added these changes to prevent misuse of unsupported
hints.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21 13:27:47 +00:00
Thiemo Seufer c6281edb1d [MIPS] Kill tlb-andes.c.
Basically identical to c-r4k.c, so maintaining one is really enough.
    
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21 13:27:47 +00:00
Ralf Baechle a3dddd560e [MIPS] War on whitespace: cleanup initial spaces followed by tabs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21 13:27:47 +00:00
Ralf Baechle 8145095cd8 [MIPS] Remove CONFIG_BUILD_ELF64.
This option is no longer usable with supported compilers.  It will be
replaced by usage of -msym32 in a separate patch.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21 13:27:46 +00:00
Atsushi Nemoto 37caa934af [MIPS] sc-rm7k.c cleanup
Use blast_scache_range, blast_inv_scache_range for rm7k scache routine.
Output code should be logically same.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21 13:27:45 +00:00
Atsushi Nemoto de62893bc0 [MIPS] local_r4k_flush_cache_page fix
If dcache_size != icache_size or dcache_size != scache_size, or
set-associative cache, icache/scache does not flushed properly.  Make
blast_?cache_page_indexed() masks its index value correctly.  Also,
use physical address for physically indexed pcache/scache.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-18 16:59:27 +00:00
Ralf Baechle 1443e483e3 [MIPS] Scatter a bunch of __init over tlbex.c.
Found by make buildcheck.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-09 18:05:10 +00:00
Ralf Baechle 4debe4f963 [MIPS] Initialize S-cache function pointers even on S-cache-less CPUs.
When a CPU has no scache, the scache flushing functions currently
aren't getting initialized and the NULL pointer is eventually called
as a function.  Initialize the scache flushing functions as a noop
when there's no scache.
    
Initial patch by me and most of the debugging done by Martin Michlmayr.
    
Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-28 17:04:19 +00:00
Ralf Baechle 51939fbb79 [MIPS] Sibyte: #if CONFIG_* doesn't fly.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-21 16:58:23 +00:00
Atsushi Nemoto 41700e7399 [MIPS] Add protected_blast_icache_range, blast_icache_range, etc.
Add blast_xxx_range(), protected_blast_xxx_range() etc. for common
use.  They are built by __BUILD_BLAST_CACHE_RANGE().
Use protected_cache_op() macro for various protected_ routines.
Output code should be logically same.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-14 19:13:24 +00:00
Daniel Jacobowitz 3d503753b4 [MIPS] Support /proc/kcore for MIPS
I'm pretty sure that the CKSEG0 bits are wrong, but I did need to
cover that region - because the SB-1 kernel links at 0xffffffff80100000
or so, disassembly and printing static variables don't work unless the
debugger can read that region.
    
Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:25 +00:00
Atsushi Nemoto d4264f1839 [MIPS] Remove wrong __user tags.
This fixes sparse warnings 'dereference of noderef expression'.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-02-07 13:30:25 +00:00
Ralf Baechle e7958bb90d MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:06 +00:00
Hugh Dickins 68352e6ee3 [PATCH] mips: setup_zero_pages count 1
Page count should be initialized to 1 on each of the MIPS empty zero pages,
to avoid a bad_page warning whenever one of them is freed from all mappings.

Signed-off-by: Hugh Dickins <hugh@veritas.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-12-12 08:57:43 -08:00
Ralf Baechle d981733aaf [MIPS] Use reset_page_mapcount to initialize empty_zero_page usage counter.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-12-01 11:05:13 +00:00
Hugh Dickins 872fec16d9 [PATCH] mm: init_mm without ptlock
First step in pushing down the page_table_lock.  init_mm.page_table_lock has
been used throughout the architectures (usually for ioremap): not to serialize
kernel address space allocation (that's usually vmlist_lock), but because
pud_alloc,pmd_alloc,pte_alloc_kernel expect caller holds it.

Reverse that: don't lock or unlock init_mm.page_table_lock in any of the
architectures; instead rely on pud_alloc,pmd_alloc,pte_alloc_kernel to take
and drop it when allocating a new one, to check lest a racing task already
did.  Similarly no page_table_lock in vmalloc's map_vm_area.

Some temporary ugliness in __pud_alloc and __pmd_alloc: since they also handle
user mms, which are converted only by a later patch, for now they have to lock
differently according to whether or not it's init_mm.

If sources get muddled, there's a danger that an arch source taking
init_mm.page_table_lock will be mixed with common source also taking it (or
neither take it).  So break the rules and make another change, which should
break the build for such a mismatch: remove the redundant mm arg from
pte_alloc_kernel (ppc64 scrapped its distinct ioremap_mm in 2.6.13).

Exceptions: arm26 used pte_alloc_kernel on user mm, now pte_alloc_map; ia64
used pte_alloc_map on init_mm, now pte_alloc_kernel; parisc had bad args to
pmd_alloc and pte_alloc_kernel in unused USE_HPPA_IOREMAP code; ppc64
map_io_page forgot to unlock on failure; ppc mmu_mapin_ram and ppc64 im_free
took page_table_lock for no good reason.

Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-29 21:40:40 -07:00
Andrew Isaacson a4b5bd9abc SB1 cache exception handling.
Expand SB1 cache error handling by adding SB1_CEX_ALWAYS_FATAL and
SB1_CEX_STALL, allowing configurable behavior on cache errors.
    
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:48 +01:00
Andrew Isaacson 93ce2f524e Add support for SB1A CPU.
Signed-Off-By: Andy Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:46 +01:00
Atsushi Nemoto 750ccf687f Fix zero length sys_cacheflush
Cacheflush(0, 0, 0) was crashing the system.  This is because
flush_icache_range(start, end) tries to flushing whole address space
(0 - ~0UL) if both start and end are zero.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:44 +01:00
Ralf Baechle 6ec25809c1 Rename page argument of flush_cache_page to something more descriptive.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:42 +01:00
Ralf Baechle dbc571690e Fix wrong comment.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:38 +01:00
Ralf Baechle ec917c2c1a Fixup a few lose ends in explicit support for MIPS R1/R2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:37 +01:00
Ralf Baechle 65f1f5a2c3 Don't copy SB1 cache error handler to uncached memory.
This may have made sense on a paranoid day with pass 1 BCM1250 processors
that were throwing cache error exception left and right for no good
reason.  On modern silicion that hardly makes sense and the code had
gotten just an obscurity ...
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:34 +01:00
Andrew Isaacson 46dc3a4a09 Fix stale comment in c-sb1.c.
Signed-Off-By: Andrew Isaacson <adi@broadcom.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:33 +01:00
Ralf Baechle 02cf211968 Cleanup the mess in cpu_cache_init.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:32 +01:00
Ralf Baechle f5cfa980e5 Use R4000 TLB routines for SB1 also.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:31 +01:00
Atsushi Nemoto 9043f7e95d Sync c-tx39.c with c-r4k.c.
tx39_flush_cache_range() does nothing if !cpu_has_dc_aliases.  It should
flush d-cache and invalidate i-cache since the TX39(H2) has separate I/D
cache.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:28 +01:00
Thiemo Seufer 10a3dabddd Add/Fix missing bit of R4600 hit cacheop workaround.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:18 +01:00
Thiemo Seufer 02fe2c9ce3 Minor code cleanup.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:17 +01:00
Thiemo Seufer f5b4d9563b R4600 v2.0 needs a nop before tlbp.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:17 +01:00
Thiemo Seufer 424cadae94 Don't set up a sg dma address if we have no page address for some reason.
Code cleanup.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:17 +01:00
Thiemo Seufer d8748a3abf More .set push/pop.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:16 +01:00
Thiemo Seufer 330cfe016b Let r4600 PRID detection match only legacy CPUs, cleanups.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:15 +01:00
Ralf Baechle 7623debf26 Handle mtc0 - tlb write hazard for VR5432.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:12 +01:00