Commit Graph

1072148 Commits

Author SHA1 Message Date
Geert Uytterhoeven 48d8ee5b83 arm64: dts: renesas: Align GPIO hog names with dtschema
Dtschema expects GPIO hogs to end with a "hog" suffix.
Also, the convention for node names is to use hyphens, not underscores.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/baee4b9980576ffbab24122fce7147c9cbc2ea59.1645705998.git.geert+renesas@glider.be
2022-02-24 13:51:48 +01:00
Biju Das d05e409e4a arm64: dts: renesas: rzg2lc-smarc-som: Enable watchdog
Enable watchdog{0, 1, 2} interfaces on RZ/G2LC SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220223165813.24833-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-24 13:49:21 +01:00
Jean-Jacques Hiblot 3ec510bcbd ARM: dts: r9a06g032-rzn1d400-db: Enable watchdog0 with a 60s timeout
60s is a sensible default value.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Link: https://lore.kernel.org/r/20220221095032.95054-5-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-24 13:48:53 +01:00
Jean-Jacques Hiblot 045d0625d3 ARM: dts: r9a06g032: Add the watchdog nodes
This SoC includes 2 watchdog controllers (one per A7 core).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Link: https://lore.kernel.org/r/20220221095032.95054-4-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-24 13:48:45 +01:00
Jean-Jacques Hiblot a3a59919ab dt-bindings: clock: r9a06g032: Add the definition of the watchdog clock
This clock is actually the REF_SYNC_D8 clock.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220221095032.95054-2-jjhiblot@traphandler.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-24 13:48:08 +01:00
Geert Uytterhoeven 1069050467 arm64: dts: renesas: spider-cpu: Enable watchdog timer
Enable the watchdog timer on the Spider board.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/b36b2bb5770e10d906571721a3d73ca205b6f56e.1642525158.git.geert+renesas@glider.be
2022-02-22 09:46:11 +01:00
Geert Uytterhoeven 8ca367e26a arm64: dts: renesas: r8a779f0: Add RWDT node
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas
R-Car S4-8 (R8A779F0) SoC.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/556a7f41bdadceecbe8b59b79ac7e9f592ca17a2.1642525158.git.geert+renesas@glider.be
2022-02-22 09:46:11 +01:00
Sergey Shtylyov 3f67fc2a84 MAINTAINERS: Specify IRC channel for Renesas ARM64 port
The Renesas ARM ports do have their own IRC channel #renesas-soc (initially
created on Freenode, then moved to Liberta.Chat).  Hopefully, adding it to
this file will attract more people... :-)

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/6c08e98f-c7bb-9d95-5032-69022e43e39b@omp.ru
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-21 11:49:16 +01:00
Sergey Shtylyov 14415218a8 MAINTAINERS: Specify IRC channel for Renesas ARM32 port
The Renesas ARM ports do have their own IRC channel #renesas-soc (initially
created on Freenode, then moved to Liberta.Chat).  Hopefully, adding it to
this file will attract more people... :-)

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/2f108f63-0cf7-cc4c-462e-ec63736234cf@omp.ru
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-21 11:49:10 +01:00
Nikita Yushchenko b90d10da84 arm64: dts: renesas: ulcb-kf: fix wrong comment
Fix comment referencing salvator board, likely a copy-paste leftover.

ulcb-kf.dtsi has nothing to do with salvator.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Fixes: 80c07701d5 ("arm64: dts: renesas: ulcb-kf: add pcm3168 sound codec")
Link: https://lore.kernel.org/r/20220216181003.114049-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-21 09:23:42 +01:00
Biju Das 5c65ad1278 arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection
This patch replaces EMMC/SDHI macros with SW_SD0_DEV_SEL DIP-Switch
macro for eMMC/SDHI device selection.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220204143132.3608-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:48:28 +01:00
Biju Das 46da632734 arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
On RZ/G2LC SMARC EVK, CAN0 is not populated.

CAN1 is multiplexed with SCIF1 using SW1[3] or RSPI using SW1[4].

This patch adds support for the CAN1 interface on RZ/G2LC SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:45:59 +01:00
Biju Das fa00d6dc19 arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
SCIF1 interface is available on PMOD1 connector (CN7) on carrier board.

This patch adds pinmux and scif1 node to carrier board dtsi file for
RZ/G2LC SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:45:59 +01:00
Biju Das 2ed3b5d954 arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings
RZ/G2LC SoM uses DIP-SWitch SW1 for various pin multiplexing functions.

This patch describes DIP-SWitch SW1 settings on SoM and adds the
corresponding macros for enabling pinmux functionality on RZ/G2LC
SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:45:59 +01:00
Biju Das 726fd78119 arm64: dts: renesas: rzg2l-smarc: Add common dtsi file
RZ/{G2L,V2L} and G2LC SoC use the same carrier board, but the SoM is
different.

Different pin mapping is possible on SoM. For eg:- RZ/G2L SMARC EVK
uses SCIF2, whereas RZ/G2LC uses SCIF1 for the serial interface available
on PMOD1.

This patch adds support for handling the pin mapping differences by moving
definitions common to RZ/G2L and RZ/G2LC to a common dtsi file.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-08 09:45:58 +01:00
Biju Das 81a27b1f69 arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
Enable the microSD card slot connected to SDHI1 on the RZ/G2LC SMARC
platform by removing the sdhi1 override which disabled it, and by adding
the necessary pinmux required for SDHI1.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220117075130.6198-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-02 09:27:00 +01:00
Biju Das 7ca0ce6478 arm64: dts: renesas: rzg2lc-smarc-som: Enable eMMC on SMARC platform
RZ/G2LC SoM has both 64 GB eMMC and microSD connected to SDHI0.

Both these interfaces are mutually exclusive and the SD0 device
selection is based on the XOR between GPIO_SD0_DEV_SEL and SW1[2]
switch position.

This patch sets GPIO_SD0_DEV_SEL to high in DT. Use the below switch
setting logic for device selection between eMMC and microSD slot
connected to SDHI0.

Set SW1[2] to position OFF for selecting eMMC
Set SW1[2] to position ON for selecting microSD

This patch enables eMMC on RZ/G2LC SMARC platform by default.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220117075130.6198-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-02 09:26:18 +01:00
Biju Das f91c4c7479 arm64: dts: renesas: Add initial device tree for RZ/V2L SMARC EVK
Add basic support for the RZ/V2L SMARC EVK (based on R9A07G054L2):
- memory
- External input clock
- CPG
- Pin controller
- SCIF
- GbEthernet
- Audio Clock

It shares the same carrier board with RZ/G2L with the same pin mapping.
Delete the gpio-hog nodes from pinctrl as they will be added later when
the functionality has been tested.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220110134659.30424-12-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-02 09:23:23 +01:00
Biju Das 7c2b8198f4 arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC
The RZ/V2L SoC is package- and pin-compatible with RZ/G2L, the only
difference being that the RZ/V2L SoC has additional DRP-AI IP (AI
accelerator).

Add initial DTSI for the RZ/V2L SoC with below SoC specific dtsi files
for supporting single core and dual core devices:

    r9a07g054l1.dtsi => RZ/V2L R9A07G054L1 SoC specific parts
    r9a07g054l2.dtsi => RZ/V2L R9A07G054L2 SoC specific parts

Both the RZ/G2L and RZ/V2L SMARC EVK SoMs are identical apart from the
SoCs used, hence the common dtsi files (rzg2l-smarc*.dtsi) are shared
between the RZ/G2L and RZ/V2L SMARC EVKs.  Place holders are added in
device nodes to avoid compilation errors for devices which have not been
enabled yet on the RZ/V2L SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220110134659.30424-11-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-02 09:23:23 +01:00
Geert Uytterhoeven 4a3680d038 Renesas RZ/V2L DT Binding Definitions
Clock definitions for the Renesas RZ/V2L (R9A07G054) SoC, shared by
 driver and DT source files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYfo+PgAKCRCKwlD9ZEnx
 cE8MAQDTu4bzKyeUPv3buHrIZDmVt9F/03yk1OgGliZEpiz0VQEAiuOPQRYp9Ez5
 zpW5qwoypPAWc2sXJ6cSRnBgLs+DaQs=
 =nUqY
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r9a07g054-dt-binding-defs-tag' into renesas-arm-dt-for-v5.18

Renesas RZ/V2L DT Binding Definitions

Clock definitions for the Renesas RZ/V2L (R9A07G054) SoC, shared by
driver and DT source files.
2022-02-02 09:20:10 +01:00
Biju Das 4decd2e54b dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
Define RZ/V2L (R9A07G054) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r1.0") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/V2L Hardware User's Manual (Rev.
1.00, Nov. 2021).

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220126211003.6675-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-02-02 09:06:22 +01:00
Kuninori Morimoto 0e684f6e93 arm64: dts: renesas: ulcb/ulcb-kf: switch to use audio-graph-card2 for sound
Current ULCB{-KF} are using audio-graph-card.
Now ALSA is supporting new audio-graph-card2 which can easily handle
more advanced feature. Let's switch to use it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/20220124021142.224592-2-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-28 10:59:14 +01:00
Nikita Yushchenko fb912a1b47 arm64: dts: renesas: rcar-gen3: Add MOST devices
This patch adds the MLP device nodes to dtsi files for R-Car Gen3 SoCs
that have it.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20220120051559.746322-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-28 10:59:14 +01:00
Geert Uytterhoeven 953b392aef arm64: dts: renesas: Miscellaneous whitespace fixes
Make whitespace and indentation more consistent.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3f2bcae1253c7a31d3eb6755185092a1f2b99b09.1642524439.git.geert+renesas@glider.be
2022-01-28 10:59:14 +01:00
Niklas Söderlund 283252132c arm64: dts: renesas: falcon-csi-dsi: Add and connect MAX96712
The sub-board contains three MAX96712 connected to the main-board using
I2C and CSI-2, record the connections. Also enable all nodes (VIN, CSI-2
and ISP) that are part of the downstream video capture pipeline.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20220113163239.3035073-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-28 10:59:14 +01:00
Nikita Yushchenko c705c87110 arm64: dts: renesas: ulcb-kf: Add 9-asix sensor device
This adds nodes for the lsm9ds0 sensor installed on the KF board.

With this patch, the sensor data becomes available over the IIO sysfs
interface.

The interrupt definition is not added yet, because the interrupt lines
of lsm9ds0 are pulled to VCC on the board, which implies a need for
active-low configuration. But the st_sensors drivers currently can't
work with active-low interrupts on this chip.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20220112205205.4082026-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-28 10:59:13 +01:00
Nikita Yushchenko 72a2cab3a1 arm64: dts: renesas: ulcb-kf: Add KF HDMI output
This patch adds nodes needed to enable DRM video output over the HDMI
connector located on the Kingfisher board.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20211225115308.2152364-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:09:13 +01:00
Nikita Yushchenko d45db61c2e arm64: dts: renesas: r8a77961: Add lvds0 device node
Add the missing lvds0 node for the R-Car M3-W+ SoC.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20211224052309.1997096-3-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:09:13 +01:00
Yoshihiro Shimoda 8b88873b8f arm64: dts: renesas: r8a779f0: Add sys-dmac nodes
Add SYS-DMAC nodes for r8a779f0.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20211221052722.597407-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:09:13 +01:00
Miquel Raynal f2ad62a271 ARM: dts: r9a06g032: Describe the NAND controller
Describe the NAND controller embedded in r9a06g032 SoCs.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211217142033.353599-5-miquel.raynal@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:09:13 +01:00
Kieran Bingham ad6a6ed4d9 arm64: dts: renesas: Add GMSL cameras .dtsi
Describe the FAKRA connector available on Eagle and Condor boards that
allow to connect GMSL camera modules such as IMI RDACM20 and RDACM21.

Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20211216163439.139579-7-jacopo+renesas@jmondi.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:09:13 +01:00
Kieran Bingham 557165ffb9 arm64: dts: renesas: eagle: Enable MAX9286
Enable the MAX9286 GMSL deserializer on the Eagle-V3M board.

Connected cameras should be defined in a device-tree overlay or included
after these definitions.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211216163439.139579-6-jacopo+renesas@jmondi.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:09:13 +01:00
Jacopo Mondi 9199da6837 arm64: dts: renesas: condor: Enable MAX9286
Enable the MAX9286 GMSL deserializers on Condor-V3H board.

Connected cameras should be defined in a device-tree overlay or included
after these definitions.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211216163439.139579-5-jacopo+renesas@jmondi.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:09:13 +01:00
Biju Das ce0c63b6a5 arm64: dts: renesas: Add initial device tree for RZ/G2LC SMARC EVK
Add basic support for the RZ/G2LC SMARC EVK (based on R9A07G044C2):
- memory
- External input clock
- SCIF
- GbEthernet
- Audio Clock

It shares the same carrier board with RZ/G2L, but the pin mapping is
different.  Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211216114305.5842-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:09:13 +01:00
Biju Das 3a3c2a48d8 arm64: dts: renesas: Add initial DTSI for RZ/G2LC SoC
The RZ/G2L and RZ/G2LC SoCs are similar and they share the same DEVID.
RZ/G2LC has fewer peripherals compared to RZ/G2L.

SSI (3 channels vs 4 channels)
GbEthernet (1 channel vs 2 channels)
SCIFA (4 channels vs 5 channels)
ADC is only supported in RZ/G2L.

Add the initial DTSI for the RZ/G2LC SoC by reusing the common
r9a07g044.dtsi file with unsupported device nodes deleted in the below
SoC specific dtsi files.

r9a07g044c1.dtsi => RZ/G2LC R9A07G044C1 SoC specific parts
r9a07g044c2.dtsi => RZ/G2LC R9A07G044C2 SoC specific parts

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211216114305.5842-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:00:36 +01:00
Biju Das 65d2bc885b arm64: dts: renesas: rzg2l-smarc: Move pinctrl definitions
RZ/G2L and RZ/G2LC SMARC EVK use the same carrier board, but the pin
mappings between the RZ/G2L and the RZ/G2LC SMARC SoM are different.
Therefore we need to update the carrier board pin definitions based
on the corresponding SoM pin mapping.

Move pinctrl definitions out of the RZ/G2L SMARC common file, so that
we can reuse the common file to support RZ/G2LC SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211216114305.5842-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:00:36 +01:00
Fabio Estevam 3a4f33ee57 arm64: dts: renesas: beacon: Remove the 'pm-ignore-notify' property
The 'pm-ignore-notify' property is not a valid property and there is
no bindings documentation for it.

Drop such invalid property.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20211208195624.1864654-1-festevam@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24 10:00:36 +01:00
Geert Uytterhoeven 9eca8bdf0a arm64: dts: renesas: r8a779a0: Add INTC-EX device node
Populate the device node for the Interrupt Controller for External
Devices (INTC-EX) on R-Car V3U, which serves external IRQ pins IRQ[0-5].

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/4e2297e1066df483c0434df487df5b79e76b75b8.1624460378.git.geert+renesas@glider.be
2022-01-24 10:00:36 +01:00
Linus Torvalds e783362eb5 Linux 5.17-rc1 2022-01-23 10:12:53 +02:00
Linus Torvalds 40c843218f perf tools changes for v5.17: 2nd batch
- Fix printing 'phys_addr' in 'perf script'.
 
 - Fix failure to add events with 'perf probe' in ppc64 due to not removing
   leading dot (ppc64 ABIv1).
 
 - Fix cpu_map__item() python binding building.
 
 - Support event alias in form foo-bar-baz, add pmu-events and parse-event tests
   for it.
 
 - No need to setup affinities when starting a workload or attaching to a pid.
 
 - Use path__join() to compose a path instead of ad-hoc snprintf() equivalent.
 
 - Override attr->sample_period for non-libpfm4 events.
 
 - Use libperf cpumap APIs instead of accessing the internal state directly.
 
 - Sync x86 arch prctl headers and files changed by the new
   set_mempolicy_home_node syscall with the kernel sources.
 
 - Remove duplicate include in cpumap.h.
 
 - Remove redundant err variable.
 
 Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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Merge tag 'perf-tools-for-v5.17-2022-01-22' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux

Pull more perf tools updates from Arnaldo Carvalho de Melo:

 - Fix printing 'phys_addr' in 'perf script'.

 - Fix failure to add events with 'perf probe' in ppc64 due to not
   removing leading dot (ppc64 ABIv1).

 - Fix cpu_map__item() python binding building.

 - Support event alias in form foo-bar-baz, add pmu-events and
   parse-event tests for it.

 - No need to setup affinities when starting a workload or attaching to
   a pid.

 - Use path__join() to compose a path instead of ad-hoc snprintf()
   equivalent.

 - Override attr->sample_period for non-libpfm4 events.

 - Use libperf cpumap APIs instead of accessing the internal state
   directly.

 - Sync x86 arch prctl headers and files changed by the new
   set_mempolicy_home_node syscall with the kernel sources.

 - Remove duplicate include in cpumap.h.

 - Remove redundant err variable.

* tag 'perf-tools-for-v5.17-2022-01-22' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
  perf tools: Remove redundant err variable
  perf test: Add parse-events test for aliases with hyphens
  perf test: Add pmu-events test for aliases with hyphens
  perf parse-events: Support event alias in form foo-bar-baz
  perf evsel: Override attr->sample_period for non-libpfm4 events
  perf cpumap: Remove duplicate include in cpumap.h
  perf cpumap: Migrate to libperf cpumap api
  perf python: Fix cpu_map__item() building
  perf script: Fix printing 'phys_addr' failure issue
  tools headers UAPI: Sync files changed by new set_mempolicy_home_node syscall
  tools headers UAPI: Sync x86 arch prctl headers with the kernel sources
  perf machine: Use path__join() to compose a path instead of snprintf(dir, '/', filename)
  perf evlist: No need to setup affinities when disabling events for pid targets
  perf evlist: No need to setup affinities when enabling events for pid targets
  perf stat: No need to setup affinities when starting a workload
  perf affinity: Allow passing a NULL arg to affinity__cleanup()
  perf probe: Fix ppc64 'perf probe add events failed' case
2022-01-23 08:14:21 +02:00
Linus Torvalds 67bfce0e01 ftrace: Fix s390 breakage from sorting mcount tables
The latest merge of the tracing tree sorts the mcount table at build time.
 But s390 appears to do things differently (like always) and replaces the
 sorted table back to the original unsorted one. As the ftrace algorithm
 depends on it being sorted, bad things happen when it is not, and s390
 experienced those bad things.
 
 Add a new config to tell the boot if the mcount table is sorted or not,
 and allow s390 to opt out of it.
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Merge tag 'trace-v5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace

Pull ftrace fix from Steven Rostedt:
 "Fix s390 breakage from sorting mcount tables.

  The latest merge of the tracing tree sorts the mcount table at build
  time. But s390 appears to do things differently (like always) and
  replaces the sorted table back to the original unsorted one. As the
  ftrace algorithm depends on it being sorted, bad things happen when it
  is not, and s390 experienced those bad things.

  Add a new config to tell the boot if the mcount table is sorted or
  not, and allow s390 to opt out of it"

* tag 'trace-v5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace:
  ftrace: Fix assuming build time sort works for s390
2022-01-23 08:07:02 +02:00
Steven Rostedt (Google) 6b9b641370 ftrace: Fix assuming build time sort works for s390
To speed up the boot process, as mcount_loc needs to be sorted for ftrace
to work properly, sorting it at build time is more efficient than boot up
and can save milliseconds of time. Unfortunately, this change broke s390
as it will modify the mcount_loc location after the sorting takes place
and will put back the unsorted locations. Since the sorting is skipped at
boot up if it is believed that it was sorted at run time, ftrace can crash
as its algorithms are dependent on the list being sorted.

Add a new config BUILDTIME_MCOUNT_SORT that is set when
BUILDTIME_TABLE_SORT but not if S390 is set. Use this config to determine
if sorting should take place at boot up.

Link: https://lore.kernel.org/all/yt9dee51ctfn.fsf@linux.ibm.com/

Fixes: 72b3942a17 ("scripts: ftrace - move the sort-processing in ftrace_init")
Reported-by: Sven Schnelle <svens@linux.ibm.com>
Tested-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2022-01-23 00:10:09 -05:00
Linus Torvalds 473aec0e1f Kbuild fixes for v5.17
- Bring include/uapi/linux/nfc.h into the UAPI compile-test coverage
 
  - Revert the workaround of CONFIG_CC_IMPLICIT_FALLTHROUGH
 
  - Fix build errors in certs/Makefile
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Merge tag 'kbuild-fixes-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild

Pull Kbuild fixes from Masahiro Yamada:

 - Bring include/uapi/linux/nfc.h into the UAPI compile-test coverage

 - Revert the workaround of CONFIG_CC_IMPLICIT_FALLTHROUGH

 - Fix build errors in certs/Makefile

* tag 'kbuild-fixes-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
  certs: Fix build error when CONFIG_MODULE_SIG_KEY is empty
  certs: Fix build error when CONFIG_MODULE_SIG_KEY is PKCS#11 URI
  Revert "Makefile: Do not quote value for CONFIG_CC_IMPLICIT_FALLTHROUGH"
  usr/include/Makefile: add linux/nfc.h to the compile-test coverage
2022-01-23 06:32:29 +02:00
Linus Torvalds 3689f9f8b0 bitmap patches for 5.17-rc1
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Merge tag 'bitmap-5.17-rc1' of git://github.com/norov/linux

Pull bitmap updates from Yury Norov:

 - introduce for_each_set_bitrange()

 - use find_first_*_bit() instead of find_next_*_bit() where possible

 - unify for_each_bit() macros

* tag 'bitmap-5.17-rc1' of git://github.com/norov/linux:
  vsprintf: rework bitmap_list_string
  lib: bitmap: add performance test for bitmap_print_to_pagebuf
  bitmap: unify find_bit operations
  mm/percpu: micro-optimize pcpu_is_populated()
  Replace for_each_*_bit_from() with for_each_*_bit() where appropriate
  find: micro-optimize for_each_{set,clear}_bit()
  include/linux: move for_each_bit() macros from bitops.h to find.h
  cpumask: replace cpumask_next_* with cpumask_first_* where appropriate
  tools: sync tools/bitmap with mother linux
  all: replace find_next{,_zero}_bit with find_first{,_zero}_bit where appropriate
  cpumask: use find_first_and_bit()
  lib: add find_first_and_bit()
  arch: remove GENERIC_FIND_FIRST_BIT entirely
  include: move find.h from asm_generic to linux
  bitops: move find_bit_*_le functions from le.h to find.h
  bitops: protect find_first_{,zero}_bit properly
2022-01-23 06:20:44 +02:00
Minghao Chi f0ac5b8581 perf tools: Remove redundant err variable
Return value from perf_event__process_tracing_data() directly instead
of taking this in another redundant variable.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: http://lore.kernel.org/lkml/20220112080109.666800-1-chi.minghao@zte.com.cn
Signed-off-by: CGEL ZTE <cgel.zte@gmail.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-22 17:25:02 -03:00
John Garry b4a7276c5e perf test: Add parse-events test for aliases with hyphens
Add a test which allows us to test parsing an event alias with hyphens.

Since these events typically do not exist on most host systems, add the
alias to the fake pmu.

Function perf_pmu__test_parse_init() has terms added to match known test
aliases.

Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qi Liu <liuqi115@huawei.com>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: linuxarm@huawei.com
Link: https://lore.kernel.org/r/1642432215-234089-4-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-22 17:21:41 -03:00
John Garry 34fa67e720 perf test: Add pmu-events test for aliases with hyphens
Add a test for aliases with hyphens in the name to ensure that the
pmu-events tables are as expects. There should be no reason why these sort
of aliases would be treated differently, but no harm in checking.

Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qi Liu <liuqi115@huawei.com>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: linuxarm@huawei.com
Link: https://lore.kernel.org/r/1642432215-234089-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-22 17:21:29 -03:00
John Garry 864bc8c905 perf parse-events: Support event alias in form foo-bar-baz
Event aliasing for events whose name in the form foo-bar-baz is not
supported, while foo-bar, foo_bar_baz, and other combinations are, i.e.
two hyphens are not supported.

The HiSilicon D06 platform has events in such form:

  $ ./perf list sdir-home-migrate

  List of pre-defined events (to be used in -e):

  uncore hha:
    sdir-home-migrate
   [Unit: hisi_sccl,hha]

  $ sudo ./perf stat -e sdir-home-migrate
  event syntax error: 'sdir-home-migrate'
                          \___ parser error
  Run 'perf list' for a list of valid events

   Usage: perf stat [<options>] [<command>]

   -e, --event <event>event selector. use 'perf list' to list available events

To support, add an extra PMU event symbol type for "baz", and add a new
rule in the bison file.

Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qi Liu <liuqi115@huawei.com>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: linuxarm@huawei.com
Link: https://lore.kernel.org/r/1642432215-234089-2-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-22 17:20:12 -03:00
German Gomez 3606c0e1a1 perf evsel: Override attr->sample_period for non-libpfm4 events
A previous patch preventing "attr->sample_period" values from being
overridden in pfm events changed a related behaviour in arm-spe.

Before said patch:

  perf record -c 10000 -e arm_spe_0// -- sleep 1

Would yield an SPE event with period=10000. After the patch, the period
in "-c 10000" was being ignored because the arm-spe code initializes
sample_period to a non-zero value.

This patch restores the previous behaviour for non-libpfm4 events.

Fixes: ae5dcc8abe (“perf record: Prevent override of attr->sample_period for libpfm4 events”)
Reported-by: Chase Conklin <chase.conklin@arm.com>
Signed-off-by: German Gomez <german.gomez@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Fastabend <john.fastabend@gmail.com>
Cc: KP Singh <kpsingh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin KaFai Lau <kafai@fb.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Song Liu <songliubraving@fb.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Yonghong Song <yhs@fb.com>
Cc: bpf@vger.kernel.org
Cc: netdev@vger.kernel.org
Link: http://lore.kernel.org/lkml/20220118144054.2541-1-german.gomez@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-22 17:15:47 -03:00
Lv Ruyi 24ead7c254 perf cpumap: Remove duplicate include in cpumap.h
Remove all but the first include of stdbool.h from cpumap.h.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20220117083730.863200-1-lv.ruyi@zte.com.cn
Signed-off-by: CGEL ZTE <cgel.zte@gmail.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-22 17:12:23 -03:00