prima2 and marco have diffetent l2 cache configuration, so we initialize l2x0 cache based on dtb given to kernel. Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robherring2@gmail.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <baohua.song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>