Commit Graph

14 Commits

Author SHA1 Message Date
Lichao Liu 2984b3f8c2 MIPS: Loongson-2EF: disable fix-loongson3-llsc in compiler
Firstly, Loongson-2EF support ll/sc instructions, but
doesn't need fix-loongson3-llsc compile option.

Secondly, fix-loongson3-llsc will cause kernel startup
fail at futex_init, because compiler will add 'sync' before
'll', which will affect __ex_table.
futex_init will pass NULL uaddr parameter to
futex_atomic_cmpxchg_inatomic.
futex_atomic_cmpxchg_inatomic will access uaddr directly,
which will cause page fault exception, the exception should be
handled by __ex_table's nextinsn if the exception insn exsit in
__ex_table. Because __ex_table is affected by compiler,
the exception can not be handled, and
futex_atomic_cmpxchg_inatomic will crash.

Error code as below:
__ex_table.insn = 1b, which is 'sync' compiled with
fix-loongson3-llsc, but the actual exception instrction is ll.
So, do_page_fault will not find the correct inst in __ex_table, and
can not handle this exception.

        "1: "user_ll("%1", "%3")"               \n"
        "   bne %1, %z4, 3f             \n"
        "   .set    pop                 \n"
        "   move    $1, %z5                 \n"
        "   .set    "MIPS_ISA_ARCH_LEVEL"           \n"
        "2: "user_sc("$1", "%2")"               \n"
        "   beqz    $1, 1b                  \n"
        "3: " __SYNC_ELSE(full, loongson3_war, __WEAK_LLSC_MB) "\n"
        "   .insn                       \n"
        "   .set    pop                 \n"
        "   .section .fixup,\"ax\"              \n"
        "4: li  %0, %6                  \n"
        "   j   3b                  \n"
        "   .previous                   \n"
        "   .section __ex_table,\"a\"           \n"
        "   "__UA_ADDR "\t1b, 4b                \n"
        "   "__UA_ADDR "\t2b, 4b                \n"
        "   .previous

Signed-off-by: Lichao Liu <liulichao@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-22 17:35:31 +02:00
Ben Hutchings f39293fd37 MIPS: Fix exception handler memcpy()
The exception handler subroutines are declared as a single char, but
when copied to the required addresses the copy length is 0x80.

When range checks are enabled for memcpy() this results in a build
failure, with error messages such as:

In file included from arch/mips/mti-malta/malta-init.c:15:
In function 'memcpy',
    inlined from 'mips_nmi_setup' at arch/mips/mti-malta/malta-init.c:98:2:
include/linux/string.h:376:4: error: call to '__read_overflow2' declared with attribute error: detected read beyond size of object passed as 2nd parameter
  376 |    __read_overflow2();
      |    ^~~~~~~~~~~~~~~~~~

Change the declarations to use type char[].

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: YunQiang Su <syq@debian.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-24 09:15:54 +02:00
Thomas Bogendoerfer 26bff9eb49 MIPS: Only include the platform file needed
Instead of including all Platform files, we simply include the
needed one and avoid clashes with makefile variables.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-05-13 00:17:18 +02:00
Arnd Bergmann c02e963044 mips: loongsoon2ef: remove private clk api
As platforms are moving to COMMON_CLK in general, loongson2ef
stuck out as something that has a private implementation but
does not actually use it except for setting the frequency of
the CPU itself from the loongson2_cpufreq driver.

Change that driver to call the register setting function directly
and remove the rest of the stub implementation.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-04-16 17:34:23 +02:00
afzal mohammed 49e6e07e3c MIPS: pass non-NULL dev_id on shared request_irq()
Recently all usages of setup_irq() was replaced by request_irq().
request_irq() does a few sanity checks that were not done in
setup_irq(), if they fail irq registration will fail. One of the check
is to ensure that non-NULL dev_id is passed in the case of shared irq.
This caused malta on qemu to hang.

Fix it by passing handler as dev_id to all request_irq()'s that are
shared. For sni, instead of passing non-NULL dev_id, remove shared irq
flags.

Fixes: ac8fd122e0 ("MIPS: Replace setup_irq() by request_irq()")
Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Suggested-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-16 16:04:49 +01:00
afzal mohammed ac8fd122e0 MIPS: Replace setup_irq() by request_irq()
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.

Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.

Hence replace setup_irq() by request_irq().

remove_irq() has been replaced by free_irq() as well.

There were build error's during previous version, couple of which was
reported by kbuild test robot <lkp@intel.com> of which one was reported
by Thomas Bogendoerfer <tsbogend@alpha.franken.de> as well. There were a
few more issues including build errors, those also have been fixed.

[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-03-05 16:47:35 +01:00
Linus Torvalds c5951e7c8e The main MIPS changes for 5.6:
- Support mremap() for the VDSO, primarily to allow CRIU to restore the
   VDSO to its checkpointed location.
 
 - Restore the MIPS32 cBPF JIT, after having reverted the enablement of
   the eBPF JIT for MIPS32 systems in the 5.5 cycle.
 
 - Improve cop0 counter synchronization behaviour whilst onlining CPUs by
   running with interrupts disabled.
 
 - Better match FPU behaviour when emulating multiply-accumulate
   instructions on pre-r6 systems that implement IEEE754-2008 style MACs.
 
 - Loongson64 kernels now build using the MIPS64r2 ISA, allowing them to
   take advantage of instructions introduced by r2.
 
 - Support for the Ingenic X1000 SoC & the really nice little CU Neo
   development board that's using it.
 
 - Support for WMAC on GARDENA Smart Gateway devices.
 
 - Lots of cleanup & refactoring of SGI IP27 (Origin 2*) support in
   preparation for introducing IP35 (Origin 3*) support.
 
 - Various Kconfig & Makefile cleanups.
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Merge tag 'mips_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS changes from Paul Burton:
 "Nothing too big or scary in here:

   - Support mremap() for the VDSO, primarily to allow CRIU to restore
     the VDSO to its checkpointed location.

   - Restore the MIPS32 cBPF JIT, after having reverted the enablement
     of the eBPF JIT for MIPS32 systems in the 5.5 cycle.

   - Improve cop0 counter synchronization behaviour whilst onlining CPUs
     by running with interrupts disabled.

   - Better match FPU behaviour when emulating multiply-accumulate
     instructions on pre-r6 systems that implement IEEE754-2008 style
     MACs.

   - Loongson64 kernels now build using the MIPS64r2 ISA, allowing them
     to take advantage of instructions introduced by r2.

   - Support for the Ingenic X1000 SoC & the really nice little CU Neo
     development board that's using it.

   - Support for WMAC on GARDENA Smart Gateway devices.

   - Lots of cleanup & refactoring of SGI IP27 (Origin 2*) support in
     preparation for introducing IP35 (Origin 3*) support.

   - Various Kconfig & Makefile cleanups"

* tag 'mips_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (60 commits)
  MIPS: PCI: Add detection of IOC3 on IO7, IO8, IO9 and Fuel
  MIPS: Loongson64: Disable exec hazard
  MIPS: Loongson64: Bump ISA level to MIPSR2
  MIPS: Make DIEI support as a config option
  MIPS: OCTEON: octeon-irq: fix spelling mistake "to" -> "too"
  MIPS: asm: local: add barriers for Loongson
  MIPS: Loongson64: Select mac2008 only feature
  MIPS: Add MAC2008 Support
  Revert "MIPS: Add custom serial.h with BASE_BAUD override for generic kernel"
  MIPS: sort MIPS and MIPS_GENERIC Kconfig selects alphabetically (again)
  MIPS: make CPU_HAS_LOAD_STORE_LR opt-out
  MIPS: generic: don't unconditionally select PINCTRL
  MIPS: don't explicitly select LIBFDT in Kconfig
  MIPS: sync-r4k: do slave counter synchronization with disabled HW interrupts
  MIPS: SGI-IP30: Check for valid pointer before using it
  MIPS: syscalls: fix indentation of the 'SYSNR' message
  MIPS: boot: fix typo in 'vmlinux.lzma.its' target
  MIPS: fix indentation of the 'RELOCS' message
  dt-bindings: Document loongson vendor-prefix
  MIPS: CU1000-Neo: Refresh defconfig to support HWMON and WiFi.
  ...
2020-01-31 11:28:31 -08:00
Mao Wenan 11d06df7b9
MIPS: Loongson2ef: drop pointless static qualifier in loongson_suspend_enter()
There is no need to have the 'T *v' variable static
since new value always be assigned before use it.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Mao Wenan <maowenan@huawei.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: <jiaxun.yang@flygoat.com>
Cc: <ralf@linux-mips.org>
Cc: <jhogan@kernel.org>
Cc: <gregkh@linuxfoundation.org>
Cc: <tglx@linutronix.de>
Cc: <linux-mips@vger.kernel.org>
Cc: <linux-kernel@vger.kernel.org>
Cc: <kernel-janitors@vger.kernel.org>
2020-01-09 09:57:07 -08:00
Christoph Hellwig 4bdc0d676a remove ioremap_nocache and devm_ioremap_nocache
ioremap has provided non-cached semantics by default since the Linux 2.6
days, so remove the additional ioremap_nocache interface.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2020-01-06 09:45:59 +01:00
Jiaxun Yang 574b9a04ab
MIPS: Loongson2ef: Convert to early_printk_8250
early_printk.c is doing the same with early_printk_8250.
Remove duplicated code.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: chenhe@lemote.com
2019-11-11 10:45:00 -08:00
Jiaxun Yang 2a5984360b
MIPS: Drop CPU_SUPPORTS_UNCACHED_ACCELERATED
CPU_SUPPORTS_UNCACHED_ACCELERATED was introduced when kernel can't handle
writecombine remap well. Nowadays drivers can try writecombine remap by
themselves so this function is nolonger needed.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: chenhe@lemote.com
2019-11-11 10:44:57 -08:00
Jiaxun Yang 75cac781dc
MIPS: Loongson{2ef, 32, 64} convert to generic fw cmdline
All of Loongson firmwares are passing boot cmdline/env
in the manner of YAMON/PMON. Thus we can remove duplicated
cmdline initialize code and convert to generic fw method.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: chenhe@lemote.com
2019-11-11 10:44:56 -08:00
Jiaxun Yang 5831fdb099
MIPS: Loongson2ef: clean up loongson64 related code
Remove unrelevent macros, defines and codes from loongson2ef mach.
Also rename some defines to match new naming.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: paul.burton@mips.com
2019-11-01 14:31:28 -07:00
Jiaxun Yang 71e2f4dd5a
MIPS: Fork loongson2ef from loongson64
As later model of GSx64 family processors including 2-series-soc have
similar design with initial loongson3a while loongson2e/f seems less
identical, we separate loongson2e/f support code out of mach-loongson64
to make our life easier.

This patch contains mostly file moving works.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
[paulburton@kernel.org: Squash in the MAINTAINERS updates]
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: paul.burton@mips.com
2019-11-01 14:30:52 -07:00