Commit Graph

11 Commits

Author SHA1 Message Date
Vadim Pasternak 66b0c2846b i2c: mlxcpld: Add support for I2C bus frequency setting
Add support for I2C bus frequency setting according to the specific
system capability. This capability is obtained from CPLD frequency
setting register, which could be provided through the platform data.
If such register is provided, it specifies minimal I2C bus frequency
to be used for the devices attached to the I2C bus. Supported
freqeuncies are 100KHz, 400KHz, 1MHz, while 100KHz is the default.

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-01-06 15:36:46 +01:00
Vadim Pasternak cb9744178f i2c: mlxcpld: Decrease polling time for performance improvement
Decrease polling time 'MLXCPLD_I2C_POLL_TIME' from 2000 usec to 400
usec. It greatly improves performance of I2C transactions.

Reliability of setting polling time to 400 usec has been thoroughly
validated across all the supported systems.

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-01-05 11:16:11 +01:00
Vadim Pasternak f069291bd5 i2c: mlxcpld: Update module license
Update license to SPDX-License.

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
2021-01-05 11:16:00 +01:00
Wolfram Sang 597911287f i2c: mlxcpld: check correct size of maximum RECV_LEN packet
I2C_SMBUS_BLOCK_MAX defines already the maximum number as defined in the
SMBus 2.0 specs. I don't see a reason to add 1 here. Also, fix the errno
to what is suggested for this error.

Fixes: c9bfdc7c16 ("i2c: mlxcpld: Add support for smbus block read transaction")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Michael Shych <michaelsh@mellanox.com>
Tested-by: Michael Shych <michaelsh@mellanox.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
2020-07-04 08:20:38 +02:00
Vadim Pasternak 13067ef73f i2c: mlxcpld: Fix wrong initialization order in probe
Fix wrong order in probing routine initialization - field `base_addr'
is used before it's initialized. Move assignment of 'priv->base_addr`
to the beginning, prior the call to mlxcpld_i2c_read_comm().
Wrong order caused the first read of capability register to be executed
at wrong offset 0x0 instead of 0x2000. By chance it was a "good
garbage" at 0x0 offset.

Fixes: 313ce648b5 ("i2c: mlxcpld: Add support for extended transaction length for i2c-mlxcpld")
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
2019-05-27 21:24:58 +02:00
Michael Shych ae4aa68dd3 i2c: mlxcpld: Allow configurable adapter id for mlxcpld
It allows mlxcpld driver to be connected to pre-defined adapter number
equal or greater than one, in order to avoid current limitation, assuming
usage of id number one only.

Signed-off-by: Michael Shych <michaelsh@mellanox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-04-30 10:39:29 +02:00
Michael Shych 845f2a6d00 i2c: mlxcpld: Fix adapter functionality support callback
It fixes report about supported functionality.
Functionality can be different up to CPLD capability.

Fixes: 6bec23bff9 (i2c: mlxcpld: add master driver for mellanox systems)
Signed-off-by: Michael Shych <michaelsh@mellanox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-04-30 10:39:28 +02:00
Michael Shych c9bfdc7c16 i2c: mlxcpld: Add support for smbus block read transaction
It adds support for smbus block read transaction. CPLD smbus block read bit
of capability register is verified during driver initialization, and driver
data is updated if such capability is available. In case an upper layer
requests a read transaction of length one and expects that length will be
the first received byte, driver will notify CPLD about SMBus block read
transaction flavor, so CPLD will know to execute such kind of transaction.

Signed-off-by: Michael Shych <michaelsh@mellanox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-04-30 10:39:28 +02:00
Michael Shych 313ce648b5 i2c: mlxcpld: Add support for extended transaction length for i2c-mlxcpld
It adds support for extended length of read and write transactions.
New CPLD logic allows double size of the read and write transactions
length. This feature is verified through capability register, which is
renamed from unclear LPF_REG to CPBLTY_REG. Two bits 5 and 6 of these
register are used for length capability detection, while only 01
combination indicates support of extended transaction length.
Others mean lack of such support.

Signed-off-by: Michael Shych <michaelsh@mellanox.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-04-30 10:39:28 +02:00
Bhumika Goyal ae3923a284 i2c: busses: make i2c_adapter_quirks const
Make these const as they are only stored as a reference in the quirks
field of an i2c_adapter structure, which is const. Done using
Coccinelle.

Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-08-29 22:32:47 +02:00
Vadim Pasternak 6bec23bff9 i2c: mlxcpld: add master driver for mellanox systems
Device driver for Mellanox I2C controller logic, implemented in Lattice
CPLD device.
Device supports:
 - Master mode
 - One physical bus
 - Polling mode

The Kconfig currently controlling compilation of this code is:
drivers/i2c/busses/Kconfig:config I2C_MLXCPLD

Signed-off-by: Michael Shych <michaelsh@mellanox.com>
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-24 16:21:42 +01:00