2 Commits

Author	SHA1	Message	Date
Arvind Yadav	4e36a8ad4d	iio: Aspeed ADC - Handle return value of clk_prepare_enable ... clk_prepare_enable() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Reviewed-by: Rick Altherr <raltherr@google.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>	2017-06-11 15:08:20 +01:00
Rick Altherr	573803234e	iio: Aspeed ADC ... Aspeed BMC SoCs include a 16 channel, 10-bit ADC. Low and high threshold interrupts are supported by the hardware but are not currently implemented. Signed-off-by: Rick Altherr <raltherr@google.com> Tested-by: Xo Wang <xow@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Jonathan Cameron <jic23@kernel.org>	2017-04-01 11:53:20 +01:00