Fixes the following W=1 kernel build warning(s):
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c:141: warning: Function parameter or member 'chip' not described in 'iproc_set_bit'
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c:141: warning: Excess function parameter 'iproc_gpio' description in 'iproc_set_bit'
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Link: https://lore.kernel.org/r/20200713144930.1034632-5-lee.jones@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There has been little to no attempt to document any of the demoted
structures here. These are obviously not kerneldoc headers.
Fixes the following W=1 kernel build warning(s):
drivers/pinctrl/bcm/pinctrl-bcm281xx.c:65: warning: cannot understand function prototype: 'enum bcm281xx_pin_type '
drivers/pinctrl/bcm/pinctrl-bcm281xx.c:79: warning: cannot understand function prototype: 'struct bcm281xx_pin_function '
drivers/pinctrl/bcm/pinctrl-bcm281xx.c:89: warning: cannot understand function prototype: 'struct bcm281xx_pinctrl_data '
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200713144930.1034632-4-lee.jones@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rather than always using handle_simple_irq() as the gpio_irq_chip
handler, set a more appropriate handler based on the IRQ trigger type
requested. This is important for level triggered interrupts which need
to be masked during handling. Also, fix the interrupt acknowledge so
that it clears only one interrupt instead of all interrupts which are
currently active. Finally there is no need to clear the interrupt during
the interrupt handler, since the edge-triggered handler will do that for
us.
Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Link: https://lore.kernel.org/r/20200703011830.15655-1-mark.tomlinson@alliedtelesis.co.nz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Leverage the IRQCHIP_MASK_ON_SUSPEND flag in order to avoid having to
specifically treat the GPIO interrupts during suspend and resume, and
simply implement an irq_set_wake() callback that is responsible for
enabling the parent wake-up interrupt as a wake-up interrupt.
To avoid allocating unnecessary resources for other chips, the wake-up
interrupts are only initialized if we have a brcm,bcm7211-gpio
compatibility string.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20200531001101.24945-5-f.fainelli@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The BCM7211 SoC uses the same pinconf_ops as the ones defined for the
BCM2711 SoC, match the compatible string and use the correct set of
options.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20200531001101.24945-4-f.fainelli@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When call function devm_platform_ioremap_resource(), we should use IS_ERR()
to check the return value and return PTR_ERR() if failed.
Fixes: 4b024225c4 ("pinctrl: use devm_platform_ioremap_resource() to simplify code")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Link: https://lore.kernel.org/r/1590234326-2194-1-git-send-email-yangtiezhu@loongson.cn
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and
GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0.
Main benefit is to make it easier to see which values mean IN and which
OUT. As a side effect this helps GPIO framework to change the direction
defines to something else if ever needed.
Please note that return value from get_direction call on
pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have
returned value 2 for direction INPUT.
Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reported-by: kbuild test robot <lkp@intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This prepares the platform data to be easier to extend for more GPIOs.
Except of this there is no functional change.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/1581166975-22949-3-git-send-email-stefan.wahren@i2se.com
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Core changes:
- Dropped the chained IRQ setup callback into GPIOLIB as we
got rid of the last users of that in this changeset.
New drivers:
- New driver for Ingenic X1830.
- New driver for Freescale i.MX8MP.
Driver enhancements:
- Fix all remaining Intel drivers to pass their IRQ chips
along with the GPIO chips.
- Intel Baytrail allocates its irqchip dynamically.
- Intel Lynxpoint is thoroughly rewritten and modernized.
- Aspeed AST2600 pin muxing and configuration is much
improved.
- Qualcomm SC7180 functions are updated and wakeup interrupt
map is provided.
- A whole slew of Renesas SH-PFC cleanups and improvements.
- Fix up the Intel DT bindings to use the generic YAML
DT bindings schema. (A first user of this.)
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Merge tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes, nothing too exciting about
this.
Some changes hit arch/sh and arch/arm but are well isolated and
acknowledged by the respective arch maintainers.
Core changes:
- Dropped the chained IRQ setup callback into GPIOLIB as we got rid
of the last users of that in this changeset.
New drivers:
- New driver for Ingenic X1830.
- New driver for Freescale i.MX8MP.
Driver enhancements:
- Fix all remaining Intel drivers to pass their IRQ chips along with
the GPIO chips.
- Intel Baytrail allocates its irqchip dynamically.
- Intel Lynxpoint is thoroughly rewritten and modernized.
- Aspeed AST2600 pin muxing and configuration is much improved.
- Qualcomm SC7180 functions are updated and wakeup interrupt map is
provided.
- A whole slew of Renesas SH-PFC cleanups and improvements.
- Fix up the Intel DT bindings to use the generic YAML DT bindings
schema (a first user of this)"
* tag 'pinctrl-v5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (99 commits)
pinctrl: madera: Remove extra blank line
pinctrl: qcom: Don't lock around irq_set_irq_wake()
pinctrl: mvebu: armada-37xx: use use platform api
gpio: Drop the chained IRQ handler assign function
pinctrl: freescale: Add i.MX8MP pinctrl driver support
dt-bindings: imx: Add pinctrl binding doc for i.MX8MP
pinctrl: tigerlake: Tiger Lake uses _HID enumeration
pinctrl: sunrisepoint: Add Coffee Lake-S ACPI ID
pinctrl: iproc: Use platform_get_irq_optional() to avoid error message
pinctrl: dt-bindings: Fix some errors in the lgm and pinmux schema
pinctrl: intel: Pass irqchip when adding gpiochip
pinctrl: intel: Add GPIO <-> pin mapping ranges via callback
pinctrl: baytrail: Replace WARN with dev_info_once when setting direct-irq pin to output
pinctrl: baytrail: Do not clear IRQ flags on direct-irq enabled pins
pinctrl: sunrisepoint: Add missing Interrupt Status register offset
pinctrl: sh-pfc: Split R-Car H3 support in two independent drivers
pinctrl: artpec6: fix __iomem on reg in set
pinctrl: ingenic: Use devm_platform_ioremap_resource()
pinctrl: ingenic: Factorize irq_set_type function
pinctrl: ingenic: Remove duplicated ingenic_chip_info structures
...
Use platform_get_irq_optional() instead of platform_get_irq() to avoid
below error message during probe:
[ 0.589121] iproc-gpio 66424800.gpio: IRQ index 0 not found
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Link: https://lore.kernel.org/r/20200110035524.23511-1-rayagonda.kokatanur@broadcom.com
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ioremap has provided non-cached semantics by default since the Linux 2.6
days, so remove the additional ioremap_nocache interface.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Rather than always using handle_simple_irq() as the gpio_irq_chip
handler, set a more appropriate handler based on the IRQ trigger type
requested.
This is important for level triggered interrupts which need to be
masked during handling.
Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Link: https://lore.kernel.org/r/20191215210503.15488-2-hamish.martin@alliedtelesis.co.nz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The get_direction api is strongly recommended to be implemented. In fact
if it is not implemented gpio-hogs will not get the correct direction.
Add an implementation of get_direction for the nsp-gpio driver.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20191104001819.2300-3-chris.packham@alliedtelesis.co.nz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use more of the gpiolib infrastructure for handling interrupts. The
root interrupt still needs to be handled manually as it is shared with
other peripherals on the SoC.
This will allow multiple instances of this driver to be supported and
will clean up gracefully on failure thanks to the device managed APIs.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20191104001819.2300-2-chris.packham@alliedtelesis.co.nz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
platform_get_irq() can return an error code. Allow for this when getting
the irq.
Fixes: 6f265e5d4d ("pinctrl: bcm-iproc: Pass irqchip when adding gpiochip")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Link: https://lore.kernel.org/r/20191003000310.17099-2-chris.packham@alliedtelesis.co.nz
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use the dev_name(dev) for the irqc->name so that we get unique names
when we have multiple instances of this driver.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Link: https://lore.kernel.org/r/20191003000310.17099-3-chris.packham@alliedtelesis.co.nz
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl->functions[] array has pinctrl->num_functions elements and
the pinctrl->groups[] array is the same way. These are set in
ns2_pinmux_probe(). So the > comparisons should be >= so that we don't
read one element beyond the end of the array.
Fixes: b5aa1006e4 ("pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20190926081426.GB2332@mwanda
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This convert the BCM IPROC driver to use the SPDX header
for indicating GPL v2.0 only licensing.
Cc: Pramod Kumar <pramodku@broadcom.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Link: https://lore.kernel.org/r/20191002130217.4491-1-linus.walleij@linaro.org
The pointer log is being initialized with a value that is never read
and is being re-assigned a little later on. The assignment is
redundant and hence can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Link: https://lore.kernel.org/r/20190905140919.29283-1-colin.king@canonical.com
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When multiple instance of iproc-gpio chips are present, a fix up
message[1] is printed during the probe of second and later instances.
This issue is because driver sharing same irq_chip data structure
among multiple instances of driver.
Fix this by allocating irq_chip data structure per instance of
iproc-gpio.
[1] fix up message addressed by this patch
[ 7.862208] gpio gpiochip2: (689d0000.gpio): detected irqchip that
is shared with multiple gpiochips: please fix the driver.
Fixes: 616043d58a ("pinctrl: Rename gpio driver from cygnus to iproc")
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Link: https://lore.kernel.org/r/1567054348-19685-3-git-send-email-srinath.mannam@broadcom.com
[Rebased on top of new irq chip set-up code]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.
For chained irqchips this is a pretty straight-forward
conversion. The BCM2835 has multiple parents so let's
exploit the new facility in the GPIO_IRQCHIP to actually
deal with multiple parents.
Cc: Eric Anholt <eric@anholt.net>
Cc: Thierry Reding <treding@nvidia.com>
[Rebased on changes in the pinctrl tree]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Link: https://lore.kernel.org/r/20190812062729.1892-1-linus.walleij@linaro.org
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.
For chained irqchips this is a pretty straight-forward
conversion.
Cc: Pramod Kumar <pramodku@broadcom.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190812132554.18313-1-linus.walleij@linaro.org
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The BCM2711 has a new way of selecting the pull-up/pull-down setting
for a GPIO pin. The registers used for the BCM2835, GP_PUD and
GP_PUDCLKn0, are no longer connected. A new set of registers,
GP_GPIO_PUP_PDN_CNTRL_REGx must be used. This commit will add
a new compatible string "brcm,bcm2711-gpio" and the kernel
driver will use it to select which method is used to select
pull-up/pull-down.
This patch based on a patch by Al Cooper which was intended for the
BCM7211. This is a bugfixed and improved version.
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Link: https://lore.kernel.org/r/1563776607-8368-3-git-send-email-wahrenst@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
cycle:
Core changes:
- Device links can optionally be added between a pin control
producer and its consumers. This will affect how the system
power management is handled: a pin controller will not suspend
before all of its consumers have been suspended. This was
necessary for the ST Microelectronics STMFX expander and
need to be tested on other systems as well: it makes sense
to make this default in the long run. Right now it is
opt-in per driver.
- Drive strength can be specified in microamps. With decreases
in silicon technology, milliamps isn't granular enough, let's
make it possible to select drive strengths in microamps. Right
now the Meson (AMlogic) driver needs this.
New drivers:
- New subdriver for the Tegra 194 SoC.
- New subdriver for the Qualcomm SDM845.
- New subdriver for the Qualcomm SM8150.
- New subdriver for the Freescale i.MX8MN (Freescale is now a
product line of NXP).
- New subdriver for Marvell MV98DX1135.
Driver improvements:
- The Bitmain BM1880 driver now supports pin config in
addition to muxing.
- The Qualcomm drivers can now reserve some GPIOs as taken
aside and not usable for users. This is used in ACPI systems
to take out some GPIO lines used by the BIOS so that
noone else (neither kernel nor userspace) will play with them
by mistake and crash the machine.
- A slew of refurbishing around the Aspeed drivers (board
management controllers for servers) in preparation for the
new Aspeed AST2600 SoC.
- A slew of improvements over the SH PFC drivers as usual.
- Misc cleanups and fixes.
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Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.3 kernel cycle:
Core changes:
- Device links can optionally be added between a pin control producer
and its consumers. This will affect how the system power management
is handled: a pin controller will not suspend before all of its
consumers have been suspended.
This was necessary for the ST Microelectronics STMFX expander and
need to be tested on other systems as well: it makes sense to make
this default in the long run.
Right now it is opt-in per driver.
- Drive strength can be specified in microamps. With decreases in
silicon technology, milliamps isn't granular enough, let's make it
possible to select drive strengths in microamps.
Right now the Meson (AMlogic) driver needs this.
New drivers:
- New subdriver for the Tegra 194 SoC.
- New subdriver for the Qualcomm SDM845.
- New subdriver for the Qualcomm SM8150.
- New subdriver for the Freescale i.MX8MN (Freescale is now a product
line of NXP).
- New subdriver for Marvell MV98DX1135.
Driver improvements:
- The Bitmain BM1880 driver now supports pin config in addition to
muxing.
- The Qualcomm drivers can now reserve some GPIOs as taken aside and
not usable for users. This is used in ACPI systems to take out some
GPIO lines used by the BIOS so that noone else (neither kernel nor
userspace) will play with them by mistake and crash the machine.
- A slew of refurbishing around the Aspeed drivers (board management
controllers for servers) in preparation for the new Aspeed AST2600
SoC.
- A slew of improvements over the SH PFC drivers as usual.
- Misc cleanups and fixes"
* tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits)
pinctrl: aspeed: Strip moved macros and structs from private header
pinctrl: aspeed: Fix missed include
pinctrl: baytrail: Use GENMASK() consistently
pinctrl: baytrail: Re-use data structures from pinctrl-intel.h
pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux()
pinctrl: qcom: Add SM8150 pinctrl driver
dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding
dt-bindings: pinctrl: qcom: Document missing gpio nodes
pinctrl: aspeed: Add implementation-related documentation
pinctrl: aspeed: Split out pinmux from general pinctrl
pinctrl: aspeed: Clarify comment about strapping W1C
pinctrl: aspeed: Correct comment that is no longer true
MAINTAINERS: Add entry for ASPEED pinctrl drivers
dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema
dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema
dt-bindings: pinctrl: aspeed: Split bindings document in two
pinctrl: qcom: Add irq_enable callback for msm gpio
pinctrl: madera: Fixup SPDX headers
pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard
pinctrl: tegra: Add bitmask support for parked bits
...
platform_get_resource() may fail and return NULL, so we should
better check it's return value to avoid a NULL pointer dereference
a bit later in the code.
Signed-off-by: Young Xiao <92siuyang@gmail.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/bcm/pinctrl-bcm2835.c: In function bcm2835_pctl_dt_node_to_map:
drivers/pinctrl/bcm/pinctrl-bcm2835.c:720:8: error: implicit declaration of function pinconf_generic_dt_node_to_map_all;
drivers/pinctrl/bcm/pinctrl-bcm2835.c: In function bcm2835_pinctrl_probe:
drivers/pinctrl/bcm/pinctrl-bcm2835.c:1022:15: error: struct gpio_chip has no member named of_node
pc->gpio_chip.of_node = np;
Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: 0de704955e ("pinctrl: bcm2835: Add support for generic pinctrl binding")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
ARCH_BRCMSTB needs to use the BCM2835 pin controller for chips
like BCM7211 which adopted that pin controller for GPIO. This
commit makes the option menu configurable with default enabled
for ARCH_BRCMSTB and ARCH_BCM2835.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In order to support GPIO config changes direct these to the generic pinctrl.
This also requires an adjust of the return code for unsupported parameter
otherwise gpiod_configure_flags wont work as expected.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since commit 0de704955e ("pinctrl: bcm2835: Add support for
generic pinctrl binding") this driver is capable to use the generic
interface. So declare this accordingly.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation has been recently updated specifying that pinctrl should
be subnode of the CRU "syscon". Support that by using parent node for
regmap and reading "offset" property from the DT.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Clang warns when one enumerated type is implicitly converted to another:
drivers/pinctrl/bcm/pinctrl-bcm2835.c:707:40: warning: implicit
conversion from enumeration type 'enum bcm2835_pinconf_param' to
different enumeration type 'enum pin_config_param' [-Wenum-conversion]
configs[0] = pinconf_to_config_packed(BCM2835_PINCONF_PARAM_PULL, pull);
~~~~~~~~~~~~~~~~~~~~~~~~ ^~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
It is expected that pinctrl drivers can extend pin_config_param because
of the gap between PIN_CONFIG_END and PIN_CONFIG_MAX so this conversion
isn't an issue. Most drivers that take advantage of this define the
PIN_CONFIG variables as constants, rather than enumerated values. Do the
same thing here so that Clang no longer warns.
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The BCM2835 pinctrl driver acquires a spinlock in its ->irq_enable,
->irq_disable and ->irq_set_type callbacks. Spinlocks become sleeping
locks with CONFIG_PREEMPT_RT_FULL=y, therefore invocation of one of the
callbacks in atomic context may cause a hard lockup if at least two GPIO
pins in the same bank are used as interrupts. The issue doesn't occur
with just a single interrupt pin per bank because the lock is never
contended. I'm experiencing such lockups with GPIO 8 and 28 used as
level-triggered interrupts, i.e. with ->irq_disable being invoked on
reception of every IRQ.
The critical section protected by the spinlock is very small (one bitop
and one RMW of an MMIO register), hence converting to a raw spinlock
seems a better trade-off than converting the driver to threaded IRQ
handling (which would increase latency to handle an interrupt).
Cc: Mathias Duckeck <m.duckeck@kunbus.de>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix up a compiler error on 64bit architectures where pointers
and integers differ in size.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver provides support for Northstar mux controller. It differs
from Northstar Plus one so a new binding and driver were needed.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
platform_get_resource() may fail and return NULL, so we should
better check it's return value to avoid a NULL pointer dereference
a bit later in the code.
This is detected by Coccinelle semantic patch.
@@
expression pdev, res, n, t, e, e1, e2;
@@
res = platform_get_resource(pdev, t, n);
+ if (!res)
+ return -EINVAL;
... when != res == NULL
e = devm_ioremap_nocache(e1, res->start, e2);
Fixes: cc4fa83f66 ("pinctrl: nsp: add pinmux driver support for Broadcom NSP SoC")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The > comparisons should be >= or else we read beyond the end of the
pinctrl->functions[] array.
Fixes: cc4fa83f66 ("pinctrl: nsp: add pinmux driver support for Broadcom NSP SoC")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Properties to set initial value of pin output buffer.
This can be useful for configure hardware in overlay files, and in early
boot for checking it states in QA sanity tests.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
To keep driver up to date we add generic pinctrl binding support, which
covers the features used in this driver and has additional node properties
that this SoC has compatibility, so enabling future implementations of
these properties without the need to create new node properties in the
device trees.
The logic of this change maintain the old brcm legacy binding support in
order to keep the ABI stable.
Signed-off-by: Matheus Castello <matheus@castello.eng.br>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
kernel cycle:
Core:
- The pin control Kconfig entry PINCTRL is now turned into
a menuconfig option. This obviously has the implication of
making the subsystem menu visible in menuconfig. This is
happening because of two things:
- Intel have started to deploy and depend on pin controllers
in a way that is affecting users directly. This happens
on the highly integrated laptop chipsets named after
geographical places: baytrail, broxton, cannonlake,
cedarfork, cherryview, denverton, geminilake, lewisburg,
merrifield, sunrisepoint... It started a while back and
now it is ever more evident that this is crucial
infrastructure for x86 laptops and not an embedded
obscurity anymore. Users need to be aware.
- Pin control expanders on I2C and SPI that are
arch-agnostic. Currently Semtech SX150X and Microchip
MCP28x08 but more are expected. Users will have to be
able to configure these in directly for their set-up.
- Just go and select GPIOLIB now that we made sure that
GPIOLIB is a very vanilla subsystem. Do not depend on
it, if we need it, select it.
- Exposing the pin control subsystem in menuconfig uncovered
a bunch of obscure bugs that are now hopefully fixed,
all more or less pertaining to Blackfin.
- Unified namespace for cross-calls between pin control and
GPIO.
- New support for clock skew/delay generic DT bindings
and generic pin config options for this.
- Minor documentation improvements.
Various:
- The Renesas SH-PFC pin controller has evolved a lot. It seems
Renesas are churning out new SoCs by the minute.
- A bunch of non-critical fixes for the Rockchip driver.
- Improve the use of library functions instead of open coding.
- Support the MCP28018 variant in the MCP28x08 driver.
- Static constifying.
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Merge tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v4.15 kernel cycle:
Core:
- The pin control Kconfig entry PINCTRL is now turned into a
menuconfig option. This obviously has the implication of making the
subsystem menu visible in menuconfig. This is happening because of
two things:
(a) Intel have started to deploy and depend on pin controllers in
a way that is affecting users directly. This happens on the
highly integrated laptop chipsets named after geographical
places: baytrail, broxton, cannonlake, cedarfork, cherryview,
denverton, geminilake, lewisburg, merrifield, sunrisepoint...
It started a while back and now it is ever more evident that
this is crucial infrastructure for x86 laptops and not an
embedded obscurity anymore. Users need to be aware.
(b) Pin control expanders on I2C and SPI that are arch-agnostic.
Currently Semtech SX150X and Microchip MCP28x08 but more are
expected. Users will have to be able to configure these in
directly for their set-up.
- Just go and select GPIOLIB now that we made sure that GPIOLIB is a
very vanilla subsystem. Do not depend on it, if we need it, select
it.
- Exposing the pin control subsystem in menuconfig uncovered a bunch
of obscure bugs that are now hopefully fixed, all more or less
pertaining to Blackfin.
- Unified namespace for cross-calls between pin control and GPIO.
- New support for clock skew/delay generic DT bindings and generic
pin config options for this.
- Minor documentation improvements.
Various:
- The Renesas SH-PFC pin controller has evolved a lot. It seems
Renesas are churning out new SoCs by the minute.
- A bunch of non-critical fixes for the Rockchip driver.
- Improve the use of library functions instead of open coding.
- Support the MCP28018 variant in the MCP28x08 driver.
- Static constifying"
* tag 'pinctrl-v4.15-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits)
pinctrl: gemini: Fix missing pad descriptions
pinctrl: Add some depends on HAS_IOMEM
pinctrl: samsung/s3c24xx: add CONFIG_OF dependency
pinctrl: gemini: Fix GMAC groups
pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support
pinctrl: ti-iodelay: remove redundant unused variable dev
pinctrl: max77620: Use common error handling code in max77620_pinconf_set()
pinctrl: gemini: Implement clock skew/delay config
pinctrl: gemini: Use generic DT parser
pinctrl: Add skew-delay pin config and bindings
pinctrl: armada-37xx: Add edge both type gpio irq support
pinctrl: uniphier: remove eMMC hardware reset pin-mux
pinctrl: rockchip: Add iomux-route switching support for rk3288
pinctrl: intel: Add Intel Cedar Fork PCH pin controller support
pinctrl: intel: Make offset to interrupt status register configurable
pinctrl: sunxi: Enforce the strict mode by default
pinctrl: sunxi: Disable strict mode for old pinctrl drivers
pinctrl: sunxi: Introduce the strict flag
pinctrl: sh-pfc: Save/restore registers for PSCI system suspend
pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description
...
CORE:
- Fix the semantics of raw GPIO to actually be raw. No
inversion semantics as before, but also no open draining,
and allow the raw operations to affect lines used for
interrupts as the caller supposedly knows what they are
doing if they are getting the big hammer.
- Rewrote the __inner_function() notation calls to names that
make more sense. I just find this kind of code disturbing.
- Drop the .irq_base() field from the gpiochip since now all
IRQs are mapped dynamically. This is nice.
- Support for .get_multiple() in the core driver API. This
allows us to read several GPIO lines with a single
register read. This has high value for some usecases: it
can be used to create oscilloscopes and signal analyzers
and other things that rely on reading several lines at
exactly the same instant. Also a generally nice
optimization. This uses the new assign_bit() macro from
the bitops lib that was ACKed by Andrew Morton and
is implemented for two drivers, one of them being the
generic MMIO driver so everyone using that will be able
to benefit from this.
- Do not allow requests of Open Drain and Open Source
setting of a GPIO line simultaneously. If the hardware
actually supports enabling both at the same time the
electrical result would be disastrous.
- A new interrupt chip core helper. This will be helpful
to deal with "banked" GPIOs, which means GPIO controllers
with several logical blocks of GPIO inside them. This
is several gpiochips per device in the device model, in
contrast to the case when there is a 1-to-1 relationship
between a device and a gpiochip.
NEW DRIVERS:
- Maxim MAX3191x industrial serializer, a very interesting
piece of professional I/O hardware.
- Uniphier GPIO driver. This is the GPIO block from the
recent Socionext (ex Fujitsu and Panasonic) platform.
- Tegra 186 driver. This is based on the new banked GPIO
infrastructure.
OTHER IMPROVEMENTS:
- Some documentation improvements.
- Wakeup support for the DesignWare DWAPB GPIO controller.
- Reset line support on the DesignWare DWAPB GPIO controller.
- Several non-critical bug fixes and improvements for the
Broadcom BRCMSTB driver.
- Misc non-critical bug fixes like exotic errorpaths, removal
of dead code etc.
- Explicit comments on fall-through switch() statements.
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Merge tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.15 kernel cycle:
Core:
- Fix the semantics of raw GPIO to actually be raw. No inversion
semantics as before, but also no open draining, and allow the raw
operations to affect lines used for interrupts as the caller
supposedly knows what they are doing if they are getting the big
hammer.
- Rewrote the __inner_function() notation calls to names that make
more sense. I just find this kind of code disturbing.
- Drop the .irq_base() field from the gpiochip since now all IRQs are
mapped dynamically. This is nice.
- Support for .get_multiple() in the core driver API. This allows us
to read several GPIO lines with a single register read. This has
high value for some usecases: it can be used to create
oscilloscopes and signal analyzers and other things that rely on
reading several lines at exactly the same instant. Also a generally
nice optimization. This uses the new assign_bit() macro from the
bitops lib that was ACKed by Andrew Morton and is implemented for
two drivers, one of them being the generic MMIO driver so everyone
using that will be able to benefit from this.
- Do not allow requests of Open Drain and Open Source setting of a
GPIO line simultaneously. If the hardware actually supports
enabling both at the same time the electrical result would be
disastrous.
- A new interrupt chip core helper. This will be helpful to deal with
"banked" GPIOs, which means GPIO controllers with several logical
blocks of GPIO inside them. This is several gpiochips per device in
the device model, in contrast to the case when there is a 1-to-1
relationship between a device and a gpiochip.
New drivers:
- Maxim MAX3191x industrial serializer, a very interesting piece of
professional I/O hardware.
- Uniphier GPIO driver. This is the GPIO block from the recent
Socionext (ex Fujitsu and Panasonic) platform.
- Tegra 186 driver. This is based on the new banked GPIO
infrastructure.
Other improvements:
- Some documentation improvements.
- Wakeup support for the DesignWare DWAPB GPIO controller.
- Reset line support on the DesignWare DWAPB GPIO controller.
- Several non-critical bug fixes and improvements for the Broadcom
BRCMSTB driver.
- Misc non-critical bug fixes like exotic errorpaths, removal of dead
code etc.
- Explicit comments on fall-through switch() statements"
* tag 'gpio-v4.15-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (65 commits)
gpio: tegra186: Remove tegra186_gpio_lock_class
gpio: rcar: Add r8a77995 (R-Car D3) support
pinctrl: bcm2835: Fix some merge fallout
gpio: Fix undefined lock_dep_class
gpio: Automatically add lockdep keys
gpio: Introduce struct gpio_irq_chip.first
gpio: Disambiguate struct gpio_irq_chip.nested
gpio: Add Tegra186 support
gpio: Export gpiochip_irq_{map,unmap}()
gpio: Implement tighter IRQ chip integration
gpio: Move lock_key into struct gpio_irq_chip
gpio: Move irq_valid_mask into struct gpio_irq_chip
gpio: Move irq_nested into struct gpio_irq_chip
gpio: Move irq_chained_parent to struct gpio_irq_chip
gpio: Move irq_default_type to struct gpio_irq_chip
gpio: Move irq_handler to struct gpio_irq_chip
gpio: Move irqdomain into struct gpio_irq_chip
gpio: Move irqchip into struct gpio_irq_chip
gpio: Introduce struct gpio_irq_chip
pinctrl: armada-37xx: remove unused variable
...
Fixing a small merge problem in BCM2835 related to the
new irqchip code.
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In order to consolidate the multiple ways to associate an IRQ chip with
a GPIO chip, move more fields into the new struct gpio_irq_chip.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
These request/free functions are just reimplementations of the
standard helpers in gpiolib. Delete them and replace with the
helpers.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl_request_gpio() and pinctrl_free_gpio() break the nice
namespacing in the other cross-calls like pinctrl_gpio_foo().
Just rename them and all references so we have one namespace
with all cross-calls under pinctrl_gpio_*().
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch fix the following build warning:
drivers/pinctrl/bcm/pinctrl-bcm2835.c:376:15: warning: variable 'type' set but not used [-Wunused-but-set-variable]
Furthermore, it is unused for a long time, at least since commit 85ae9e512f ("pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP")
where a "FIXME no clue why the code looks up the type here" was added.
A year after, nobody answeered this question, so its time to remove it.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This pinconf_ops structure is only stored in the const confops
field of a pinctrl_desc structure. Make the pinconf_ops structure
const as well.
Done with the help of Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The irq_group field stores a 1:1 mapping. Use the loop variable to
derive the values instead of storing them in an extra array.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Lee Jones <lee@kernel.org>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Barry Song <baohua@kernel.org>
Cc: linux-gpio@vger.kernel.org
Cc: linux-rpi-kernel@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: kernel@stlinux.com
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This structure is only used to copy into other structure, so declare
it as const.
This issue was detected using Coccinelle and the following semantic patch:
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct gpio_chip i@p = { ... };
@ok@
identifier r.i;
expression e;
position p;
@@
e = i@p;
@bad@
position p != {r.p,ok.p};
identifier r.i;
struct gpio_chip e;
@@
e@i@p
@depends on !bad disable optional_qualifier@
identifier r.i;
@@
static
+const
struct gpio_chip i = { ... };
In the following log you can see a significant difference in the code size
and data segment, hence in the dec segment. This log is the output
of the size command, before and after the code change:
before:
text data bss dec hex filename
18958 9000 128 28086 6db6 drivers/pinctrl/bcm/pinctrl-bcm2835.o
after:
text data bss dec hex filename
18764 8912 128 27804 6c9c drivers/pinctrl/bcm/pinctrl-bcm2835.o
Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We get a warning during boot with enabled EARLY_PRINTK that
we try to set a irq_chip without data. This is caused by ignoring
the return value of irq_of_parse_and_map(). So avoid calling
gpiochip_set_chained_irqchip() in error case.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Fixes: 85ae9e512f ("pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use consistent license headers for Broadcom files by
placing additional comments outside of standard legal header.
Also, update legal header to 2017 format as "Broadcom Corporation"
has changed to "Broadcom".
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fixups here tend to be more of a conglomerate of some of the other
repeated/systematic ones we've seen in the earlier pinctrl cleanups.
We remove module.h from code that isn't doing anything modular at
all; if they have __init sections, then replace it with init.h
One driver has a .remove that would be dispatched on module_exit,
and as that code is essentially orphaned, so we remove it. In case
anyone was previously doing the (pointless) unbind to get to that
function, we disable unbind for this one driver as well.
A couple bool drivers (hence non-modular) are converted over to
to builtin_platform_driver().
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.
We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.
Cc: Eric Anholt <eric@anholt.net>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jon Mason <jonmason@broadcom.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Sherman Yin <syin@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-gpio@vger.kernel.org
Cc: linux-rpi-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The bcm pinctrl drivers currently implement an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.
A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fix typos and add the following to the scripts/spelling.txt:
overrided||overridden
Link: http://lkml.kernel.org/r/1481573103-11329-22-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The current pinconf packed format allows only 16-bit argument limiting
the maximum value 65535. For most types this is enough. However,
debounce time can be in range of hundreths of milliseconds in case of
mechanical switches so we cannot represent the worst case using the
current format.
In order to support larger values change the packed format so that the
lower 8 bits are used as type which leaves 24 bits for the argument.
This allows representing values up to 16777215 and debounce times up to
16 seconds.
We also convert the existing users to use 32-bit integer when extracting
argument from the packed configuration value.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where things
come together.
We get a DT descriptions for a couple of new SoCs, all of them variants
of other chips we already support, and usually coming with a new
evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers
or industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on
Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it into
products and have served their purpose in the kernel as a template
for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree
Conflicts:
arch/arm/boot/dts/r8a*.dtsi: a node was added
the clk tree, keep both sides and watch out for git
dropping the required '};' at the end of each side.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"Lots of changes as usual, so I'm trying to be brief here. Most of the
new hardware support has the respective driver changes merged through
other trees or has had it available for a while, so this is where
things come together.
We get a DT descriptions for a couple of new SoCs, all of them
variants of other chips we already support, and usually coming with a
new evaluation board:
- Oxford semiconductor (now Broadcom) OX820 SoC for NAS devices
- Qualcomm MDM9615 LTE baseband
- NXP imx6ull, the latest and smallest i.MX6 application processor variant
- Renesas RZ/G (r8a7743 and r8a7745) application processors
- Rockchip PX3, a variant of the rk3188 chip used in Android tablets
- Rockchip rk1108 single-core application processor
- ST stm32f746 Cortex-M7 based microcontroller
- TI DRA71x automotive processors
These are commercially available consumer platforms we now support:
- Motorola Droid 4 (xt894) mobile phone
- Rikomagic MK808 Android TV stick based on Rockchips rx3066
- Cloud Engines PogoPlug v3 based on OX820
- Various Broadcom based wireless devices:
- Netgear R8500 router
- Tenda AC9 router
- TP-LINK Archer C9 V1
- Luxul XAP-1510 Access point
- Turris Omnia open hardware router based on Armada 385
And a couple of new boards targeted at developers, makers or
industrial integration:
- Macnica Sodia development platform for Altera socfpga (Cyclone V)
- MicroZed board based on Xilinx Zynq FPGA platforms
- TOPEET itop/elite based on exynos4412
- WP8548 MangOH Open Hardware platform for IOT, based on Qualcomm MDM9615
- NextThing CHIP Pro gadget
- NanoPi M1 development board
- AM571x-IDK industrial board based on TI AM5718
- i.MX6SX UDOO Neo
- Boundary Devices Nitrogen6_SOM2 (i.MX6)
- Engicam i.CoreM6
- Grinn i.MX6UL liteSOM/liteBoard
- Toradex Colibri iMX6 module
Other changes:
- added peripherals on renesas, davinci, stm32f429, uniphier, sti,
mediatek, integrator, at91, imx, vybrid, ls1021a, omap, qualcomm,
mvebu, allwinner, broadcom, exynos, zynq
- Continued fixes for W=1 dtc warnings
- The old STiH415/416 SoC support gets removed, these never made it
into products and have served their purpose in the kernel as a
template for teh newer chips from ST
- The exynos4415 dtsi file is removed as nothing uses it.
- Intel PXA25x can now be booted using devicetree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (422 commits)
arm: dts: zynq: Add MicroZed board support
ARM: dts: da850: enable high speed for mmc
ARM: dts: da850: Add node for pullup/pulldown pinconf
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: artpec: add pcie support
ARM: dts: add support for Turris Omnia
devicetree: Add vendor prefix for CZ.NIC
ARM: dts: berlin2q-marvell-dmp: fix typo in chosen node
ARM: dts: berlin2q-marvell-dmp: fix regulators' name
ARM: dts: Add xo to sdhc clock node on qcom platforms
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
...
No core changes this time. Mainly gradual improvement and
feature growth in the drivers.
New drivers:
- New driver for TI DA850/OMAP-L138/AM18XX pinconf
- The SX150x was moved over from the GPIO subsystem and
reimagined as a pin control driver with GPIO support
in a joint effort by three independent users of this
hardware. The result was amazingly good!
- New subdriver for the Oxnas OX820
Improvements:
- The sunxi driver now supports the generic pin control
bindings rather than the sunxi-specific. Add debouncing
support to the driver.
- Simplifications in pinctrl-single adding a generic parser.
- Two downstream fixes and move the Raspberry Pi BCM2835 over
to use the generic GPIOLIB_IRQCHIP.
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Merge tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl updates from Linus Walleij:
"Bulk pin control changes for the v4.10 kernel cycle:
No core changes this time. Mainly gradual improvement and
feature growth in the drivers.
New drivers:
- New driver for TI DA850/OMAP-L138/AM18XX pinconf
- The SX150x was moved over from the GPIO subsystem and reimagined as
a pin control driver with GPIO support in a joint effort by three
independent users of this hardware. The result was amazingly good!
- New subdriver for the Oxnas OX820
Improvements:
- The sunxi driver now supports the generic pin control bindings
rather than the sunxi-specific. Add debouncing support to the
driver.
- Simplifications in pinctrl-single adding a generic parser.
- Two downstream fixes and move the Raspberry Pi BCM2835 over to use
the generic GPIOLIB_IRQCHIP"
* tag 'pinctrl-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (92 commits)
pinctrl: sx150x: use new nested IRQ infrastructure
pinctrl: sx150x: handle missing 'advanced' reg in sx1504 and sx1505
pinctrl: sx150x: rename 'reg_advance' to 'reg_advanced'
pinctrl: sx150x: access the correct bits in the 4-bit regs of sx150[147]
pinctrl: mt8173: set GPIO16 to usb iddig mode
pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP
pinctrl: New driver for TI DA850/OMAP-L138/AM18XX pinconf
devicetree: bindings: pinctrl: Add binding for ti,da850-pupd
Documentation: pinctrl: palmas: Add ti,palmas-powerhold-override property definition
pinctrl: intel: set default handler to be handle_bad_irq()
pinctrl: sx150x: add support for sx1501, sx1504, sx1505 and sx1507
pinctrl: sx150x: sort chips by part number
pinctrl: sx150x: use correct registers for reg_sense (sx1502 and sx1508)
pinctrl: imx: fix imx_pinctrl_desc initialization
pinctrl: sx150x: support setting multiple pins at once
pinctrl: sx150x: various spelling fixes and some white-space cleanup
pinctrl: mediatek: use builtin_platform_driver
pinctrl: stm32: use builtin_platform_driver
pinctrl: sunxi: Testing the wrong variable
pinctrl: nomadik: split up and comments MC0 pins
...
It should be possible to use the GPIOLIB_IRQCHIP helper
library with the BCM2835 driver since it is a pretty straight
forward cascaded irqchip.
The only difference from other drivers is that the BCM2835
has several banks for a single gpiochip, and each bank has
a separate IRQ line. Instead of creating one gpiochip per
bank, a single gpiochip covers all banks GPIO lines. This
makes it necessary to resolve the bank ID in the IRQ
handler.
The GPIOLIB_IRQCHIP allows several IRQs to be cascaded off
the same gpiochip by calling gpiochip_set_chained_irqchip()
repeatedly, but we have been a bit short on examples
for how this should be handled in practice, so this is intended
as an example of how this can be achieved.
The old code did not model the chip as a chained interrupt
handler, but this patch also rectifies that situation.
Cc: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Eric Anholt <eric@anholt.net>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When dynamically unloading overlays, it is important that freed pins are
restored to being inputs to prevent functions from being enabled in
multiple places at once.
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Contrary to the documentation, the BCM2835 GPIO controller actually
has four interrupt lines - one each for the three IRQ groups and one
common. Confusingly, the GPIO interrupt groups don't correspond
directly with the GPIO control banks. Instead, GPIOs 0-27 generate IRQ
GPIO0, 28-45 IRQ GPIO1 and 46-53 IRQ GPIO2.
Awkwardly, the GPIOs for IRQ GPIO1 straddle two 32-entry GPIO banks,
so split out a function to process the interrupts for a single GPIO
bank.
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since the BCM2835 datasheet doesn't exactly specify the set-up time for
the GPIO Pull-up/down Clock Registers there was an assumption of 150 cycles
at a clock rate of 1 MHz. During a discussion [1] in the Raspberry Pi forum
it turns out that clock rate refers to the VPU which has a rate of 250 MHz.
So we can reduce the delay to a sensible value and update the comment above.
I tested this optimization with a Raspberry Pi B and a multimeter.
[1] - https://www.raspberrypi.org/forums/viewtopic.php?f=72&t=163352
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since commit 44a7185c2a ("of/platform: Add common method to populate
default bus"), ARM64 platform devices are populated at the
arch_initcall_sync level; as a result, the platform_driver_probe calls
in both the iProc and NSP GPIO drivers fail with -ENODEV since by that
time the platform device was not yet registered.
Replace platform_driver_probe with platform_driver_register, that allow
the device to be register later
Fixes: 44a7185c2a ("of/platform: Add common method to populate default bus")
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Tested-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Also delete (unused) private enum from driver.
The pull defines can be used instead if needed.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Check for pinctrl_ops and pinmux_ops structures that are only stored in the
pctlops field and the pmxops field, respectively, of a pinctrl_desc
structure. These fields are declared const, so pinctrl_ops and pinmux_ops
structures that have this property can be declared as const also.
The semantic patch that makes this change in the pinctrl_ops is as
follows. The pinmux_ops case is similar. (http://coccinelle.lip6.fr/)
// <smpl>
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct pinctrl_ops i@p = { ... };
@ok@
identifier r.i;
struct pinctrl_desc e;
position p;
@@
e.pctlops = &i@p;
@bad@
position p != {r.p,ok.p};
identifier r.i;
struct pinctrl_ops e;
@@
e@i@p
@depends on !bad disable optional_qualifier@
identifier r.i;
@@
static
+const
struct pinctrl_ops i = { ... };
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Check for pinctrl_ops and pinmux_ops structures that are only stored in the
pctlops field and the pmxops field, respectively, of a pinctrl_desc
structure. These fields are declared const, so pinctrl_ops and pinmux_ops
structures that have this property can be declared as const also.
The semantic patch that makes this change in the pinctrl_ops is as
follows. The pinmux_ops case is similar. (http://coccinelle.lip6.fr/)
// <smpl>
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct pinctrl_ops i@p = { ... };
@ok@
identifier r.i;
struct pinctrl_desc e;
position p;
@@
e.pctlops = &i@p;
@bad@
position p != {r.p,ok.p};
identifier r.i;
struct pinctrl_ops e;
@@
e@i@p
@depends on !bad disable optional_qualifier@
identifier r.i;
@@
static
+const
struct pinctrl_ops i = { ... };
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Check for pinctrl_ops and pinmux_ops structures that are only stored in the
pctlops field and the pmxops field, respectively, of a pinctrl_desc
structure. These fields are declared const, so pinctrl_ops and pinmux_ops
structures that have this property can be declared as const also.
The semantic patch that makes this change in the pinctrl_ops is as
follows. The pinmux_ops case is similar. (http://coccinelle.lip6.fr/)
// <smpl>
@r disable optional_qualifier@
identifier i;
position p;
@@
static struct pinctrl_ops i@p = { ... };
@ok@
identifier r.i;
struct pinctrl_desc e;
position p;
@@
e.pctlops = &i@p;
@bad@
position p != {r.p,ok.p};
identifier r.i;
struct pinctrl_ops e;
@@
e@i@p
@depends on !bad disable optional_qualifier@
identifier r.i;
@@
static
+const
struct pinctrl_ops i = { ... };
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The iProc GPIO controller is shared among multiple iProc based SoCs.
In the NSP integration, the drive strength pinctrl function is
disabled. In the integration of Stingray, pinctrl is handled by another
block and this GPIO controller is solely used as a GPIO controller, and
therefore should not be registered to the pinconf framework
This patch introduces new SoC specific compatible strings
"brcm,iproc-nsp-gpio" for NSP with drive strength feature disabled and
"brcm,iproc-stingray-gpio" for Stingray with all PINCONF features
disabled
This patch is developed based on the initial work from Yendapally
Reddy Dhananjaya <yendapally.reddy@broadcom.com> who attempted to
disable drive strength configuration for the iProc based NSP chip. In
addition, Pramod Kumar <pramod.kumar@broadcom.com> also contributed to
make the support more generic across all currently supported PINCONF
functions in the iProc GPIO/PINCONF driver
Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Building without CONFIG_OF gives us these warnings for the broadcom
pinctrl drivers:
drivers/pinctrl/bcm/pinctrl-nsp-mux.c:356:20: error: 'pinconf_generic_dt_node_to_map_group' undeclared here (not in a function)
drivers/pinctrl/bcm/pinctrl-cygnus-mux.c:739:20: error: 'pinconf_generic_dt_node_to_map_group' undeclared here (not in a function)
The function is only available when CONFIG_OF is set, so we should add
a Kconfig dependency for both drivers.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: cc4fa83f66 ("pinctrl: nsp: add pinmux driver support for Broadcom NSP SoC")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In case of error, the function pinctrl_register() returns
NULL not ERR_PTR(). The IS_ERR() test in the return value
check should be replaced with NULL test.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the initial support of the Broadcom NSP pinmux driver.
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fixup warnings from functions that are not exported and
therefore should be marked static. Fixes:
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c:461:5:
warning: symbol 'nsp_pin_config_group_get' was not declared.
Should it be static?
drivers/pinctrl/bcm/pinctrl-nsp-gpio.c:467:5:
warning: symbol 'nsp_pin_config_group_set' was not declared.
Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
A conflict of two patches caused a build error when a function got renamed
but a new user appeared in the other patch:
drivers/pinctrl/bcm/pinctrl-ns2-mux.c:540:17: error: 'pinctrl_utils_dt_free_map' undeclared here (not in a function)
.dt_free_map = pinctrl_utils_dt_free_map,
^~~~~~~~~~~~~~~~~~~~~~~~~
This renames the new user of pinctrl_utils_dt_free_map accordingly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: d32f7fd3bb ("pinctrl: Rename pinctrl_utils_dt_free_map to pinctrl_utils_free_map")
Fixes: b5aa1006e4 ("pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the initial support of the Broadcom NS2 pinmux driver
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use devm_pinctrl_register() for pin control registration.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Jon Mason <jonmason@broadcom.com>
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use devm_pinctrl_register() for pin control registration and clean
the error path.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Jon Mason <jonmason@broadcom.com>
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use devm_pinctrl_register() for pin control registration.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Jon Mason <jonmason@broadcom.com>
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rename pinctrl_utils_dt_free_map to pinctrl_utils_free_map, since
it does not depend on device tree despite the current name. This
will enforce a consistent naming in pinctr-utils.c and will make
it clear it can be called from outside device tree (e.g. from
ACPI handling code).
Signed-off-by: Irina Tirdea <irina.tirdea@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Implement gpio_chip's get_direction() callback, that lets other
drivers get particular GPIOs direction using gpiod_get_direction().
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Core changes:
- The gpio_chip is now a *real device*. Until now the gpio chips
were just piggybacking the parent device or (gasp) floating in
space outside of the device model. We now finally make GPIO chips
devices. The gpio_chip will create a gpio_device which contains
a struct device, and this gpio_device struct is kept private.
Anything that needs to be kept private from the rest of the kernel
will gradually be moved over to the gpio_device.
- As a result of making the gpio_device a real device, we have added
resource management, so devm_gpiochip_add_data() will cut down on
overhead and reduce code lines. A huge slew of patches convert
almost all drivers in the subsystem to use this.
- Building on making the GPIO a real device, we add the first step
of a new userspace ABI: the GPIO character device. We take small
steps here, so we first add a pure *information* ABI and the tool
"lsgpio" that will list all GPIO devices on the system and all
lines on these devices. We can now discover GPIOs properly from
userspace. We still have not come up with a way to actually *use*
GPIOs from userspace.
- To encourage people to use the character device for the future,
we have it always-enabled when using GPIO. The old sysfs ABI is
still opt-in (and can be used in parallel), but is marked as
deprecated. We will keep it around for the foreseeable future,
but it will not be extended to cover ever more use cases.
Cleanup:
- Bjorn Helgaas removed a whole slew of per-architecture <asm/gpio.h>
includes. This dates back to when GPIO was an opt-in feature and
no shared library even existed: just a header file with proper
prototypes was provided and all semantics were up to the arch to
implement. These patches make the GPIO chip even more a proper
device and cleans out leftovers of the old in-kernel API here
and there. Still some cruft is left but it's very little now.
- There is still some clamping of return values for .get() going
on, but we now return sane values in the vast majority of drivers
and the errorpath is sanitized. Some patches for powerpc, blackfin
and unicore still drop in.
- We continue to switch the ARM, MIPS, blackfin, m68k local GPIO
implementations to use gpiochip_add_data() and cut down on code
lines.
- MPC8xxx is converted to use the generic GPIO helpers.
- ATH79 is converted to use the generic GPIO helpers.
New drivers:
- WinSystems WS16C48
- Acces 104-DIO-48E
- F81866 (a F7188x variant)
- Qoric (a MPC8xxx variant)
- TS-4800
- SPI serializers (pisosr): simple 74xx shift registers connected
to SPI to obtain a dirt-cheap output-only GPIO expander.
- Texas Instruments TPIC2810
- Texas Instruments TPS65218
- Texas Instruments TPS65912
- X-Gene (ARM64) standby GPIO controller
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Merge tag 'gpio-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for kernel v4.6. There is quite a
lot of interesting stuff going on.
The patches to other subsystems and arch-wide are ACKed as far as
possible, though I consider things like per-arch <asm/gpio.h> as
essentially a part of the GPIO subsystem so it should not be needed.
Core changes:
- The gpio_chip is now a *real device*. Until now the gpio chips
were just piggybacking the parent device or (gasp) floating in
space outside of the device model.
We now finally make GPIO chips devices. The gpio_chip will create
a gpio_device which contains a struct device, and this gpio_device
struct is kept private. Anything that needs to be kept private
from the rest of the kernel will gradually be moved over to the
gpio_device.
- As a result of making the gpio_device a real device, we have added
resource management, so devm_gpiochip_add_data() will cut down on
overhead and reduce code lines. A huge slew of patches convert
almost all drivers in the subsystem to use this.
- Building on making the GPIO a real device, we add the first step of
a new userspace ABI: the GPIO character device. We take small
steps here, so we first add a pure *information* ABI and the tool
"lsgpio" that will list all GPIO devices on the system and all
lines on these devices.
We can now discover GPIOs properly from userspace. We still have
not come up with a way to actually *use* GPIOs from userspace.
- To encourage people to use the character device for the future, we
have it always-enabled when using GPIO. The old sysfs ABI is still
opt-in (and can be used in parallel), but is marked as deprecated.
We will keep it around for the foreseeable future, but it will not
be extended to cover ever more use cases.
Cleanup:
- Bjorn Helgaas removed a whole slew of per-architecture <asm/gpio.h>
includes.
This dates back to when GPIO was an opt-in feature and no shared
library even existed: just a header file with proper prototypes was
provided and all semantics were up to the arch to implement. These
patches make the GPIO chip even more a proper device and cleans out
leftovers of the old in-kernel API here and there.
Still some cruft is left but it's very little now.
- There is still some clamping of return values for .get() going on,
but we now return sane values in the vast majority of drivers and
the errorpath is sanitized. Some patches for powerpc, blackfin and
unicore still drop in.
- We continue to switch the ARM, MIPS, blackfin, m68k local GPIO
implementations to use gpiochip_add_data() and cut down on code
lines.
- MPC8xxx is converted to use the generic GPIO helpers.
- ATH79 is converted to use the generic GPIO helpers.
New drivers:
- WinSystems WS16C48
- Acces 104-DIO-48E
- F81866 (a F7188x variant)
- Qoric (a MPC8xxx variant)
- TS-4800
- SPI serializers (pisosr): simple 74xx shift registers connected to
SPI to obtain a dirt-cheap output-only GPIO expander.
- Texas Instruments TPIC2810
- Texas Instruments TPS65218
- Texas Instruments TPS65912
- X-Gene (ARM64) standby GPIO controller"
* tag 'gpio-v4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (194 commits)
Revert "Share upstreaming patches"
gpio: mcp23s08: Fix clearing of interrupt.
gpiolib: Fix comment referring to gpio_*() in gpiod_*()
gpio: pca953x: Fix pca953x_gpio_set_multiple() on 64-bit
gpio: xgene: Fix kconfig for standby GIPO contoller
gpio: Add generic serializer DT binding
gpio: uapi: use 0xB4 as ioctl() major
gpio: tps65912: fix bad merge
Revert "gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free"
gpio: omap: drop dev field from gpio_bank structure
gpio: mpc8xxx: Slightly update the code for better readability
gpio: mpc8xxx: Remove *read_reg and *write_reg from struct mpc8xxx_gpio_chip
gpio: mpc8xxx: Fixup setting gpio direction output
gpio: mcp23s08: Add support for mcp23s18
dt-bindings: gpio: altera: Fix altr,interrupt-type property
gpio: add driver for MEN 16Z127 GPIO controller
gpio: lp3943: Drop pin_used and lp3943_gpio_request/lp3943_gpio_free
gpio: timberdale: Switch to devm_ioremap_resource()
gpio: ts4800: Add IMX51 dependency
gpiolib: rewrite gpiodev_add_to_list
...
The DT bindings for pinctrl-bcm2835 allow both the function and pull
to contain either one entry or one per pin. However, an error in the
DT parsing can cause failures if the number of pulls differs from the
number of functions.
Cc: stable@vger.kernel.org
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Jon Mason <jonmason@broadcom.com>
Acked-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Infrastructural changes:
- In struct gpio_chip, rename the .dev node to .parent to better reflect
the fact that this is not the GPIO struct device abstraction. We will
add that soon so this would be totallt confusing.
- It was noted that the driver .get_value() callbacks was
sometimes reporting negative -ERR values to the gpiolib core, expecting
them to be propagated to consumer gpiod_get_value() and gpio_get_value()
calls. This was not happening, so as there was a mess of drivers
returning negative errors and some returning "anything else than zero"
to indicate that a line was active. As some would have bit 31 set to
indicate "line active" it clashed with negative error codes. This is
fixed by the largeish series clamping values in all drivers with
!!value to [0,1] and then augmenting the code to propagate error codes
to consumers. (Includes some ACKed patches in other subsystems.)
- Add a void *data pointer to struct gpio_chip. The container_of() design
pattern is indeed very nice, but we want to reform the struct gpio_chip
to be a non-volative, stateless business, and keep states internal to
the gpiolib to be able to hold on to the state when adding a proper
userspace ABI (character device) further down the road. To achieve this,
drivers need a handle at the internal state that is not dependent on
their struct gpio_chip() so we add gpiochip_add_data() and
gpiochip_get_data() following the pattern of many other subsystems.
All the "use gpiochip data pointer" patches transforms drivers to this
scheme.
- The Generic GPIO chip header has been merged into the general
<linux/gpio/driver.h> header, and the custom header for that removed.
Instead of having a separate mm_gpio_chip struct for these generic
drivers, merge that into struct gpio_chip, simplifying the code and
removing the need for separate and confusing includes.
Misc improvements:
- Stabilize the way GPIOs are looked up from the ACPI legacy
specification.
- Incremental driver features for PXA, PCA953X, Lantiq (patches from the
OpenWRT community), RCAR, Zynq, PL061, 104-idi-48
New drivers:
- Add a GPIO chip to the ALSA SoC AC97 driver.
- Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir, but
the branch is merged here too to account for infrastructural changes).
- The sx150x driver now supports the sx1502.
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Merge tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"Here is the bulk of GPIO changes for v4.5.
Notably there are big refactorings mostly by myself, aimed at getting
the gpio_chip into a shape that makes me believe I can proceed to
preserve state for a proper userspace ABI (character device) that has
already been proposed once, but resulted in the feedback that I need
to go back and restructure stuff. So I've been restructuring stuff.
On the way I ran into brokenness (return code from the get_value()
callback) and had to fix it. Also, refactored generic GPIO to be
simpler.
Some of that is still waiting to trickle down from the subsystems all
over the kernel that provide random gpio_chips, I've touched every
single GPIO driver in the kernel now, oh man I didn't know I was
responsible for so much...
Apart from that we're churning along as usual.
I took some effort to test and retest so it should merge nicely and we
shook out a couple of bugs in -next.
Infrastructural changes:
- In struct gpio_chip, rename the .dev node to .parent to better
reflect the fact that this is not the GPIO struct device
abstraction. We will add that soon so this would be totallt
confusing.
- It was noted that the driver .get_value() callbacks was sometimes
reporting negative -ERR values to the gpiolib core, expecting them
to be propagated to consumer gpiod_get_value() and gpio_get_value()
calls. This was not happening, so as there was a mess of drivers
returning negative errors and some returning "anything else than
zero" to indicate that a line was active. As some would have bit
31 set to indicate "line active" it clashed with negative error
codes. This is fixed by the largeish series clamping values in all
drivers with !!value to [0,1] and then augmenting the code to
propagate error codes to consumers. (Includes some ACKed patches
in other subsystems.)
- Add a void *data pointer to struct gpio_chip. The container_of()
design pattern is indeed very nice, but we want to reform the
struct gpio_chip to be a non-volative, stateless business, and keep
states internal to the gpiolib to be able to hold on to the state
when adding a proper userspace ABI (character device) further down
the road. To achieve this, drivers need a handle at the internal
state that is not dependent on their struct gpio_chip() so we add
gpiochip_add_data() and gpiochip_get_data() following the pattern
of many other subsystems. All the "use gpiochip data pointer"
patches transforms drivers to this scheme.
- The Generic GPIO chip header has been merged into the general
<linux/gpio/driver.h> header, and the custom header for that
removed. Instead of having a separate mm_gpio_chip struct for
these generic drivers, merge that into struct gpio_chip,
simplifying the code and removing the need for separate and
confusing includes.
Misc improvements:
- Stabilize the way GPIOs are looked up from the ACPI legacy
specification.
- Incremental driver features for PXA, PCA953X, Lantiq (patches from
the OpenWRT community), RCAR, Zynq, PL061, 104-idi-48
New drivers:
- Add a GPIO chip to the ALSA SoC AC97 driver.
- Add a new Broadcom NSP SoC driver (this lands in the pinctrl dir,
but the branch is merged here too to account for infrastructural
changes).
- The sx150x driver now supports the sx1502"
* tag 'gpio-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (220 commits)
gpio: generic: make bgpio_pdata always visible
gpiolib: fix chip order in gpio list
gpio: mpc8xxx: Do not use gpiochip_get_data() in mpc8xxx_gpio_save_regs()
gpio: mm-lantiq: Do not use gpiochip_get_data() in ltq_mm_save_regs()
gpio: brcmstb: Allow building driver for BMIPS_GENERIC
gpio: brcmstb: Set endian flags for big-endian MIPS
gpio: moxart: fix build regression
gpio: xilinx: Do not use gpiochip_get_data() in xgpio_save_regs()
leds: pca9532: use gpiochip data pointer
leds: tca6507: use gpiochip data pointer
hid: cp2112: use gpiochip data pointer
bcma: gpio: use gpiochip data pointer
avr32: gpio: use gpiochip data pointer
video: fbdev: via: use gpiochip data pointer
gpio: pch: Optimize pch_gpio_get()
Revert "pinctrl: lantiq: Implement gpio_chip.to_irq"
pinctrl: nsp-gpio: use gpiochip data pointer
pinctrl: vt8500-wmt: use gpiochip data pointer
pinctrl: exynos5440: use gpiochip data pointer
pinctrl: at91-pio4: use gpiochip data pointer
...
series:
- New drivers:
- PXA2xx pin controller support
- Broadcom NSP pin controller support
- New subdrivers:
- Samsung EXYNOS5410 support
- Qualcomm MSM8996 support
- Qualcomm PM8994 support
- Qualcomm PM8994 MPP support
- Allwinner sunxi H3 support
- Allwinner sunxi A80 support
- Rockchip RK3228 support
- Rename the Cygnus pinctrl driver to "iproc" as it is more
generic than was originally thought.
- A bunch of Lantiq/Xway updates especially from the OpenWRT
people.
- Several refactorings for the Super-H SH PFC pin controllers.
Adding SCIF_CLK support.
- Several fixes to the Atlas 7 driver.
- Various fixes all over the place.
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Merge tag 'pinctrl-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control patches for the v4.5 series.
Notably I have a patch to driver core from Stephen Boyd in the pull
request, this has been ACKed by Greg so it should be OK. The internal
API needed some tweaking to allow modular Qualcomm pin controllers.
There is a bit of development history in here but it should all add up
nicely and has boiled in linux-next. For example I merged in v4.4-rc5
to get rid of some nasty merge conflicts.
Summary:
- New drivers:
- PXA2xx pin controller support
- Broadcom NSP pin controller support
- New subdrivers:
- Samsung EXYNOS5410 support
- Qualcomm MSM8996 support
- Qualcomm PM8994 support
- Qualcomm PM8994 MPP support
- Allwinner sunxi H3 support
- Allwinner sunxi A80 support
- Rockchip RK3228 support
- Rename the Cygnus pinctrl driver to "iproc" as it is more generic
than was originally thought.
- A bunch of Lantiq/Xway updates especially from the OpenWRT people.
- Several refactorings for the Super-H SH PFC pin controllers.
Adding SCIF_CLK support.
- Several fixes to the Atlas 7 driver.
- Various fixes all over the place"
* tag 'pinctrl-v4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (91 commits)
pinctrl: mediatek: Modify pinctrl bindings for mt2701
Revert "pinctrl: qcom: make PMIC drivers bool"
pinctrl: qcom: Use platform_irq_count() instead of of_irq_count()
driver-core: platform: Add platform_irq_count()
pinctrl: lantiq: 2 pins have the wrong mux list
pinctrl: qcom: make PMIC drivers bool
pinctrl: nsp-gpio: forever loop in nsp_gpio_get_strength()
pinctrl: mediatek: convert to arch_initcall
pinctrl: bcm2835: Fix memory leak in error path
pinctrl: mediatek: add missing of_node_put
pinctrl: rockchip: add missing of_node_put
pinctrl: sh-pfc: add missing of_node_put
pinctrl: sirf: add missing of_node_put
pinctrl-tegra: add missing of_node_put
pinctrl: sunxi: Add A80 special pin controller
pinctrl: bcm/cygnys/iproc: fixup rebase issue
pinctrl: fixup problematic flag
MAINTAINERS: Add co-maintainer for Renesas Pin Controllers
pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
pinctrl: sh-pfc: r8a7795: Add SATA support
...
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Cc: Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Lee Jones