Commit Graph

366 Commits

Author SHA1 Message Date
Alex Deucher 3c681718b4 drm/amdgpu/dce10: Fold set_cursor() into show_cursor()
Port of radeon commit:
8991668ab4

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:28 -04:00
Alex Deucher f9242d1baf drm/amdgpu/dce10: Clean up reference counting and pinning of the cursor BOs
Take a GEM reference for and pin the new cursor BO, unpin and drop the
GEM reference for the old cursor BO in dce10 crtc_cursor_set2, and use
amdgpu_crtc->cursor_addr in dce10 set_cursor.

This fixes dce10 cursor_reset accidentally incrementing the cursor BO
pin count, and cleans up the code a little.

Port of radeon commit:
cd404af0c9

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:27 -04:00
Alex Deucher ef67e38cfe drm/amdgpu/dce10: Move hotspot handling out of set_cursor
It's only needed in dce10 crtc_cursor_set2.

Port of radeon commit:
2e007e611b

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:26 -04:00
Alex Deucher dd0b5d2f88 drm/amdgpu/dce10: Re-show the cursor after a modeset (v2)
Setting a mode seems to clear the cursor registers, so we need to
re-program them to make sure the cursor is visible.

Port of radeon commit:
6d3759fac6

v2: change radeon reference in error message

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:26 -04:00
Alex Deucher 29275a9b09 drm/amdgpu/dce10: Use cursor_set2 hook for enabling / disabling the HW cursor
The cursor_set2 hook provides the cursor hotspot position within the
cursor image. When the hotspot position changes, we can adjust the cursor
position such that the hotspot doesn't move on the screen. This prevents
the cursor from appearing to intermittently jump around on the screen
when the position of the hotspot within the cursor image changes.

Port of radeon commits:
78b1a6010b
3feba08d79

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:25 -04:00
Alex Deucher c2fe16aa36 drm/amdgpu/atom: add support for new div32 opcodes (v3)
Better precision than the regular div opcode.

v2: drop 64 bit divide
v3: fix op handling.  This actually is a 64 bit divide.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:24 -04:00
Alex Deucher c9c145021f drm/amdgpu/atom: add support for new mul32 opcodes (v2)
Better precision than the regular mul opcode.

v2: handle big endian properly.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:24 -04:00
Alex Deucher 554384198c drm/amdgpu/atom: add support for process ds opcode
Just skips a data section.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:23 -04:00
Alex Deucher f76097c099 drm/amdgpu/atom: implement debug opcode
Basically a nop.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:22 -04:00
Alex Deucher d4edda3f2b drm/amdgpu: disable hw semaphores by default
These are buggy on some asics and not really used anymore
now that the GPU schedular is enabled.

Change-Id: I67182b409d64de308392a15d1a0a15018071dc0b
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-07 23:48:24 -04:00
Chunming Zhou 36b4ba07d6 drm/amdgpu: enable scheduler by default
Change-Id: Idce64f63e8422324996fc5d583d0bc9a5ac60d0c
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-07 23:48:23 -04:00
Chunming Zhou 95d7918323 drm/amdgpu: add TOPDOWN flag to the whole vram
need to decrease visible vram usage by default.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-07 23:48:22 -04:00
Chunming Zhou a2ef8a9749 drm/amdgpu: add vram usage into debugfs
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-07 23:48:22 -04:00
Alex Deucher 0bde3a95ea drm/amdgpu: split gfx8 gpu init into sw and hw parts
Calculate the driver state in sw_init and program the
registers in hw init.

Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-07 23:48:21 -04:00
Lukas Wunner 1694467b96 drm/amdgpu: Spell vga_switcheroo consistently
Currently everyone and their dog has their own favourite spelling
for vga_switcheroo. This makes it hard to grep dmesg for log entries
relating to vga_switcheroo. It also makes it hard to find related
source files in the tree.

vga_switcheroo.c uses pr_fmt "vga_switcheroo". Use that everywhere.

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-02 16:08:25 -04:00
Dave Airlie 2d4df13c0f Merge tag 'topic/drm-misc-2015-09-25' of git://anongit.freedesktop.org/drm-intel into drm-next
Another attempt at drm-misc for 4.4 ...
- better atomic helpers for runtime pm drivers
- atomic fbdev
- dp aux i2c STATUS_UPDATE handling (for short i2c replies from the sink)
- bunch of constify patches
- inital kerneldoc for vga switcheroo
- some vblank code cleanups from Ville and Thierry
- various polish all over

* tag 'topic/drm-misc-2015-09-25' of git://anongit.freedesktop.org/drm-intel: (57 commits)
  drm/irq: Add drm_crtc_vblank_count_and_time()
  drm/irq: Rename drm_crtc -> crtc
  drm: drm_atomic_crtc_get_property should be static
  drm/gma500: Remove DP_LINK_STATUS_SIZE redefinition
  vga_switcheroo: Set active attribute to false for audio clients
  drm/core: Preserve the fb id on close.
  drm/core: Preserve the framebuffer after removing it.
  drm: Use vblank timestamps to guesstimate how many vblanks were missed
  drm: store_vblank() is never called with NULL timestamp
  drm: Clean up drm_calc_vbltimestamp_from_scanoutpos() vbl_status
  drm: Limit the number of .get_vblank_counter() retries
  drm: Pass flags to drm_update_vblank_count()
  drm/i915: Fix vblank count variable types
  drm: Kill pixeldur_ns
  drm: Stop using linedur_ns and pixeldur_ns for vblank timestamps
  drm: Move timestamping constants into drm_vblank_crtc
  drm/fbdev: Update legacy plane->fb refcounting for atomic restore
  drm: fix kernel-doc warnings in drm_crtc.h
  vga_switcheroo: Sort headers alphabetically
  drm: Spell vga_switcheroo consistently
  ...
2015-09-30 08:35:45 +10:00
Ville Syrjälä 3bb403bf42 drm: Stop using linedur_ns and pixeldur_ns for vblank timestamps
linedur_ns, and especially pixeldur_ns are becoming rather inaccurate
to be used for the vblank timestamp correction. With 4k@60 the pixel
duration is already below 2ns, so the amount of error due to the
truncation to nanoseconds is introducing quite a bit of error.

We can avoid such problems if we instead calculate the timestamp
delta_ns directly from the dislay timings, avoiding the use of
these intermediate truncated values.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[danvet: Squash in fixup from Thierry Reding for amdgpu.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-09-24 20:14:21 +02:00
Ville Syrjälä eba1f35dfe drm: Move timestamping constants into drm_vblank_crtc
Collect the timestamping constants alongside the rest of the relevant
stuff under drm_vblank_crtc.

We can now get rid of the 'refcrtc' parameter to
drm_calc_vbltimestamp_from_scanoutpos().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-09-24 20:14:20 +02:00
Alex Deucher 4c7fbc39b1 drm/amdgpu: Sprinkle drm_modeset_lock_all to appease locking checks
In

commit 7a3f3d6667
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Jul 9 23:44:28 2015 +0200

    drm: Check locking in drm_for_each_connector

I added locking checks to drm_for_each_connector but failed that
through drm_helper_connector_dpms -> drm_helper_choose_encoder_dpms
it's used in a few more places in the amdgpu resume/suspend code.

Fix them up.

Note that we could use the connector iterator macros in there too, but
that's for the future.

Port of radeon commit:
drm/radeon: Sprinkle drm_modeset_lock_all to appease locking checks

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:46 -04:00
monk.liu 5c3422b0b1 drm/amdgpu: sync ce and me with SWITCH_BUFFER(2)
we used to adopt wait_reg_mem to let CE wait before DE finish page
updating, but from Tonga+, CE doesn't support wait_reg_mem package so
this logic no longer works.

so here is another approach to do same thing:
Insert two of SWITCH_BUFFER at both front and end of vm_flush can
guarantee that CE not go further to process IB_const before vm_flush
done.

Insert two of SWITCH_BUFFER also works on CI, so remove legency method
to sync CE and ME

v2:
Insert double SWITCH_BUFFER at front of vm flush as well.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-09-23 17:23:45 -04:00
Dan Carpenter 54ef0b5461 drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()
args->size is a u64.  arg->pitch and args->height are u32.  The
multiplication will overflow instead of using the high 32 bits as
intended.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:44 -04:00
Dan Carpenter 0913eab648 drm/amdgpu: info leak in amdgpu_gem_metadata_ioctl()
There is no limit on args->data.data_size_bytes so we could read beyond
the end of the args->data.data[] array.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:44 -04:00
Dan Carpenter 0d2edd3791 drm/amdgpu: integer overflow in amdgpu_info_ioctl()
The "alloc_size" calculation can overflow leading to memory corruption.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:43 -04:00
Dan Carpenter 1d263474c4 drm/amdgpu: unwind properly in amdgpu_cs_parser_init()
The amdgpu_cs_parser_init() function doesn't clean up after itself but
instead the caller uses a free everything function amdgpu_cs_parser_fini()
on failure.  This style of error handling is often buggy.  In this
example, we call "drm_free_large(parser->chunks[i].kdata);" when it is
an unintialized pointer or when "parser->chunks" is NULL.

I fixed this bug by adding unwind code so that it frees everything that
it allocates.

I also mode some other very minor changes:
1) Renamed "r" to "ret".
2) Moved the chunk_array allocation to the start of the function.
3) Removed some initializers which are no longer needed.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Ilja Van Sprundel <ivansprundel@ioactive.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:43 -04:00
Alex Deucher 5a6adfa20b drm/amdgpu: Fix max_vblank_count value for current display engines
The value was much too low, which could cause the userspace visible
vblank counter to move backwards when the hardware counter wrapped
around.

Ported from radeon commit:
b0b9bb4dd5

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-09-23 17:23:42 -04:00
Andrzej Hajda 71affda522 drm/amdgpu: use kmemdup rather than duplicating its implementation
The patch was generated using fixed coccinelle semantic patch
scripts/coccinelle/api/memdup.cocci [1].

[1]: http://permalink.gmane.org/gmane.linux.kernel/2014320

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:41 -04:00
Leo Liu 1f4452105c drm/amdgpu: fix UVD suspend and resume for VI APU
User space passed the same handle before suspend and after resume,
so we have remove the session and handle destroy, and keep the
firmware untouched.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-09-23 17:23:41 -04:00
Leo Liu 2bd188d016 drm/amdgpu: fix the UVD suspend sequence order
Fixes suspend issues with UVD.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-09-23 17:23:40 -04:00
Leo Liu 5146419e6f drm/amdgpu: make UVD handle checking more strict
Invalid messages can crash the hw otherwise

Ported from radeon commit a1b403da70

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-09-23 17:23:40 -04:00
Leo Liu 1ee4478a26 drm/amdgpu: Disable UVD PG
This causes problems with multiple suspend/resume cycles.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-09-23 17:23:39 -04:00
Christian König 4f839a243d drm/amdgpu: more scheduler cleanups v2
Embed the scheduler into the ring structure instead of allocating it.
Use the ring name directly instead of the id.

v2: rebased, whitespace cleanup

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
2015-09-23 17:23:39 -04:00
Christian König 5ec92a7692 drm/amdgpu: cleanup fence queue init v2
Move the fence related stuff into amdgpu_fence.c

v2: rework commit message, cause this is actually not a bug

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-09-23 17:23:38 -04:00
Christian König 9b398fa5c2 drm/amdgpu: rename fence->scheduler to sched v2
Just to be consistent with the other members.

v2: rename the ring member as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> (v1)
Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
2015-09-23 17:23:37 -04:00
Junwei Zhang a6db8a33e1 drm/amdgpu: refine the scheduler job type conversion
Use container_of rather than casting.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-09-23 17:23:36 -04:00
Junwei Zhang 4c7eb91cae drm/amdgpu: refine the job naming for amdgpu_job and amdgpu_sched_job
Use consistent naming across functions.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
2015-09-23 17:23:36 -04:00
Christian König bf60efd353 drm/amdgpu: use only one reservation object for each VM v2
Reduces the locking and fencing overhead.

v2: add comment why we need the duplicates list in the GEM op.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-09-23 17:23:35 -04:00
Christian König a5b750583e drm/amdgpu: validate duplicates in the CS as well
This allows for multiple BOs to have the same reservation object.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:34 -04:00
Christian König 72d7668b5b drm/amdgpu: export reservation_object from dmabuf to ttm (v2)
Adds an extra argument to amdgpu_bo_create, which is only used in amdgpu_prime.c.

Port of radeon commit 831b6966a6.

v2: fix up kfd.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:34 -04:00
Christian König b7d698d7fd drm/amdgpu: fix overflow on 32bit systems
mem->start is a long, so this can overflow on 32bit systems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Cc: stable@vger.kernel.org
2015-09-23 17:23:33 -04:00
Christian König 1886d1a9ca drm/amdgpu: remove process_job callback from the scheduler
Just free the resources immediately after submitting the job.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-09-23 17:23:33 -04:00
Christian König 20a85ff846 drm/amdgpu: use write confirm for vm_flush()
Make sure the CP waits for the write to be confirmed before
invalidating.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:30 -04:00
Anatoli Antonovitch 22c01cc483 drm/amdgpu: execution barrier after fence v2
Insert wait for reg mem after EOP to fix potential issue with vm context switch

v2: move wait to vm_flush() use equal instead of greater than.

Signed-off-by: Anatoli Antonovitch <anatoli.antonovitch@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:30 -04:00
Christian König 3daea9e3d3 drm/amdgpu: add option to disable semaphores
Provide module parameter to enable/disable them. Still
enabled by default.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-23 17:23:29 -04:00
Alex Deucher 35c7a9526a drm/amdgpu: rename gmc_v8_0_init_compute_vmid
It should be gfx_v8_0_init_compute_vmid since it's
part of the gfx block.

Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 16:36:28 -04:00
Alex Deucher be4f38e28c drm/amdgpu: fix vce3 instance handling
Need to properly handle the instances for the idle
checks and soft reset.

Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 16:35:54 -04:00
Leo Liu 898e50d444 drm/amdgpu: remove ib test for the second VCE Ring
it seems the VCE ring 1 ib test not reliable, remove it for now.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-and-Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
2015-09-04 16:31:22 -04:00
Christian König 140b519f7a drm/amdgpu: properly enable VM fault interrupts
This fixes not printing VM faults.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 16:31:16 -04:00
Christian König 270e869d84 drm/amdgpu: fix buffer placement under memory pressure
Some buffers (UVD/VM page tables) must be placed in VRAM,
but the byte restriction for moving buffers didn't took this
into account.

Port of radeon commit 4b09556660.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-09-03 14:30:49 -04:00
Alex Deucher 362eda04ba drm/amdgpu/cz: fix cz_dpm_update_low_memory_pstate logic
The logic was reversed.  This feature is not enabled
at the moment, but fix it now for the future.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-03 12:06:47 -04:00
Alex Deucher 99a0923837 drm/amdgpu: fix typo in dce11 watermark setup
Using the wrong watermwark value for the secondary
watermark.  Copy paste typo.  Noticed by Mykola.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-09-03 12:06:41 -04:00