Commit Graph

233 Commits

Author SHA1 Message Date
Maarten Lankhorst 954605ca3f drm/radeon: use common fence implementation for fences, v4
Changes since v1:
- Kill the sw interrupt dance, add and use
  radeon_irq_kms_sw_irq_get_delayed instead.
- Change custom wait function, lockdep complained about it.
  Holding exclusive_lock in the wait function might cause deadlocks.
  Instead do all the processing in .enable_signaling, and wait
  on the global fence_queue to pick up gpu resets.
- Process all fences in radeon_gpu_reset after reset to close a race
  with the trylock in enable_signaling.
Changes since v2:
- Small changes to work with the rewritten lockup recovery patches.
Changes since v3:
- Call radeon_fence_schedule_check when exclusive_lock cannot be
  acquired to always cause a wake up.
- Reset irqs from hangup check.
- Drop reading seqno in the callback, use cached value.
- Fix indentation in radeon_fence_default_wait
- Add a radeon_test_signaled function, drop a few test_bit calls.
- Make to_radeon_fence global.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-09-01 10:22:08 +02:00
Christian König 3c0363891c drm/radeon: drop doing resets in a work item
Blocking completely innocent processes with a GPU reset is
a pretty bad idea. Just set needs_reset and let the next
command submission or fence wait do the job.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-27 17:42:13 -04:00
Maarten Lankhorst 9bb39ff43e drm/radeon: take exclusive_lock in read mode during ring tests, v5
This is needed for the next commit, because the lockup detection
will need the read lock to run.

v4 (chk): split out forced fence completion, remove unrelated changes,
          add and handle in_reset flag
v5 (agd5f): rebase fix

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-27 17:41:56 -04:00
Christian König eb98c70990 drm/radeon: force fence completion only on problematic rings (v2)
Instead of resetting all fence numbers, only reset the
number of the problematic ring. Split out from a patch
from Maarten Lankhorst <maarten.lankhorst@canonical.com>

v2 (agd5f): rebase build fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-27 16:47:19 -04:00
Christian König 13a7d299db drm/radeon: move the IB test after the AGP fallback
Otherwise we won't test if the fallback to PCIe GART really worked.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-27 12:47:48 -04:00
Dave Airlie 484048db6b Merge branch 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux into drm-next
radeon userptr support.

* 'drm-next-3.18' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: allow userptr write access under certain conditions
  drm/radeon: add userptr flag to register MMU notifier v3
  drm/radeon: add userptr flag to directly validate the BO to GTT
  drm/radeon: add userptr flag to limit it to anonymous memory v2
  drm/radeon: add userptr support v8

Conflicts:
	drivers/gpu/drm/radeon/radeon_prime.c
2014-08-26 09:05:14 +10:00
Alex Deucher 73ef0e0d62 drm/radeon: fix display handling in radeon_gpu_reset
If the display hw was reset or a hard reset was used,
we need to re-init some of the common display hardware as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2014-08-19 11:29:22 -04:00
Alex Deucher c940b4476f drm/radeon: fix pm handling in radeon_gpu_reset
pm_suspend is handled in the radeon_suspend callbacks.
pm_resume has special handling depending on whether
dpm or legacy pm is enabled.  Change radeon_gpu_reset
to mirror the behavior in the suspend and resume
pathes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2014-08-19 11:29:21 -04:00
Christian König 341cb9e426 drm/radeon: add userptr flag to register MMU notifier v3
Whenever userspace mapping related to our userptr change
we wait for it to become idle and unmap it from GTT.

v2: rebased, fix mutex unlock in error path
v3: improve commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-11 11:04:26 -04:00
Christian König dfc230f9af drm/radeon: adjust default radeon_vm_block_size v2
v2: rebase on vm_size scale change. Adjust vm_size default to 8,
    Better handle the default and smaller values.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05 08:53:52 -04:00
Alex Deucher 4807c5a8a0 drm/radeon: add a PX quirk list
Some PX laptops seems to have problems turning the dGPU on/off.
Add a quirk list to disable runpm by default on those systems.
Also convert the current PX d3 delay handling to a quirk.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=51381
https://bugzilla.kernel.org/show_bug.cgi?id=74551

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05 08:53:36 -04:00
Michel Dänzer 02376d8282 drm/radeon: Allow write-combined CPU mappings of BOs in GTT (v2)
v2: fix rebase onto drm-fixes

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-05 08:53:33 -04:00
Christian König 20b2656d7e drm/radeon: let's use GB for vm_size (v2)
VM sizes smaller than 1GB doesn't make much sense anyway.

v2: fix typo and grammer

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-07-21 13:17:37 -04:00
Christian König 4510fb985d drm/radeon: make vm_block_size a module parameter
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-09 22:06:54 -04:00
Christian König c1c4413258 drm/radeon: make VM size a module parameter (v2)
v2: agd5f: simplify patch

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-09 22:06:53 -04:00
Dave Airlie 8d4ad9d4bb Merge commit '9e9a928eed8796a0a1aaed7e0b676db86ba84594' into drm-next
Merge drm-fixes into drm-next.

Both i915 and radeon need this done for later patches.

Conflicts:
	drivers/gpu/drm/drm_crtc_helper.c
	drivers/gpu/drm/i915/i915_drv.h
	drivers/gpu/drm/i915/i915_gem.c
	drivers/gpu/drm/i915/i915_gem_execbuffer.c
	drivers/gpu/drm/i915/i915_gem_gtt.c
2014-06-05 20:28:59 +10:00
Alex Deucher 3640da2faa drm/radeon/dpm: resume fixes for some systems
Setting the power state prior to restoring the display
hardware leads to blank screens on some systems.  Drop
the power state set from dpm resume.  The power state
will get set as part of the mode set sequence.  Also
add an explicit power state set after mode set resume
to cover PX and headless systems.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=76761

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-06-02 13:33:03 +10:00
Daniel Vetter 18ee37a485 drm/radeon: Resume fbcon last
So a few people complained that

commit 177cf92de4
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Apr 1 22:14:59 2014 +0200

    drm/crtc-helpers: fix dpms on logic

which was merged into 3.15-rc1, broke resume on radeons. Strangely git
bisect lead everyone to

commit 25f397a429
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Jul 19 18:57:11 2013 +0200

    drm/crtc-helper: explicit DPMS on after modeset

which was merged long ago and actually part of 3.14.

Digging deeper I've noticed (again) that the call to
drm_helper_resume_force_mode in the radeon resume handlers was a no-op
previously because everything gets shut down on suspend. radeon does
this with explicit calls to drm_helper_connector_dpms with DPMS_OFF.
But with 177c we now force the dpms state to ON, so suddenly
resume_force_mode actually forced the crtcs back on.

This is the intention of the change after all, the problem is that
radeon resumes the fbdev console layer _before_ restoring the display,
through calling fb_set_suspend. And fbcon does an immediate ->set_par,
which in turn causes the same forced mode restore to happen.

Two concurrent modeset operations didn't lead to happiness. Fix this
by delaying the fbcon resume until the end of the readeon resum
functions.

v2: Fix up a bit of the spelling fail.

References: https://lkml.org/lkml/2014/5/29/1043
References: https://lkml.org/lkml/2014/5/2/388
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=74751
Tested-by: Ken Moffat <zarniwhoop@ntlworld.com>
Cc: Alex Deucher <alexdeucher@gmail.com>
Cc: Ken Moffat <zarniwhoop@ntlworld.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2014-05-31 09:19:51 +10:00
Samuel Li b0a9f22a18 drm/radeon: add Mullins chip family
Mullins is a new CI-based APU.

Signed-off-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06 12:19:57 +02:00
Daniel Vetter fc8fd40eb2 drm: Rip out totally bogus vga_switcheroo->can_switch locking
So I just wanted to add a new field to struct drm_device and
accidentally stumbled over something. According to comments
dev->open_count is protected by dev->count_lock, but that's totally
not the case. It's protected by drm_global_mutex.

Unfortunately the vga switcheroo callbacks took this comment at face
value. The problem is that we can't just take the drm_global_mutex
because:
- It would lead to a locking inversion with the driver load/unload
  paths.
- It wouldn't actually protect anything, for that we'd need to wrap
  the entire vga switcheroo code in the drm_global_mutex. And I'm not
  sure whether that would actually solve anything.

What we probably want is a try_to_grab_switcheroo reference kind of
thing which is used in the driver's ->open callback. Then we could
move all that ->can_switch madness into the vga switcheroo core where
it really belongs.

But since that would amount to real work take the easy way out and
just add a comment. It's definitely not going to make anything worse
since doing switcheroo state changes while restarting X just isn't
recommended. Even though the delayed switching code does exactly that.

v2:
- Simplify the ->can_switch implementations more (Thierry)
- Fix comment about the dev->open_count locking (Thierry)

Cc: Thierry Reding <treding@nvidia.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> (v1)
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-23 10:32:33 +02:00
Alex Deucher 90c4cde9d5 drm/radeon: fix runpm handling on APUs (v4)
Don't try and runtime suspend the APU in PX systems.  We
only want to power down the dGPU.

v2: fix harder
v3: fix stupid typo
v4: consolidate runpm enablement to a single flag

bugs:
https://bugs.freedesktop.org/show_bug.cgi?id=75127
https://bugzilla.kernel.org/show_bug.cgi?id=72701

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2014-04-17 13:59:38 +02:00
Dave Airlie ec9954fc26 drm/radeon: fix resuming mode in pm runtime resume path
For runtime pm we'd never suspend with the modesetting hw turned on,
so don't try and resume the modesetting hw, as that path will take
locks that the interface that is causing us to wake up might also
take.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-04-03 12:35:41 +02:00
Matt Roper f4510a2752 drm: Replace crtc fb with primary plane fb (v3)
Now that CRTC's have a primary plane, there's no need to track the
framebuffer in the CRTC.  Replace all references to the CRTC fb with the
primary plane's fb.

This patch was generated by the Coccinelle semantic patching tool using
the following rules:

        @@ struct drm_crtc C; @@
        -   (C).fb
        +   C.primary->fb

        @@ struct drm_crtc *C; @@
        -   (C)->fb
        +   C->primary->fb

v3: Generate patch via coccinelle.  Actual removal of crtc->fb has been
    moved to a subsequent patch.

v2: Fixup several lingering crtc->fb instances that were missed in the
    first patch iteration.  [Rob Clark]

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-04-01 20:18:28 -04:00
Dave Airlie bcc298bc92 Linux 3.14-rc7
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Merge tag 'v3.14-rc7' into drm-next

Linux 3.14-rc7

Backmerge to help out Intel guys.
2014-03-18 19:12:31 +10:00
Alex Deucher bc6a62955f drm/radeon: resume old pm late
Moving the pm resume up in the init order to fix
dpm seems to have regressed somes cases with the old
pm code.  Move it back to late resume.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-06 16:46:56 -05:00
Christian König 529364e05b drm/radeon: remove global vm lock
Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-03 11:26:27 +01:00
Christian König 6d2f2944e9 drm/radeon: use normal BOs for the page tables v4
No need to make it more complicated than necessary,
just allocate the page tables as normal BO and
flush whenever the address change.

v2: update comments and function name
v3: squash bug fixes, page directory and tables patch
v4: rebased on Mareks changes

Signed-off-by: Christian König <christian.koenig@amd.com>
2014-03-03 11:26:08 +01:00
Christian König 37615527c5 drm/radeon: cleanup the fence ring locking code
We no longer need to take the ring lock while checking for
a gpu lockup, so just cleanup the code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-02-28 10:53:18 +01:00
Alex Deucher 1a0041b8f9 drm/radeon: add pci config hard reset
This is used to hard reset the asic.  If a soft
reset is not able to reset things, a hard reset
can be used.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-08 18:42:22 -05:00
Rashika Kheria 28f5a6cd93 drivers: gpu: Mark functions as static in radeon_device.c
Mark functions radeon_doorbell_init() and radeon_doorbell_fini() as
static in drm/radeon/radeon_device.c because they are not used outside
this file.

This eliminates the following warning in drm/radeon/radeon_device.c:
drivers/gpu/drm/radeon/radeon_device.c:252:5: warning: no previous prototype for ‘radeon_doorbell_init’ [-Wmissing-prototypes]
drivers/gpu/drm/radeon/radeon_device.c:281:6: warning: no previous prototype for ‘radeon_doorbell_fini’ [-Wmissing-prototypes]

Signed-off-by: Rashika Kheria <rashika.kheria@gmail.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-07 11:45:35 -05:00
Alex Deucher 6c7bccea39 drm/radeon/pm: move pm handling into the asic specific code
We need more control over the ordering of dpm init with
respect to the rest of the asic.  Specifically, the SMC
has to be initialized before the rlc and cg/pg.  The pm
code currently initializes late in the driver, but we need
it to happen much earlier so move pm handling into the asic
specific callbacks.

This makes dpm more reliable and makes clockgating work
properly on CIK parts and should help on SI parts as well.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24 17:57:06 -05:00
Andrew Lewycky d5754ab8f9 drm/radeon: use a single doorbell for cik kms compute
A single doorbell page is plenty for cik kms compute.
Use a single page and manage doorbell allocation by
individual doorbells rather than pages.  Identify
doorbells by their index rather than byte offset.

Signed-off-by: Andrew Lewycky <Andrew.Lewycky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-15 15:56:22 -05:00
Alex Deucher 3bf599e8a2 drm/radeon: add Hawaii chip family
Hawaii is a new CI-based dGPU.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08 12:33:39 -05:00
Christian König f9eaf9ae78 drm/radeon: rework and fix reset detection v2
Stop fiddling with jiffies, always wait for RADEON_FENCE_JIFFIES_TIMEOUT.
Consolidate the two wait sequence implementations into just one function.
Activate all waiters and remember if the reset was already done instead of
trying to reset from only one thread.

v2: clear reset flag earlier to avoid timeout in IB test

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 15:25:51 -04:00
Dave Airlie 10ebc0bc09 drm/radeon: add runtime PM support (v2)
This hooks radeon up to the runtime PM system to enable
dynamic power management for secondary GPUs in switchable
and powerxpress laptops.

v2: agd5f: clean up, add module parameter

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:14 -04:00
Dave Airlie 7473e830c4 drm/radeon: convert to pmops
This is a pre-requisite for runtime pm on powerxpress systems.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:14 -04:00
Alex Deucher 4a1132a023 drm/radeon: disable tests/benchmarks if accel is disabled
The tests are only usable if the acceleration engines have
been successfully initialized.

Based on an initial patch from: Alex Ivanov <gnidorah@p0n4ik.tk>

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2013-09-23 10:53:18 -04:00
Alex Deucher 0a5b7b0bd9 drm/radeon: add spinlocks for indirect register accesss
This adds spinlocks to protect access to other
indirect register apertures.  These indirect spaces are
used pretty infrequently and we haven't had an reported
problems, but better safe than sorry.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-11 11:44:29 -04:00
Alex Deucher fe78118c46 drm/radeon: protect concurrent smc register access with a spinlock
smc registers are access indirectly via the main mmio aperture, so
there may be problems with concurrent access.  This adds a spinlock
to protect access to this register space.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-09-11 11:44:28 -04:00
Dave Airlie 9c725e5bcd Merge branch 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux into drm-next
Alex writes:
This is the radeon drm-next request.  Big changes include:
- support for dpm on CIK parts
- support for ASPM on CIK parts
- support for berlin GPUs
- major ring handling cleanup
- remove the old 3D blit code for bo moves in favor of CP DMA or sDMA
- lots of bug fixes

[airlied: fix up a bunch of conflicts from drm_order removal]

* 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux: (898 commits)
  drm/radeon/dpm: make sure dc performance level limits are valid (CI)
  drm/radeon/dpm: make sure dc performance level limits are valid (BTC-SI) (v2)
  drm/radeon: gcc fixes for extended dpm tables
  drm/radeon: gcc fixes for kb/kv dpm
  drm/radeon: gcc fixes for ci dpm
  drm/radeon: gcc fixes for si dpm
  drm/radeon: gcc fixes for ni dpm
  drm/radeon: gcc fixes for trinity dpm
  drm/radeon: gcc fixes for sumo dpm
  drm/radeonn: gcc fixes for rv7xx/eg/btc dpm
  drm/radeon: gcc fixes for rv6xx dpm
  drm/radeon: gcc fixes for radeon_atombios.c
  drm/radeon: enable UVD interrupts on CIK
  drm/radeon: fix init ordering for r600+
  drm/radeon/dpm: only need to reprogram uvd if uvd pg is enabled
  drm/radeon: check the return value of uvd_v1_0_start in uvd_v1_0_init
  drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resume
  radeon kms: fix uninitialised hotplug work usage in r100_irq_process()
  drm/radeon/audio: set up the sads on DCE3.2 asics
  drm/radeon: fix handling of variable sized arrays for router objects
  ...

Conflicts:
	drivers/gpu/drm/i915/i915_dma.c
	drivers/gpu/drm/i915/i915_gem_dmabuf.c
	drivers/gpu/drm/i915/intel_pm.c
	drivers/gpu/drm/radeon/cik.c
	drivers/gpu/drm/radeon/ni.c
	drivers/gpu/drm/radeon/r600.c
2013-09-02 09:31:40 +10:00
Alex Deucher edcd26e81f drm/radeon: default to 1024M gart size on rv770+
Newer asics have a lot of vram so it's less of an
issue to waste a little more space for the gart
page table.  This gives us some additional gart space
before having to migrate to non-gart system ram
for games, etc. where we use up most of vram.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:00 -04:00
Dave Airlie 0d69704ae3 gpu/vga_switcheroo: add driver control power feature. (v3)
For optimus and powerxpress muxless we really want the GPU
driver deciding when to power up/down the GPU, not userspace.

This adds the ability for a driver to dynamically power up/down
the GPU and remove the switcheroo from controlling it, the
switcheroo reports the dynamic state to userspace also.

It also adds 2 power domains, one for machine where the power
switch is controlled outside the GPU D3 state, so the powerdown
ordering is done correctly, and the second for the hdmi audio
device to make sure it can resume for PCI config space accesses.

v1.1: fix build with switcheroo off

v2: add power domain support for radeon and v1 nvidia dsms
v2.1: fix typo in off case

v3: add audio power domain for hdmi audio + misc audio fixes

v4: use PCI_SLOT macro, drop power reference on hdmi audio resume
failure also.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-08-29 13:30:21 +10:00
Alex Deucher f61d5b4677 drm/radeon/cik: use a mutex to properly lock srbm instanced registers
We need proper locking in the driver when accessing instanced
registers on CIK.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-07 17:37:18 -04:00
Alex Deucher 95f595097b drm/radeon: properly handle pm on gpu reset
When we reset the GPU, we need to properly tear
down power management before reseting the GPU and then
set it back up again after reset.  Add the missing
radeon_pm_[suspend|resume] calls to the gpu reset
function.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-07 17:37:07 -04:00
Alex Deucher 75efdee11b drm/radeon: implement simple doorbell page allocator
The doorbell aperture is a PCI BAR whose pages can be
mapped to compute resources for things like wptrs
for userspace queues.

This patch maps the BAR and sets up a simple allocator
to allocate pages from the BAR.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:07 -04:00
Alex Deucher efad86db4e drm/radeon: adapt to PCI BAR changes on CIK
register BAR is now at PCI BAR 5.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:23 -04:00
Alex Deucher 6eac752ec6 drm/radeon: add CIK chip families
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:22 -04:00
Jerome Glisse 089920f21d drm/radeon: fix write back suspend regression with uvd v2
UVD ring can't use scratch thus it does need writeback buffer to keep
a valid address or radeon_ring_backup will trigger a kernel fault.

It's ok to not unpin the write back buffer on suspend as it leave in
gtt and thus does not need eviction.

v2: Fix the uvd case.

Reported and tracked by Wojtek <wojtask9@wp.pl>

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-12 08:16:29 -04:00
Alex Deucher 50a583f64b drm/radeon: narrow scope of Apple re-POST hack
This narrows the scope of the apple re-POST hack added in:
drm/radeon: re-POST the asic on Apple hardware when booted via EFI

That patch prevents UVD from working on macs when booted in EFI
mode.  The original patch fixed macbook2,1 systems which were
r5xx and hence have no UVD.  Limit the hack to those systems to
prevent UVD breakage on newer systems.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=63935

Cc: Matthew Garrett <mjg59@srcf.ucam.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Matthew Garrett <matthew.garrett@nebula.com>
2013-05-29 12:35:45 -04:00
Alex Deucher 2cf3a4fcc6 drm/radeon: don't check crtcs in card_posted() on cards without DCE
Skip checking crtcs in hardware without them.  Avoids checking
non-existent hardware.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-29 11:35:07 -04:00