Suppress split ptlock on arches which may use one page for multiple page
tables. Reconsider what better to do (particularly on ppc64) later on.
Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Two CONFIG_SMP=n build fixes due to missing <asm/smp.h> includes.
Signed-off-by: Olof Johansson <olof@lixom.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
The current ia64 implementation of dma_get_cache_alignment does not work
for modules because it relies on a symbol which is not exported. Direct
access to a global is a little ugly anyway, so this patch re-implements
dma_get_cache_alignment in a manner similar to what is currently used for
x86_64.
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
A typo fix for fix-build-on-nls-free-systems.patch that caused all systems
to be detected as not having NLS.
Signed-off-by: Yuri Vasilevski <yvasilev@duke.math.cinvestav.mx>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This patch, however, should be applied on top of the 64k-page-size patch to
fix some problems with hugepage (some pre-existing, another introduced by
this patch).
The patch fixes a bug in the SLB miss handler for hugepages on ppc64
introduced by the dynamic hugepage patch (commit id
c594adad56) due to a misunderstanding of the
srd instruction's behaviour (mea culpa). The problem arises when a 64-bit
process maps some hugepages in the low 4GB of the address space (unusual).
In this case, as well as the 256M segment in question being marked for
hugepages, other segments at 32G intervals will be incorrectly marked for
hugepages.
In the process, this patch tweaks the semantics of the hugepage bitmaps to
be more sensible. Previously, an address below 4G was marked for hugepages
if the appropriate segment bit in the "low areas" bitmask was set *or* if
the low bit in the "high areas" bitmap was set (which would mark all
addresses below 1TB for hugepage). With this patch, any given address is
governed by a single bitmap. Addresses below 4GB are marked for hugepage
if and only if their bit is set in the "low areas" bitmap (256M
granularity). Addresses between 4GB and 1TB are marked for hugepage iff
the low bit in the "high areas" bitmap is set. Higher addresses are marked
for hugepage iff their bit in the "high areas" bitmap is set (1TB
granularity).
To avoid conflicts, this patch must be applied on top of BenH's pending
patch for 64k base page size [0]. As such, this patch also addresses a
hugepage problem introduced by that patch. That patch allows hugepages of
1MB in size on hardware which supports it, however, that won't work when
using 4k pages (4 level pagetable), because in that case hugepage PTEs are
stored at the PMD level, and each PMD entry maps 2MB. This patch simply
disallows hugepages in that case (we can do something cleverer to re-enable
them some other day).
Built, booted, and a handful of hugepage related tests passed on POWER5
LPAR (both ARCH=powerpc and ARCH=ppc64).
[0] http://gate.crashing.org/~benh/ppc64-64k-pages.diff
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
rtc_control() may be called in the interrupt context in ALSA rtc-timer
driver. The patch fixes the wrong irq enable in rtc.c, and also fixes
the possible race of bit flags.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
We need to set the shared memory attribute in the page tables
on SMP systems to allow the cache coherency to operate.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We've noticed that sometimes "MTD do_write_buffer(): software timeout"
message was printed out when writing to a Fujitsu NOR flash.
It turned out that this was because of a race in the timeout handling
do_write_buffer(). A small timeout of (HZ / 1000) + 1 is used there, and
sometimes if the timer interrupt handling takes more than one or even two
jiffies (which is 1-2 ms with HZ == 1000) and that interrupt happens just
after chip_ready() call, the driver bails out from a ready polling loop
despite the chip has actually become ready while all those interrupts were
handled. To deal with this issue, extra check for chip ready is neccessary on
timeout expiration (and the checks should better be reordered).
As do_write_oneword() uses the same approach, it needs to also be changed.
Signed-off-by: Konstantin Baidarov <kbaidarov@ru.mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The following patch adds support for the TQ Systems TQM834x Boards.
Verified on TQM8349L.
This is a resubmit after integrating the suggested changes.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Fix two compile warnings that occur because of treating two
'unsigned long's as 'void *'s.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The assignement of a "const char *" to a "char *" variable
is emitting a warning with gcc 4.0. We cannot change
mtd->name to "const char *" as we have dynamic assignements
of the name. So casting is the correct solution here
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Nathan Roberts noticed the nand_write_ecc index into oobbuf goes out of
bounds when crossing an erase block boundary, causing incorrect OOB data
to be written and corrupting memory. Reset the index to zero after
re-preparing oobbuf for a new erase block.
Signed-off-by: Todd Poynor <tpoynor@mvista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
In case of an odd offset, the result was shifted by 1 instead of 8
Signed-off-by: Vitaly Wool <vwool@ru.mvista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel
base page size to 64K. The resulting kernel still boots on any
hardware. On current machines with 4K pages support only, the kernel
will maintain 16 "subpages" for each 64K page transparently.
Note that while real 64K capable HW has been tested, the current patch
will not enable it yet as such hardware is not released yet, and I'm
still verifying with the firmware architects the proper to get the
information from the newer hypervisors.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
- Use map.virt instead of map.map_priv_1 since it has the correct type.
- Use readw/writew instead of dereferencing an ioremap'd cookie.
- Remove an unused variable.
Signed-off-by: David Vrabel <dvrabel@arcom.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The Sharp Zaurus akita and borzoi models are large page flash devices.
This patch adds support for them to the sharpsl MTD NAND driver but
keeps the oob layout and bad block positions compatible with the Sharp
Zaurus 2.4 kernel and ROM bootloader.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Change to the extended cfi table parsing for Intel NOR flash that uses
the info in the extended table to 'walk' the table rather than using
hard coding for various primary extended query table version numbers.
From: Jared Hulbert <jaredeh@gmail.com>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Some callers to block-layer commit_write function treat non-zero return as
error, notably the loopback mount driver sometimes used in conjunction with
JFFS2 on NAND flash for bad block avoidance, etc. Return zero for success
as do various other commit_write functions.
Signed-off-by: Todd Poynor <tpoynor@mvista.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
If they get inlined into non __xipram functions we're screwed.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Hugh Dickins