Since family 11h processors, AMD is exclusively using 7-bit VID codes
transmitted using a serial protocol over two pins (clock and data.)
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Tested-by: David Hubbard <david.c.hubbard@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Fixed:
ERROR: code indent should use tabs where possible
ERROR: space required before the open parenthesis '('
WARNING: EXPORT_SYMBOL(foo); should immediately follow its function/variable
Not fixed (url):
WARNING: line over 80 characters
Not fixed (false positive):
ERROR: Macros with complex values should be enclosed in parenthesis
Cc: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Jean Delvare <khali@linux-fr.org>
The VRM model table was missing several Intel CPUs, resulting in wrong VRM table
entries to be used for many recent CPUs. Update it. Also, use values from
struct cpuinfo_x86 to retrieve CPU model information instead of re-calculating
it locally.
Cc: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Jean Delvare <khali@linux-fr.org>
fix checkpatch ERROR:
return is not a function, parentheses are not required
Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
The VIA family 6 model D CPU (C7-D, Eden 90 nm) can use two different
VID tables, we have to check the value of a MSR to decide which one to
use.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Guenter Roeck <guenter.roeck@ericsson.com>
Tested-by: Jeff Rickman <jrickman@myamigos.us>
The patch below updates broken web addresses in the kernel
Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Finn Thain <fthain@telegraphics.com.au>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Dimitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Mike Frysinger <vapier.adi@gmail.com>
Acked-by: Ben Pfaff <blp@cs.stanford.edu>
Acked-by: Hans J. Koch <hjk@linutronix.de>
Reviewed-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
We had a report about a mainboard for AMD family 0Fh processors not
routing the 6th VID pin from the CPU to the hardware monitoring chip.
While the vendor should have wired the pin (or, failing that, should
have hardwired it to level high rather than low), the fact is that
none of these processors are currently known to operate at the lower
voltage levels which require the 6th VID pin. So, as a practical
workaround, I propose to ignore the 6th VID pin for these CPUs.
If this decision ever causes problems, we'll reconsider.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Frank Myhr <fmyhr@fhmtech.com>
Tested-by: Hleb Valoshka <375gnu@gmail.com>
Cc: Rudolf Marek <r.marek@assembler.cz>
Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
The AMD family 10h CPUs use the same VID decoding table as the family
0Fh CPUs.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Rudolf Marek <r.marek@assembler.cz>
Not all AMD K8 have 6 VID pins, contrary to what was assumed in
commit 116d0486bd. This commit broke
support of older CPU models which have only 5 VID pins:
http://bugzilla.kernel.org/show_bug.cgi?id=11329
We need two entries in the hwmon-vid table, one for 5-bit VID models
(K8 revision <= E) and one for 6-bit VID models (K8 revision >= F).
This fixes bug #11329.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Frank Myhr <fmyhr@fhmtech.com>
Tested-by: Jean-Luc Coulon <jean.luc.coulon@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
AMD NPT 0Fh cpus use 6 bit VID codes. Successive codes with msb 0
describe 25mV decrements, while those with msb 1 describe 12.5mV
decrements. Existing hwmon-vid.c is correct only for codes with msb 0;
add support for the codes with msb 1.
Ref:
p 309, Table 71
AMD Publication 32559, BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf
Signed-off-by: Frank Myhr <fmyhr@fhmtech.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
cpu_data is currently an array defined using NR_CPUS. This means that
we overallocate since we will rarely really use maximum configured cpus.
When NR_CPU count is raised to 4096 the size of cpu_data becomes
3,145,728 bytes.
These changes were adopted from the sparc64 (and ia64) code. An
additional field was added to cpuinfo_x86 to be a non-ambiguous cpu
index. This corresponds to the index into a cpumask_t as well as the
per_cpu index. It's used in various places like show_cpuinfo().
cpu_data is defined to be the boot_cpu_data structure for the NON-SMP
case.
Signed-off-by: Mike Travis <travis@sgi.com>
Acked-by: Christoph Lameter <clameter@sgi.com>
Cc: Andi Kleen <ak@suse.de>
Cc: James Bottomley <James.Bottomley@steeleye.com>
Cc: Dmitry Torokhov <dtor@mail.ru>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Cc: Mark M. Hoffman <mhoffman@lightlink.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
If we cannot guess which VRM version the CPU uses, we set it to 0 and
log it. So we shouldn't spam the log each time vid_from_reg() is
later called with vrm 0.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
Update the VID type for certain VIA processors and remove
the Itanium entries.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
This patch adds support for two new VID codes, supporting Intel mobile Core
processors and new Conroe based platforms.
Signed-off-by: Rudolf Marek <r.marek@sh.cvut.cz>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Following patch trims the VID value to correct number of bits
for each VRM.
Signed-off-by: Rudolf Marek <r.marek@sh.cvut.cz>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Add support for the Intel Pentium M series to the hwmon-vid driver.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Rudolf Marek <r.marek@sh.cvut.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch adds the VIA CENTAUR CPUs to detection table.
Table was updated to treat future Intel x86 CPUs as VRD10.
Stepping field was added, because some VIA CPUs have
different VRM specs across stepping. I changed the vrm type
to u8 because all drivers use u8 anyway.
Signed-off-by: Rudolf Marek <r.marek@sh.cvut.cz>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch updates the VID entries, so any future
Intel CPU will be detected as unknown rather than 9.0
Signed-off-by: Rudolf Marek <r.marek@sh.cvut.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
I see very little reason why vid_from_reg is inlined. It is not
exactly short, its parameters are seldom known in advance, and it is
never called in speed critical areas. Uninlining it should cause
little performance loss if any, and saves a signficant space as well
as compilation time.
As suggested by Alexey Dobriyan, I am leaving vid_to_reg inline for now,
as it is short and has a single user so far.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Cleanup hwmon-vid a bit, fixing typos, rewording some comments and
reindenting properly at places.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
The only part left in i2c-sensor is the VRM/VRD/VID handling code.
This is in no way related to i2c, so it doesn't belong there. Move
the code to hwmon, where it belongs.
Note that not all hardware monitoring drivers do VRM/VRD/VID
operations, so less drivers depend on hwmon-vid than there were
depending on i2c-sensor.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Jean Delvare