Commit Graph

60 Commits

Author SHA1 Message Date
Arnd Bergmann 512d4a26ab interconnect: qcom: fix rpmh link failures
When CONFIG_COMPILE_TEST is set, it is possible to build some
of the interconnect drivers into the kernel while their dependencies
are loadable modules, which is bad:

arm-linux-gnueabi-ld: drivers/interconnect/qcom/bcm-voter.o: in function `qcom_icc_bcm_voter_commit':
(.text+0x1f8): undefined reference to `rpmh_invalidate'
arm-linux-gnueabi-ld: (.text+0x20c): undefined reference to `rpmh_write_batch'
arm-linux-gnueabi-ld: (.text+0x2b0): undefined reference to `rpmh_write_batch'
arm-linux-gnueabi-ld: (.text+0x2e8): undefined reference to `rpmh_write_batch'
arm-linux-gnueabi-ld: drivers/interconnect/qcom/icc-rpmh.o: in function `qcom_icc_bcm_init':
(.text+0x2ac): undefined reference to `cmd_db_read_addr'
arm-linux-gnueabi-ld: (.text+0x2c8): undefined reference to `cmd_db_read_aux_data'

The exact dependencies are a bit complicated, so split them out into a
hidden Kconfig symbol that all drivers can in turn depend on to get it
right.

Fixes: 976daac4a1 ("interconnect: qcom: Consolidate interconnect RPMh support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201204165030.3747484-1-arnd@kernel.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-12-28 14:03:02 +02:00
Linus Torvalds 9805529ec5 ARM: device tree updates for 5.11
Across all platforms, there is a continued move towards DT schema for
 validating the dts files. As a result there are bug fixes for mistakes
 that are found using these schema, in addition to warnings from the
 dtc compiler.
 
 As usual, many changes are for adding support for additional on-chip
 and on-board components in the machines we already support.
 
 The newly supported SoCs for this release are:
 
  - MStar Infinity2M, a low-end IP camera chip based on a dual-core
    Cortex-A7, otherwise similar to the Infinity chip we already support.
    This is also known as the SigmaStar SSD202D, and we add support for
    the Honestar ssd201htv2 development kit.
 
  - Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
    (BMC), in the same family as the NPCM750. This gets used in the Ampere
    Altra based "Fii Kudo" server and the Quanta GSJ, both of which are
    added as well.
 
  - Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
    Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
    GT-AC5300 high-end WiFi router based on this chip.
 
  - Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
    meant for faster Chromebooks and tablets. It gets added along with
    its reference design.
 
  - Mediatek MT6779 (Helio P90) is a high-end phone chip from last year's
    generation, also added along with its reference board.  This one is
    still based on Cortex-A75/A55.
 
  - Mediatek MT8167 is a version of the already supported MT8516 chip,
    both based on Cortex-A35. It gets added along with the "Pumpkin"
    single board computer, but is likely to also make its way into low-end
    tablets in the future.
 
 For the already supported chips, there are a number of new boards.
 Interestingly there are more 32-bit machines added this time than
 64-bit. Here is a brief list of the new boards:
 
  - Three new Mikrotik router variants based on Marvell Prestera
    98DX3236, a close relative of the more common Armada XP
 
  - A reference board for the Marvell Armada 382
 
  - Three new servers using ASpeed baseboard management controllers,
    the actual machines being from Bytedance, Facebook and IBM,
    and one machine using the Nuvoton NPCM750 BMC.
 
  - The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.
 
  - The usual set of 32-bit i.MX industrial/embedded hardware:
    * Protonic WD3 (tractor e-cockpit)
    * Kamstrup OMNIA Flex Concentrator (smart grid platform)
    * Van der Laan LANMCU (food storage)
    * Altesco I6P (vehicle inspection stations)
    * PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard
 
  - DH electronics STM32MP157C DHCOM, a PicoITX carrier board
    for the aleady supported DHCOM module
 
  - Three new Allwinner SoC based single-board computers:
    * NanoPi R1 (H3 based)
    * FriendlyArm ZeroPi (H3 based)
    * Elimo Initium SBC (S3 based)
 
  - Ouya Game Console based on Nvidia Tegra 3
 
  - Version 5 of the already supported Zynq Z-Turn MYIR Board
 
  - LX2162AQDS, a reference platform for NXP Layerscape
    LX2162A, which is a repackaged 16-core LX2160A
 
  - A series of Kontron i.MX8M Mini baseboard/SoM versions
 
  - Espressobin Ultra, a new variant of the popular Armada 3700 based board,
 
  - IEI Puzzle-M801, a rackmount network appliance based on
    Marvell Armada 8040
 
  - Microsoft Lumia 950 XL, a phone
 
  - HDK855 and HDK865 Hardware development kits for Qualcomm
    sm8250 and sm8150, respectively
 
  - Three new board variants of the "Trogdor" Chromebook
    (sc7180)
 
  - New board variants of the Renesas based "Kingfisher" and
    "HiHope" reference boards
 
  - Kobol Helios64, an open source NAS appliance based on Rockchips
    RK3399
 
  - Engicam PX30.Core, a SoM based on Rockchip PX30, along with
    a few carrier boards.
 
 There is one conflict in mt6577_auxadc.txt, which got replaced in
 another tree and modified here, the modification is already part of
 the new file.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/ak/EACgkQmmx57+YA
 GNmQwRAAtw5Z0qYI3vewX2CPUaHUWEeN50gRa63tR+AALqR5e+M+IbAttgOwlLDB
 jmsiLRYXgYeS+nTCqxWX3O/KtDH+Ua3GfPoXch5Wt4k7jGV8XtHsWqltl9qxGmO7
 pQSoafJa55S7iXX7j4PMWc2el07zjYAejyzVHz7sD+9ARPaG0cL8IuAWLqAirTSt
 b9FhK2g7e/uUx2Jp5Cx/Ck4kZe27bTlpbhhcJMdypsw6ouue0wfq9gs68dQ6dAq5
 /KyX8PNsjX/WCcgm6YhgOwqmEk73pc17dym2SVxi+jL/HFIyQyViOpFuPc20cCWv
 9QirMsBw2Rw0yLHsIuHeeRl1KEn47vdfgP5A6e+BggpPjmtF0/S0kHR8yXWFyHfy
 OUdS8W5OM3rlEUgGESaszh7P2kril8tMdw0212rAyTpyLPVRoKR7NtOo79WBclKq
 L/2RPJNIQSotQuezhMpjH5zKgx6yOfATBZAEX0MiSU+jAEw/0Od5QCdhwu70bIAF
 jHfjtqMGS50P/i1Ht0DpwOF9DvClAlKHvUKs3a7hK81MP2sOAaElpAP3iHwVPzsI
 JU6Vn3AxnIfAsHdGh/FYwq7nxL9aVLCULUOeuLhwTbdAedXLkfFQDMIe1i8zgDtH
 MpIrE4Un7kmkOxRG96v8f0IYu54OdQdudonravimpYD3uqRfxUQ=
 =R47r
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM device tree updates from Arnd Bergmann:
 "Across all platforms, there is a continued move towards DT schema for
  validating the dts files. As a result there are bug fixes for mistakes
  that are found using these schema, in addition to warnings from the
  dtc compiler.

  As usual, many changes are for adding support for additional on-chip
  and on-board components in the machines we already support.

  The newly supported SoCs for this release are:

   - MStar Infinity2M, a low-end IP camera chip based on a dual-core
     Cortex-A7, otherwise similar to the Infinity chip we already
     support. This is also known as the SigmaStar SSD202D, and we add
     support for the Honestar ssd201htv2 development kit.

   - Nuvoton NPCM730, a Cortex-A9 based Baseboard Management Controller
     (BMC), in the same family as the NPCM750. This gets used in the
     Ampere Altra based "Fii Kudo" server and the Quanta GSJ, both of
     which are added as well.

   - Broadcom BCM4908, a 64-bit home router chip based on Broadcom's own
     Brahma-B53 CPU. Support is also added for the Asus ROG Rapture
     GT-AC5300 high-end WiFi router based on this chip.

   - Mediatek MT8192 is a new SoC based on eight Cortex-A76/A55 cores,
     meant for faster Chromebooks and tablets. It gets added along with
     its reference design.

   - Mediatek MT6779 (Helio P90) is a high-end phone chip from last
     year's generation, also added along with its reference board. This
     one is still based on Cortex-A75/A55.

   - Mediatek MT8167 is a version of the already supported MT8516 chip,
     both based on Cortex-A35. It gets added along with the "Pumpkin"
     single board computer, but is likely to also make its way into
     low-end tablets in the future.

  For the already supported chips, there are a number of new boards.
  Interestingly there are more 32-bit machines added this time than
  64-bit. Here is a brief list of the new boards:

   - Three new Mikrotik router variants based on Marvell Prestera
     98DX3236, a close relative of the more common Armada XP

   - A reference board for the Marvell Armada 382

   - Three new servers using ASpeed baseboard management controllers,
     the actual machines being from Bytedance, Facebook and IBM, and one
     machine using the Nuvoton NPCM750 BMC.

   - The Galaxy Note 10.1 (P4) tablet, using an Exynos 4412.

   - The usual set of 32-bit i.MX industrial/embedded hardware:
       * Protonic WD3 (tractor e-cockpit)
       * Kamstrup OMNIA Flex Concentrator (smart grid platform)
       * Van der Laan LANMCU (food storage)
       * Altesco I6P (vehicle inspection stations)
       * PHYTEC phyBOARD-Segin/phyCORE-i.MX6UL baseboard

   - DH electronics STM32MP157C DHCOM, a PicoITX carrier board for the
     aleady supported DHCOM module

   - Three new Allwinner SoC based single-board computers:
       * NanoPi R1 (H3 based)
       * FriendlyArm ZeroPi (H3 based)
       * Elimo Initium SBC (S3 based)

   - Ouya Game Console based on Nvidia Tegra 3

   - Version 5 of the already supported Zynq Z-Turn MYIR Board

   - LX2162AQDS, a reference platform for NXP Layerscape LX2162A, which
     is a repackaged 16-core LX2160A

   - A series of Kontron i.MX8M Mini baseboard/SoM versions

   - Espressobin Ultra, a new variant of the popular Armada 3700 based
     board,

   - IEI Puzzle-M801, a rackmount network appliance based on Marvell
     Armada 8040

   - Microsoft Lumia 950 XL, a phone

   - HDK855 and HDK865 Hardware development kits for Qualcomm sm8250 and
     sm8150, respectively

   - Three new board variants of the "Trogdor" Chromebook (sc7180)

   - New board variants of the Renesas based "Kingfisher" and "HiHope"
     reference boards

   - Kobol Helios64, an open source NAS appliance based on Rockchips
     RK3399

   - Engicam PX30.Core, a SoM based on Rockchip PX30, along with a few
     carrier boards"

* tag 'arm-soc-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (679 commits)
  arm64: dts: sparx5: Add SGPIO devices
  arm64: dts: sparx5: Add reset support
  dt-bindings: gpio: Add a binding header for the MSC313 GPIO driver
  ARM: mstar: SMP support
  ARM: mstar: Wire up smpctrl for SSD201/SSD202D
  ARM: mstar: Add smp ctrl registers to infinity2m dtsi
  ARM: mstar: Add dts for Honestar ssd201htv2
  ARM: mstar: Add chip level dtsi for SSD202D
  ARM: mstar: Add common dtsi for SSD201/SSD202D
  ARM: mstar: Add infinity2m support
  dt-bindings: mstar: Add Honestar SSD201_HT_V2 to mstar boards
  dt-bindings: vendor-prefixes: Add honestar vendor prefix
  dt-bindings: mstar: Add binding details for mstar,smpctrl
  ARM: mstar: Fill in GPIO controller properties for infinity
  ARM: mstar: Add gpio controller to MStar base dtsi
  ARM: zynq: Fix incorrect reference to XM013 instead of XM011
  ARM: zynq: Convert at25 binding to new description on zc770-xm013
  ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
  ARM: zynq: Fix leds subnode name for zc702/zybo-z7
  ARM: zynq: Rename bus to be align with simple-bus yaml
  ...
2020-12-16 16:27:35 -08:00
Arnd Bergmann a39d2ef78d Qualcomm ARM64 DT updates for 5.11
For SM8250 the recently introduced support for handling boot-loader
 stream mappings in the ARM SMMU allow us to enable this, and thereby USB
 controller and PHY, SDHCI controller and FastRPC, as well as support for
 the SM8250 HDK board has been added. Additionally PRNG and RTC is
 enabled.
 
 Similarly for SM8150, the ARM SMMU could be added which allows the
 secondary USB controller and PHYs, as well as WiFi to be added and
 support for the SM8150 HDK board to be introduced. Additionally
 Coresight and support for the last-level cache controller was added.
 
 MSM8916 finally has VDDCX and VDDMX removed as regulators and are now
 handled by the rpmpd driver for the devices controlling them. The
 Longsheer L8150 gains touchscreen, sensors, vibrator and LED support.
 
 MSM8992 gains USB and SDHCI support as well as an I2C controller and the
 associated RMI4 based touchscreen for the Lumia 950.
 
 MSM8994 also gains USB and SDHCI support, as well as VADC and temp-alarm
 support. Then support for the Lumia 950 XL is added.
 
 SDM845 gains interconnect properties for a number of devices and the
 GENI wrappers gains iommu stream configuration, which means DMA
 operations on e.g. I2C now works. The Lenovo Yoga C630 finally has the
 SMMU enabled, a few fixes and the description of the eDP bridge and
 panel means that the laptop can now boot mainline with working display,
 GPU, WiFi and audio.
 
 SC7180 gains a slew of smaller improvements and fixes.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl/FP0cbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FINAP/11hbDNRXJ+3oqLk53aD
 /8G0Xbyzy9gekpYURZwJJrjaGY7l1psM39Kbo+flUPusFfxRBNmbWrw57PPbzjyS
 d3RnPXuc/XDkOvCHtQstowtdKBl5EIXU6ec9xg4RY5bZUiD5Fpk8OLBAitvruEqy
 6YCgMhy5yRspb8iBXA5N4ERU0EsQBOMIIoP6DRuGkeMkUhk/QllO+xwAr6ugI3Ot
 s3gua4tjWfi5kxT0bXklU4fk7Xeiuy6VL+giddd4dWVUm2GdO7jRlU6ae6CLoi2k
 PStZJcca8uOpTMpF4ZqMLNX51UAk+VZsCvjMm5pYIQAWCp15sWyMA20wi8vM+cjx
 HHhsXU7WAqQfLzMntgUd36CJaTuGw8J+QzQyNpQeHjbL6tAA15BfnIIQ+RUZWgsx
 XoPWdSvmUBhyo9g2cR7yXRXQGxvMRy/w7uHgv6Szb9KkDxeBnpYMjBMrbaZAsyMA
 YoYvhdIO9HkL2IbUxQgiszQsD58aDvauEY+KpOZclVW5ODPhJmsSTZK2aH/L6kj9
 6hn0rOBrXy8rZE5Vs08C5D2WvqZ0Ib45vXNpb9uucvyXXNZMywGw+94B3YMNbkCz
 /C9C1DJcRX1NZjJnQco3Cn0Ni7AmRzD5aAHi3n2BhxbsxOxZ6v0SjEDbce+lXwYJ
 5l4AcPSLDjGXFJsbUPQrHvJF
 =lkn4
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DT updates for 5.11

For SM8250 the recently introduced support for handling boot-loader
stream mappings in the ARM SMMU allow us to enable this, and thereby USB
controller and PHY, SDHCI controller and FastRPC, as well as support for
the SM8250 HDK board has been added. Additionally PRNG and RTC is
enabled.

Similarly for SM8150, the ARM SMMU could be added which allows the
secondary USB controller and PHYs, as well as WiFi to be added and
support for the SM8150 HDK board to be introduced. Additionally
Coresight and support for the last-level cache controller was added.

MSM8916 finally has VDDCX and VDDMX removed as regulators and are now
handled by the rpmpd driver for the devices controlling them. The
Longsheer L8150 gains touchscreen, sensors, vibrator and LED support.

MSM8992 gains USB and SDHCI support as well as an I2C controller and the
associated RMI4 based touchscreen for the Lumia 950.

MSM8994 also gains USB and SDHCI support, as well as VADC and temp-alarm
support. Then support for the Lumia 950 XL is added.

SDM845 gains interconnect properties for a number of devices and the
GENI wrappers gains iommu stream configuration, which means DMA
operations on e.g. I2C now works. The Lenovo Yoga C630 finally has the
SMMU enabled, a few fixes and the description of the eDP bridge and
panel means that the laptop can now boot mainline with working display,
GPU, WiFi and audio.

SC7180 gains a slew of smaller improvements and fixes.

* tag 'qcom-arm64-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (93 commits)
  arm64: dts: qcom: c630: Define eDP bridge and panel
  arm64: dts: qcom: c630: Fix pinctrl pins properties
  arm64: dts: qcom: c630: Polish i2c-hid devices
  arm64: dts: qcom: sc7180: Add lpass cpu node for I2S driver
  arm64: dts: sdm845: Add interconnect properties for QUP
  interconnect: qcom: sdm845: Add the missing nodes for QUP
  dt-bindings: interconnect: sdm845: Add IDs for the QUP ports
  arm64: dts: qcom: c630: Expose LID events
  arm64: dts: qcom: c630: Re-enable apps_smmu
  dts: qcom: sdm845: Add dt entries to support crypto engine.
  arm64: dts: qcom: qrb5165-rb5: Add support for MCP2518FD
  arm64: dts: qcom: sdm845: use GIC_SPI for IPA interrupts
  arm64: dts: qcom: sc7180: use GIC_SPI for IPA interrupts
  arm64: dts: qcom: sc7180: limit IPA iommu streams
  arm64: dts: qcom: sm8150: Add Coresight support
  arm64: dts: qcom: sc7180-trogdor: Make pp3300_a the default supply for pp3300_hub
  arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant
  arm64: dts: qcom: sc7180-lite: Tweak DDR/L3 scaling on SC7180-lite
  arm64: dts: qcom: sc7180-trogdor: add "pen-insert" label for trogdor
  arm64: qcom: sc7180: trogdor: Add ADC nodes and thermal zone for charger thermistor
  ...

Link: https://lore.kernel.org/r/20201130190131.345187-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08 23:50:08 +01:00
Greg Kroah-Hartman 9fb3b4cae4 interconnect changes for 5.11
Here are the interconnect changes for the 5.10-rc1 merge window
 consisting of new driver and a cleanup.
 
 Driver changes:
 - New driver for Samsung Exynos SoCs
 - Misc cleanups
 
 Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABAgAGBQJfyKneAAoJEIDQzArG2BZjxkgP/A5IFeYEpwhOcG0M8hWmufOD
 7suY07nHOm2Ln2UA819nGaS3xew0+OSuFAoKQW+G+pzIxB/PZkOURUFzLLkvrDsg
 IWi7BH6Q3IYGmd9/KMx0AmVaFVV35HawQmuoqv/tpHE/E0nf6TyqtxK2HfvKt+Ch
 KMJea5gvnBPZlyItFltTq7XLbc+dyfIh9z37RaEuY2949WG47P4KVegi2RyXm2aL
 POkYmOxJz2XZxnzmCddl7yAGHr3e8mLc+A+kjGxJ8Dq0fiH7xzFnFEBkHMREaxXg
 e9XAtimrZ1/g0kdisfOecbcAnRpZCEwqGeZw+ThoczgD7gxF2HLTAbFXT0y+3jor
 RCT1+u2i6Qi9u0C+U/A1mCqgZ/QkjHoaKi0Habphwbeb59fC9hykU8BwXvlkFldZ
 xxHVlEdDnmwp3F+cGysgXRaGkRm9REMCG8FvGdKpuuKJpx/DWko+i8nheSBoG+ux
 tEuNmMiqnhtQ75lwZ0rj0T3cfhTBJJALVk5kX9gsifM7gdnXLnwq2HGhngxC4O5+
 z3ngJ4PVc7mvzABWsJOBG+TfYyAHWt+R/LNpxq/2ajVO7NJ2jl6fHD949gtbhcqF
 NMtYD7EjW3xd0UTRB7Axkr85RE9Z+UNPE3BEHqXA9nNlp/hJzxMQbXgwICWI18tU
 +CmhQ/0i8RKr3PvvtRm7
 =a7If
 -----END PGP SIGNATURE-----

Merge tag 'icc-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.11

Here are the interconnect changes for the 5.10-rc1 merge window
consisting of new driver and a cleanup.

Driver changes:
- New driver for Samsung Exynos SoCs
- Misc cleanups

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>

* tag 'icc-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  MAINTAINERS: Add entry for Samsung interconnect drivers
  interconnect: Add generic interconnect driver for Exynos SoCs
  interconnect: qcom: Simplify the vcd compare function
2020-12-04 14:11:20 +01:00
Georgi Djakov cd5fc457e5 interconnect: qcom: sdm845: Add the missing nodes for QUP
The QUP nodes are currently defined just as entries in the topology,
but they are not referenced by any of the NoCs. Let's fix this and
"attach" them to their NoCs, so that the QUP drivers are able to use
them as path endpoints and scale their bandwidth.

This is based on the information from the downstream msm-4.9 kernel.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Link: https://lore.kernel.org/r/20201105135211.7160-2-georgi.djakov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-30 10:42:47 -06:00
Georgi Djakov be49d5b298 interconnect: qcom: Simplify the vcd compare function
Let's simplify the cmp_vcd() function and replace the conditionals
with just a single statement, which also improves readability.

Reviewed-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20201013171923.7351-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-11-30 17:26:22 +02:00
Georgi Djakov 7ab1e91176 interconnect: qcom: qcs404: Remove GPU and display RPM IDs
The following errors are noticed during boot on a QCS404 board:
[    2.926647] qcom_icc_rpm_smd_send mas 6 error -6
[    2.934573] qcom_icc_rpm_smd_send mas 8 error -6

These errors show when we try to configure the GPU and display nodes.
Since these particular nodes aren't supported on RPM and are purely
local, we should just change their mas_rpm_id to -1 to avoid any
requests being sent for these master IDs.

Reviewed-by: Mike Tipton <mdtipton@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201118111044.26056-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-11-20 15:52:05 +02:00
Georgi Djakov c497f9322a interconnect: qcom: msm8916: Remove rpm-ids from non-RPM nodes
Some nodes are incorrectly marked as RPM-controlled (they have RPM
master and slave ids assigned), but are actually controlled by the
application CPU instead. The RPM complains when we send requests for
resources that it can't control. Let's fix this by replacing the IDs,
with the default "-1" in which case no requests are sent.

Reviewed-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20201112105140.10092-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-11-20 15:51:51 +02:00
Georgi Djakov 9caf2d956c interconnect: qcom: msm8974: Don't boost the NoC rate during boot
It has been reported that on Fairphone 2 (msm8974-based), increasing
the clock rate for some of the NoCs during boot may lead to hangs.
Let's restore the original behavior and not touch the clock rate of
any of the NoCs to fix the regression.

Reported-by: Luca Weiss <luca@z3ntu.xyz>
Tested-by: Luca Weiss <luca@z3ntu.xyz>
Fixes: b1d681d8d3 ("interconnect: Add sync state support")
Link: https://lore.kernel.org/r/20201109124512.10776-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-11-18 00:21:47 +02:00
Georgi Djakov 7381e27b1e interconnect: qcom: msm8974: Prevent integer overflow in rate
When sync_state support got introduced recently, by default we try to
set the NoCs to run initially at maximum rate. But as these values are
aggregated, we may end with a really big clock rate value, which is
then converted from "u64" to "long" during the clock rate rounding.
But on 32bit platforms this may result an overflow. Fix it by making
sure that the rate is within range.

Reported-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20201106144847.7726-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-11-18 00:18:05 +02:00
Dmitry Baryshkov fce52ad348 interconnect: qcom: use icc_sync state for sm8[12]50
In addition to the rest of Qcom interconnect drivers use icc_sync_state
for SM8150/SM8250 interconnect drivers to notify the interconnect
framework when all consumers are probed and there is no need to keep the
bandwidth set to maximum anymore.

Also move the BCM initialization before creating the nodes to set the
max bandwidth in hardware for the initialization/probing stage.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Link: https://lore.kernel.org/r/20201027133418.976687-1-dmitry.baryshkov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-10-27 16:01:22 +02:00
Georgi Djakov 266cd33b59 interconnect: qcom: Ensure that the floor bandwidth value is enforced
Take into account the initial bandwidth from the framework and update
the internal sum and max values before committing if needed. This will
ensure that the floor bandwidth values are enforced until the providers
get into sync state.

Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Tested-by: Akash Asthana <akashast@codeaurora.org>
Link: https://lore.kernel.org/r/20201021155938.9223-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-10-22 13:26:26 +03:00
Georgi Djakov 599809540f interconnect: qcom: sc7180: Init BCMs before creating the nodes
Currently if we use sync_state, by default the bandwidth is maxed out,
but in order to set this in hardware, the BCMs (Bus Clock Managers) need
to be initialized first. Move the BCM initialization before creating the
nodes to fix this.

Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Acked-by: Saravana Kannan <saravanak@google.com>
Link: https://lore.kernel.org/r/20201013135913.29059-3-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-10-15 09:24:00 +03:00
Georgi Djakov 0f221a7290 interconnect: qcom: sdm845: Init BCMs before creating the nodes
Currently if we use sync_state, by default the bandwidth is maxed out,
but in order to set this in hardware, the BCMs (Bus Clock Managers) need
to be initialized first. Move the BCM initialization before creating the
nodes to fix this.

Fixes: 7d3b0b0d81 ("interconnect: qcom: Use icc_sync_state")
Acked-by: Saravana Kannan <saravanak@google.com>
Link: https://lore.kernel.org/r/20201013135913.29059-2-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-10-15 09:24:00 +03:00
Georgi Djakov 5be1805dc3 interconnect: qcom: sdm845: Enable keepalive for the MM1 BCM
After enabling interconnect scaling for display on the db845c board,
in certain configurations the board hangs, while the following errors
are observed on the console:

  Error sending AMC RPMH requests (-110)
  qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000
  qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000
  qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000
  ...

In this specific case, the above is related to one of the sequencers
being stuck, while client drivers are returning from probe and trying
to disable the currently unused clock and interconnect resources.
Generally we want to keep the multimedia NoC enabled like the rest of
the NoCs, so let's set the keepalive flag on it too.

Fixes: aae57773fb ("interconnect: qcom: sdm845: Split qnodes into their respective NoCs")
Reported-by: Amit Pundir <amit.pundir@linaro.org>
Reviewed-by: Mike Tipton <mdtipton@codeaurora.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Link: https://lore.kernel.org/r/20201012194034.26944-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-10-15 09:23:25 +03:00
Georgi Djakov 628fdbcf9d Merge branch 'icc-syncstate' into icc-next
* icc-syncstate:
  interconnect: Add get_bw() callback
  interconnect: Add sync state support
  interconnect: qcom: Use icc_sync_state

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-18 09:13:40 +03:00
Georgi Djakov 7d3b0b0d81 interconnect: qcom: Use icc_sync_state
Lowering the bandwidth on the bus might have negative consequences if
it's done before all consumers had a chance to cast their vote. Now by
default the framework sets the bandwidth to maximum during boot. We need
to use the icc_sync_state callback to notify the framework when all
consumers are probed and there is no need to keep the bandwidth set to
maximum anymore.

Link: https://lore.kernel.org/r/20200825170152.6434-4-georgi.djakov@linaro.org
Reviewed-by: Saravana Kannan <saravanak@google.com>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-18 08:57:18 +03:00
Stephen Boyd b1a367bb1c interconnect: qcom: osm-l3: Mark more structures const
These structures aren't modified at runtime. Mark them const so they get
moved to read-only memory. We have to cast away const in one place when
we store into the data member of struct icc_node. This is paired with a
re-const of the data member when it is extracted in qcom_icc_set().

Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Link: https://lore.kernel.org/r/20200914182112.513981-1-swboyd@chromium.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-15 09:10:21 +03:00
Sibi Sankar d7e19be60b interconnect: qcom: Add EPSS L3 support on SM8250
Add Epoch Subsystem (EPSS) L3 interconnect provider support on
SM8250 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200801123049.32398-6-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:29:01 +03:00
Sibi Sankar 2bf706ea93 interconnect: qcom: Lay the groundwork for adding EPSS support
Lay the groundwork for adding Epoch Subsystem (EPSS) L3 support on
SM8250.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200801123049.32398-4-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:29:01 +03:00
Sibi Sankar f995194545 interconnect: qcom: Add OSM L3 support on SM8150
Add Operation State Manager (OSM) L3 interconnect provider support on
SM8150 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200801123049.32398-3-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:29:01 +03:00
Sibi Sankar 5c3aff6d67 interconnect: qcom: sc7180: Replace xlate with xlate_extended
Use the qcom_icc_xlate_extended() in order to parse tags, that are
specified as an additional arguments to the path endpoints in DT.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20200903133134.17201-7-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:29:01 +03:00
Georgi Djakov 6478e0d4d1 interconnect: qcom: sdm845: Replace xlate with xlate_extended
Use the qcom_icc_xlate_extended() in order to parse tags, that are
specified as an additional arguments to the path endpoints in DT.

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/20200903133134.17201-5-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:29:00 +03:00
Georgi Djakov 6caa3070fd interconnect: qcom: Implement xlate_extended() to parse tags
Implement a function to parse the arguments of the "interconnects" DT
property and populate the interconnect path tags if this information
is available.

Tested-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200903133134.17201-4-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:29:00 +03:00
Mike Tipton cb30e0292d interconnect: qcom: Add support for per-BCM scaling factors
Currently, bcm-voter always assumes requests are made in KBps and that
BCM HW always wants them in Bps, so it always scales the requests by
1000. However, certain use cases and BCMs may use different units.
Thus, add support for BCM-specific scaling factors.

Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20200903192149.30385-7-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:28:57 +03:00
Mike Tipton db474be2b6 interconnect: qcom: Only wait for completion in AMC/WAKE by default
Change the default TCS wait behavior to only wait for completion in AMC
and WAKE. Waiting isn't necessary in the SLEEP TCS, since votes are only
being removed in this case. Resources can be safely disabled
asynchronously in parallel with the rest of the power collapse sequence.
This reduces the sleep entry latency.

Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20200903192149.30385-6-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:28:56 +03:00
Mike Tipton b92902fddf interconnect: qcom: Support bcm-voter-specific TCS wait behavior
Currently, all bcm-voters set tcs_cmd::wait=true for the last VCD
command in each TCS (AMC, WAKE, and SLEEP). However, some bcm-voters
don't need the completion and instead need to optimize for latency. For
instance, disabling wait-for-completion in the WAKE set can decrease
resume latency and allow for certain operations to occur in parallel
with the WAKE TCS triggering. This is only safe in very specific
situations. Keep the default behavior of always waiting, but allow it to
be overridden in devicetree.

Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20200903192149.30385-5-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:28:55 +03:00
Mike Tipton 65e0e4d679 dt-bindings: interconnect: Add generic qcom bindings
Add generic qcom interconnect bindings that are common across platforms. In
particular, these include QCOM_ICC_TAG_* macros that clients can use when
calling icc_set_tag().

Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200903192149.30385-3-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:28:54 +03:00
Jonathan Marek 6df5b34949 interconnect: qcom: Add SM8250 interconnect provider driver
Add driver for the Qualcomm interconnect buses found in SM8250 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.

Based on SC7180 driver and generated from downstream dts.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200728023811.5607-6-jonathan@marek.ca
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:28:53 +03:00
Jonathan Marek a09b817c8b interconnect: qcom: Add SM8150 interconnect provider driver
Add driver for the Qualcomm interconnect buses found in SM8150 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.

Based on SC7180 driver and generated from downstream dts.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200728023811.5607-5-jonathan@marek.ca
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-08 16:28:51 +03:00
Mike Tipton 91e045b93d interconnect: qcom: Fix small BW votes being truncated to zero
Small BW votes that translate to less than a single BCM unit are
currently truncated to zero. Ensure that non-zero BW requests always
result in at least a vote of 1 to BCM.

Fixes: 976daac4a1 ("interconnect: qcom: Consolidate interconnect RPMh support")
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Link: https://lore.kernel.org/r/20200903192149.30385-2-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-09-04 00:07:12 +03:00
Linus Torvalds 822ef14e9d ARM: SoC driver updates for v5.9
A couple of subsystems have their own subsystem maintainers but choose
 to have the code merged through the soc tree as upstream, as the code
 tends to be used across multiple SoCs or has SoC specific drivers itself:
 
  - memory controllers:
      Krzysztof Kozlowski takes ownership of the drivers/memory
      subsystem and its drivers, starting out with a set of cleanup
      patches.
      A larger driver for the Tegra memory controller that was accidentally
      missed for v5.8 is now added.
 
  - reset controllers:
      Only minor updates to drivers/reset this time
 
  - firmware:
      The "turris mox" firmware driver gains support for signed firmware blobs
      The tegra firmware driver gets extended to export some debug information
      Various updates to i.MX firmware drivers, mostly cosmetic
 
  - ARM SCMI/SCPI:
      A new mechanism for platform notifications is added, among a number
      of minor changes.
 
  - optee:
      Probing of the TEE bus is rewritten to better support detection of
      devices that depend on the tee-supplicant user space.
      A new firmware based trusted platform module (fTPM) driver is added
      based on OP-TEE
 
  - SoC attributes:
      A new driver is added to provide a generic soc_device for identifying
      a machine through the SMCCC ARCH_SOC_ID firmware interface rather than
      by probing SoC family specific registers.
      The series also contains some cleanups to the common soc_device code.
 
 There are also a number of updates to SoC specific drivers,
 the main ones are:
 
  - Mediatek cmdq driver gains a few in-kernel interfaces
 
  - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
    support for additional SoC variants
 
  - The Qualcomm GENI core code gains interconnect path voting and
    performance level support, and integrating this into a number of
    device drivers.
 
  - A new driver for Samsung Exynos5800 voltage coupler for
 
  - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
    specific device drivers
 
  - Updates to the TI K3 Ring Accelerator driver
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8j3y4ACgkQmmx57+YA
 GNm8Iw//euEC37KaiBDhlK3mcAL7NOdITqZpq4m+ZJZBsF02NDMWktJR8bYuOgmp
 kjR4LjCxa2i+UOq1Ln+zYSlS27AngZLHFM+YSG3jqDho12GYIe4OBZB/q/hkDu71
 L5jCPNrZV9+GIcean2u8LOWDNlQ4SZQyZ1/gcCK7y7I8W1pVulmJRhtJ0MNkezni
 gDQ+OH+6+6XY8AethWK9ubsYH7SeJX/U6I8t5KJGhPr6FlaJFZOO5RTdUkBFMHpS
 i4UaT4meuqZUjwz4BhjvoYul5AT6Zc8OOTQwk1FM7dIe47aI8VkWrWci/IekxoLh
 UXtKbAJxerCIdehfiygX4pKtOmRKSisS2ocWsKg46Htu11ltv0XMRgyLyGv4Vm84
 g+fKfKUL0SUueDqr+jKEq2aZdyLxwV5ZUoFt3IVsXdHRkZtxpN8jmOHOjV6erLVY
 m7S85U5eclNdK5Ap7RSVvQa4NP3NTUvJd1IDNIneUVyACRkxzWEKmE3ZuEO4qttS
 WSDW74m5ja80pltv1umFbGAsOUTZWA+WGULeXPv4CIooaD8RL6Jzs+7tkZEEhleU
 WlGBFE4eJi/ChMeyTKXPvEqsQncLSf0mGzM4/DVY6XRSTIrW+cuj1/Gsso1BJdod
 aZZ76uMNHJdAt0PcxL47lDUDxhJDkTwBsfGNJseZ3sYlAQ7Wmqo=
 =nezz
 -----END PGP SIGNATURE-----

Merge tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "A couple of subsystems have their own subsystem maintainers but choose
  to have the code merged through the soc tree as upstream, as the code
  tends to be used across multiple SoCs or has SoC specific drivers
  itself:

   - memory controllers:

     Krzysztof Kozlowski takes ownership of the drivers/memory subsystem
     and its drivers, starting out with a set of cleanup patches.

     A larger driver for the Tegra memory controller that was
     accidentally missed for v5.8 is now added.

   - reset controllers:

     Only minor updates to drivers/reset this time

   - firmware:

     The "turris mox" firmware driver gains support for signed firmware
     blobs The tegra firmware driver gets extended to export some debug
     information Various updates to i.MX firmware drivers, mostly
     cosmetic

   - ARM SCMI/SCPI:

     A new mechanism for platform notifications is added, among a number
     of minor changes.

   - optee:

     Probing of the TEE bus is rewritten to better support detection of
     devices that depend on the tee-supplicant user space. A new
     firmware based trusted platform module (fTPM) driver is added based
     on OP-TEE

   - SoC attributes:

     A new driver is added to provide a generic soc_device for
     identifying a machine through the SMCCC ARCH_SOC_ID firmware
     interface rather than by probing SoC family specific registers.

     The series also contains some cleanups to the common soc_device
     code.

  There are also a number of updates to SoC specific drivers, the main
  ones are:

   - Mediatek cmdq driver gains a few in-kernel interfaces

   - Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
     support for additional SoC variants

   - The Qualcomm GENI core code gains interconnect path voting and
     performance level support, and integrating this into a number of
     device drivers.

   - A new driver for Samsung Exynos5800 voltage coupler for

   - Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
     specific device drivers

   - Updates to the TI K3 Ring Accelerator driver"

* tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits)
  soc: qcom: geni: Fix unused label warning
  soc: qcom: smd-rpm: Fix kerneldoc
  memory: jz4780_nemc: Only request IO memory the driver will use
  soc: qcom: pdr: Reorder the PD state indication ack
  MAINTAINERS: Add Git repository for memory controller drivers
  memory: brcmstb_dpfe: Fix language typo
  memory: samsung: exynos5422-dmc: Correct white space issues
  memory: samsung: exynos-srom: Correct alignment
  memory: pl172: Enclose macro argument usage in parenthesis
  memory: of: Correct kerneldoc
  memory: omap-gpmc: Fix language typo
  memory: omap-gpmc: Correct white space issues
  memory: omap-gpmc: Use 'unsigned int' for consistency
  memory: omap-gpmc: Enclose macro argument usage in parenthesis
  memory: omap-gpmc: Correct kerneldoc
  memory: mvebu-devbus: Align with open parenthesis
  memory: mvebu-devbus: Add missing braces to all arms of if statement
  memory: bt1-l2-ctl: Add blank lines after declarations
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  ...
2020-08-03 19:30:59 -07:00
Georgi Djakov 92d232d176 interconnect: msm8916: Fix buswidth of pcnoc_s nodes
The buswidth of the pcnoc_s_* nodes is actually not 8, but
4 bytes. Let's fix it.

Reported-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Mike Tipton <mdtipton@codeaurora.org>
Fixes: 30c8fa3ec6 ("interconnect: qcom: Add MSM8916 interconnect provider driver")
Link: https://lore.kernel.org/r/20200709130004.12462-1-georgi.djakov@linaro.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Cc: stable <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200723083735.5616-3-georgi.djakov@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-23 10:45:24 +02:00
Maulik Shah 73edcd38d7 soc: qcom: rpmh: Update rpmh_invalidate function to return void
Currently rpmh_invalidate() always returns success. Update its
return type to void.

Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1592485553-29163-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-22 14:23:46 -07:00
ChenTao 5409e0cca5 interconnect: qcom: Move the static keyword to the front of declaration
Fix the following warning:

Move the static keyword to the front of declaration of sdm845_icc_osm_l3
sdm845_aggre1_noc sc7180_icc_osm_l3 sdm845_aggre2_noc sdm845_config_noc
sdm845_dc_noc sdm845_gladiator_noc sdm845_mem_noc sdm845_mmss_noc and
sdm845_system_noc, resolve the following compiler warning that can be
when building with warnings enabled (W=1):

drivers/interconnect/qcom/osm-l3.c:81:1: warning:
 const static struct qcom_icc_desc sdm845_icc_osm_l3 = {
drivers/interconnect/qcom/osm-l3.c:94:1: warning:
 const static struct qcom_icc_desc sc7180_icc_osm_l3 = {
drivers/interconnect/qcom/sdm845.c:195:1: warning:
 const static struct qcom_icc_desc sdm845_aggre1_noc = {
drivers/interconnect/qcom/sdm845.c:223:1: warning:
 const static struct qcom_icc_desc sdm845_aggre2_noc = {
drivers/interconnect/qcom/sdm845.c:284:1: warning:
 const static struct qcom_icc_desc sdm845_config_noc = {
drivers/interconnect/qcom/sdm845.c:300:1: warning:
 const static struct qcom_icc_desc sdm845_dc_noc = {
drivers/interconnect/qcom/sdm845.c:318:1: warning:
 const static struct qcom_icc_desc sdm845_gladiator_noc = {
drivers/interconnect/qcom/sdm845.c:353:1: warning:
 const static struct qcom_icc_desc sdm845_mem_noc = {
drivers/interconnect/qcom/sdm845.c:387:1: warning:
 const static struct qcom_icc_desc sdm845_mmss_noc = {
drivers/interconnect/qcom/sdm845.c:433:1: warning:
 const static struct qcom_icc_desc sdm845_system_noc = {

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: ChenTao <chentao107@huawei.com>
Link: https://lore.kernel.org/r/20200423132142.45174-1-chentao107@huawei.com
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Link: https://lore.kernel.org/r/20200429101904.5771-2-georgi.djakov@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-29 13:11:44 +02:00
Mike Tipton 9c0c54a8da interconnect: qcom: Fix uninitialized tcs_cmd::wait
Currently, if tcs_cmd_gen is called with commit=false, then
tcs_cmd::wait is left uninitialized. Since the tcs_cmd structures passed
to this function aren't zero-initialized, then we're left with random
wait values. This results in waiting for completion for more commands
than is necessary, depending on what's on the stack at the time.

Removing the unnecessary if-condition fixes this, but add an explicit
memset of the tcs_cmd structure as well to ensure predictable behavior
if more tcs_cmd members are added in the future.

Fixes: 976daac4a1 ("interconnect: qcom: Consolidate interconnect RPMh support")
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200319231021.18108-1-mdtipton@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Link: https://lore.kernel.org/r/20200415130327.23059-2-georgi.djakov@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-04-23 16:18:07 +02:00
Sibi Sankar 03c4e6186b interconnect: qcom: Add OSM L3 support on SC7180
Add Operating State Manager (OSM) L3 interconnect provider support on
SC7180 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Link: https://lore.kernel.org/r/20200227105632.15041-6-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-03-03 19:02:52 +02:00
Sibi Sankar 5bc9900add interconnect: qcom: Add OSM L3 interconnect provider support
On some Qualcomm SoCs, Operating State Manager (OSM) controls the
resources of scaling L3 caches. Add a driver to handle bandwidth
requests to OSM L3 from CPU on SDM845 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Link: https://lore.kernel.org/r/20200227105632.15041-4-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-03-03 19:02:52 +02:00
Sibi Sankar 78465b0d3d interconnect: qcom: Allow icc node to be used across icc providers
Move the icc node ids to a common header, this will allow for
referencing/linking of icc nodes to multiple icc providers on
SDM845 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Link: https://lore.kernel.org/r/20200227105632.15041-2-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-03-03 19:02:52 +02:00
Odelu Kukatla 2d1f95ab9f interconnect: qcom: Add SC7180 interconnect provider driver
Add driver for the Qualcomm interconnect buses found in SC7180 based
platforms. The topology consists of several NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.

Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Link: https://lore.kernel.org/r/1583241493-21212-3-git-send-email-okukatla@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-03-03 19:02:52 +02:00
David Dai aae57773fb interconnect: qcom: sdm845: Split qnodes into their respective NoCs
In order to better represent the hardware and its different Network-On-Chip
devices, split the sdm845 provider driver into NoC specific providers.
Remove duplicate functionality already provided by the icc rpmh and
bcm voter drivers to calculate and commit bandwidth requests to hardware.

Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Link: https://lore.kernel.org/r/20200209183411.17195-6-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-02-28 12:11:40 +02:00
David Dai 976daac4a1 interconnect: qcom: Consolidate interconnect RPMh support
Add bcm voter driver and add support for RPMh specific interconnect
providers which implements the set and aggregate functionalities that
translates bandwidth requests into RPMh messages. These modules provide
a common set of functionalities for all Qualcomm RPMh based interconnect
providers and should help reduce code duplication when adding new
providers.

Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200228095951.15457-1-sibis@codeaurora.org
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-02-28 12:11:40 +02:00
Georgi Djakov 30c8fa3ec6 interconnect: qcom: Add MSM8916 interconnect provider driver
Add driver for the Qualcomm interconnect buses found in MSM8916 based
platforms. The topology consists of three NoCs that are controlled by
a remote processor that collects the aggregated bandwidth for each
master-slave pairs.

Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2020-01-07 09:30:09 +02:00
Georgi Djakov b92c35e1b9 interconnect: qcom: Use the standard aggregate function
Now we have a common function for standard aggregation, so let's use it,
instead of duplicating the code.

Reviewed-by: Brian Masney <masneyb@onstation.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2019-12-16 09:25:24 +02:00
Georgi Djakov ad3703ac24 interconnect: qcom: Use the new common helper for node removal
There is a new helper function for removing all nodes. Let's use it instead
of duplicating the code.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2019-12-16 09:25:23 +02:00
Georgi Djakov 3e42fe5c73 interconnect: qcom: msm8974: Walk the list safely on node removal
As we will remove items off the list using list_del(), we need to use the
safe version of list_for_each_entry().

Fixes: 4e60a9568d ("interconnect: qcom: add msm8974 driver")
Reported-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Link: https://lore.kernel.org/r/20191212075332.16202-5-georgi.djakov@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-12-12 10:28:54 +01:00
Georgi Djakov f39488ea2a interconnect: qcom: qcs404: Walk the list safely on node removal
As we will remove items off the list using list_del(), we need to use the
safe version of list_for_each_entry().

Fixes: 5e4e6c4d3a ("interconnect: qcom: Add QCS404 interconnect provider driver")
Reported-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Cc: <stable@vger.kernel.org> # v5.4
Link: https://lore.kernel.org/r/20191212075332.16202-4-georgi.djakov@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-12-12 10:28:53 +01:00
Georgi Djakov b29b8113bb interconnect: qcom: sdm845: Walk the list safely on node removal
As we will remove items off the list using list_del(), we need to use the
safe version of list_for_each_entry().

Fixes: b5d2f74107 ("interconnect: qcom: Add sdm845 interconnect provider driver")
Reported-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Cc: <stable@vger.kernel.org> # v5.3+
Link: https://lore.kernel.org/r/20191212075332.16202-3-georgi.djakov@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-12-12 10:28:53 +01:00
Krzysztof Kozlowski e27da6a6a4 interconnect: qcom: Fix Kconfig indentation
Adjust indentation from spaces to tab (+optional two spaces) as in
coding style with command like:
	$ sed -e 's/^        /\t/' -i */Kconfig

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Link: https://lore.kernel.org/r/20191212075332.16202-2-georgi.djakov@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-12-12 10:28:52 +01:00
Greg Kroah-Hartman 01b59c763f Merge 5.4-rc7 into char-misc-next
We need the char/misc driver fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-11-11 06:24:30 +01:00