Commit Graph

58 Commits

Author SHA1 Message Date
Mark Yao 5d82d1a785 drm/rockchip: vop: add vop power domain support
Reference the power domain incase vop power down when
in use.

Signed-off-by: Mark Yao <yzq@rock-chips.com>
2015-04-03 14:23:36 +08:00
Heiko Stuebner 7f53fbba3c drm/rockchip: fix clk enable disable mismatch in vop_crtc_mode_set
The function disables the dclk at the beginning, so don't simply return
when an error happens, but instead enable the clock again, so that
enable and disable calls are balanced.

ret_clk is introduced to hold the clk_enable result and not mangle the
original error code.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
2015-04-03 14:23:01 +08:00
Mark Yao 1067219b27 drm/rockchip: vop: power off until vop standby take effect
Vop standby will take effect at end of current frame,
if dsp_hold_valid_irq happen, it means vop standby complete.

we must wait standby complete when we want to disable aclk,
if not, memory bus maybe dead.

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-03-16 13:50:57 +08:00
Mark Yao 52ab7891fb drm/rockchip: vop: set vop enabled after enable iommu
there is a Bug that:
  vop_enable()->drm_vblank_on, drm_vblank_on may call vop
enable vblank. if it happen, vblank enable would failed,
then cause irq status error. because is_enabled value is set
after drm_vblank_on.

after enable vop clocks and iommu regs, we can sure that
R/W vop regs and do vop plane flip is safe, so place
is_enabled = true after enable iommu is suitable.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-03-16 13:50:32 +08:00
Mark Yao 31e980c5a2 drm/rockchip: vop use is_enabled instead of dpms mode
drm dpms have many power modes: ON,OFF,SUSPEND,STANDBY, etc.
but vop only have enable/disable mode, maybe case such bug:
 --> DRM_DPMS_ON: power on vop
 --> DRM_DPMS_SUSPEND: power off vop
 --> DRM_DPMS_OFF: already power off at SUSPEND, crash
so use a bool val is more suitable.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-03-16 13:50:04 +08:00
Mark Yao 44ddb7ef38 drm/rockchip: vop: fix vop vsync/hsync polarity
Vop set wrong vsync/hsync polarity, it may cause some
display problem. known problem is that caused HDMI hdcp
authenticate failed, caused pixel offset with hdmi display.
the polarity description at RK3288 TRM doc:
  dsp_vsync_pol
    VSYNC polarity
      1'b0 : negative
      1'b1 : positive
      dsp_hsync_pol
    HSYNC polarity
      1'b0 : negative
      1'b1 : positive

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
2015-03-16 13:48:15 +08:00
Philipp Zabel f66a162751 drm: rockchip: export functions needed by rockchip dw_hdmi bridge driver
To build the rockchip dw_hdmi driver as a module, the
rockchip_drm_encoder_get_mux_id and rockchip_drm_crtc_mode_config
functions need to be exported.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2015-01-07 18:32:35 +01:00
Mark Yao 2048e3286f drm: rockchip: Add basic drm driver
This patch adds the basic structure of a DRM Driver for Rockchip Socs.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-12-02 17:29:03 +08:00